2 * Copyright 2010 Christoph Bumiller
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the
9 * Software is furnished to do so, subject to the following conditions:
11 * The above copyright notice and this permission notice shall be included in
12 * all copies or substantial portions of the Software.
14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17 * THE AUTHORS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
18 * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF
19 * OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
23 #include "pipe/p_defines.h"
24 #include "util/u_inlines.h"
25 #include "util/u_transfer.h"
27 #include "tgsi/tgsi_parse.h"
29 #include "nv50_stateobj.h"
30 #include "nv50_context.h"
32 #include "nv50_3d.xml.h"
33 #include "nv50_texture.xml.h"
35 #include "nouveau/nouveau_gldefs.h"
38 * ! pipe_sampler_state.normalized_coords is ignored - rectangle textures will
39 * use non-normalized coordinates, everything else won't
40 * (The relevant bit is in the TIC entry and not the TSC entry.)
42 * ! pipe_sampler_state.seamless_cube_map is ignored - seamless filtering is
43 * always activated on NVA0 +
44 * (Give me the global bit, otherwise it's not worth the CPU work.)
46 * ! pipe_sampler_state.border_color is not swizzled according to the texture
47 * swizzle in pipe_sampler_view
48 * (This will be ugly with indirect independent texture/sampler access,
49 * we'd have to emulate the logic in the shader. GL doesn't have that,
50 * D3D doesn't have swizzle, if we knew what we were implementing we'd be
53 * ! pipe_rasterizer_state.line_last_pixel is ignored - it is never drawn
55 * ! pipe_rasterizer_state.flatshade_first also applies to QUADS
56 * (There's a GL query for that, forcing an exception is just ridiculous.)
58 * ! pipe_rasterizer_state.gl_rasterization_rules is ignored - pixel centers
59 * are always at half integer coordinates and the top-left rule applies
60 * (There does not seem to be a hardware switch for this.)
62 * ! pipe_rasterizer_state.sprite_coord_enable is masked with 0xff on NVC0
63 * (The hardware only has 8 slots meant for TexCoord and we have to assign
64 * in advance to maintain elegant separate shader objects.)
67 static INLINE
uint32_t
68 nv50_colormask(unsigned mask
)
72 if (mask
& PIPE_MASK_R
)
74 if (mask
& PIPE_MASK_G
)
76 if (mask
& PIPE_MASK_B
)
78 if (mask
& PIPE_MASK_A
)
84 #define NV50_BLEND_FACTOR_CASE(a, b) \
85 case PIPE_BLENDFACTOR_##a: return NV50_3D_BLEND_FACTOR_##b
87 static INLINE
uint32_t
88 nv50_blend_fac(unsigned factor
)
91 NV50_BLEND_FACTOR_CASE(ONE
, ONE
);
92 NV50_BLEND_FACTOR_CASE(SRC_COLOR
, SRC_COLOR
);
93 NV50_BLEND_FACTOR_CASE(SRC_ALPHA
, SRC_ALPHA
);
94 NV50_BLEND_FACTOR_CASE(DST_ALPHA
, DST_ALPHA
);
95 NV50_BLEND_FACTOR_CASE(DST_COLOR
, DST_COLOR
);
96 NV50_BLEND_FACTOR_CASE(SRC_ALPHA_SATURATE
, SRC_ALPHA_SATURATE
);
97 NV50_BLEND_FACTOR_CASE(CONST_COLOR
, CONSTANT_COLOR
);
98 NV50_BLEND_FACTOR_CASE(CONST_ALPHA
, CONSTANT_ALPHA
);
99 NV50_BLEND_FACTOR_CASE(SRC1_COLOR
, SRC1_COLOR
);
100 NV50_BLEND_FACTOR_CASE(SRC1_ALPHA
, SRC1_ALPHA
);
101 NV50_BLEND_FACTOR_CASE(ZERO
, ZERO
);
102 NV50_BLEND_FACTOR_CASE(INV_SRC_COLOR
, ONE_MINUS_SRC_COLOR
);
103 NV50_BLEND_FACTOR_CASE(INV_SRC_ALPHA
, ONE_MINUS_SRC_ALPHA
);
104 NV50_BLEND_FACTOR_CASE(INV_DST_ALPHA
, ONE_MINUS_DST_ALPHA
);
105 NV50_BLEND_FACTOR_CASE(INV_DST_COLOR
, ONE_MINUS_DST_COLOR
);
106 NV50_BLEND_FACTOR_CASE(INV_CONST_COLOR
, ONE_MINUS_CONSTANT_COLOR
);
107 NV50_BLEND_FACTOR_CASE(INV_CONST_ALPHA
, ONE_MINUS_CONSTANT_ALPHA
);
108 NV50_BLEND_FACTOR_CASE(INV_SRC1_COLOR
, ONE_MINUS_SRC1_COLOR
);
109 NV50_BLEND_FACTOR_CASE(INV_SRC1_ALPHA
, ONE_MINUS_SRC1_ALPHA
);
111 return NV50_3D_BLEND_FACTOR_ZERO
;
116 nv50_blend_state_create(struct pipe_context
*pipe
,
117 const struct pipe_blend_state
*cso
)
119 struct nv50_blend_stateobj
*so
= CALLOC_STRUCT(nv50_blend_stateobj
);
121 boolean emit_common_func
= cso
->rt
[0].blend_enable
;
123 if (nv50_context(pipe
)->screen
->tesla
->grclass
>= NVA3_3D
) {
124 SB_BEGIN_3D(so
, BLEND_INDEPENDENT
, 1);
125 SB_DATA (so
, cso
->independent_blend_enable
);
130 SB_BEGIN_3D(so
, COLOR_MASK_COMMON
, 1);
131 SB_DATA (so
, !cso
->independent_blend_enable
);
133 SB_BEGIN_3D(so
, BLEND_ENABLE_COMMON
, 1);
134 SB_DATA (so
, !cso
->independent_blend_enable
);
136 if (cso
->independent_blend_enable
) {
137 SB_BEGIN_3D(so
, BLEND_ENABLE(0), 8);
138 for (i
= 0; i
< 8; ++i
) {
139 SB_DATA(so
, cso
->rt
[i
].blend_enable
);
140 if (cso
->rt
[i
].blend_enable
)
141 emit_common_func
= TRUE
;
144 if (nv50_context(pipe
)->screen
->tesla
->grclass
>= NVA3_3D
) {
145 emit_common_func
= FALSE
;
147 for (i
= 0; i
< 8; ++i
) {
148 if (!cso
->rt
[i
].blend_enable
)
150 SB_BEGIN_3D_(so
, NVA3_3D_IBLEND_EQUATION_RGB(i
), 6);
151 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].rgb_func
));
152 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].rgb_src_factor
));
153 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].rgb_dst_factor
));
154 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[i
].alpha_func
));
155 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].alpha_src_factor
));
156 SB_DATA (so
, nv50_blend_fac(cso
->rt
[i
].alpha_dst_factor
));
160 SB_BEGIN_3D(so
, BLEND_ENABLE(0), 1);
161 SB_DATA (so
, cso
->rt
[0].blend_enable
);
164 if (emit_common_func
) {
165 SB_BEGIN_3D(so
, BLEND_EQUATION_RGB
, 5);
166 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[0].rgb_func
));
167 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].rgb_src_factor
));
168 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].rgb_dst_factor
));
169 SB_DATA (so
, nvgl_blend_eqn(cso
->rt
[0].alpha_func
));
170 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].alpha_src_factor
));
171 SB_BEGIN_3D(so
, BLEND_FUNC_DST_ALPHA
, 1);
172 SB_DATA (so
, nv50_blend_fac(cso
->rt
[0].alpha_dst_factor
));
175 if (cso
->logicop_enable
) {
176 SB_BEGIN_3D(so
, LOGIC_OP_ENABLE
, 2);
178 SB_DATA (so
, nvgl_logicop_func(cso
->logicop_func
));
180 SB_BEGIN_3D(so
, LOGIC_OP_ENABLE
, 1);
184 if (cso
->independent_blend_enable
) {
185 SB_BEGIN_3D(so
, COLOR_MASK(0), 8);
186 for (i
= 0; i
< 8; ++i
)
187 SB_DATA(so
, nv50_colormask(cso
->rt
[i
].colormask
));
189 SB_BEGIN_3D(so
, COLOR_MASK(0), 1);
190 SB_DATA (so
, nv50_colormask(cso
->rt
[0].colormask
));
193 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
198 nv50_blend_state_bind(struct pipe_context
*pipe
, void *hwcso
)
200 struct nv50_context
*nv50
= nv50_context(pipe
);
203 nv50
->dirty
|= NV50_NEW_BLEND
;
207 nv50_blend_state_delete(struct pipe_context
*pipe
, void *hwcso
)
212 /* NOTE: ignoring line_last_pixel, using FALSE (set on screen init) */
214 nv50_rasterizer_state_create(struct pipe_context
*pipe
,
215 const struct pipe_rasterizer_state
*cso
)
217 struct nv50_rasterizer_stateobj
*so
;
219 so
= CALLOC_STRUCT(nv50_rasterizer_stateobj
);
224 #ifndef NV50_SCISSORS_CLIPPING
225 SB_BEGIN_3D(so
, SCISSOR_ENABLE(0), 1);
226 SB_DATA (so
, cso
->scissor
);
229 SB_BEGIN_3D(so
, SHADE_MODEL
, 1);
230 SB_DATA (so
, cso
->flatshade
? NV50_3D_SHADE_MODEL_FLAT
:
231 NV50_3D_SHADE_MODEL_SMOOTH
);
232 SB_BEGIN_3D(so
, PROVOKING_VERTEX_LAST
, 1);
233 SB_DATA (so
, !cso
->flatshade_first
);
234 SB_BEGIN_3D(so
, VERTEX_TWO_SIDE_ENABLE
, 1);
235 SB_DATA (so
, cso
->light_twoside
);
237 SB_BEGIN_3D(so
, FRAG_COLOR_CLAMP_EN
, 1);
238 SB_DATA (so
, cso
->clamp_fragment_color
? 0x11111111 : 0x00000000);
240 SB_BEGIN_3D(so
, LINE_WIDTH
, 1);
241 SB_DATA (so
, fui(cso
->line_width
));
242 SB_BEGIN_3D(so
, LINE_SMOOTH_ENABLE
, 1);
243 SB_DATA (so
, cso
->line_smooth
);
245 SB_BEGIN_3D(so
, LINE_STIPPLE_ENABLE
, 1);
246 if (cso
->line_stipple_enable
) {
248 SB_BEGIN_3D(so
, LINE_STIPPLE
, 1);
249 SB_DATA (so
, (cso
->line_stipple_pattern
<< 8) |
250 cso
->line_stipple_factor
);
255 if (!cso
->point_size_per_vertex
) {
256 SB_BEGIN_3D(so
, POINT_SIZE
, 1);
257 SB_DATA (so
, fui(cso
->point_size
));
259 SB_BEGIN_3D(so
, POINT_SPRITE_ENABLE
, 1);
260 SB_DATA (so
, cso
->point_quad_rasterization
);
261 SB_BEGIN_3D(so
, POINT_SMOOTH_ENABLE
, 1);
262 SB_DATA (so
, cso
->point_smooth
);
264 SB_BEGIN_3D(so
, POLYGON_MODE_FRONT
, 3);
265 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_front
));
266 SB_DATA (so
, nvgl_polygon_mode(cso
->fill_back
));
267 SB_DATA (so
, cso
->poly_smooth
);
269 SB_BEGIN_3D(so
, CULL_FACE_ENABLE
, 3);
270 SB_DATA (so
, cso
->cull_face
!= PIPE_FACE_NONE
);
271 SB_DATA (so
, cso
->front_ccw
? NV50_3D_FRONT_FACE_CCW
:
272 NV50_3D_FRONT_FACE_CW
);
273 switch (cso
->cull_face
) {
274 case PIPE_FACE_FRONT_AND_BACK
:
275 SB_DATA(so
, NV50_3D_CULL_FACE_FRONT_AND_BACK
);
277 case PIPE_FACE_FRONT
:
278 SB_DATA(so
, NV50_3D_CULL_FACE_FRONT
);
282 SB_DATA(so
, NV50_3D_CULL_FACE_BACK
);
286 SB_BEGIN_3D(so
, POLYGON_STIPPLE_ENABLE
, 1);
287 SB_DATA (so
, cso
->poly_stipple_enable
);
288 SB_BEGIN_3D(so
, POLYGON_OFFSET_POINT_ENABLE
, 3);
289 SB_DATA (so
, cso
->offset_point
);
290 SB_DATA (so
, cso
->offset_line
);
291 SB_DATA (so
, cso
->offset_tri
);
293 if (cso
->offset_point
|| cso
->offset_line
|| cso
->offset_tri
) {
294 SB_BEGIN_3D(so
, POLYGON_OFFSET_FACTOR
, 1);
295 SB_DATA (so
, fui(cso
->offset_scale
));
296 SB_BEGIN_3D(so
, POLYGON_OFFSET_UNITS
, 1);
297 SB_DATA (so
, fui(cso
->offset_units
* 2.0f
));
300 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
305 nv50_rasterizer_state_bind(struct pipe_context
*pipe
, void *hwcso
)
307 struct nv50_context
*nv50
= nv50_context(pipe
);
310 nv50
->dirty
|= NV50_NEW_RASTERIZER
;
314 nv50_rasterizer_state_delete(struct pipe_context
*pipe
, void *hwcso
)
320 nv50_zsa_state_create(struct pipe_context
*pipe
,
321 const struct pipe_depth_stencil_alpha_state
*cso
)
323 struct nv50_zsa_stateobj
*so
= CALLOC_STRUCT(nv50_zsa_stateobj
);
327 SB_BEGIN_3D(so
, DEPTH_WRITE_ENABLE
, 1);
328 SB_DATA (so
, cso
->depth
.writemask
);
329 SB_BEGIN_3D(so
, DEPTH_TEST_ENABLE
, 1);
330 if (cso
->depth
.enabled
) {
332 SB_BEGIN_3D(so
, DEPTH_TEST_FUNC
, 1);
333 SB_DATA (so
, nvgl_comparison_op(cso
->depth
.func
));
338 if (cso
->stencil
[0].enabled
) {
339 SB_BEGIN_3D(so
, STENCIL_ENABLE
, 5);
341 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].fail_op
));
342 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zfail_op
));
343 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[0].zpass_op
));
344 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[0].func
));
345 SB_BEGIN_3D(so
, STENCIL_FRONT_MASK
, 2);
346 SB_DATA (so
, cso
->stencil
[0].writemask
);
347 SB_DATA (so
, cso
->stencil
[0].valuemask
);
349 SB_BEGIN_3D(so
, STENCIL_ENABLE
, 1);
353 if (cso
->stencil
[1].enabled
) {
354 assert(cso
->stencil
[0].enabled
);
355 SB_BEGIN_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 5);
357 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].fail_op
));
358 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zfail_op
));
359 SB_DATA (so
, nvgl_stencil_op(cso
->stencil
[1].zpass_op
));
360 SB_DATA (so
, nvgl_comparison_op(cso
->stencil
[1].func
));
361 SB_BEGIN_3D(so
, STENCIL_BACK_MASK
, 2);
362 SB_DATA (so
, cso
->stencil
[1].writemask
);
363 SB_DATA (so
, cso
->stencil
[1].valuemask
);
365 SB_BEGIN_3D(so
, STENCIL_TWO_SIDE_ENABLE
, 1);
369 SB_BEGIN_3D(so
, ALPHA_TEST_ENABLE
, 1);
370 if (cso
->alpha
.enabled
) {
372 SB_BEGIN_3D(so
, ALPHA_TEST_REF
, 2);
373 SB_DATA (so
, fui(cso
->alpha
.ref_value
));
374 SB_DATA (so
, nvgl_comparison_op(cso
->alpha
.func
));
379 assert(so
->size
<= (sizeof(so
->state
) / sizeof(so
->state
[0])));
384 nv50_zsa_state_bind(struct pipe_context
*pipe
, void *hwcso
)
386 struct nv50_context
*nv50
= nv50_context(pipe
);
389 nv50
->dirty
|= NV50_NEW_ZSA
;
393 nv50_zsa_state_delete(struct pipe_context
*pipe
, void *hwcso
)
398 /* ====================== SAMPLERS AND TEXTURES ================================
401 #define NV50_TSC_WRAP_CASE(n) \
402 case PIPE_TEX_WRAP_##n: return NV50_TSC_WRAP_##n
404 static INLINE
unsigned
405 nv50_tsc_wrap_mode(unsigned wrap
)
408 NV50_TSC_WRAP_CASE(REPEAT
);
409 NV50_TSC_WRAP_CASE(MIRROR_REPEAT
);
410 NV50_TSC_WRAP_CASE(CLAMP_TO_EDGE
);
411 NV50_TSC_WRAP_CASE(CLAMP_TO_BORDER
);
412 NV50_TSC_WRAP_CASE(CLAMP
);
413 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_EDGE
);
414 NV50_TSC_WRAP_CASE(MIRROR_CLAMP_TO_BORDER
);
415 NV50_TSC_WRAP_CASE(MIRROR_CLAMP
);
417 NOUVEAU_ERR("unknown wrap mode: %d\n", wrap
);
418 return NV50_TSC_WRAP_REPEAT
;
423 nv50_sampler_state_create(struct pipe_context
*pipe
,
424 const struct pipe_sampler_state
*cso
)
426 struct nv50_tsc_entry
*so
= CALLOC_STRUCT(nv50_tsc_entry
);
431 so
->tsc
[0] = (0x00026000 |
432 (nv50_tsc_wrap_mode(cso
->wrap_s
) << 0) |
433 (nv50_tsc_wrap_mode(cso
->wrap_t
) << 3) |
434 (nv50_tsc_wrap_mode(cso
->wrap_r
) << 6));
436 switch (cso
->mag_img_filter
) {
437 case PIPE_TEX_FILTER_LINEAR
:
438 so
->tsc
[1] |= NV50_TSC_1_MAGF_LINEAR
;
440 case PIPE_TEX_FILTER_NEAREST
:
442 so
->tsc
[1] |= NV50_TSC_1_MAGF_NEAREST
;
446 switch (cso
->min_img_filter
) {
447 case PIPE_TEX_FILTER_LINEAR
:
448 so
->tsc
[1] |= NV50_TSC_1_MINF_LINEAR
;
450 case PIPE_TEX_FILTER_NEAREST
:
452 so
->tsc
[1] |= NV50_TSC_1_MINF_NEAREST
;
456 switch (cso
->min_mip_filter
) {
457 case PIPE_TEX_MIPFILTER_LINEAR
:
458 so
->tsc
[1] |= NV50_TSC_1_MIPF_LINEAR
;
460 case PIPE_TEX_MIPFILTER_NEAREST
:
461 so
->tsc
[1] |= NV50_TSC_1_MIPF_NEAREST
;
463 case PIPE_TEX_MIPFILTER_NONE
:
465 so
->tsc
[1] |= NV50_TSC_1_MIPF_NONE
;
469 if (cso
->max_anisotropy
>= 16)
470 so
->tsc
[0] |= (7 << 20);
472 if (cso
->max_anisotropy
>= 12)
473 so
->tsc
[0] |= (6 << 20);
475 so
->tsc
[0] |= (cso
->max_anisotropy
>> 1) << 20;
477 if (cso
->max_anisotropy
>= 4)
478 so
->tsc
[1] |= NV50_TSC_1_UNKN_ANISO_35
;
480 if (cso
->max_anisotropy
>= 2)
481 so
->tsc
[1] |= NV50_TSC_1_UNKN_ANISO_15
;
484 if (cso
->compare_mode
== PIPE_TEX_COMPARE_R_TO_TEXTURE
) {
485 /* NOTE: must be deactivated for non-shadow textures */
486 so
->tsc
[0] |= (1 << 9);
487 so
->tsc
[0] |= (nvgl_comparison_op(cso
->compare_func
) & 0x7) << 10;
490 f
[0] = CLAMP(cso
->lod_bias
, -16.0f
, 15.0f
);
491 so
->tsc
[1] |= ((int)(f
[0] * 256.0f
) & 0x1fff) << 12;
493 f
[0] = CLAMP(cso
->min_lod
, 0.0f
, 15.0f
);
494 f
[1] = CLAMP(cso
->max_lod
, 0.0f
, 15.0f
);
496 (((int)(f
[1] * 256.0f
) & 0xfff) << 12) | ((int)(f
[0] * 256.0f
) & 0xfff);
498 so
->tsc
[4] = fui(cso
->border_color
[0]);
499 so
->tsc
[5] = fui(cso
->border_color
[1]);
500 so
->tsc
[6] = fui(cso
->border_color
[2]);
501 so
->tsc
[7] = fui(cso
->border_color
[3]);
507 nv50_sampler_state_delete(struct pipe_context
*pipe
, void *hwcso
)
511 for (s
= 0; s
< 3; ++s
)
512 for (i
= 0; i
< nv50_context(pipe
)->num_samplers
[s
]; ++i
)
513 if (nv50_context(pipe
)->samplers
[s
][i
] == hwcso
)
514 nv50_context(pipe
)->samplers
[s
][i
] = NULL
;
516 nv50_screen_tsc_free(nv50_context(pipe
)->screen
, nv50_tsc_entry(hwcso
));
522 nv50_stage_sampler_states_bind(struct nv50_context
*nv50
, int s
,
523 unsigned nr
, void **hwcso
)
527 for (i
= 0; i
< nr
; ++i
) {
528 struct nv50_tsc_entry
*old
= nv50
->samplers
[s
][i
];
530 nv50
->samplers
[s
][i
] = nv50_tsc_entry(hwcso
[i
]);
532 nv50_screen_tsc_unlock(nv50
->screen
, old
);
534 for (; i
< nv50
->num_samplers
[s
]; ++i
)
535 if (nv50
->samplers
[s
][i
])
536 nv50_screen_tsc_unlock(nv50
->screen
, nv50
->samplers
[s
][i
]);
538 nv50
->num_samplers
[s
] = nr
;
540 nv50
->dirty
|= NV50_NEW_SAMPLERS
;
544 nv50_vp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
546 nv50_stage_sampler_states_bind(nv50_context(pipe
), 0, nr
, s
);
550 nv50_fp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
552 nv50_stage_sampler_states_bind(nv50_context(pipe
), 2, nr
, s
);
556 nv50_gp_sampler_states_bind(struct pipe_context
*pipe
, unsigned nr
, void **s
)
558 nv50_stage_sampler_states_bind(nv50_context(pipe
), 1, nr
, s
);
561 /* NOTE: only called when not referenced anywhere, won't be bound */
563 nv50_sampler_view_destroy(struct pipe_context
*pipe
,
564 struct pipe_sampler_view
*view
)
566 pipe_resource_reference(&view
->texture
, NULL
);
568 nv50_screen_tic_free(nv50_context(pipe
)->screen
, nv50_tic_entry(view
));
570 FREE(nv50_tic_entry(view
));
574 nv50_stage_set_sampler_views(struct nv50_context
*nv50
, int s
,
576 struct pipe_sampler_view
**views
)
580 for (i
= 0; i
< nr
; ++i
) {
581 struct nv50_tic_entry
*old
= nv50_tic_entry(nv50
->textures
[s
][i
]);
583 nv50_screen_tic_unlock(nv50
->screen
, old
);
585 pipe_sampler_view_reference(&nv50
->textures
[s
][i
], views
[i
]);
588 for (i
= nr
; i
< nv50
->num_textures
[s
]; ++i
) {
589 struct nv50_tic_entry
*old
= nv50_tic_entry(nv50
->textures
[s
][i
]);
592 nv50_screen_tic_unlock(nv50
->screen
, old
);
594 pipe_sampler_view_reference(&nv50
->textures
[s
][i
], NULL
);
597 nv50
->num_textures
[s
] = nr
;
599 nv50_bufctx_reset(nv50
, NV50_BUFCTX_TEXTURES
);
601 nv50
->dirty
|= NV50_NEW_TEXTURES
;
605 nv50_vp_set_sampler_views(struct pipe_context
*pipe
,
607 struct pipe_sampler_view
**views
)
609 nv50_stage_set_sampler_views(nv50_context(pipe
), 0, nr
, views
);
613 nv50_fp_set_sampler_views(struct pipe_context
*pipe
,
615 struct pipe_sampler_view
**views
)
617 nv50_stage_set_sampler_views(nv50_context(pipe
), 2, nr
, views
);
621 nv50_gp_set_sampler_views(struct pipe_context
*pipe
,
623 struct pipe_sampler_view
**views
)
625 nv50_stage_set_sampler_views(nv50_context(pipe
), 1, nr
, views
);
628 /* ============================= SHADERS =======================================
632 nv50_sp_state_create(struct pipe_context
*pipe
,
633 const struct pipe_shader_state
*cso
, unsigned type
)
635 struct nv50_program
*prog
;
637 prog
= CALLOC_STRUCT(nv50_program
);
642 prog
->pipe
.tokens
= tgsi_dup_tokens(cso
->tokens
);
648 nv50_sp_state_delete(struct pipe_context
*pipe
, void *hwcso
)
650 struct nv50_program
*prog
= (struct nv50_program
*)hwcso
;
652 nv50_program_destroy(nv50_context(pipe
), prog
);
654 FREE((void *)prog
->pipe
.tokens
);
659 nv50_vp_state_create(struct pipe_context
*pipe
,
660 const struct pipe_shader_state
*cso
)
662 return nv50_sp_state_create(pipe
, cso
, PIPE_SHADER_VERTEX
);
666 nv50_vp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
668 struct nv50_context
*nv50
= nv50_context(pipe
);
670 nv50
->vertprog
= hwcso
;
671 nv50
->dirty
|= NV50_NEW_VERTPROG
;
675 nv50_fp_state_create(struct pipe_context
*pipe
,
676 const struct pipe_shader_state
*cso
)
678 return nv50_sp_state_create(pipe
, cso
, PIPE_SHADER_FRAGMENT
);
682 nv50_fp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
684 struct nv50_context
*nv50
= nv50_context(pipe
);
686 nv50
->fragprog
= hwcso
;
687 nv50
->dirty
|= NV50_NEW_FRAGPROG
;
691 nv50_gp_state_create(struct pipe_context
*pipe
,
692 const struct pipe_shader_state
*cso
)
694 return nv50_sp_state_create(pipe
, cso
, PIPE_SHADER_GEOMETRY
);
698 nv50_gp_state_bind(struct pipe_context
*pipe
, void *hwcso
)
700 struct nv50_context
*nv50
= nv50_context(pipe
);
702 nv50
->gmtyprog
= hwcso
;
703 nv50
->dirty
|= NV50_NEW_GMTYPROG
;
707 nv50_set_constant_buffer(struct pipe_context
*pipe
, uint shader
, uint index
,
708 struct pipe_resource
*res
)
710 struct nv50_context
*nv50
= nv50_context(pipe
);
712 if (nv50
->constbuf
[shader
][index
])
713 nv50_bufctx_del_resident(nv50
, NV50_BUFCTX_CONSTANT
,
714 nv04_resource(nv50
->constbuf
[shader
][index
]));
716 pipe_resource_reference(&nv50
->constbuf
[shader
][index
], res
);
718 nv50
->constbuf_dirty
[shader
] |= 1 << index
;
720 nv50
->dirty
|= NV50_NEW_CONSTBUF
;
723 /* =============================================================================
727 nv50_set_blend_color(struct pipe_context
*pipe
,
728 const struct pipe_blend_color
*bcol
)
730 struct nv50_context
*nv50
= nv50_context(pipe
);
732 nv50
->blend_colour
= *bcol
;
733 nv50
->dirty
|= NV50_NEW_BLEND_COLOUR
;
737 nv50_set_stencil_ref(struct pipe_context
*pipe
,
738 const struct pipe_stencil_ref
*sr
)
740 struct nv50_context
*nv50
= nv50_context(pipe
);
742 nv50
->stencil_ref
= *sr
;
743 nv50
->dirty
|= NV50_NEW_STENCIL_REF
;
747 nv50_set_clip_state(struct pipe_context
*pipe
,
748 const struct pipe_clip_state
*clip
)
750 struct nv50_context
*nv50
= nv50_context(pipe
);
751 const unsigned size
= clip
->nr
* sizeof(clip
->ucp
[0]);
753 memcpy(&nv50
->clip
.ucp
[0][0], &clip
->ucp
[0][0], size
);
754 nv50
->clip
.nr
= clip
->nr
;
756 nv50
->clip
.depth_clamp
= clip
->depth_clamp
;
758 nv50
->dirty
|= NV50_NEW_CLIP
;
762 nv50_set_sample_mask(struct pipe_context
*pipe
, unsigned sample_mask
)
764 struct nv50_context
*nv50
= nv50_context(pipe
);
766 nv50
->sample_mask
= sample_mask
;
767 nv50
->dirty
|= NV50_NEW_SAMPLE_MASK
;
772 nv50_set_framebuffer_state(struct pipe_context
*pipe
,
773 const struct pipe_framebuffer_state
*fb
)
775 struct nv50_context
*nv50
= nv50_context(pipe
);
777 nv50
->framebuffer
= *fb
;
778 nv50
->dirty
|= NV50_NEW_FRAMEBUFFER
;
782 nv50_set_polygon_stipple(struct pipe_context
*pipe
,
783 const struct pipe_poly_stipple
*stipple
)
785 struct nv50_context
*nv50
= nv50_context(pipe
);
787 nv50
->stipple
= *stipple
;
788 nv50
->dirty
|= NV50_NEW_STIPPLE
;
792 nv50_set_scissor_state(struct pipe_context
*pipe
,
793 const struct pipe_scissor_state
*scissor
)
795 struct nv50_context
*nv50
= nv50_context(pipe
);
797 nv50
->scissor
= *scissor
;
798 nv50
->dirty
|= NV50_NEW_SCISSOR
;
802 nv50_set_viewport_state(struct pipe_context
*pipe
,
803 const struct pipe_viewport_state
*vpt
)
805 struct nv50_context
*nv50
= nv50_context(pipe
);
807 nv50
->viewport
= *vpt
;
808 nv50
->dirty
|= NV50_NEW_VIEWPORT
;
812 nv50_set_vertex_buffers(struct pipe_context
*pipe
,
814 const struct pipe_vertex_buffer
*vb
)
816 struct nv50_context
*nv50
= nv50_context(pipe
);
819 for (i
= 0; i
< count
; ++i
)
820 pipe_resource_reference(&nv50
->vtxbuf
[i
].buffer
, vb
[i
].buffer
);
821 for (; i
< nv50
->num_vtxbufs
; ++i
)
822 pipe_resource_reference(&nv50
->vtxbuf
[i
].buffer
, NULL
);
824 memcpy(nv50
->vtxbuf
, vb
, sizeof(*vb
) * count
);
825 nv50
->num_vtxbufs
= count
;
827 nv50_bufctx_reset(nv50
, NV50_BUFCTX_VERTEX
);
829 nv50
->dirty
|= NV50_NEW_ARRAYS
;
833 nv50_set_index_buffer(struct pipe_context
*pipe
,
834 const struct pipe_index_buffer
*ib
)
836 struct nv50_context
*nv50
= nv50_context(pipe
);
839 pipe_resource_reference(&nv50
->idxbuf
.buffer
, ib
->buffer
);
841 memcpy(&nv50
->idxbuf
, ib
, sizeof(nv50
->idxbuf
));
843 pipe_resource_reference(&nv50
->idxbuf
.buffer
, NULL
);
848 nv50_vertex_state_bind(struct pipe_context
*pipe
, void *hwcso
)
850 struct nv50_context
*nv50
= nv50_context(pipe
);
852 nv50
->vertex
= hwcso
;
853 nv50
->dirty
|= NV50_NEW_VERTEX
;
857 nv50_init_state_functions(struct nv50_context
*nv50
)
859 struct pipe_context
*pipe
= &nv50
->base
.pipe
;
861 pipe
->create_blend_state
= nv50_blend_state_create
;
862 pipe
->bind_blend_state
= nv50_blend_state_bind
;
863 pipe
->delete_blend_state
= nv50_blend_state_delete
;
865 pipe
->create_rasterizer_state
= nv50_rasterizer_state_create
;
866 pipe
->bind_rasterizer_state
= nv50_rasterizer_state_bind
;
867 pipe
->delete_rasterizer_state
= nv50_rasterizer_state_delete
;
869 pipe
->create_depth_stencil_alpha_state
= nv50_zsa_state_create
;
870 pipe
->bind_depth_stencil_alpha_state
= nv50_zsa_state_bind
;
871 pipe
->delete_depth_stencil_alpha_state
= nv50_zsa_state_delete
;
873 pipe
->create_sampler_state
= nv50_sampler_state_create
;
874 pipe
->delete_sampler_state
= nv50_sampler_state_delete
;
875 pipe
->bind_vertex_sampler_states
= nv50_vp_sampler_states_bind
;
876 pipe
->bind_fragment_sampler_states
= nv50_fp_sampler_states_bind
;
877 pipe
->bind_geometry_sampler_states
= nv50_gp_sampler_states_bind
;
879 pipe
->create_sampler_view
= nv50_create_sampler_view
;
880 pipe
->sampler_view_destroy
= nv50_sampler_view_destroy
;
881 pipe
->set_vertex_sampler_views
= nv50_vp_set_sampler_views
;
882 pipe
->set_fragment_sampler_views
= nv50_fp_set_sampler_views
;
883 pipe
->set_geometry_sampler_views
= nv50_gp_set_sampler_views
;
885 pipe
->create_vs_state
= nv50_vp_state_create
;
886 pipe
->create_fs_state
= nv50_fp_state_create
;
887 pipe
->create_gs_state
= nv50_gp_state_create
;
888 pipe
->bind_vs_state
= nv50_vp_state_bind
;
889 pipe
->bind_fs_state
= nv50_fp_state_bind
;
890 pipe
->bind_gs_state
= nv50_gp_state_bind
;
891 pipe
->delete_vs_state
= nv50_sp_state_delete
;
892 pipe
->delete_fs_state
= nv50_sp_state_delete
;
893 pipe
->delete_gs_state
= nv50_sp_state_delete
;
895 pipe
->set_blend_color
= nv50_set_blend_color
;
896 pipe
->set_stencil_ref
= nv50_set_stencil_ref
;
897 pipe
->set_clip_state
= nv50_set_clip_state
;
898 pipe
->set_sample_mask
= nv50_set_sample_mask
;
899 pipe
->set_constant_buffer
= nv50_set_constant_buffer
;
900 pipe
->set_framebuffer_state
= nv50_set_framebuffer_state
;
901 pipe
->set_polygon_stipple
= nv50_set_polygon_stipple
;
902 pipe
->set_scissor_state
= nv50_set_scissor_state
;
903 pipe
->set_viewport_state
= nv50_set_viewport_state
;
905 pipe
->create_vertex_elements_state
= nv50_vertex_state_create
;
906 pipe
->delete_vertex_elements_state
= nv50_vertex_state_delete
;
907 pipe
->bind_vertex_elements_state
= nv50_vertex_state_bind
;
909 pipe
->set_vertex_buffers
= nv50_set_vertex_buffers
;
910 pipe
->set_index_buffer
= nv50_set_index_buffer
;
912 pipe
->redefine_user_buffer
= u_default_redefine_user_buffer
;