src/variants/L432K/variant.cpp

   1 /*
   2   Copyright (c) 2011 Arduino.  All right reserved.
   3
   4   This library is free software; you can redistribute it and/or
   5   modify it under the terms of the GNU Lesser General Public
   6   License as published by the Free Software Foundation; either
   7   version 2.1 of the License, or (at your option) any later version.
   8
   9   This library is distributed in the hope that it will be useful,
  10   but WITHOUT ANY WARRANTY; without even the implied warranty of
  11   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  12   See the GNU Lesser General Public License for more details.
  13
  14   You should have received a copy of the GNU Lesser General Public
  15   License along with this library; if not, write to the Free Software
  16   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  17 */
  18
  19 #include "pins_arduino.h"
  20
  21 #ifdef __cplusplus
  22 extern "C" {
  23 #endif
  24
  25 #include <string.h>
  26
  27 // Pin number
  28 const PinName digitalPin[] = {
  29   PA_10, //D0
  30   PA_9,  //D1
  31   PA_12, //D2
  32   PB_0,  //D3
  33   PB_7,  //D4
  34   PB_6,  //D5
  35   PB_1,  //D6
  36   PC_14, //D7 - By default, SB6 open PF0/PC14 not connected to D7
  37   PC_15, //D8 - By default, SB8 open PF1/PC15 not connected to D8
  38   PA_8,  //D9
  39   PA_11, //D10
  40   PB_5,  //D11
  41   PB_4,  //D12
  42   PB_3,  //D13 - LED
  43   PA_0,  //D14/A0
  44   PA_1,  //D15/A1
  45   PA_3,  //D16/A2
  46   PA_4,  //D17/A3
  47   PA_5,  //D18/A4
  48   PA_6,  //D19/A5
  49   PA_7,  //D20/A6
  50   PA_2,  //D21/A7 - STLink Tx
  51   PA_15  //D22 - STLink Rx
  52 };
  53
  54 #ifdef __cplusplus
  55 }
  56 #endif
  57
  58 // ----------------------------------------------------------------------------
  59
  60 #ifdef __cplusplus
  61 extern "C" {
  62 #endif
  63
  64 /**
  65   * @brief  System Clock Configuration
  66   *         The system Clock is configured as follows :
  67   *            System Clock source            = PLL (MSI)
  68   *            SYSCLK(Hz)                     = 80000000
  69   *            HCLK(Hz)                       = 80000000
  70   *            AHB Prescaler                  = 1
  71   *            APB1 Prescaler                 = 1
  72   *            APB2 Prescaler                 = 1
  73   *            MSI Frequency(Hz)              = 4000000
  74   *            PLL_M                          = 1
  75   *            PLL_N                          = 40
  76   *            PLL_R                          = 2
  77   *            PLL_P                          = 7
  78   *            PLL_Q                          = 4
  79   *            Flash Latency(WS)              = 4
  80   * @param  None
  81   * @retval None
  82   */
  83 WEAK void SystemClock_Config(void)
  84 {
  85   RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
  86   RCC_OscInitTypeDef RCC_OscInitStruct = {};
  87
  88 #if USE_HSI
  89   RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
  90
  91   memset(&RCC_OscInitStruct, 0, sizeof(RCC_OscInitTypeDef));
  92   memset(&RCC_ClkInitStruct, 0, sizeof(RCC_ClkInitTypeDef));
  93   memset(&PeriphClkInit, 0, sizeof(RCC_PeriphCLKInitTypeDef));
  94
  95   /* Enable Power Control clock */
  96   __HAL_RCC_PWR_CLK_ENABLE();
  97
  98   /* The voltage scaling allows optimizing the power consumption when the device is
  99      clocked below the maximum system frequency, to update the voltage scaling value
 100      regarding system frequency refer to product datasheet.  */
 101   __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
 102
 103   /* Enable HSI Oscillator and activate PLL with HSI as source */
 104   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 105   RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
 106   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 107   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 108   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
 109   RCC_OscInitStruct.PLL.PLLM = 1;  // 16MHz
 110   RCC_OscInitStruct.PLL.PLLN = 10; // 10 * 16MHz
 111   RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; // 160MHz / 2
 112   RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; // 160MHz / 7
 113   RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; // 160MHz / 4
 114   RCC_OscInitStruct.HSICalibrationValue = 0x10;
 115   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 116     //Error_Handler();
 117     while (1);
 118
 119   /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
 120      clocks dividers */
 121   RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
 122   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 123   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 124   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 125   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 126   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK)
 127     //Error_Handler();
 128     while (1);
 129
 130   PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2;
 131   PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
 132   PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
 133   if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
 134     //Error_Handler();
 135     while (1);
 136
 137   HAL_ResumeTick();
 138
 139
 140 #else // !USE_HSI
 141
 142   /* MSI is enabled after System reset, activate PLL with MSI as source */
 143   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_MSI;
 144   RCC_OscInitStruct.MSIState = RCC_MSI_ON;
 145
 146   RCC_OscInitStruct.MSIClockRange = RCC_MSIRANGE_6;
 147   RCC_OscInitStruct.MSICalibrationValue = RCC_MSICALIBRATION_DEFAULT;
 148   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 149   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_MSI;
 150   RCC_OscInitStruct.PLL.PLLM = 1;
 151   RCC_OscInitStruct.PLL.PLLN = 40;
 152   RCC_OscInitStruct.PLL.PLLR = 2;
 153   RCC_OscInitStruct.PLL.PLLP = 7;
 154   RCC_OscInitStruct.PLL.PLLQ = 4;
 155
 156   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
 157     /* Initialization Error */
 158     while (1);
 159   }
 160
 161   /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
 162      clocks dividers */
 163   RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
 164   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 165   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 166   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
 167   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 168   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
 169     /* Initialization Error */
 170     while (1);
 171   }
 172
 173 #endif // USE_HSI
 174 }
 175
 176 void initVariant(void)
 177 {
 178   /* Reset vector location which is set wrongly by SystemInit */
 179   extern uint32_t g_pfnVectors;
 180   SCB->VTOR = (uint32_t) &g_pfnVectors;
 181 }
 182
 183 #ifdef __cplusplus
 184 }
 185 #endif