src/variants/R9MM/variant.cpp

   1 /*
   2   Copyright (c) 2011 Arduino.  All right reserved.
   3
   4   This library is free software; you can redistribute it and/or
   5   modify it under the terms of the GNU Lesser General Public
   6   License as published by the Free Software Foundation; either
   7   version 2.1 of the License, or (at your option) any later version.
   8
   9   This library is distributed in the hope that it will be useful,
  10   but WITHOUT ANY WARRANTY; without even the implied warranty of
  11   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  12   See the GNU Lesser General Public License for more details.
  13
  14   You should have received a copy of the GNU Lesser General Public
  15   License along with this library; if not, write to the Free Software
  16   Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA  02110-1301  USA
  17 */
  18
  19 #include "pins_arduino.h"
  20
  21 #ifdef __cplusplus
  22 extern "C" {
  23 #endif
  24
  25 // Pin number
  26 const PinName digitalPin[] = {
  27   PA_3,  //D0
  28   PA_2,  //D1
  29   PA_10, //D2
  30   PB_3,  //D3
  31   PB_5,  //D4
  32   PB_4,  //D5
  33   PB_10, //D6
  34   PA_8,  //D7
  35   PA_9,  //D8
  36   PC_7,  //D9
  37   PB_6,  //D10
  38   PA_7,  //D11
  39   PA_6,  //D12
  40   PA_5,  //D13 - LED
  41   PB_9,  //D14
  42   PB_8,  //D15
  43   // ST Morpho
  44   // CN7 Left Side
  45   PC_10, //D16
  46   PC_12, //D17
  47   NC,   //D18 - BOOT0
  48   PA_13, //D19 - SWD
  49   PA_14, //D20 - SWD
  50   PA_15, //D21
  51   PB_7,  //D22
  52   PC_13, //D23
  53   PC_14, //D24
  54   PC_15, //D25
  55   PD_0,  //D26
  56   PD_1,  //D27
  57   PC_2,  //D28
  58   PC_3,  //D29
  59   // CN7 Right Side
  60   PC_11, //D30
  61   PD_2,  //D31
  62   // CN10 Left Side
  63   PC_9,  //D32
  64   // CN10 Right side
  65   PC_8,  //D33
  66   PC_6,  //D34
  67   PC_5,  //D35
  68   PA_12, //D36
  69   PA_11, //D37
  70   PB_12, //D38
  71   PB_11, //D39
  72   PB_2,  //D40
  73   PB_1,  //D41
  74   PB_15, //D42
  75   PB_14, //D43
  76   PB_13, //D44
  77   PC_4,  //D45
  78   PA_0,  //D46/A0
  79   PA_1,  //D47/A1
  80   PA_4,  //D48/A2
  81   PB_0,  //D49/A3
  82   PC_1,  //D50/A4
  83   PC_0,  //D51/A5
  84   // Duplicated pins in order to be aligned with PinMap_ADC
  85   PA_7,  //D52/A6 = D11
  86   PA_6,  //D53/A7 = D12
  87   PA_5,  //D54/A8 = D13
  88   PC_2,  //D55/A9 = D28
  89   PC_3,  //D56/A10 = D29
  90   PB_1,  //D57/A11 = D41
  91   PC_4,  //D58/A12 = D45
  92   PC_5   //D59/A13 = D35
  93 };
  94
  95 #ifdef __cplusplus
  96 }
  97 #endif
  98
  99 // ----------------------------------------------------------------------------
 100
 101 #ifdef __cplusplus
 102 extern "C" {
 103 #endif
 104
 105 /**
 106   * @brief  System Clock Configuration
 107   *         The system Clock is configured as follow :
 108   *            System Clock source            = PLL (HSI)
 109   *            SYSCLK(Hz)                     = 64000000
 110   *            HCLK(Hz)                       = 64000000
 111   *            AHB Prescaler                  = 1
 112   *            APB1 Prescaler                 = 2
 113   *            APB2 Prescaler                 = 1
 114   *            PLL_Source                     = HSI
 115   *            PLL_Mul                        = 16
 116   *            Flash Latency(WS)              = 2
 117   *            ADC Prescaler                  = 6
 118   * @param  None
 119   * @retval None
 120   */
 121
 122 //64MHZ Internal Clock
 123 // WEAK void SystemClock_Config(void)
 124 // {
 125   // RCC_OscInitTypeDef RCC_OscInitStruct;
 126   // RCC_ClkInitTypeDef RCC_ClkInitStruct;
 127   // RCC_PeriphCLKInitTypeDef PeriphClkInit;
 128
 129   // /* Initializes the CPU, AHB and APB busses clocks */
 130   // RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
 131   // RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 132   // RCC_OscInitStruct.HSICalibrationValue = 16;
 133   // RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 134   // RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI_DIV2;
 135   // RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL16;
 136   // if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
 137     // Error_Handler();
 138   // }
 139
 140   // /* Initializes the CPU, AHB and APB busses clocks */
 141   // RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
 142                                 // | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
 143   // RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 144   // RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 145   // RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 146   // RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 147
 148   // if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK) {
 149     // Error_Handler();
 150   // }
 151
 152   // PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_ADC;
 153   // PeriphClkInit.AdcClockSelection = RCC_ADCPCLK2_DIV6;
 154   // if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
 155     // Error_Handler();
 156   // }
 157 // }
 158
 159
 160 //72 MHz with 24Mhz ext. clock input/// (R9MM RX configuration)
 161 void SystemClock_Config(void)
 162 {
 163   RCC_OscInitTypeDef RCC_OscInitStruct = {0};
 164   RCC_ClkInitTypeDef RCC_ClkInitStruct = {0};
 165
 166   /** Initializes the CPU, AHB and APB busses clocks
 167   */
 168   RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSE;
 169   RCC_OscInitStruct.HSEState = RCC_HSE_ON;
 170   RCC_OscInitStruct.HSEPredivValue = RCC_HSE_PREDIV_DIV2;
 171   RCC_OscInitStruct.HSIState = RCC_HSI_ON;
 172   RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
 173   RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSE;
 174   RCC_OscInitStruct.PLL.PLLMUL = RCC_PLL_MUL6;
 175   if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK)
 176   {
 177     Error_Handler();
 178   }
 179   /** Initializes the CPU, AHB and APB busses clocks
 180   */
 181   RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK|RCC_CLOCKTYPE_SYSCLK
 182                               |RCC_CLOCKTYPE_PCLK1|RCC_CLOCKTYPE_PCLK2;
 183   RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
 184   RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
 185   RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV2;
 186   RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
 187
 188   if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_2) != HAL_OK)
 189   {
 190     Error_Handler();
 191   }
 192 }
 193
 194 #ifdef __cplusplus
 195 }
 196 #endif