Add support for setting Source and Target sysID (#2886)
[ExpressLRS.git] / src / variants / r9mx / variant_R9MX.cpp
blobf8ee25b49f212fbf3d381dbbe9ae0088f95efe2b
1 /*
2 *******************************************************************************
3 * Copyright (c) 2019, STMicroelectronics
4 * All rights reserved.
6 * This software component is licensed by ST under BSD 3-Clause license,
7 * the "License"; You may not use this file except in compliance with the
8 * License. You may obtain a copy of the License at:
9 * opensource.org/licenses/BSD-3-Clause
11 *******************************************************************************
14 #include "pins_arduino.h"
16 #ifdef __cplusplus
17 extern "C" {
18 #endif
20 #include <string.h>
22 // Digital PinName array
23 // This array allows to wrap Arduino pin number(Dx or x)
24 // to STM32 PinName (PX_n)
25 const PinName digitalPin[] = {
26 PA_10, //D0
27 PA_9, //D1
28 PA_12, //D2
29 PB_3, //D3
30 PB_5, //D4
31 PA_15, //D5
32 PB_10, //D6
33 PC_7, //D7
34 PB_6, //D8
35 PA_8, //D9
36 PA_11, //D10
37 PB_15, //D11
38 PB_14, //D12
39 PB_13, //D13 - LED
40 PB_7, //D14
41 PB_8, //D15
42 // ST Morpho
43 // CN5 Left Side
44 PC_10, //D16
45 PC_12, //D17
46 PB_12, //D18
47 PA_13, //D19
48 PA_14, //D20
49 PC_13, //D21 - User Button
50 PC_14, //D22
51 PC_15, //D23
52 PH_0, //D24
53 PH_1, //D25
54 PB_4, //D26
55 PB_9, //D27
56 // CN5 Right Side
57 PC_11, //D28
58 PD_2, //D29
59 // CN6 Left Side
60 PC_9, //D30
61 // CN6 Right Side
62 PC_8, //D31
63 PC_6, //D32
64 PC_5, //D33
65 PB_0, //D34
66 PA_10, //D35
67 PA_9, //D36
68 PB_11, //D37
69 PB_2, //D38
70 PB_1, //D39
71 PA_7, //D40
72 PA_6, //D41
73 PA_5, //D42
74 PA_4, //D43
75 PC_4, //D44
76 PA_3, //D45 - STLink Rx
77 PA_2, //D46 - STLink Tx
78 PA_0, //D47/A0
79 PA_1, //D48/A1
80 PC_3, //D49/A2
81 PC_2, //D50/A3
82 PC_1, //D51/A4
83 PC_0 //D52/A5
86 // If analog pins are not contiguous in the digitalPin array:
87 // Add the analogInputPin array without defining NUM_ANALOG_FIRST
88 // Analog (Ax) pin number array
89 // where x is the index to retrieve the digital pin number
90 const uint32_t analogInputPin[] = {
91 47, //A0
92 48, //A1
93 49, //A2
94 50, //A3
95 51, //A4
96 52, //A5
97 34, //A6
98 39, //A7
99 40, //A8
100 41, //A9
101 42, //A10
102 43 //A11
105 #ifdef __cplusplus
107 #endif
109 // ----------------------------------------------------------------------------
111 #ifdef __cplusplus
112 extern "C" {
113 #endif
115 extern void SystemCoreClockUpdate(void);
118 * @brief System Clock Configuration
119 * The system Clock is configured as follows :
120 * System Clock source = PLL (MSI)
121 * SYSCLK(Hz) = 80000000
122 * HCLK(Hz) = 80000000
123 * AHB Prescaler = 1
124 * APB1 Prescaler = 1
125 * APB2 Prescaler = 1
126 * MSI Frequency(Hz) = 4000000
127 * PLL_M = 1
128 * PLL_N = 40
129 * PLL_R = 2
130 * PLL_P = 7
131 * PLL_Q = 2
132 * Flash Latency(WS) = 4
133 * @param None
134 * @retval None
136 void SystemClock_Config(void)
139 RCC_ClkInitTypeDef RCC_ClkInitStruct;
140 RCC_OscInitTypeDef RCC_OscInitStruct;
141 RCC_PeriphCLKInitTypeDef PeriphClkInit;
143 /* Enable Power Control clock */
144 __HAL_RCC_PWR_CLK_ENABLE();
146 /* The voltage scaling allows optimizing the power consumption when the device is
147 clocked below the maximum system frequency, to update the voltage scaling value
148 regarding system frequency refer to product datasheet. */
149 __HAL_PWR_VOLTAGESCALING_CONFIG(PWR_REGULATOR_VOLTAGE_SCALE1);
151 memset(&RCC_OscInitStruct, 0, sizeof(RCC_OscInitTypeDef));
152 memset(&RCC_ClkInitStruct, 0, sizeof(RCC_ClkInitTypeDef));
153 memset(&PeriphClkInit, 0, sizeof(RCC_PeriphCLKInitTypeDef));
155 /* MSI is enabled after System reset, activate PLL with MSI as source */
156 RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI;
157 RCC_OscInitStruct.HSEState = RCC_HSE_OFF;
158 RCC_OscInitStruct.HSIState = RCC_HSI_ON;
159 RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
160 RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
161 RCC_OscInitStruct.PLL.PLLM = 1; // 16MHz
162 RCC_OscInitStruct.PLL.PLLN = 10; // 10 * 16MHz
163 RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2; // 160MHz / 2
164 RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV7; // 160MHz / 7
165 RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV4; // 160MHz / 4
166 RCC_OscInitStruct.HSICalibrationValue = 0x10;
168 if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
169 /* Initialization Error */
170 while (1);
173 /* Select PLL as system clock source and configure the HCLK, PCLK1 and PCLK2
174 clocks dividers */
175 RCC_ClkInitStruct.ClockType = (RCC_CLOCKTYPE_SYSCLK | RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2);
176 RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
177 RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
178 RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
179 RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
180 if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_4) != HAL_OK) {
181 /* Initialization Error */
182 while (1);
185 PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USART1 | RCC_PERIPHCLK_USART2;
186 PeriphClkInit.Usart1ClockSelection = RCC_USART1CLKSOURCE_PCLK2;
187 PeriphClkInit.Usart2ClockSelection = RCC_USART2CLKSOURCE_PCLK1;
188 if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK)
190 while (1);
193 SystemCoreClockUpdate();
195 HAL_ResumeTick();
199 #ifdef __cplusplus
201 #endif