client/src/cmdlfem4x05.h

   1 //-----------------------------------------------------------------------------
   2 // Copyright (C) 2010 iZsh <izsh at fail0verflow.com>
   3 // 2016, 2017 marshmellow, iceman
   4 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
   5 // at your option, any later version. See the LICENSE.txt file for the text of
   6 // the license.
   7 //-----------------------------------------------------------------------------
   8 // Low frequency EM4x05 commands
   9 //-----------------------------------------------------------------------------
  10
  11 #ifndef CMDLFEM4X05_H__
  12 #define CMDLFEM4X05_H__
  13
  14 #include "common.h"
  15
  16 #define EM_SERIAL_BLOCK 1
  17 #define EM_CONFIG_BLOCK 4
  18 #define EM4305_PROT1_BLOCK 14
  19 #define EM4305_PROT2_BLOCK 15
  20 #define EM4469_PROT_BLOCK 3
  21
  22 // config blocks
  23 #define EM4305_DEFAULT_CONFIG_BLOCK      (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(4) ) // ASK/MAN , data rate 32, 4 data blocks
  24 //#define EM4305_DEFAULT_CONFIG_BLOCK    (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_BIPHASE | EM4x05_SET_NUM_BLOCKS(4) ) // ASK/BIPHASE , data rate 32, 4 data blocks
  25
  26 #define EM4305_EM_UNIQUE_CONFIG_BLOCK    (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(2) ) // ASK/MAN, EM4x02/unique - data rate 64, 2 data blocks
  27 #define EM4305_PAXTON_CONFIG_BLOCK       (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(2) ) // ASK/MAN, EM4x02/paxton - data rate 64, 2 data blocks
  28 #define EM4305_VISA2000_CONFIG_BLOCK     (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(3) ) // ASK, data rate 64, 3 data blocks
  29 #define EM4305_VIKING_CONFIG_BLOCK       (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(2) ) // ASK/MAN, data rate 32, 2 data blocks
  30 #define EM4305_NORALSY_CONFIG_BLOCK      (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(3) ) // ASK, data rate 32, 3 data blocks
  31 #define EM4305_PRESCO_CONFIG_BLOCK       (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(4) ) // ASK/MAN, data rate 32, 4 data blocks
  32 #define EM4305_SECURAKEY_CONFIG_BLOCK    (EM4x05_SET_BITRATE(40) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(3) ) // ASK/MAN, data rate 40, 3 data blocks
  33 #define EM4305_GALLAGHER_CONFIG_BLOCK    (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_MANCHESTER | EM4x05_SET_NUM_BLOCKS(3) ) // ASK/MAN, data rate 32, 3 data blocks
  34
  35 #define EM4305_DESTRON_CONFIG_BLOCK      (EM4x05_SET_BITRATE(50) | EM4x05_MODULATION_FSK2 | EM4x05_SET_NUM_BLOCKS(3) ) // FSK2a, hid 26 bit, data rate 50, 3 data blocks
  36 #define EM4305_HID_26_CONFIG_BLOCK       (EM4x05_SET_BITRATE(50) | EM4x05_MODULATION_FSK2 | EM4x05_SET_NUM_BLOCKS(3) ) // FSK2a, hid 26 bit, data rate 50, 3 data blocks
  37 #define EM4305_PARADOX_CONFIG_BLOCK      (EM4x05_SET_BITRATE(50) | EM4x05_MODULATION_FSK2 | EM4x05_SET_NUM_BLOCKS(3) ) // FSK2a, hid 26 bit, data rate 50, 3 data blocks
  38 #define EM4305_AWID_CONFIG_BLOCK         (EM4x05_SET_BITRATE(50) | EM4x05_MODULATION_FSK2 | EM4x05_SET_NUM_BLOCKS(3) ) // FSK2a, hid 26 bit, data rate 50, 3 data blocks
  39 #define EM4305_PYRAMID_CONFIG_BLOCK      (EM4x05_SET_BITRATE(50) | EM4x05_MODULATION_FSK2 | EM4x05_SET_NUM_BLOCKS(4) ) // FSK2a, Pyramid 26 bit, data rate 50, 4 data blocks
  40 #define EM4305_IOPROX_CONFIG_BLOCK       (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_FSK2 | EM4x05_SET_NUM_BLOCKS(2) ) // FSK2a, data rate 64, 2 data blocks
  41
  42 #define EM4305_INDALA_64_CONFIG_BLOCK    (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_PSK1 | EM4x05_PSK_RF_2 | EM4x05_SET_NUM_BLOCKS(2) ) // PSK1, indala 64 bit, psk carrier FC * 2, data rate 32, maxblock 2
  43 #define EM4305_INDALA_224_CONFIG_BLOCK   (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_PSK1 | EM4x05_PSK_RF_2 | EM4x05_SET_NUM_BLOCKS(7) ) // PSK1, indala 224 bit, psk carrier FC * 2, data rate 32, maxblock 7
  44 #define EM4305_MOTOROLA_CONFIG_BLOCK     (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_PSK1 | EM4x05_PSK_RF_2 | EM4x05_SET_NUM_BLOCKS(2) ) // PSK1, data rate 32, 2 data blocks
  45 #define EM4305_NEXWATCH_CONFIG_BLOCK     (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_PSK1 | EM4x05_PSK_RF_2 | EM4x05_SET_NUM_BLOCKS(3) ) // PSK1 data rate 16, psk carrier FC * 2, 3 data blocks
  46 #define EM4305_KERI_CONFIG_BLOCK         (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_PSK1 | EM4x05_PSK_RF_2 | EM4x05_SET_NUM_BLOCKS(2) ) // PSK1, 2 data blocks
  47 #define EM4305_IDTECK_CONFIG_BLOCK       (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_PSK1 | EM4x05_PSK_RF_2 | EM4x05_SET_NUM_BLOCKS(2) ) // PSK1, 2 data blocks
  48
  49 #define EM4305_JABLOTRON_CONFIG_BLOCK    (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_BIPHASE | EM4x05_SET_NUM_BLOCKS(2) ) // Biphase, data rate 64, 2 data blocks
  50 #define EM4305_GUARDPROXII_CONFIG_BLOCK  (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_BIPHASE | EM4x05_SET_NUM_BLOCKS(3) ) // Biphase, data rate 64, Direct modulation, 3 data blocks
  51 #define EM4305_NEDAP_64_CONFIG_BLOCK     (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_BIPHASE | EM4x05_SET_NUM_BLOCKS(2) ) // Biphase, data rate 64, 2 data blocks
  52 #define EM4305_NEDAP_128_CONFIG_BLOCK    (EM4x05_SET_BITRATE(64) | EM4x05_MODULATION_BIPHASE | EM4x05_SET_NUM_BLOCKS(4) ) // Biphase, data rate 64, 4 data blocks
  53 #define EM4305_FDXB_CONFIG_BLOCK         (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_BIPHASE | EM4x05_SET_NUM_BLOCKS(4) ) // Biphase, data rate 32, 4 data blocks
  54
  55 #define EM4305_PAC_CONFIG_BLOCK          (EM4x05_SET_BITRATE(32) | EM4x05_MODULATION_NRZ | EM4x05_SET_NUM_BLOCKS(4) )  // NRZ, data rate 32, 4 data blocks
  56 #define EM4305_VERICHIP_CONFIG_BLOCK     (EM4x05_SET_BITRATE(40) | EM4x05_MODULATION_NRZ | EM4x05_SET_NUM_BLOCKS(4) )  // NRZ, data rate 40, 4 data blocks
  57
  58 typedef enum {
  59     EM_UNKNOWN,
  60     EM_4205,
  61     EM_4305,
  62     EM_4369,
  63     EM_4469,
  64 } em_tech_type_t;
  65
  66 int CmdLFEM4X05(const char *Cmd);
  67
  68 bool em4x05_isblock0(uint32_t *word);
  69 int em4x05_read_word_ext(uint8_t addr, uint32_t pwd, bool use_pwd, uint32_t *word);
  70 int em4x05_write_word_ext(uint8_t addr, uint32_t pwd, bool use_pwd, uint32_t data);
  71 int em4x05_clone_tag(uint32_t *blockdata, uint8_t numblocks, uint32_t pwd, bool use_pwd);
  72
  73 int CmdEM4x05Demod(const char *Cmd);
  74 int CmdEM4x05Dump(const char *Cmd);
  75 int CmdEM4x05Read(const char *Cmd);
  76 int CmdEM4x05Write(const char *Cmd);
  77 int CmdEM4x05Wipe(const char *Cmd);
  78 int CmdEM4x05Info(const char *Cmd);
  79 int CmdEM4x05Chk(const char *Cmd);
  80 int CmdEM4x05Unlock(const char *Cmd);
  81 int CmdEM4x05Sniff(const char *Cmd);
  82 int CmdEM4x05Brute(const char *Cmd);
  83
  84 #endif