fix one too small
[RRG-proxmark3.git] / fpga / mux16.v
blobb22ee6bf7b4bd95fd6a6103064a1d506166f4e7a
1 //-----------------------------------------------------------------------------
2 // Copyright (C) Proxmark3 contributors. See AUTHORS.md for details.
3 //
4 // This program is free software: you can redistribute it and/or modify
5 // it under the terms of the GNU General Public License as published by
6 // the Free Software Foundation, either version 3 of the License, or
7 // (at your option) any later version.
8 //
9 // This program is distributed in the hope that it will be useful,
10 // but WITHOUT ANY WARRANTY; without even the implied warranty of
11 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 // GNU General Public License for more details.
14 // See LICENSE.txt for the text of the license.
15 //-----------------------------------------------------------------------------
17 // 16 inputs to 1 output multiplexer
18 module mux16(
19 input [3:0] sel,
20 output reg y,
21 input x0, x1, x2, x3, x4, x5, x6, x7, x8, x9, x10, x11, x12, x13, x14, x15
24 always @(*)
25 begin
26 // y = x[sel];
27 case (sel)
28 4'd0: y = x0;
29 4'd1: y = x1;
30 4'd2: y = x2;
31 4'd3: y = x3;
32 4'd4: y = x4;
33 4'd5: y = x5;
34 4'd6: y = x6;
35 4'd7: y = x7;
36 4'd8: y = x8;
37 4'd9: y = x9;
38 4'd10: y = x10;
39 4'd11: y = x11;
40 4'd12: y = x12;
41 4'd13: y = x13;
42 4'd14: y = x14;
43 4'd15: y = x15;
44 endcase
45 end
47 endmodule