5 # rmdir only if dir is empty, tolerate failure
8 all: fpga_lf.bit fpga_hf.bit fpga_felica.bit
10 $(Q
)$(RM
) *.bgn
*.drc
*.ncd
*.ngd
*_par.xrpt
*-placed.
* *-placed_pad.
* *_usage.xml xst_hf.srp xst_lf.srp xst_felica.srp
11 $(Q
)$(RM
) *.map
*.ngc
*.xrpt
*.pcf
*.rbt
*.bld
*.mrp
*.ngm
*.unroutes
*_summary.xml netlist.lst
12 $(Q
)$(RMDIR
) *_auto_
* xst
14 #fpga_hf.ngc: fpga_hf.v fpga.ucf xst_hf.scr util.v hi_simulate.v hi_reader.v hi_iso14443a.v hi_sniffer.v hi_flite.v hi_get_trace.v
15 fpga_hf.ngc
: fpga_hf.v fpga.ucf xst_hf.scr util.v hi_simulate.v hi_reader.v hi_iso14443a.v hi_sniffer.v hi_get_trace.v
18 $(Q
)$(XILINX_TOOLS_PREFIX
)xst
-ifn xst_hf.scr
20 fpga_felica.ngc
: fpga_felica.v fpga.ucf xst_felica.scr util.v hi_simulate.v hi_reader.v hi_sniffer.v hi_flite.v hi_get_trace.v
23 $(Q
)$(XILINX_TOOLS_PREFIX
)xst
-ifn xst_felica.scr
25 fpga_lf.ngc
: fpga_lf.v fpga.ucf xst_lf.scr util.v clk_divider.v lo_edge_detect.v lo_read.v lo_passthru.v lp20khz_1MSa_iir_filter.v min_max_tracker.v lf_edge_detect.v
28 $(Q
)$(XILINX_TOOLS_PREFIX
)xst
-ifn xst_lf.scr
33 $(Q
)$(XILINX_TOOLS_PREFIX
)ngdbuild
-aul
-p xc2s30-5-vq100
-nt timestamp
-uc fpga.ucf
$< $@
38 $(Q
)$(XILINX_TOOLS_PREFIX
)map
-p xc2s30-5-vq100
$<
43 $(Q
)$(XILINX_TOOLS_PREFIX
)par
$< $@
46 $(Q
)$(RM
) $@
$*.drc
$*.rbt
48 $(Q
)$(XILINX_TOOLS_PREFIX
)bitgen
$< $@
50 .PHONY
: all clean help
52 @echo Possible targets
:
53 @echo
+ all - Make fpga.bit
, the FPGA bitstream
54 @echo
+ clean - Clean intermediate files
, does not
clean fpga.bit