include/proxmark3_arm.h

   1 //-----------------------------------------------------------------------------
   2 // Jonathan Westhues, Mar 2006
   3 //
   4 // This code is licensed to you under the terms of the GNU GPL, version 2 or,
   5 // at your option, any later version. See the LICENSE.txt file for the text of
   6 // the license.
   7 //-----------------------------------------------------------------------------
   8 // Hardware and interface definitions
   9 //-----------------------------------------------------------------------------
  10
  11 #ifndef __PROXMARK3_H
  12 #define __PROXMARK3_H
  13
  14 #include "common.h"
  15
  16 // Might as well have the hardware-specific defines everywhere.
  17 #include "at91sam7s512.h"
  18 #include "config_gpio.h"
  19 #include "pm3_cmd.h"
  20
  21 // Check bootrom.c for actual clock settings
  22 #define MAINCK                                  16000000
  23 #define MCK                                     (3 * MAINCK)
  24
  25 #define WDT_HIT()                               AT91C_BASE_WDTC->WDTC_WDCR = 0xa5000001
  26
  27 #define PWM_CH_MODE_PRESCALER(x)                ((x) << 0)
  28 #define PWM_CHANNEL(x)                          (1 << (x))
  29
  30 #define ADC_CHAN_LF                             4
  31 #define ADC_CHAN_HF                             5
  32 #define ADC_CHAN_HF_RDV40                       7
  33 #define ADC_MODE_PRESCALE(x)                    ((x) << 8)
  34 #define ADC_MODE_STARTUP_TIME(x)                ((x) << 16)
  35 #define ADC_MODE_SAMPLE_HOLD_TIME(x)            ((x) << 24)
  36 #define ADC_CHANNEL(x)                          (1 << (x))
  37 #define ADC_END_OF_CONVERSION(x)                (1 << (x))
  38
  39 #define SSC_CLOCK_MODE_START(x)                 ((x) << 8)
  40 #define SSC_FRAME_MODE_WORDS_PER_TRANSFER(x)    ((x) << 8)
  41 #define SSC_CLOCK_MODE_SELECT(x)                ((x) << 0)
  42 #define SSC_FRAME_MODE_BITS_IN_WORD(x)          (((x)-1) << 0)
  43
  44 #define MC_FLASH_COMMAND_KEY                    ((0x5A) << 24)
  45 #define MC_FLASH_MODE_FLASH_WAIT_STATES(x)      ((x) << 8)
  46 #define MC_FLASH_MODE_MASTER_CLK_IN_MHZ(x)      (((x)+((x)/2)) << 16)
  47 #define MC_FLASH_COMMAND_PAGEN(x)               ((x) << 8)
  48
  49 #define RST_CONTROL_KEY                         (0xA5U << 24)
  50
  51 #define PMC_MAIN_OSC_STARTUP_DELAY(x)           ((x) << 8)
  52 #define PMC_PLL_DIVISOR(x)                      (x)
  53 #define PMC_PLL_MULTIPLIER(x)                   (((x)-1) << 16)
  54 #define PMC_PLL_COUNT_BEFORE_LOCK(x)            (((x) & 0x3F) << 8)        // 6bit register 0011 1111
  55 #define PMC_PLL_FREQUENCY_RANGE(x)              (((x) & 0x3) << 14)        // 2bit register
  56 #define PMC_PLL_USB_DIVISOR(x)                  ((x) << 28)
  57
  58 #define UDP_INTERRUPT_ENDPOINT(x)               (1 << (x))
  59 #define UDP_CSR_BYTES_RECEIVED(x)               (((x) >> 16) & 0x7ff)
  60 //**************************************************************
  61
  62
  63
  64 #define LOW(x)      AT91C_BASE_PIOA->PIO_CODR |= (x)
  65 #define HIGH(x)     AT91C_BASE_PIOA->PIO_SODR |= (x)
  66
  67 #define GETBIT(x)   (AT91C_BASE_PIOA->PIO_ODSR & (x)) ? 1:0
  68 #define SETBIT(x, y) (y) ? (HIGH(x)):(LOW(x))
  69 #define INVBIT(x)   SETBIT((x), !(GETBIT(x)))
  70
  71 // Setup for SPI current modes
  72 #define SPI_FPGA_MODE   0
  73 #define SPI_LCD_MODE    1
  74 #define SPI_MEM_MODE    2
  75
  76 #ifndef COTAG_BITS
  77 #define COTAG_BITS 264
  78 #endif
  79
  80 #define LED_A_ON()        HIGH(GPIO_LED_A)
  81 #define LED_A_OFF()       LOW(GPIO_LED_A)
  82 #define LED_A_INV()       INVBIT(GPIO_LED_A)
  83 #define LED_B_ON()        HIGH(GPIO_LED_B)
  84 #define LED_B_OFF()       LOW(GPIO_LED_B)
  85 #define LED_B_INV()       INVBIT(GPIO_LED_B)
  86 #define LED_C_ON()        HIGH(GPIO_LED_C)
  87 #define LED_C_OFF()       LOW(GPIO_LED_C)
  88 #define LED_C_INV()       INVBIT(GPIO_LED_C)
  89 #define LED_D_ON()        HIGH(GPIO_LED_D)
  90 #define LED_D_OFF()       LOW(GPIO_LED_D)
  91 #define LED_D_INV()       INVBIT(GPIO_LED_D)
  92
  93
  94 // SPI
  95 #define SCK_LOW           LOW(GPIO_SPCK)
  96 #define SCK_HIGH          HIGH(GPIO_SPCK)
  97 #define MOSI_HIGH         HIGH(GPIO_MOSI)
  98 #define MOSI_LOW          LOW(GPIO_MOSI)
  99 #define MISO_VALUE        (AT91C_BASE_PIOA->PIO_PDSR & GPIO_MISO)
 100
 101 // fpga
 102 #define NCS_0_LOW         LOW(GPIO_NCS0)
 103 #define NCS_0_HIGH        HIGH(GPIO_NCS0)
 104
 105 // flash mem PA1
 106 #define NCS_1_LOW         LOW(GPIO_NCS2)
 107 #define NCS_1_HIGH        HIGH(GPIO_NCS2)
 108
 109 #define RELAY_ON()        HIGH(GPIO_RELAY)
 110 #define RELAY_OFF()       LOW(GPIO_RELAY)
 111
 112 #define BUTTON_PRESS()         !((AT91C_BASE_PIOA->PIO_PDSR & GPIO_BUTTON) == GPIO_BUTTON)
 113 #define WAIT_BUTTON_RELEASED() { while ( BUTTON_PRESS() )  { WDT_HIT(); }; }
 114
 115 //NVDD goes LOW when USB is attached.
 116 #define USB_ATTACHED()    !((AT91C_BASE_PIOA->PIO_PDSR & GPIO_NVDD_ON) == GPIO_NVDD_ON)
 117
 118 // VERSION_INFORMATION is now in common.h
 119
 120 #define COMMON_AREA_MAGIC 0x43334d50 // "PM3C"
 121 #define COMMON_AREA_COMMAND_NONE 0
 122 #define COMMON_AREA_COMMAND_ENTER_FLASH_MODE 1
 123 struct common_area {
 124     int magic; /* Magic sequence, to distinguish against random uninitialized memory */
 125     char version; /* Must be 1 */
 126     char command;
 127     struct {
 128         unsigned int bootrom_present: 1; /* Set when a bootrom that is capable of parsing the common area is present */
 129         unsigned int osimage_present: 1; /* Set when a osimage that is capable of parsing the common area is present */
 130         unsigned int button_pressed: 1;
 131     } PACKED flags;
 132     int arg1, arg2;
 133 } PACKED;
 134
 135 #endif