armsrc/iso14443a.h

   1 //-----------------------------------------------------------------------------
   2 // Copyright (C) Jonathan Westhues, Nov 2006
   3 // Copyright (C) Gerhard de Koning Gans - May 2008
   4 // Copyright (C) Proxmark3 contributors. See AUTHORS.md for details.
   5 //
   6 // This program is free software: you can redistribute it and/or modify
   7 // it under the terms of the GNU General Public License as published by
   8 // the Free Software Foundation, either version 3 of the License, or
   9 // (at your option) any later version.
  10 //
  11 // This program is distributed in the hope that it will be useful,
  12 // but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 // GNU General Public License for more details.
  15 //
  16 // See LICENSE.txt for the text of the license.
  17 //-----------------------------------------------------------------------------
  18 // Routines to support ISO 14443 type A.
  19 //-----------------------------------------------------------------------------
  20
  21 #ifndef __ISO14443A_H
  22 #define __ISO14443A_H
  23
  24 #include "common.h"
  25 #include "mifare.h" // struct
  26 #include "pm3_cmd.h"
  27 #include "crc16.h"  // compute_crc
  28
  29 // When the PM acts as tag and is receiving it takes
  30 // 2 ticks delay in the RF part (for the first falling edge),
  31 // 3 ticks for the A/D conversion,
  32 // 8 ticks on average until the start of the SSC transfer,
  33 // 8 ticks until the SSC samples the first data
  34 // 7*16 ticks to complete the transfer from FPGA to ARM
  35 // 8 ticks until the next ssp_clk rising edge
  36 // 4*16 ticks until we measure the time
  37 // - 8*16 ticks because we measure the time of the previous transfer
  38 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
  39
  40 typedef struct {
  41     enum {
  42         DEMOD_14A_UNSYNCD,
  43         // DEMOD_14A_HALF_SYNCD,
  44         // DEMOD_14A_MOD_FIRST_HALF,
  45         // DEMOD_14A_NOMOD_FIRST_HALF,
  46         DEMOD_14A_MANCHESTER_DATA
  47     } state;
  48     uint16_t twoBits;
  49     uint16_t highCnt;
  50     uint16_t bitCount;
  51     uint16_t collisionPos;
  52     uint16_t syncBit;
  53     uint8_t  parityBits;
  54     uint8_t  parityLen;
  55     uint16_t shiftReg;
  56     uint16_t samples;
  57     uint16_t len;
  58     uint32_t startTime, endTime;
  59     uint8_t  *output;
  60     uint8_t  *parity;
  61 } tDemod14a;
  62 /*
  63 typedef enum {
  64     MOD_NOMOD = 0,
  65     MOD_SECOND_HALF,
  66     MOD_FIRST_HALF,
  67     MOD_BOTH_HALVES
  68     } Modulation_t;
  69 */
  70
  71 typedef struct {
  72     enum {
  73         STATE_14A_UNSYNCD,
  74         STATE_14A_START_OF_COMMUNICATION,
  75         STATE_14A_MILLER_X,
  76         STATE_14A_MILLER_Y,
  77         STATE_14A_MILLER_Z,
  78         // DROP_NONE,
  79         // DROP_FIRST_HALF,
  80     } state;
  81     uint16_t shiftReg;
  82     int16_t bitCount;
  83     uint16_t len;
  84     //uint16_t byteCntMax;
  85     uint16_t posCnt;
  86     uint16_t syncBit;
  87     uint8_t  parityBits;
  88     uint8_t  parityLen;
  89     uint32_t fourBits;
  90     uint32_t startTime, endTime;
  91     uint8_t *output;
  92     uint8_t *parity;
  93 } tUart14a;
  94
  95 // indices into responses array:
  96 typedef enum {
  97     RESP_INDEX_ATQA,
  98     RESP_INDEX_UIDC1,
  99     RESP_INDEX_UIDC2,
 100     RESP_INDEX_UIDC3,
 101     RESP_INDEX_SAKC1,
 102     RESP_INDEX_SAKC2,
 103     RESP_INDEX_SAKC3,
 104     RESP_INDEX_RATS,
 105     RESP_INDEX_VERSION,
 106     RESP_INDEX_SIGNATURE,
 107     RESP_INDEX_PPS
 108 } resp_index_t;
 109
 110 #ifndef AddCrc14A
 111 # define AddCrc14A(data, len) compute_crc(CRC_14443_A, (data), (len), (data)+(len), (data)+(len)+1)
 112 #endif
 113
 114 #ifndef AddCrc14B
 115 # define AddCrc14B(data, len) compute_crc(CRC_14443_B, (data), (len), (data)+(len), (data)+(len)+1)
 116 #endif
 117
 118 #ifndef CheckCrc14A
 119 # define CheckCrc14A(data, len) check_crc(CRC_14443_A, (data), (len))
 120 #endif
 121
 122 void printHf14aConfig(void);
 123 void setHf14aConfig(hf14a_config *hc);
 124 hf14a_config *getHf14aConfig(void);
 125 void iso14a_set_timeout(uint32_t timeout);
 126 uint32_t iso14a_get_timeout(void);
 127
 128 void GetParity(const uint8_t *pbtCmd, uint16_t len, uint8_t *par);
 129
 130 tDemod14a *GetDemod14a(void);
 131 void Demod14aReset(void);
 132 void Demod14aInit(uint8_t *data, uint8_t *par);
 133 tUart14a *GetUart14a(void);
 134 void Uart14aReset(void);
 135 void Uart14aInit(uint8_t *data, uint8_t *par);
 136 RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time);
 137 RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time);
 138
 139 void RAMFUNC SniffIso14443a(uint8_t param);
 140 void SimulateIso14443aTag(uint8_t tagType, uint16_t flags, uint8_t *data, uint8_t exitAfterNReads);
 141 bool SimulateIso14443aInit(uint8_t tagType, uint16_t flags, uint8_t *data, tag_response_info_t **responses, uint32_t *cuid, uint32_t counters[3], uint8_t tearings[3], uint8_t *pages);
 142 bool GetIso14443aCommandFromReader(uint8_t *received, uint8_t *par, int *len);
 143 void iso14443a_antifuzz(uint32_t flags);
 144 void ReaderIso14443a(PacketCommandNG *c);
 145 void ReaderTransmit(uint8_t *frame, uint16_t len, uint32_t *timing);
 146 void ReaderTransmitBitsPar(uint8_t *frame, uint16_t bits, uint8_t *par, uint32_t *timing);
 147 void ReaderTransmitPar(uint8_t *frame, uint16_t len, uint8_t *par, uint32_t *timing);
 148 uint16_t ReaderReceive(uint8_t *receivedAnswer, uint8_t *par);
 149
 150 void iso14443a_setup(uint8_t fpga_minor_mode);
 151 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, bool send_chaining, void *data, uint8_t *res);
 152 int iso14443a_select_card(uint8_t *uid_ptr, iso14a_card_select_t *p_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades, bool no_rats);
 153 int iso14443a_select_cardEx(uint8_t *uid_ptr, iso14a_card_select_t *p_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades, bool no_rats, bool use_ecp, bool use_magsafe);
 154 int iso14443a_fast_select_card(uint8_t *uid_ptr, uint8_t num_cascades);
 155 void iso14a_set_trigger(bool enable);
 156
 157 int EmSendCmd14443aRaw(const uint8_t *resp, uint16_t respLen);
 158 int EmSend4bit(uint8_t resp);
 159 int EmSendCmd(uint8_t *resp, uint16_t respLen);
 160 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool collision);
 161 int EmGetCmd(uint8_t *received, uint16_t *len, uint8_t *par);
 162 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
 163 int EmSendCmdParEx(uint8_t *resp, uint16_t respLen, uint8_t *par, bool collision);
 164 int EmSendPrecompiledCmd(tag_response_info_t *p_response);
 165
 166 bool prepare_allocated_tag_modulation(tag_response_info_t *response_info, uint8_t **buffer, size_t *max_buffer_size);
 167 bool prepare_tag_modulation(tag_response_info_t *response_info, size_t max_buffer_size);
 168
 169 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
 170                 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
 171
 172 void ReaderMifare(bool first_try, uint8_t block, uint8_t keytype);
 173 void DetectNACKbug(void);
 174
 175 bool GetIso14443aAnswerFromTag_Thinfilm(uint8_t *receivedResponse, uint8_t *received_len);
 176
 177 #endif /* __ISO14443A_H */