2 * AES-NI support functions
4 * Copyright The Mbed TLS Contributors
5 * SPDX-License-Identifier: Apache-2.0
7 * Licensed under the Apache License, Version 2.0 (the "License"); you may
8 * not use this file except in compliance with the License.
9 * You may obtain a copy of the License at
11 * http://www.apache.org/licenses/LICENSE-2.0
13 * Unless required by applicable law or agreed to in writing, software
14 * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT
15 * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
16 * See the License for the specific language governing permissions and
17 * limitations under the License.
21 * [AES-WP] http://software.intel.com/en-us/articles/intel-advanced-encryption-standard-aes-instructions-set
22 * [CLMUL-WP] http://software.intel.com/en-us/articles/intel-carry-less-multiplication-instruction-and-its-usage-for-computing-the-gcm-mode/
27 #if defined(MBEDTLS_AESNI_C)
29 #if defined(__has_feature)
30 #if __has_feature(memory_sanitizer)
31 #warning "MBEDTLS_AESNI_C is known to cause spurious error reports with some memory sanitizers as they do not understand the assembly code."
35 #include "mbedtls/aesni.h"
43 #if defined(MBEDTLS_HAVE_X86_64)
46 * AES-NI support detection routine
48 int mbedtls_aesni_has_support(unsigned int what
) {
50 static unsigned int c
= 0;
53 asm("movl $1, %%eax \n\t"
57 : "eax", "ebx", "edx");
61 return ((c
& what
) != 0);
65 * Binutils needs to be at least 2.19 to support AES-NI instructions.
66 * Unfortunately, a lot of users have a lower version now (2014-04).
67 * Emit bytecode directly in order to support "old" version of gas.
69 * Opcodes from the Intel architecture reference manual, vol. 3.
70 * We always use registers, so we don't need prefixes for memory operands.
71 * Operand macros are in gas order (src, dst) as opposed to Intel order
72 * (dst, src) in order to blend better into the surrounding assembly code.
74 #define AESDEC ".byte 0x66,0x0F,0x38,0xDE,"
75 #define AESDECLAST ".byte 0x66,0x0F,0x38,0xDF,"
76 #define AESENC ".byte 0x66,0x0F,0x38,0xDC,"
77 #define AESENCLAST ".byte 0x66,0x0F,0x38,0xDD,"
78 #define AESIMC ".byte 0x66,0x0F,0x38,0xDB,"
79 #define AESKEYGENA ".byte 0x66,0x0F,0x3A,0xDF,"
80 #define PCLMULQDQ ".byte 0x66,0x0F,0x3A,0x44,"
82 #define xmm0_xmm0 "0xC0"
83 #define xmm0_xmm1 "0xC8"
84 #define xmm0_xmm2 "0xD0"
85 #define xmm0_xmm3 "0xD8"
86 #define xmm0_xmm4 "0xE0"
87 #define xmm1_xmm0 "0xC1"
88 #define xmm1_xmm2 "0xD1"
91 * AES-NI AES-ECB block en(de)cryption
93 int mbedtls_aesni_crypt_ecb(mbedtls_aes_context
*ctx
,
95 const unsigned char input
[16],
96 unsigned char output
[16]) {
97 asm("movdqu (%3), %%xmm0 \n\t" // load input
98 "movdqu (%1), %%xmm1 \n\t" // load round key 0
99 "pxor %%xmm1, %%xmm0 \n\t" // round 0
100 "add $16, %1 \n\t" // point to next round key
101 "subl $1, %0 \n\t" // normal rounds = nr - 1
102 "test %2, %2 \n\t" // mode?
103 "jz 2f \n\t" // 0 = decrypt
105 "1: \n\t" // encryption loop
106 "movdqu (%1), %%xmm1 \n\t" // load round key
107 AESENC xmm1_xmm0
"\n\t" // do round
108 "add $16, %1 \n\t" // point to next round key
109 "subl $1, %0 \n\t" // loop
111 "movdqu (%1), %%xmm1 \n\t" // load round key
112 AESENCLAST xmm1_xmm0
"\n\t" // last round
115 "2: \n\t" // decryption loop
116 "movdqu (%1), %%xmm1 \n\t"
117 AESDEC xmm1_xmm0
"\n\t" // do round
121 "movdqu (%1), %%xmm1 \n\t" // load round key
122 AESDECLAST xmm1_xmm0
"\n\t" // last round
125 "movdqu %%xmm0, (%4) \n\t" // export output
127 : "r"(ctx
->nr
), "r"(ctx
->rk
), "r"(mode
), "r"(input
), "r"(output
)
128 : "memory", "cc", "xmm0", "xmm1");
135 * GCM multiplication: c = a times b in GF(2^128)
136 * Based on [CLMUL-WP] algorithms 1 (with equation 27) and 5.
138 void mbedtls_aesni_gcm_mult(unsigned char c
[16],
139 const unsigned char a
[16],
140 const unsigned char b
[16]) {
141 unsigned char aa
[16], bb
[16], cc
[16];
144 /* The inputs are in big-endian order, so byte-reverse them */
145 for (i
= 0; i
< 16; i
++) {
150 asm("movdqu (%0), %%xmm0 \n\t" // a1:a0
151 "movdqu (%1), %%xmm1 \n\t" // b1:b0
154 * Caryless multiplication xmm2:xmm1 = xmm0 * xmm1
155 * using [CLMUL-WP] algorithm 1 (p. 13).
157 "movdqa %%xmm1, %%xmm2 \n\t" // copy of b1:b0
158 "movdqa %%xmm1, %%xmm3 \n\t" // same
159 "movdqa %%xmm1, %%xmm4 \n\t" // same
160 PCLMULQDQ xmm0_xmm1
",0x00 \n\t" // a0*b0 = c1:c0
161 PCLMULQDQ xmm0_xmm2
",0x11 \n\t" // a1*b1 = d1:d0
162 PCLMULQDQ xmm0_xmm3
",0x10 \n\t" // a0*b1 = e1:e0
163 PCLMULQDQ xmm0_xmm4
",0x01 \n\t" // a1*b0 = f1:f0
164 "pxor %%xmm3, %%xmm4 \n\t" // e1+f1:e0+f0
165 "movdqa %%xmm4, %%xmm3 \n\t" // same
166 "psrldq $8, %%xmm4 \n\t" // 0:e1+f1
167 "pslldq $8, %%xmm3 \n\t" // e0+f0:0
168 "pxor %%xmm4, %%xmm2 \n\t" // d1:d0+e1+f1
169 "pxor %%xmm3, %%xmm1 \n\t" // c1+e0+f1:c0
172 * Now shift the result one bit to the left,
173 * taking advantage of [CLMUL-WP] eq 27 (p. 20)
175 "movdqa %%xmm1, %%xmm3 \n\t" // r1:r0
176 "movdqa %%xmm2, %%xmm4 \n\t" // r3:r2
177 "psllq $1, %%xmm1 \n\t" // r1<<1:r0<<1
178 "psllq $1, %%xmm2 \n\t" // r3<<1:r2<<1
179 "psrlq $63, %%xmm3 \n\t" // r1>>63:r0>>63
180 "psrlq $63, %%xmm4 \n\t" // r3>>63:r2>>63
181 "movdqa %%xmm3, %%xmm5 \n\t" // r1>>63:r0>>63
182 "pslldq $8, %%xmm3 \n\t" // r0>>63:0
183 "pslldq $8, %%xmm4 \n\t" // r2>>63:0
184 "psrldq $8, %%xmm5 \n\t" // 0:r1>>63
185 "por %%xmm3, %%xmm1 \n\t" // r1<<1|r0>>63:r0<<1
186 "por %%xmm4, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1
187 "por %%xmm5, %%xmm2 \n\t" // r3<<1|r2>>62:r2<<1|r1>>63
190 * Now reduce modulo the GCM polynomial x^128 + x^7 + x^2 + x + 1
191 * using [CLMUL-WP] algorithm 5 (p. 20).
192 * Currently xmm2:xmm1 holds x3:x2:x1:x0 (already shifted).
195 "movdqa %%xmm1, %%xmm3 \n\t" // x1:x0
196 "movdqa %%xmm1, %%xmm4 \n\t" // same
197 "movdqa %%xmm1, %%xmm5 \n\t" // same
198 "psllq $63, %%xmm3 \n\t" // x1<<63:x0<<63 = stuff:a
199 "psllq $62, %%xmm4 \n\t" // x1<<62:x0<<62 = stuff:b
200 "psllq $57, %%xmm5 \n\t" // x1<<57:x0<<57 = stuff:c
203 "pxor %%xmm4, %%xmm3 \n\t" // stuff:a+b
204 "pxor %%xmm5, %%xmm3 \n\t" // stuff:a+b+c
205 "pslldq $8, %%xmm3 \n\t" // a+b+c:0
206 "pxor %%xmm3, %%xmm1 \n\t" // x1+a+b+c:x0 = d:x0
209 "movdqa %%xmm1,%%xmm0 \n\t" // d:x0
210 "movdqa %%xmm1,%%xmm4 \n\t" // same
211 "movdqa %%xmm1,%%xmm5 \n\t" // same
212 "psrlq $1, %%xmm0 \n\t" // e1:x0>>1 = e1:e0'
213 "psrlq $2, %%xmm4 \n\t" // f1:x0>>2 = f1:f0'
214 "psrlq $7, %%xmm5 \n\t" // g1:x0>>7 = g1:g0'
215 "pxor %%xmm4, %%xmm0 \n\t" // e1+f1:e0'+f0'
216 "pxor %%xmm5, %%xmm0 \n\t" // e1+f1+g1:e0'+f0'+g0'
217 // e0'+f0'+g0' is almost e0+f0+g0, ex\tcept for some missing
218 // bits carried from d. Now get those\t bits back in.
219 "movdqa %%xmm1,%%xmm3 \n\t" // d:x0
220 "movdqa %%xmm1,%%xmm4 \n\t" // same
221 "movdqa %%xmm1,%%xmm5 \n\t" // same
222 "psllq $63, %%xmm3 \n\t" // d<<63:stuff
223 "psllq $62, %%xmm4 \n\t" // d<<62:stuff
224 "psllq $57, %%xmm5 \n\t" // d<<57:stuff
225 "pxor %%xmm4, %%xmm3 \n\t" // d<<63+d<<62:stuff
226 "pxor %%xmm5, %%xmm3 \n\t" // missing bits of d:stuff
227 "psrldq $8, %%xmm3 \n\t" // 0:missing bits of d
228 "pxor %%xmm3, %%xmm0 \n\t" // e1+f1+g1:e0+f0+g0
229 "pxor %%xmm1, %%xmm0 \n\t" // h1:h0
230 "pxor %%xmm2, %%xmm0 \n\t" // x3+h1:x2+h0
232 "movdqu %%xmm0, (%2) \n\t" // done
234 : "r"(aa
), "r"(bb
), "r"(cc
)
235 : "memory", "cc", "xmm0", "xmm1", "xmm2", "xmm3", "xmm4", "xmm5");
237 /* Now byte-reverse the outputs */
238 for (i
= 0; i
< 16; i
++)
245 * Compute decryption round keys from encryption round keys
247 void mbedtls_aesni_inverse_key(unsigned char *invkey
,
248 const unsigned char *fwdkey
, int nr
) {
249 unsigned char *ik
= invkey
;
250 const unsigned char *fk
= fwdkey
+ 16 * nr
;
254 for (fk
-= 16, ik
+= 16; fk
> fwdkey
; fk
-= 16, ik
+= 16)
255 asm("movdqu (%0), %%xmm0 \n\t"
256 AESIMC xmm0_xmm0
"\n\t"
257 "movdqu %%xmm0, (%1) \n\t"
266 * Key expansion, 128-bit case
268 static void aesni_setkey_enc_128(unsigned char *rk
,
269 const unsigned char *key
) {
270 asm("movdqu (%1), %%xmm0 \n\t" // copy the original key
271 "movdqu %%xmm0, (%0) \n\t" // as round key 0
272 "jmp 2f \n\t" // skip auxiliary routine
275 * Finish generating the next round key.
277 * On entry xmm0 is r3:r2:r1:r0 and xmm1 is X:stuff:stuff:stuff
278 * with X = rot( sub( r3 ) ) ^ RCON.
280 * On exit, xmm0 is r7:r6:r5:r4
281 * with r4 = X + r0, r5 = r4 + r1, r6 = r5 + r2, r7 = r6 + r3
282 * and those are written to the round key buffer.
285 "pshufd $0xff, %%xmm1, %%xmm1 \n\t" // X:X:X:X
286 "pxor %%xmm0, %%xmm1 \n\t" // X+r3:X+r2:X+r1:r4
287 "pslldq $4, %%xmm0 \n\t" // r2:r1:r0:0
288 "pxor %%xmm0, %%xmm1 \n\t" // X+r3+r2:X+r2+r1:r5:r4
289 "pslldq $4, %%xmm0 \n\t" // etc
290 "pxor %%xmm0, %%xmm1 \n\t"
291 "pslldq $4, %%xmm0 \n\t"
292 "pxor %%xmm1, %%xmm0 \n\t" // update xmm0 for next time!
293 "add $16, %0 \n\t" // point to next round key
294 "movdqu %%xmm0, (%0) \n\t" // write it
299 AESKEYGENA xmm0_xmm1
",0x01 \n\tcall 1b \n\t"
300 AESKEYGENA xmm0_xmm1
",0x02 \n\tcall 1b \n\t"
301 AESKEYGENA xmm0_xmm1
",0x04 \n\tcall 1b \n\t"
302 AESKEYGENA xmm0_xmm1
",0x08 \n\tcall 1b \n\t"
303 AESKEYGENA xmm0_xmm1
",0x10 \n\tcall 1b \n\t"
304 AESKEYGENA xmm0_xmm1
",0x20 \n\tcall 1b \n\t"
305 AESKEYGENA xmm0_xmm1
",0x40 \n\tcall 1b \n\t"
306 AESKEYGENA xmm0_xmm1
",0x80 \n\tcall 1b \n\t"
307 AESKEYGENA xmm0_xmm1
",0x1B \n\tcall 1b \n\t"
308 AESKEYGENA xmm0_xmm1
",0x36 \n\tcall 1b \n\t"
311 : "memory", "cc", "0");
315 * Key expansion, 192-bit case
317 static void aesni_setkey_enc_192(unsigned char *rk
,
318 const unsigned char *key
) {
319 asm("movdqu (%1), %%xmm0 \n\t" // copy original round key
320 "movdqu %%xmm0, (%0) \n\t"
322 "movq 16(%1), %%xmm1 \n\t"
323 "movq %%xmm1, (%0) \n\t"
325 "jmp 2f \n\t" // skip auxiliary routine
328 * Finish generating the next 6 quarter-keys.
330 * On entry xmm0 is r3:r2:r1:r0, xmm1 is stuff:stuff:r5:r4
331 * and xmm2 is stuff:stuff:X:stuff with X = rot( sub( r3 ) ) ^ RCON.
333 * On exit, xmm0 is r9:r8:r7:r6 and xmm1 is stuff:stuff:r11:r10
334 * and those are written to the round key buffer.
337 "pshufd $0x55, %%xmm2, %%xmm2 \n\t" // X:X:X:X
338 "pxor %%xmm0, %%xmm2 \n\t" // X+r3:X+r2:X+r1:r4
339 "pslldq $4, %%xmm0 \n\t" // etc
340 "pxor %%xmm0, %%xmm2 \n\t"
341 "pslldq $4, %%xmm0 \n\t"
342 "pxor %%xmm0, %%xmm2 \n\t"
343 "pslldq $4, %%xmm0 \n\t"
344 "pxor %%xmm2, %%xmm0 \n\t" // update xmm0 = r9:r8:r7:r6
345 "movdqu %%xmm0, (%0) \n\t"
347 "pshufd $0xff, %%xmm0, %%xmm2 \n\t" // r9:r9:r9:r9
348 "pxor %%xmm1, %%xmm2 \n\t" // stuff:stuff:r9+r5:r10
349 "pslldq $4, %%xmm1 \n\t" // r2:r1:r0:0
350 "pxor %%xmm2, %%xmm1 \n\t" // xmm1 = stuff:stuff:r11:r10
351 "movq %%xmm1, (%0) \n\t"
356 AESKEYGENA xmm1_xmm2
",0x01 \n\tcall 1b \n\t"
357 AESKEYGENA xmm1_xmm2
",0x02 \n\tcall 1b \n\t"
358 AESKEYGENA xmm1_xmm2
",0x04 \n\tcall 1b \n\t"
359 AESKEYGENA xmm1_xmm2
",0x08 \n\tcall 1b \n\t"
360 AESKEYGENA xmm1_xmm2
",0x10 \n\tcall 1b \n\t"
361 AESKEYGENA xmm1_xmm2
",0x20 \n\tcall 1b \n\t"
362 AESKEYGENA xmm1_xmm2
",0x40 \n\tcall 1b \n\t"
363 AESKEYGENA xmm1_xmm2
",0x80 \n\tcall 1b \n\t"
367 : "memory", "cc", "0");
371 * Key expansion, 256-bit case
373 static void aesni_setkey_enc_256(unsigned char *rk
,
374 const unsigned char *key
) {
375 asm("movdqu (%1), %%xmm0 \n\t"
376 "movdqu %%xmm0, (%0) \n\t"
378 "movdqu 16(%1), %%xmm1 \n\t"
379 "movdqu %%xmm1, (%0) \n\t"
380 "jmp 2f \n\t" // skip auxiliary routine
383 * Finish generating the next two round keys.
385 * On entry xmm0 is r3:r2:r1:r0, xmm1 is r7:r6:r5:r4 and
386 * xmm2 is X:stuff:stuff:stuff with X = rot( sub( r7 )) ^ RCON
388 * On exit, xmm0 is r11:r10:r9:r8 and xmm1 is r15:r14:r13:r12
389 * and those have been written to the output buffer.
392 "pshufd $0xff, %%xmm2, %%xmm2 \n\t"
393 "pxor %%xmm0, %%xmm2 \n\t"
394 "pslldq $4, %%xmm0 \n\t"
395 "pxor %%xmm0, %%xmm2 \n\t"
396 "pslldq $4, %%xmm0 \n\t"
397 "pxor %%xmm0, %%xmm2 \n\t"
398 "pslldq $4, %%xmm0 \n\t"
399 "pxor %%xmm2, %%xmm0 \n\t"
401 "movdqu %%xmm0, (%0) \n\t"
403 /* Set xmm2 to stuff:Y:stuff:stuff with Y = subword( r11 )
404 * and proceed to generate next round key from there */
405 AESKEYGENA xmm0_xmm2
",0x00 \n\t"
406 "pshufd $0xaa, %%xmm2, %%xmm2 \n\t"
407 "pxor %%xmm1, %%xmm2 \n\t"
408 "pslldq $4, %%xmm1 \n\t"
409 "pxor %%xmm1, %%xmm2 \n\t"
410 "pslldq $4, %%xmm1 \n\t"
411 "pxor %%xmm1, %%xmm2 \n\t"
412 "pslldq $4, %%xmm1 \n\t"
413 "pxor %%xmm2, %%xmm1 \n\t"
415 "movdqu %%xmm1, (%0) \n\t"
419 * Main "loop" - Generating one more key than necessary,
420 * see definition of mbedtls_aes_context.buf
423 AESKEYGENA xmm1_xmm2
",0x01 \n\tcall 1b \n\t"
424 AESKEYGENA xmm1_xmm2
",0x02 \n\tcall 1b \n\t"
425 AESKEYGENA xmm1_xmm2
",0x04 \n\tcall 1b \n\t"
426 AESKEYGENA xmm1_xmm2
",0x08 \n\tcall 1b \n\t"
427 AESKEYGENA xmm1_xmm2
",0x10 \n\tcall 1b \n\t"
428 AESKEYGENA xmm1_xmm2
",0x20 \n\tcall 1b \n\t"
429 AESKEYGENA xmm1_xmm2
",0x40 \n\tcall 1b \n\t"
432 : "memory", "cc", "0");
436 * Key expansion, wrapper
438 int mbedtls_aesni_setkey_enc(unsigned char *rk
,
439 const unsigned char *key
,
443 aesni_setkey_enc_128(rk
, key
);
446 aesni_setkey_enc_192(rk
, key
);
449 aesni_setkey_enc_256(rk
, key
);
452 return (MBEDTLS_ERR_AES_INVALID_KEY_LENGTH
);
458 #endif /* MBEDTLS_HAVE_X86_64 */
460 #endif /* MBEDTLS_AESNI_C */