fpga/tests/testbed_fpga.v

   1 //-----------------------------------------------------------------------------
   2 // Copyright (C) Proxmark3 contributors. See AUTHORS.md for details.
   3 //
   4 // This program is free software: you can redistribute it and/or modify
   5 // it under the terms of the GNU General Public License as published by
   6 // the Free Software Foundation, either version 3 of the License, or
   7 // (at your option) any later version.
   8 //
   9 // This program is distributed in the hope that it will be useful,
  10 // but WITHOUT ANY WARRANTY; without even the implied warranty of
  11 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  12 // GNU General Public License for more details.
  13 //
  14 // See LICENSE.txt for the text of the license.
  15 //-----------------------------------------------------------------------------
  16
  17 `include "fpga.v"
  18
  19 module testbed_fpga;
  20     reg spck, mosi, ncs;
  21     wire miso;
  22     reg pck0i, ck_1356meg, ck_1356megb;
  23     wire pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4;
  24     reg [7:0] adc_d;
  25     wire adc_clk, adc_noe;
  26     reg ssp_dout;
  27     wire ssp_frame, ssp_din, ssp_clk;
  28
  29     fpga dut(
  30         spck, miso, mosi, ncs,
  31         pck0i, ck_1356meg, ck_1356megb,
  32         pwr_lo, pwr_hi, pwr_oe1, pwr_oe2, pwr_oe3, pwr_oe4,
  33         adc_d, adc_clk, adc_noe,
  34         ssp_frame, ssp_din, ssp_dout, ssp_clk
  35     );
  36
  37     integer i;
  38
  39     initial begin
  40
  41         // init inputs
  42         #5 ncs=1;
  43         #5 spck = 1;
  44         #5 mosi = 1;
  45
  46         #50 ncs=0;
  47         for (i = 0 ;  i < 8 ;  i = i + 1) begin
  48             #5 mosi = $random;
  49             #5 spck = 0;
  50             #5 spck = 1;
  51         end
  52         #5 ncs=1;
  53
  54         #50 ncs=0;
  55         for (i = 0 ;  i < 8 ;  i = i + 1) begin
  56             #5 mosi = $random;
  57             #5 spck = 0;
  58             #5 spck = 1;
  59         end
  60         #5 ncs=1;
  61
  62         #50 mosi=1;
  63         $finish;
  64     end
  65
  66 endmodule // main