?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
R&Y: Added DAY RTA Tapp Card and Additional BKK BEM Stored Value Card AIDs to `aid_de...
[RRG-proxmark3.git] / tools / simmodule / sim011.asm
blob3da5486d4271ebef5eed774d42c532171de498a1
1 ; ---------------------------------------------------------------------------
2 ; Proxmark3 RDV4 SIM module firmware
3 ;
4 ; Copyright (C) 2019 Sentinel
5 ;
6 ; This program is free software: you can redistribute it and/or modify it
7 ; under the terms of the GNU Lesser General Public License as published by the
8 ; Free Software Foundation, either version 3 of the License, or (at your
9 ; option) any later version.
10 ;
11 ; This program is distributed in the hope that it will be useful, but WITHOUT
12 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 ; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
14 ; more details.
15 ;
16 ; You should have received a copy of the GNU Lesser General Public License
17 ; along with this program. If not, see <http://www.gnu.org/licenses/>
18 ; ---------------------------------------------------------------------------
19 VERS_HI equ 3
20 VERS_LO equ 11
21 ; ---------------------------------------------------------------------------
22 ; ===========================================================================
23 ; ---------------------------------------------------------------------------
24 SCON_0 equ 098h
25 FE_0 equ 098h.7
26
27 SCON_1 equ 0F8h
28 RI_1 equ 0F8h.0
29 TI_1 equ 0F8h.1
30 FE_1 equ 0F8h.7
31 SBUF_1 equ 09Ah
32 T3CON equ 0C4h
33 RL3 equ 0C5h
34 RH3 equ 0C6h
35
36 P0M1 equ 0B1h
37 P0M2 equ 0B2h
38 P1M1 equ 0B3h
39 P1M2 equ 0B4h
40 P3M1 equ 0ACh;
41 P3M2 equ 0ADh;
42
43 EIE equ 09Bh
44 EIE1 equ 09Ch
45
46 TA equ 0C7h
47
48 RCTRIM0 equ 084h
49 ; ---------------------------------------------------------------------------
50 CKCON equ 08Eh
51 CKDIV equ 095h
52 ; ---------------------------------------------------------------------------
53 P1S equ 0B3h ;Page1
54 SFRS equ 091h ;TA Protection
55 ; ---------------------------------------------------------------------------
56 AUXR1 equ 0A2h
57 ; ---------------------------------------------------------------------------
58 I2DAT equ 0BCh;
59 I2STAT equ 0BDh;
60 I2CLK equ 0BEh;
61 I2TOC equ 0BFh;
62 I2CON equ 0C0h;
63 ; equ I2CON.7;8
64 I2CEN equ I2CON.6;4
65 STA equ I2CON.5;2
66 STO equ I2CON.4;1
67 SI equ I2CON.3;8
68 AA equ I2CON.2;4
69 ; equ I2CON.1;2
70 I2CPX equ I2CON.0;1
71
72
73 I2ADDR equ 0C1h;
74
75 ; ---------------------------------------------------------------------------
76 ; ===========================================================================
77 ; ---------------------------------------------------------------------------
78 pin_TX1 equ P1.6
79
80 pin_TX0 equ P0.6
81 pin_RX0 equ P0.7
82
83 pin_SCL equ P1.3
84 pin_SDA equ P1.4
85
86 pin_RST equ P1.0
87 pin_CLC equ P1.1
88 pin_led equ P1.2
89
90 ; ---------------------------------------------------------------------------
91 ; ===========================================================================
92
93
94 CMD_GENERATE_ATR equ 01h
95 CMD_WRITE_DATA_SIM equ 02h
96 CMD_READ_DATA_SIM equ 03h
97
98 CMD_SET_BAUD_RATE equ 04h
99 CMD_SET_SIM_CLC equ 05h
100 CMD_GET_VERS equ 06h
101 CMD_WRITE_CONFIRM equ 07h
102
103
104
105 ; ---------------------------------------------------------------------------
106 ; ===========================================================================
107
108 bit_RX0 equ 32.0
109 bit_command_receive equ 32.1
110 bit_generate_ATR equ 32.2
111 i2c_write_mode equ 32.3
112 i2c_write_done equ 32.4
113 bit_data_sim_wr equ 32.5
114 bit_length_answer equ 32.6
115 bit_TX0 equ 32.7
116
117 bit_command_buff equ 33.0
118 i2c_write_command equ 33.1
119 i2c_command_done equ 33.2
120 bit_wait_confirm equ 33.3
121 bit_first_ATR equ 33.4 ;11/03/2019
122 ; ---------------------------------------------------------------------------
123 ; ---------------------------------------------------------------------------
124 ; ---------------------------------------------------------------------------
125 bit_32 equ 32
126 bit_33 equ 33
127 pointer_RX1 equ 34 ;save SBUF(SIM) to XRAM
128 pointer_RX2 equ 35 ;read XRAM to I2C
129 pointer_TX equ 36
130
131 length_send_to_sim equ 37
132 length_answer_sim equ 38
133 length_command equ 39
134 time_data_read equ 40
135 time_confirm equ 41
136
137 buff_command equ 42
138 cmd_command equ 42
139 data_command equ 43
140
141 STACKKKKK equ 200
142 ; ---------------------------------------------------------------------------
143 ; ---------------------------------------------------------------------------
144 ; ---------------------------------------------------------------------------
145 ; ---------------------------------------------------------------------------
146 ; ---------------------------------------------------------------------------
147
148 ; ---------------------------------------------------------------------------
149 ; ===========================================================================
150 ; ---------------------------------------------------------------------------
151 ; Beginning of the main program
152 cseg at 00
153 Ljmp main_start
154
155 ; ---------------------------------------------------------------------------
156 ; ===========================================================================
157 ; ---------------------------------------------------------------------------
158 cseg at 11 ;1302Hz = 4MHZ(Fsys)/12/256
159 ; ---------------------------------------------------------------------------
160 jb time_confirm.7, $+3+2 ;3
161 dec time_confirm ;2
162 ; ---------------------------------------------------------------------------
163 jb time_data_read.7,reti_timer0
164 djnz time_data_read, reti_timer0
165 setb pin_scl
166 reti_timer0:
167 reti
168
169
170 ; ---------------------------------------------------------------------------
171 ; ===========================================================================
172 ; ---------------------------------------------------------------------------
173 cseg at 35 ;UART0
174 ajmp jmp_UART0_interrupt
175
176 ; ---------------------------------------------------------------------------
177 ; ===========================================================================
178 ; ---------------------------------------------------------------------------
179 cseg at 51 ;I2C
180 ajmp jmp_i2c_interrupt
181
182 ; ---------------------------------------------------------------------------
183 ; ===========================================================================
184 ; ---------------------------------------------------------------------------
185 cseg at 123 ;UART1
186 clr RI_1
187 clr TI_1
188 reti
189
190 ; ---------------------------------------------------------------------------
191 ; ===========================================================================
192 ; ---------------------------------------------------------------------------
193 jmp_UART0_interrupt:
194 jbc RI,jmp_byte_RI
195 jbc TI,jmp_byte_TI
196 reti
197 ; ---------------------------------------------------------------------------
198 jmp_byte_RI:
199 jnb bit_first_ATR, jmp_not_collect ;11/03/2019
200
201 setb bit_RX0
202 jb i2c_write_done,jmp_not_collect
203 PUSH ACC
204 inc AUXR1 ;DPTR2
205 mov a,SBUF ;DPTR2
206 ;mov SBUF_1,DPL ;DPTR2
207 mov DPL,pointer_RX1 ;DPTR2
208 mov DPH,#1 ;DPTR2
209 movx @DPTR,a ;DPTR2
210 inc pointer_RX1 ;DPTR2
211 inc AUXR1 ;DPTR2
212 POP ACC
213 ;09/08/2018
214 clr pin_scl
215 mov time_data_read,#52 ;52/1302Hz = 40mS
216
217 inc length_answer_sim
218 jmp_not_collect:
219 reti
220 ; ---------------------------------------------------------------------------
221 jmp_byte_TI:
222 setb bit_TX0
223 reti
224
225
226 ; ===========================================================================
227 ; ---------------------------------------------------------------------------
228 jmp_i2c_interrupt:
229 PUSH ACC
230 PUSH PSW
231 mov PSW,#24
232 mov R7,I2STAT
233 ; ---------------------------------------------------------------------------
234 ; ---------------------------------------------------------------------------
235 ; ---------------------------------------------------------------------------
236 cjne R7,#000h,nextttt00000
237 setb STO
238 clr SI
239 jb STO,$
240 ajmp pop_i2c_psw
241 nextttt00000:
242 ; ---------------------------------------------------------------------------
243 ; ---------------------------------------------------------------------------
244 ; ---------------------------------------------------------------------------
245 cjne R7,#060h,nextttt00001 ;START+MY ADDRESS
246 clr pin_led ;LED ON
247
248 clr bit_command_receive
249 clr i2c_write_mode
250 clr bit_data_sim_wr
251 clr bit_length_answer
252 clr bit_command_buff
253 clr i2c_write_command
254
255 ajmp end_i2c_interrupt
256 nextttt00001:
257 ; ---------------------------------------------------------------------------
258 ; ---------------------------------------------------------------------------
259 ; ---------------------------------------------------------------------------
260 ; ---------------------------------------------------------------------------
261 ; ---------------------------------------------------------------------------
262 cjne R7,#080h,nextttt00002 ;RAM ADRESS
263
264 jb bit_command_receive,jmp_data_receive
265 setb bit_command_receive
266
267 mov a,I2DAT
268 ; ---------------------------------------------------------------------------
269 ; ---------------------------------------------------------------------------
270 ; ---------------------------------------------------------------------------
271 cjne a,#CMD_WRITE_CONFIRM,next_comm001a
272
273 setb bit_wait_confirm
274
275 sjmp jmp_WRITEDATASIM
276 next_comm001a:
277 ; ---------------------------------------------------------------------------
278 cjne a,#CMD_WRITE_DATA_SIM,next_comm001b
279 clr bit_wait_confirm
280 jmp_WRITEDATASIM:
281 mov length_send_to_sim,#0
282 setb bit_data_sim_wr
283 mov pointer_TX,#0
284 ajmp end_i2c_interrupt
285 next_comm001b:
286 ; ---------------------------------------------------------------------------
287 cjne a,#CMD_GENERATE_ATR,next_comm002
288 setb bit_generate_ATR
289 ;Prepare to answer
290 mov length_answer_sim,#0
291 mov pointer_RX1,#0
292 mov pointer_RX2,#0
293 ajmp end_i2c_interrupt
294 next_comm002:
295 ; ---------------------------------------------------------------------------
296 cjne a,#CMD_GET_VERS,next_comm003
297 ajmp ANSWER_VERS
298 next_comm003:
299 ; ---------------------------------------------------------------------------
300 cjne a,#CMD_SET_BAUD_RATE,next_comm004
301 mov R0,#data_command
302 mov length_command,#0
303 mov cmd_command,#CMD_SET_BAUD_RATE
304 setb i2c_write_command
305 ajmp end_i2c_interrupt
306 next_comm004:
307 ; ---------------------------------------------------------------------------
308 cjne a,#CMD_SET_SIM_CLC,next_comm005
309 mov R0,#data_command
310 mov length_command,#0
311 mov cmd_command,#CMD_SET_SIM_CLC
312 setb i2c_write_command
313 ajmp end_i2c_interrupt
314 next_comm005:
315 ; ---------------------------------------------------------------------------
316 ajmp end_i2c_interrupt
317 ; ---------------------------------------------------------------------------
318 ; ---------------------------------------------------------------------------
319 ; ---------------------------------------------------------------------------
320 ; ---------------------------------------------------------------------------
321 jmp_data_receive:
322 ;What receive ? Data to SIM/Command to bridge
323 jb bit_data_sim_wr, jmp_data_sim_receive
324 jb i2c_write_command,jmp_comm_bridge_receive
325 ajmp end_i2c_interrupt
326 ; ---------------------------------------------------------------------------
327 jmp_comm_bridge_receive:
328 mov @R0,I2DAT
329 inc R0
330 inc length_command
331 ajmp end_i2c_interrupt
332 ; ---------------------------------------------------------------------------
333 jmp_data_sim_receive:
334
335 setb i2c_write_mode
336
337 inc AUXR1 ;DPTR2
338 mov a,I2DAT ;DPTR2
339 mov DPL,pointer_TX ;DPTR2
340 mov DPH,#0 ;DPTR2
341 movx @DPTR,a ;DPTR2
342 inc pointer_TX ;DPTR2
343 inc AUXR1 ;DPTR2
344
345 inc length_send_to_sim
346 ajmp end_i2c_interrupt
347 nextttt00002:
348 ; ---------------------------------------------------------------------------
349 ; ---------------------------------------------------------------------------
350 ; ---------------------------------------------------------------------------
351 cjne R7,#0A0h,nextttt00003 ;STOP
352 setb pin_led ;LED OFF
353
354 ;Command finish ?
355 jnb i2c_write_command,jmp_not_command
356 clr i2c_write_command
357 setb i2c_command_done
358 jmp_not_command:
359
360 ;data to SIM finish ?
361 jnb i2c_write_mode,end_i2c_interrupt
362 clr i2c_write_mode
363
364 setb i2c_write_done
365 ;Prepare to answer
366 mov length_answer_sim,#0
367 mov pointer_RX1,#0
368 mov pointer_RX2,#0
369
370 ajmp end_i2c_interrupt
371 nextttt00003:
372 ; ---------------------------------------------------------------------------
373 ; ---------------------------------------------------------------------------
374 ; ---------------------------------------------------------------------------
375 cjne R7,#0A8h,nextttt00004
376 sjmp read_byte_I2C
377 nextttt00004:
378 ; ---------------------------------------------------------------------------
379 ; ---------------------------------------------------------------------------
380 ; ---------------------------------------------------------------------------
381 cjne R7,#0B8h,nextttt00005
382 read_byte_I2C:
383 jnb bit_command_buff,jmp_not_comm_buff2
384 mov I2DAT,@R0
385 inc R0
386 ajmp end_i2c_interrupt
387
388 jmp_not_comm_buff2:
389 jb bit_length_answer,read_byte_APROM
390 setb bit_length_answer
391
392 mov I2DAT,length_answer_sim
393 ajmp end_i2c_interrupt
394 read_byte_APROM:
395 inc AUXR1 ;DPTR2
396 mov DPL,pointer_RX2 ;DPTR2
397 mov DPH,#1 ;DPTR2
398 movx a,@DPTR ;DPTR2
399 mov I2DAT,a ;DPTR2
400 inc pointer_RX2 ;DPTR2
401 inc AUXR1 ;DPTR2
402 nextttt00005:
403 ; ---------------------------------------------------------------------------
404 ; ---------------------------------------------------------------------------
405 ; ---------------------------------------------------------------------------
406 end_i2c_interrupt:
407 clr STA
408 clr STO
409 setb AA
410 ; ---------------------------------------------------------------------------
411 ; ---------------------------------------------------------------------------
412 ; ---------------------------------------------------------------------------
413 pop_i2c_psw:
414 POP PSW
415 POP ACC
416 clr SI
417 reti
418
419
420 ; ---------------------------------------------------------------------------
421 ; ===========================================================================
422 ; ---------------------------------------------------------------------------
423 ANSWER_VERS:
424 mov R0,#data_command
425 mov cmd_command,#CMD_GET_VERS
426 mov (data_command+0),#2
427 mov (data_command+1),#VERS_HI
428 mov (data_command+2),#VERS_LO
429 setb bit_command_buff
430 ajmp end_i2c_interrupt
431
432
433 ; ---------------------------------------------------------------------------
434 ; ===========================================================================
435 ; ---------------------------------------------------------------------------
436 ; %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
437 main_start:
438 mov SP,#STACKKKKK
439 ; ---------------------------------------------------------------------------
440 ;0-bidirect 1-push pull 0-input only 1-open drain
441 ;0 0 1 1
442 ; ---------------------------------------------------------------------------
443 mov P0M2,#01000000b ;Р0
444 mov P0M1,#11111111b ;P1.6-Tx0 SIM;
445 ;
446 mov P1M2,#01011111b ;Р1
447 mov P1M1,#10111000b ;P1.6-Tx1 DEBUG; P1.4,P1.3 - I2C;
448
449 mov P3M2,#00000000b ;P3
450 mov P3M1,#11111111b ;
451 ; ---------------------------------------------------------------------------
452 mov TMOD, #22h
453 mov TH0, #0 ;14400hz
454 mov TH1, #0E9h ;UART0 10800 Bit/sec
455 mov TCON, #55h
456 ; ---------------------------------------------------------------------------
457 ; ---------------------------------------------------------------------------
458 mov TA,#0AAh
459 mov TA,#055h
460 orl SFRS,#00000001b
461
462 mov P1S, #00010000b ;P1.4 trigger schmiddt
463
464 mov TA,#0AAh
465 mov TA,#055h
466 anl SFRS,#11111110b
467 ; ---------------------------------------------------------------------------
468 ; ---------------------------------------------------------------------------
469 ; ---------------------------------------------------------------------------
470 ;------- CONFIG I2C ---------
471 mov I2CON, #44h ;set AA, set I2C enable
472 setb pin_sda
473 setb pin_scl
474 mov I2ADDR,#0C0h
475 ; ---------------------------------------------------------------------------
476 ; ---------------------------------------------------------------------------
477 ; ---------------------------------------------------------------------------
478 ; ---------------------------------------------------------------------------
479 ; ---------------------------------------------------------------------------
480 ;mov SCON, #050h ;UART0 8bit
481 mov SCON, #0D0h ;UART0 9bit
482 ;mov PCON, #11000000b;FE_0 enable
483 mov PCON, #10000000b;FE_0 disable
484 ; ---------------------------------------------------------------------------
485 mov SCON_1,#050h ;UART1
486 ;mov T3CON, #01101000b;FE_1 enable TIMER3 UART0 BAUD
487 ;mov T3CON, #00101000b;FE_1 disable TIMER3 UART0 BAUD
488 mov T3CON, #00001000b;FE_1 disable TIMER1 UART0 BAUD
489 ;mov RL3,#0E9h ;10800/21600
490 ;mov RH3,#0FFh
491 ; ---------------------------------------------------------------------------
492 ;UART1
493 mov RL3,#0F7h ;27777/55556
494 mov RH3,#0FFh
495 ; ---------------------------------------------------------------------------
496 ; ---------------------------------------------------------------------------
497 ; ---------------------------------------------------------------------------
498 mov CKDIV,#2 ;Fsys=4.00MHZ
499 ;mov CKDIV,#1 ;Fsys=8.00MHZ
500 ; ---------------------------------------------------------------------------
501 mov bit_32,#0
502 mov bit_33,#0
503 setb time_data_read.7
504 ; ---------------------------------------------------------------------------
505 ;orl CKCON,#00000010b ;ENABLE CLC TIMER1 Fsys/12
506 orl CKCON,#00010010b ;ENABLE CLC TIMER1 Fsys
507 ; ---------------------------------------------------------------------------
508 ;mov a,RCTRIM0
509 ;add a,#31
510 ;mov TA,#0AAh
511 ;mov TA,#055h
512 ;mov RCTRIM0,a
513 ; ---------------------------------------------------------------------------
514 ; ---------------------------------------------------------------------------
515 acall clr_buffer
516 ; ---------------------------------------------------------------------------
517 mov EIE, #00000001b ;I2C Interrupt
518 ;mov IE, #10010000b ;EA, SERIAL0
519 mov IE, #10010010b ;EA, SERIAL0, TIMER0
520 ; ---------------------------------------------------------------------------
521 ; ---------------------------------------------------------------------------
522 ; ---------------------------------------------------------------------------
523 ; ---------------------------------------------------------------------------
524 ; ---------------------------------------------------------------------------
525 main_loop:
526 acall control_ATR
527 acall control_send_to_sim
528 acall control_command
529 sjmp main_loop
530
531 ; ---------------------------------------------------------------------------
532 ; ===========================================================================
533 ; ---------------------------------------------------------------------------
534 control_command:
535 jbc i2c_command_done,$+3+1 ;3
536 ret ;1
537 ; ---------------------------------------------------------------------------
538 ; ---------------------------------------------------------------------------
539 ;Control Length command=1
540 mov a,length_command
541 cjne a,#1,next_commandEND ;error length_command != 1
542 ; ---------------------------------------------------------------------------
543 ; ---------------------------------------------------------------------------
544 mov a,cmd_command
545 cjne a,#CMD_SET_BAUD_RATE,next_command001
546 mov TH1,data_command ;Timer1 HIGH byte
547 ret
548 next_command001:
549 ; ---------------------------------------------------------------------------
550 cjne a,#CMD_SET_SIM_CLC, next_command002
551 mov CKDIV,data_command ;Fsys DIV
552 ret
553 next_command002:
554 ; ---------------------------------------------------------------------------
555 next_commandEND:
556 ret
557
558 ; ---------------------------------------------------------------------------
559 ; ===========================================================================
560 ; ---------------------------------------------------------------------------
561 control_send_to_sim:
562 jb i2c_write_done,$+3+1 ;3
563 ret ;1
564 ; ---------------------------------------------------------------------------
565 ; ---------------------------------------------------------------------------
566 jbc bit_wait_confirm,jmp_wait_confirm
567 ; ---------------------------------------------------------------------------
568 ; ---------------------------------------------------------------------------
569 mov DPTR,#0000
570 looop_send:
571 movx a,@DPTR
572 inc DPTR
573 acall for_coooooom0
574 djnz length_send_to_sim,looop_send
575 ; ---------------------------------------------------------------------------
576 ; ---------------------------------------------------------------------------
577 jnb bit_RX0,$
578 clr i2c_write_done
579 ret
580
581
582 ; ---------------------------------------------------------------------------
583 ; ===========================================================================
584 ; ---------------------------------------------------------------------------
585 jmp_wait_confirm:
586 mov DPTR,#0001
587 movx a,@DPTR
588 mov R3,a
589 mov R4,#5
590 ; ---------------------------------------------------------------------------
591 mov DPTR,#0000
592 looop_seend:
593 movx a,@DPTR
594 inc DPTR
595 acall for_coooooom0
596 djnz R4,jmp_not_5byte
597
598 jnb bit_RX0,$
599 clr bit_RX0
600 ;18/12/2018
601 mov time_confirm,#65 ;New timeout 50mS
602 looop_waitconf:
603 jb time_confirm.7,jmp_no_answer
604 jnb bit_RX0,looop_waitconf
605
606 ;clr pin_scl ;TEST PULSE!
607 mov a,SBUF
608 xrl a,R3
609 ;setb pin_scl ;TEST PULSE!
610
611 jnz jmp_no_correct_answer ;18/12/2018
612
613 ;pause for next byte 17/12/2018
614 mov R7,#0
615 djnz R7,$ ;~260mkSec
616 djnz R7,$ ;~260mkSec
617 djnz R7,$ ;~260mkSec
618
619 jmp_not_5byte:
620 djnz length_send_to_sim,looop_seend
621 ; ---------------------------------------------------------------------------
622 ; ---------------------------------------------------------------------------
623 jnb bit_RX0,$
624 clr bit_RX0
625 jmp_no_answer:
626 clr i2c_write_done
627 ret
628
629 ; ---------------------------------------------------------------------------
630 ; ---------------------------------------------------------------------------
631 ;18/12/2018
632 jmp_no_correct_answer:
633 clr EA
634 clr i2c_write_done
635 mov a,SBUF
636 mov DPL,pointer_RX1
637 mov DPH,#1
638 movx @DPTR,a
639 inc pointer_RX1
640 clr pin_scl
641 mov time_data_read,#52 ;52/1302Hz = 40mS
642 inc length_answer_sim
643 setb EA
644 ret
645
646
647
648 ; ---------------------------------------------------------------------------
649 ; ===========================================================================
650 ; ---------------------------------------------------------------------------
651 control_ATR:
652 jbc bit_generate_ATR,$+3+1 ;3
653 ret ;1
654 ; ---------------------------------------------------------------------------
655 clr pin_RST
656 ;acall clr_buffer
657 ; Add rezet pause 17/12/2018
658
659 mov R6,#200
660 looop_pause50mS:
661 djnz R7,$ ;~260mkSec
662 djnz R6,looop_pause50mS
663
664 ;Prepare to answer 11/03/2019
665 acall clr_buffer
666 mov length_answer_sim,#0
667 mov pointer_RX1,#0
668 mov pointer_RX2,#0
669 setb bit_first_ATR
670 setb pin_RST
671 ret
672
673 ; ---------------------------------------------------------------------------
674 ; ===========================================================================
675 ; ---------------------------------------------------------------------------
676 for_coooooom0:
677 clr bit_RX0
678 mov c,P
679 mov TB8,c ;9bit parity
680 mov SBUF,a
681 jnb bit_TX0,$
682 clr bit_TX0
683 mov R7,#100
684 djnz R7,$
685 ret
686
687 ; ---------------------------------------------------------------------------
688 ; ===========================================================================
689 ; ---------------------------------------------------------------------------
690 clr_buffer:
691 mov DPTR,#0256 ;Receive SIM buffer
692 mov R7,#255
693 clr a
694 looop_clr_bufff:
695 movx @DPTR,a
696 inc DPTR
697 djnz R7,looop_clr_bufff
698 ret
699
700 ; ---------------------------------------------------------------------------
701 ; ===========================================================================
702 ; ---------------------------------------------------------------------------
703 ;for_coooooom1:
704 ; mov SBUF_1,a
705 ; jnb TI_1,$
706 ; clr TI_1
707 ; ret
708 ;
709 ; ---------------------------------------------------------------------------
710 ; ===========================================================================
711 ; ---------------------------------------------------------------------------
712
713 end.
Proxmark3 - the RFID research Swiss army knife. Iceman firmware