tools/simmodule/sim013.asm

   1 ; ---------------------------------------------------------------------------
   2 ; Proxmark3 RDV4 SIM module firmware
   3 ;
   4 ; Copyright (C) 2109, 2022 Sentinel
   5 ;
   6 ; This program is free software: you can redistribute it and/or modify it
   7 ; under the terms of the GNU Lesser General Public License as published by the
   8 ; Free Software Foundation, either version 3 of the License, or (at your
   9 ; option) any later version.
  10 ;
  11 ; This program is distributed in the hope that it will be useful, but WITHOUT
  12 ; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13 ; FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  14 ; more details.
  15 ;
  16 ; You should have received a copy of the GNU Lesser General Public License
  17 ; along with this program.  If not, see <http://www.gnu.org/licenses/>
  18 ; ---------------------------------------------------------------------------
  19                 VERS_HI            equ 4
  20                 VERS_LO            equ 13
  21 ; ---------------------------------------------------------------------------
  22 ; ===========================================================================
  23 ; ---------------------------------------------------------------------------
  24                 SCON_0             equ 098h
  25                    FE_0            equ 098h.7
  26
  27                 SCON_1             equ 0F8h
  28                    RI_1            equ 0F8h.0
  29                    TI_1            equ 0F8h.1
  30                    FE_1            equ 0F8h.7
  31                 SBUF_1             equ 09Ah
  32                 T3CON              equ 0C4h
  33                 RL3                equ 0C5h
  34                 RH3                equ 0C6h
  35
  36                 P0M1               equ 0B1h
  37                 P0M2               equ 0B2h
  38                 P1M1               equ 0B3h
  39                 P1M2               equ 0B4h
  40                 P3M1               equ 0ACh;
  41                 P3M2               equ 0ADh;
  42
  43                 EIE                equ 09Bh
  44                 EIE1               equ 09Ch
  45
  46                 TA                 equ 0C7h
  47
  48                 RCTRIM0            equ 084h
  49 ; ---------------------------------------------------------------------------
  50                 CKCON              equ 08Eh
  51                 CKDIV              equ 095h
  52 ; ---------------------------------------------------------------------------
  53                 P1S                equ 0B3h ;Page1
  54                 SFRS               equ 091h ;TA Protection
  55 ; ---------------------------------------------------------------------------
  56                 ;AUXR1              equ 0A2h
  57 ; ---------------------------------------------------------------------------
  58                 I2DAT              equ 0BCh;
  59                 I2STAT             equ 0BDh;
  60                 I2CLK              equ 0BEh;
  61                 I2TOC              equ 0BFh;
  62                 I2CON              equ 0C0h;
  63                   ;                equ I2CON.7;8
  64                   I2CEN            equ I2CON.6;4
  65                   STA              equ I2CON.5;2
  66                   STO              equ I2CON.4;1
  67                   SI               equ I2CON.3;8
  68                   AA               equ I2CON.2;4
  69                   ;                equ I2CON.1;2
  70                   I2CPX            equ I2CON.0;1
  71
  72
  73                 I2ADDR             equ 0C1h;
  74
  75 ; ---------------------------------------------------------------------------
  76 ; ===========================================================================
  77 ; ---------------------------------------------------------------------------
  78                 pin_TX1            equ P1.6
  79
  80                 pin_TX0            equ P0.6
  81                 pin_RX0            equ P0.7
  82
  83                 pin_SCL            equ P1.3
  84                 pin_SDA            equ P1.4
  85
  86                 pin_RST            equ P1.0
  87                 pin_CLC            equ P1.1
  88                 pin_led            equ P1.2
  89
  90 ; ---------------------------------------------------------------------------
  91 ; ===========================================================================
  92
  93
  94                 CMD_GENERATE_ATR   equ 01h
  95                 CMD_WRITE_DATA_SIM equ 02h
  96                 CMD_READ_DATA_SIM  equ 03h
  97
  98                 CMD_SET_BAUD_RATE  equ 04h
  99                 CMD_SET_SIM_CLC    equ 05h
 100                 CMD_GET_VERS       equ 06h
 101                 CMD_WRITE_CONFIRM  equ 07h
 102
 103
 104
 105 ; ---------------------------------------------------------------------------
 106 ; ===========================================================================
 107
 108                 bit_RX0              equ 32.0
 109                 bit_command_receive  equ 32.1
 110                 bit_generate_ATR     equ 32.2
 111                 i2c_write_mode       equ 32.3
 112                 i2c_write_done       equ 32.4
 113                 bit_data_sim_wr      equ 32.5
 114                 ;                    equ 32.6
 115                 bit_TX0              equ 32.7
 116
 117                 bit_command_buff     equ 33.0
 118                 i2c_write_command    equ 33.1
 119                 i2c_command_done     equ 33.2
 120                 bit_wait_confirm     equ 33.3
 121                 bit_first_ATR        equ 33.4   ;11/03/2019
 122                 bit_length_answerH   equ 33.5
 123                 bit_length_answerL   equ 33.6
 124 ; ---------------------------------------------------------------------------
 125 ; ---------------------------------------------------------------------------
 126 ; ---------------------------------------------------------------------------
 127                 bit_32               equ 32
 128                 bit_33               equ 33
 129
 130                 time_data_read       equ 34
 131                 time_confirm         equ 35
 132
 133                 pointer_RX1H         equ 36  ;save SBUF(SIM) to XRAM
 134                 pointer_RX1L         equ 37  ;save SBUF(SIM) to XRAM
 135
 136                 pointer_RX2H         equ 38  ;read XRAM to I2C
 137                 pointer_RX2L         equ 39  ;read XRAM to I2C
 138
 139                 pointer_TXH          equ 40
 140                 pointer_TXL          equ 41
 141
 142                 length_send_to_simH  equ 42
 143                 length_send_to_simL  equ 43
 144
 145                 length_answer_simH   equ 44
 146                 length_answer_simL   equ 45
 147
 148                 length_command       equ 46
 149
 150                 buff_command         equ 47
 151                 cmd_command          equ 48
 152                 data_command         equ 49
 153
 154                 STACKKKKK            equ 200
 155 ; ---------------------------------------------------------------------------
 156 ; ---------------------------------------------------------------------------
 157                 XRAM_TX_BUFF         equ 0
 158                 XRAM_RX_BUFF         equ 384
 159 ; ---------------------------------------------------------------------------
 160 ; ---------------------------------------------------------------------------
 161 ; ---------------------------------------------------------------------------
 162
 163 ; ---------------------------------------------------------------------------
 164 ; ===========================================================================
 165 ; ---------------------------------------------------------------------------
 166 ; Beginning of the main program
 167                 cseg at 00
 168                 Ljmp    main_start
 169
 170 ; ---------------------------------------------------------------------------
 171 ; ===========================================================================
 172 ; ---------------------------------------------------------------------------
 173                 cseg at 11 ;1302Hz = 4MHZ(Fsys)/12/256
 174 ; ---------------------------------------------------------------------------
 175                 jb      time_confirm.7,  $+3+2    ;3
 176                 dec     time_confirm              ;2
 177 ; ---------------------------------------------------------------------------
 178                 jb      time_data_read.7,reti_timer0
 179                 djnz    time_data_read,  reti_timer0
 180                 setb    pin_scl
 181 reti_timer0:
 182                 reti
 183
 184
 185 ; ---------------------------------------------------------------------------
 186 ; ===========================================================================
 187 ; ---------------------------------------------------------------------------
 188                 cseg at 35    ;UART0
 189                 ajmp    jmp_UART0_interrupt
 190
 191 ; ---------------------------------------------------------------------------
 192 ; ===========================================================================
 193 ; ---------------------------------------------------------------------------
 194                 cseg at 51    ;I2C
 195                 ajmp    jmp_i2c_interrupt
 196
 197 ; ---------------------------------------------------------------------------
 198 ; ===========================================================================
 199 ; ---------------------------------------------------------------------------
 200                 cseg at 123   ;UART1
 201                 clr     RI_1
 202                 clr     TI_1
 203                 reti
 204
 205 ; ---------------------------------------------------------------------------
 206 ; ===========================================================================
 207 ; ---------------------------------------------------------------------------
 208 jmp_UART0_interrupt:
 209                 jbc     RI,jmp_byte_RI
 210                 jbc     TI,jmp_byte_TI
 211                 reti
 212 ; ---------------------------------------------------------------------------
 213 jmp_byte_RI:
 214                 jnb     bit_first_ATR, jmp_not_collect   ;11/03/2019
 215
 216                 setb    bit_RX0
 217                 jb      i2c_write_done,jmp_not_collect
 218                 PUSH    ACC
 219                 PUSH    DPH
 220                 PUSH    DPL
 221                 mov     DPL,pointer_RX1L
 222                 mov     DPH,pointer_RX1H
 223                 mov     a,SBUF
 224                 movx    @DPTR,a
 225                 inc     DPTR
 226                 mov     pointer_RX1L,DPL
 227                 mov     pointer_RX1H,DPH
 228                 POP     DPL
 229                 POP     DPH
 230                 POP     ACC
 231                 ;09/08/2018
 232                 clr     pin_scl
 233                 mov     time_data_read,#52  ;52/1302Hz = 40mS
 234
 235                 inc     length_answer_simL
 236                 mov     a,length_answer_simL
 237                 jnz     $+2+2                    ;2
 238                 inc     length_answer_simH       ;2
 239
 240 jmp_not_collect:
 241                 reti
 242 ; ---------------------------------------------------------------------------
 243 jmp_byte_TI:
 244                 setb    bit_TX0
 245                 reti
 246
 247
 248 ; ===========================================================================
 249 ; ---------------------------------------------------------------------------
 250 jmp_i2c_interrupt:
 251                 PUSH    ACC
 252                 PUSH    PSW
 253                 mov     PSW,#24
 254                 mov     R7,I2STAT
 255 ; ---------------------------------------------------------------------------
 256 ; ---------------------------------------------------------------------------
 257 ; ---------------------------------------------------------------------------
 258                 cjne    R7,#000h,nextttt00000
 259                 setb    STO
 260                 clr     SI
 261                 jb      STO,$
 262                 ajmp    pop_i2c_psw
 263 nextttt00000:
 264 ; ---------------------------------------------------------------------------
 265 ; ---------------------------------------------------------------------------
 266 ; ---------------------------------------------------------------------------
 267                 cjne    R7,#060h,nextttt00001    ;START+MY ADRESS
 268                 clr     pin_led                  ;LED ON
 269
 270                 clr     bit_command_receive
 271                 clr     i2c_write_mode
 272                 clr     bit_data_sim_wr
 273                 clr     bit_length_answerH
 274                 clr     bit_length_answerL
 275                 clr     bit_command_buff
 276                 clr     i2c_write_command
 277
 278                 ajmp    end_i2c_interrupt
 279 nextttt00001:
 280 ; ---------------------------------------------------------------------------
 281 ; ---------------------------------------------------------------------------
 282 ; ---------------------------------------------------------------------------
 283 ; ---------------------------------------------------------------------------
 284 ; ---------------------------------------------------------------------------
 285                 cjne    R7,#080h,nextttt00002    ;RAM ADRESS
 286
 287                 jb      bit_command_receive,jmp_data_receive
 288                 setb    bit_command_receive
 289
 290                 mov     a,I2DAT
 291 ; ---------------------------------------------------------------------------
 292 ; ---------------------------------------------------------------------------
 293 ; ---------------------------------------------------------------------------
 294                 cjne    a,#CMD_WRITE_CONFIRM,next_comm001a
 295                 setb    bit_wait_confirm
 296                 ajmp    WRITEDATASIM
 297 next_comm001a:
 298 ; ---------------------------------------------------------------------------
 299                 cjne    a,#CMD_WRITE_DATA_SIM,next_comm001b
 300                 clr     bit_wait_confirm
 301                 ajmp    WRITEDATASIM
 302 next_comm001b:
 303 ; ---------------------------------------------------------------------------
 304                 cjne    a,#CMD_GENERATE_ATR,next_comm002
 305                 ajmp    ATR_GENERATE
 306 next_comm002:
 307 ; ---------------------------------------------------------------------------
 308                 cjne    a,#CMD_GET_VERS,next_comm003
 309                 ajmp    ANSWER_VERS
 310 next_comm003:
 311 ; ---------------------------------------------------------------------------
 312                 cjne    a,#CMD_SET_BAUD_RATE,next_comm004
 313                 ajmp    BAUD_RATE_SET
 314 next_comm004:
 315 ; ---------------------------------------------------------------------------
 316                 cjne    a,#CMD_SET_SIM_CLC,next_comm005
 317                 ajmp    SIM_CLC_SET
 318 next_comm005:
 319 ; ---------------------------------------------------------------------------
 320                 ajmp    end_i2c_interrupt
 321 ; ---------------------------------------------------------------------------
 322 ; ---------------------------------------------------------------------------
 323 ; ---------------------------------------------------------------------------
 324 ; ---------------------------------------------------------------------------
 325 jmp_data_receive:
 326                 ;What receive ? Data to SIM/Command to bridge
 327                 jb      bit_data_sim_wr,  jmp_data_sim_receive
 328                 jb      i2c_write_command,jmp_comm_bridge_receive
 329                 ajmp    end_i2c_interrupt
 330 ; ---------------------------------------------------------------------------
 331 jmp_comm_bridge_receive:
 332                 mov     @R0,I2DAT
 333                 inc     R0
 334                 inc     length_command
 335                 ajmp    end_i2c_interrupt
 336 ; ---------------------------------------------------------------------------
 337 jmp_data_sim_receive:
 338
 339                 setb    i2c_write_mode
 340
 341                 PUSH    DPH
 342                 PUSH    DPL
 343                 mov     DPL,pointer_TXL
 344                 mov     DPH,pointer_TXH
 345                 mov     a,I2DAT
 346                 movx    @DPTR,a
 347                 inc     DPTR
 348                 mov     pointer_TXL,DPL
 349                 mov     pointer_TXH,DPH
 350                 POP     DPL
 351                 POP     DPH
 352
 353                 inc     length_send_to_simL
 354                 mov     a,length_send_to_simL
 355                 jnz     $+2+2                    ;2
 356                 inc     length_send_to_simH      ;2
 357
 358                 ajmp    end_i2c_interrupt
 359 nextttt00002:
 360 ; ---------------------------------------------------------------------------
 361 ; ---------------------------------------------------------------------------
 362 ; ---------------------------------------------------------------------------
 363                 cjne    R7,#0A0h,nextttt00003    ;STOP
 364                 setb    pin_led                  ;LED OFF
 365
 366                 ;Command finish ?
 367                 jnb     i2c_write_command,jmp_not_command
 368                 clr     i2c_write_command
 369                 setb    i2c_command_done
 370 jmp_not_command:
 371
 372                 ;data to SIM finish ?
 373                 jnb     i2c_write_mode,end_i2c_interrupt
 374                 clr     i2c_write_mode
 375
 376                 setb    i2c_write_done
 377                 ;Prepare to answer
 378                 mov     length_answer_simH,#0
 379                 mov     length_answer_simL,#0
 380                 mov     pointer_RX1H,#HIGH(XRAM_RX_BUFF)
 381                 mov     pointer_RX1L,#LOW (XRAM_RX_BUFF)
 382                 mov     pointer_RX2H,#HIGH(XRAM_RX_BUFF)
 383                 mov     pointer_RX2L,#LOW (XRAM_RX_BUFF)
 384
 385                 ajmp    end_i2c_interrupt
 386 nextttt00003:
 387 ; ---------------------------------------------------------------------------
 388 ; ---------------------------------------------------------------------------
 389 ; ---------------------------------------------------------------------------
 390                 cjne    R7,#0A8h,nextttt00004
 391                 sjmp    read_byte_I2C
 392 nextttt00004:
 393 ; ---------------------------------------------------------------------------
 394 ; ---------------------------------------------------------------------------
 395 ; ---------------------------------------------------------------------------
 396                 cjne    R7,#0B8h,nextttt00005
 397 read_byte_I2C:
 398                 jnb     bit_command_buff,jmp_not_comm_buff2
 399                 mov     I2DAT,@R0
 400                 inc     R0
 401                 ajmp    end_i2c_interrupt
 402
 403 jmp_not_comm_buff2:
 404                 jb      bit_length_answerH,jmp_not_comm_buff3
 405                 setb    bit_length_answerH
 406                 mov     I2DAT,length_answer_simH
 407                 ajmp    end_i2c_interrupt
 408
 409 jmp_not_comm_buff3:
 410                 jb      bit_length_answerL,read_byte_APROM
 411                 setb    bit_length_answerL
 412                 mov     I2DAT,length_answer_simL
 413                 ajmp    end_i2c_interrupt
 414
 415 read_byte_APROM:
 416                 PUSH    DPH
 417                 PUSH    DPL
 418                 mov     DPL,pointer_RX2L
 419                 mov     DPH,pointer_RX2H
 420                 movx    a,@DPTR
 421                 mov     I2DAT,a
 422                 inc     DPTR
 423                 mov     pointer_RX2L,DPL
 424                 mov     pointer_RX2H,DPH
 425                 POP     DPL
 426                 POP     DPH
 427
 428 nextttt00005:
 429 ; ---------------------------------------------------------------------------
 430 ; ---------------------------------------------------------------------------
 431 ; ---------------------------------------------------------------------------
 432 end_i2c_interrupt:
 433                 clr     STA
 434                 clr     STO
 435                 setb    AA
 436 ; ---------------------------------------------------------------------------
 437 ; ---------------------------------------------------------------------------
 438 ; ---------------------------------------------------------------------------
 439 pop_i2c_psw:
 440                 POP     PSW
 441                 POP     ACC
 442                 clr     SI
 443                 reti
 444
 445
 446 ; ---------------------------------------------------------------------------
 447 ; ===========================================================================
 448 ; ---------------------------------------------------------------------------
 449 ANSWER_VERS:
 450                 mov     R0,#data_command
 451                 mov     cmd_command,#CMD_GET_VERS
 452                 mov     (data_command+0),#2
 453                 mov     (data_command+1),#VERS_HI
 454                 mov     (data_command+2),#VERS_LO
 455                 setb    bit_command_buff
 456                 ajmp    end_i2c_interrupt
 457
 458 ; ---------------------------------------------------------------------------
 459 ; ===========================================================================
 460 ; ---------------------------------------------------------------------------
 461 ATR_GENERATE:
 462                 setb    bit_generate_ATR
 463                 ;Prepare to answer
 464                 mov     length_answer_simH,#0
 465                 mov     length_answer_simL,#0
 466                 mov     pointer_RX1H,#HIGH(XRAM_RX_BUFF)
 467                 mov     pointer_RX1L,#LOW (XRAM_RX_BUFF)
 468                 mov     pointer_RX2H,#HIGH(XRAM_RX_BUFF)
 469                 mov     pointer_RX2L,#LOW (XRAM_RX_BUFF)
 470                 ajmp    end_i2c_interrupt
 471
 472
 473 ; ---------------------------------------------------------------------------
 474 ; ===========================================================================
 475 ; ---------------------------------------------------------------------------
 476 BAUD_RATE_SET:
 477                 mov     R0,#data_command
 478                 mov     length_command,#0
 479                 mov     cmd_command,#CMD_SET_BAUD_RATE
 480                 setb    i2c_write_command
 481                 ajmp    end_i2c_interrupt
 482
 483
 484 ; ---------------------------------------------------------------------------
 485 ; ===========================================================================
 486 ; ---------------------------------------------------------------------------
 487 SIM_CLC_SET:
 488                 mov     R0,#data_command
 489                 mov     length_command,#0
 490                 mov     cmd_command,#CMD_SET_SIM_CLC
 491                 setb    i2c_write_command
 492                 ajmp    end_i2c_interrupt
 493
 494 ; ---------------------------------------------------------------------------
 495 ; ===========================================================================
 496 ; ---------------------------------------------------------------------------
 497 WRITEDATASIM:
 498                 mov     length_send_to_simH,#0
 499                 mov     length_send_to_simL,#0
 500                 setb    bit_data_sim_wr
 501                 mov     pointer_TXH,#HIGH(XRAM_TX_BUFF)
 502                 mov     pointer_TXL,#LOW (XRAM_TX_BUFF)
 503                 ajmp    end_i2c_interrupt
 504
 505 ; ---------------------------------------------------------------------------
 506 ; ===========================================================================
 507 ; ---------------------------------------------------------------------------
 508 ; %%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%%
 509 main_start:
 510                 mov     SP,#STACKKKKK
 511 ; ---------------------------------------------------------------------------
 512                 ;0-bidirect  1-push pull   0-input only  1-open drain
 513                 ;0           0             1             1
 514 ; ---------------------------------------------------------------------------
 515                 mov     P0M2,#01000000b  ;?0
 516                 mov     P0M1,#11111111b  ;P1.6-Tx0 SIM;
 517                 ;
 518                 mov     P1M2,#01011111b  ;�1
 519                 mov     P1M1,#10111000b  ;P1.6-Tx1 DEBUG; P1.4,P1.3 - I2C;
 520
 521                 mov     P3M2,#00000000b  ;P3
 522                 mov     P3M1,#11111111b  ;
 523 ; ---------------------------------------------------------------------------
 524                 mov     TMOD, #22h
 525                 mov     TH0,  #0      ;14400hz
 526                 mov     TH1,  #0E9h   ;UART0 10800 Bit/sec
 527                 mov     TCON, #55h
 528 ; ---------------------------------------------------------------------------
 529 ; ---------------------------------------------------------------------------
 530                 mov     TA,#0AAh
 531                 mov     TA,#055h
 532                 orl     SFRS,#00000001b
 533
 534                 mov     P1S, #00010000b  ;P1.4 trigger schmiddt
 535
 536                 mov     TA,#0AAh
 537                 mov     TA,#055h
 538                 anl     SFRS,#11111110b
 539 ; ---------------------------------------------------------------------------
 540 ; ---------------------------------------------------------------------------
 541 ; ---------------------------------------------------------------------------
 542                 ;-------  CONFIG I2C  ---------
 543                 mov     I2CON, #44h        ;set AA, set I2C enable
 544                 setb    pin_sda
 545                 setb    pin_scl
 546                 mov     I2ADDR,#0C0h
 547 ; ---------------------------------------------------------------------------
 548 ; ---------------------------------------------------------------------------
 549 ; ---------------------------------------------------------------------------
 550 ; ---------------------------------------------------------------------------
 551 ; ---------------------------------------------------------------------------
 552                 ;mov     SCON,  #050h     ;UART0 8bit
 553                 mov     SCON,  #0D0h     ;UART0 9bit
 554                 ;mov     PCON,  #11000000b;FE_0 enable
 555                 mov     PCON,  #10000000b;FE_0 disable
 556 ; ---------------------------------------------------------------------------
 557                 mov     SCON_1,#050h     ;UART1
 558                 ;mov     T3CON, #01101000b;FE_1 enable TIMER3 UART0 BAUD
 559                 ;mov     T3CON, #00101000b;FE_1 disable TIMER3 UART0 BAUD
 560                 mov      T3CON, #00001000b;FE_1 disable TIMER1 UART0 BAUD
 561                 ;mov     RL3,#0E9h        ;10800/21600
 562                 ;mov     RH3,#0FFh
 563 ; ---------------------------------------------------------------------------
 564                 ;UART1
 565                 mov     RL3,#0F7h         ;27777/55556
 566                 mov     RH3,#0FFh
 567 ; ---------------------------------------------------------------------------
 568 ; ---------------------------------------------------------------------------
 569 ; ---------------------------------------------------------------------------
 570                 mov     CKDIV,#2      ;Fsys=4.00MHZ
 571                 ;mov     CKDIV,#1      ;Fsys=8.00MHZ
 572 ; ---------------------------------------------------------------------------
 573                 mov     bit_32,#0
 574                 mov     bit_33,#0
 575                 setb    time_data_read.7
 576 ; ---------------------------------------------------------------------------
 577                 ;orl     CKCON,#00000010b  ;ENABLE CLC TIMER1 Fsys/12
 578                 orl    CKCON,#00010010b  ;ENABLE CLC TIMER1 Fsys
 579 ; ---------------------------------------------------------------------------
 580                 ;mov     a,RCTRIM0
 581                 ;add     a,#31
 582                 ;mov     TA,#0AAh
 583                 ;mov     TA,#055h
 584                 ;mov     RCTRIM0,a
 585 ; ---------------------------------------------------------------------------
 586 ; ---------------------------------------------------------------------------
 587                 acall   clr_buffer
 588 ; ---------------------------------------------------------------------------
 589                 mov     EIE, #00000001b    ;I2C Interrupt
 590                 ;mov     IE,  #10010000b    ;EA, SERIAL0
 591                 mov     IE,  #10010010b    ;EA, SERIAL0, TIMER0
 592 ; ---------------------------------------------------------------------------
 593 ; ---------------------------------------------------------------------------
 594 ; ---------------------------------------------------------------------------
 595 ; ---------------------------------------------------------------------------
 596 ; ---------------------------------------------------------------------------
 597 main_loop:
 598                 acall   control_ATR
 599                 acall   control_send_to_sim
 600                 acall   control_command
 601                 sjmp    main_loop
 602
 603 ; ---------------------------------------------------------------------------
 604 ; ===========================================================================
 605 ; ---------------------------------------------------------------------------
 606 control_command:
 607                 jbc     i2c_command_done,$+3+1    ;3
 608                 ret                               ;1
 609 ; ---------------------------------------------------------------------------
 610 ; ---------------------------------------------------------------------------
 611                 ;Control Length command=1
 612                 mov     a,length_command
 613                 cjne    a,#1,next_commandEND  ;error length_command != 1
 614 ; ---------------------------------------------------------------------------
 615 ; ---------------------------------------------------------------------------
 616                 mov     a,cmd_command
 617                 cjne    a,#CMD_SET_BAUD_RATE,next_command001
 618                 mov     TH1,data_command   ;Timer1 HIGH byte
 619                 ret
 620 next_command001:
 621 ; ---------------------------------------------------------------------------
 622                 cjne    a,#CMD_SET_SIM_CLC,  next_command002
 623                 mov     CKDIV,data_command ;Fsys  DIV
 624                 ret
 625 next_command002:
 626 ; ---------------------------------------------------------------------------
 627 next_commandEND:
 628                 ret
 629
 630 ; ---------------------------------------------------------------------------
 631 ; ===========================================================================
 632 ; ---------------------------------------------------------------------------
 633 control_send_to_sim:
 634                 jb      i2c_write_done,$+3+1    ;3
 635                 ret                             ;1
 636 ; ---------------------------------------------------------------------------
 637 ; ---------------------------------------------------------------------------
 638                 jbc     bit_wait_confirm,jmp_wait_confirm
 639 ; ---------------------------------------------------------------------------
 640 ; ---------------------------------------------------------------------------
 641                 mov     DPTR,#XRAM_TX_BUFF
 642 looop_send:
 643                 movx    a,@DPTR
 644                 inc     DPTR
 645                 acall   for_coooooom0
 646
 647                 clr     c
 648                 mov     a,length_send_to_simL
 649                 subb    a,#1
 650                 mov     length_send_to_simL,a
 651                 mov     a,length_send_to_simH
 652                 subb    a,#0
 653                 mov     length_send_to_simH,a
 654                 orl     a,length_send_to_simL
 655                 jnz     looop_send
 656 ; ---------------------------------------------------------------------------
 657 ; ---------------------------------------------------------------------------
 658                 jnb     bit_RX0,$
 659                 clr     i2c_write_done
 660                 ret
 661
 662
 663 ; ---------------------------------------------------------------------------
 664 ; ===========================================================================
 665 ; ---------------------------------------------------------------------------
 666 jmp_wait_confirm:
 667                 mov     DPTR,#(XRAM_TX_BUFF+1)
 668                 movx    a,@DPTR
 669                 mov     R3,a
 670                 mov     R4,#5
 671 ; ---------------------------------------------------------------------------
 672                 mov     DPTR,#XRAM_TX_BUFF
 673 looop_seend:
 674                 movx    a,@DPTR
 675                 inc     DPTR
 676                 acall   for_coooooom0
 677                 djnz    R4,jmp_not_5byte
 678
 679                 jnb     bit_RX0,$
 680                 clr     bit_RX0
 681                 ;18/12/2018
 682                 mov     time_confirm,#65  ;New timeout 50mS
 683 looop_waitconf:
 684                 jb      time_confirm.7,jmp_no_answer
 685                 jnb     bit_RX0,looop_waitconf
 686
 687                 ;clr     pin_scl   ;TEST PULSE!
 688                 mov     a,SBUF
 689                 xrl     a,R3
 690                 ;setb    pin_scl   ;TEST PULSE!
 691
 692                 jnz     jmp_no_correct_answer   ;18/12/2018
 693
 694                 ;pause  for next byte 17/12/2018
 695                 mov     R7,#0
 696                 djnz    R7,$   ;~260mkSec
 697                 djnz    R7,$   ;~260mkSec
 698                 djnz    R7,$   ;~260mkSec
 699
 700 jmp_not_5byte:
 701
 702                 clr     c
 703                 mov     a,length_send_to_simL
 704                 subb    a,#1
 705                 mov     length_send_to_simL,a
 706                 mov     a,length_send_to_simH
 707                 subb    a,#0
 708                 mov     length_send_to_simH,a
 709                 orl     a,length_send_to_simL
 710                 jnz     looop_seend
 711 ; ---------------------------------------------------------------------------
 712 ; ---------------------------------------------------------------------------
 713                 jnb     bit_RX0,$
 714                 clr     bit_RX0
 715 jmp_no_answer:
 716                 clr     i2c_write_done
 717                 ret
 718
 719 ; ---------------------------------------------------------------------------
 720 ; ---------------------------------------------------------------------------
 721 ;18/12/2018
 722 jmp_no_correct_answer:
 723                 clr     EA
 724                 clr     i2c_write_done
 725
 726                 mov     DPL,pointer_RX1L
 727                 mov     DPH,pointer_RX1H
 728                 mov     a,SBUF
 729                 movx    @DPTR,a
 730                 inc     DPTR
 731                 mov     pointer_RX1L,DPL
 732                 mov     pointer_RX1H,DPH
 733
 734                 clr     pin_scl
 735                 mov     time_data_read,#52  ;52/1302Hz = 40mS
 736
 737                 inc     length_answer_simL
 738                 mov     a,length_answer_simL
 739                 jnz     $+2+2                    ;2
 740                 inc     length_answer_simH       ;2
 741
 742                 setb    EA
 743                 ret
 744
 745
 746
 747 ; ---------------------------------------------------------------------------
 748 ; ===========================================================================
 749 ; ---------------------------------------------------------------------------
 750 control_ATR:
 751                 jbc     bit_generate_ATR,$+3+1   ;3
 752                 ret                              ;1
 753 ; ---------------------------------------------------------------------------
 754                 clr     pin_RST
 755                 ;acall   clr_buffer
 756                 ; Add rezet pause  17/12/2018
 757
 758                 mov     R6,#200
 759 looop_pause50mS:
 760                 djnz    R7,$     ;~260mkSec
 761                 djnz    R6,looop_pause50mS
 762
 763                 ;Prepare to answer 11/03/2019
 764                 acall   clr_buffer
 765
 766                 mov     length_answer_simH,#0
 767                 mov     length_answer_simL,#0
 768                 mov     pointer_RX1H,#HIGH(XRAM_RX_BUFF)
 769                 mov     pointer_RX1L,#LOW (XRAM_RX_BUFF)
 770                 mov     pointer_RX2H,#HIGH(XRAM_RX_BUFF)
 771                 mov     pointer_RX2L,#LOW (XRAM_RX_BUFF)
 772                 setb    bit_first_ATR
 773                 setb    pin_RST
 774                 ret
 775
 776 ; ---------------------------------------------------------------------------
 777 ; ===========================================================================
 778 ; ---------------------------------------------------------------------------
 779 for_coooooom0:
 780                 clr     bit_RX0
 781                 mov     c,P
 782                 mov     TB8,c         ;9bit parity
 783                 mov     SBUF,a
 784                 jnb     bit_TX0,$
 785                 clr     bit_TX0
 786                 mov     R7,#100
 787                 djnz    R7,$
 788                 ret
 789
 790 ; ---------------------------------------------------------------------------
 791 ; ===========================================================================
 792 ; ---------------------------------------------------------------------------
 793 clr_buffer:
 794                 mov     DPTR,#XRAM_RX_BUFF    ;Receive SIM buffer 192+192 = 384b
 795                 acall   clr_192buffer         ;06/12/2022
 796 ; ---------------------------------------------------------------------------
 797 clr_192buffer:
 798                 mov     R7,#192
 799                 clr     a
 800 looop_clr_bufff:
 801                 movx    @DPTR,a
 802                 inc     DPTR
 803                 djnz    R7,looop_clr_bufff
 804                 ret
 805
 806 ; ---------------------------------------------------------------------------
 807 ; ===========================================================================
 808 ; ---------------------------------------------------------------------------
 809 ;for_coooooom1:
 810 ;                mov     SBUF_1,a
 811 ;                jnb     TI_1,$
 812 ;                clr     TI_1
 813 ;                ret
 814 ;
 815 ; ---------------------------------------------------------------------------
 816 ; ===========================================================================
 817 ; ---------------------------------------------------------------------------
 818
 819 end.