Merge pull request #2615 from jmichelp/legic
[RRG-proxmark3.git] / common_fpga / fpga.h
blobc383d2d44e18e53f63f1a054245dcb58a5e229e6
1 //-----------------------------------------------------------------------------
2 // Copyright (C) Proxmark3 contributors. See AUTHORS.md for details.
3 //
4 // This program is free software: you can redistribute it and/or modify
5 // it under the terms of the GNU General Public License as published by
6 // the Free Software Foundation, either version 3 of the License, or
7 // (at your option) any later version.
8 //
9 // This program is distributed in the hope that it will be useful,
10 // but WITHOUT ANY WARRANTY; without even the implied warranty of
11 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 // GNU General Public License for more details.
14 // See LICENSE.txt for the text of the license.
15 //-----------------------------------------------------------------------------
17 #ifndef __FPGA_H
18 #define __FPGA_H
20 #include <stdbool.h>
21 #include <inttypes.h>
23 #define FPGA_BITSTREAM_FIXED_HEADER_SIZE sizeof(bitparse_fixed_header)
24 #define FPGA_INTERLEAVE_SIZE 288
25 #if defined XC3
26 #define FPGA_TYPE "3s100evq100"
27 #define FPGA_CONFIG_SIZE 72864L // FPGA .bit file rounded up to next multiple of FPGA_INTERLEAVE_SIZE
28 #else
29 #define FPGA_TYPE "2s30vq100"
30 #define FPGA_CONFIG_SIZE 42336L // FPGA .bit file rounded up to next multiple of FPGA_INTERLEAVE_SIZE
31 #endif
32 #define FPGA_RING_BUFFER_BYTES (1024 * 30)
33 #define FPGA_TRACE_SIZE 3072
35 // definitions for multiple FPGA config files support
36 typedef enum {
37 FPGA_BITSTREAM_UNKNOWN = 0,
38 FPGA_BITSTREAM_LF = 1,
39 FPGA_BITSTREAM_MIN = FPGA_BITSTREAM_LF,
40 FPGA_BITSTREAM_HF,
41 FPGA_BITSTREAM_HF_FELICA,
42 FPGA_BITSTREAM_HF_15,
43 FPGA_BITSTREAM_MAX = FPGA_BITSTREAM_HF_15,
44 FPGA_CONFIG_COUNT
45 } FPGA_config;
47 typedef struct {
48 const char *const versionString;
49 const FPGA_config target_config;
50 } FPGA_VERSION_INFORMATION;
52 static const uint8_t bitparse_fixed_header[] = {0x00, 0x09, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x0f, 0xf0, 0x00, 0x00, 0x01};
53 extern const int g_fpga_bitstream_num;
54 extern const FPGA_VERSION_INFORMATION g_fpga_version_information[];
56 #endif