armsrc/iso14443a.h

   1 //-----------------------------------------------------------------------------
   2 // Copyright (C) Jonathan Westhues, Nov 2006
   3 // Copyright (C) Gerhard de Koning Gans - May 2008
   4 // Copyright (C) Proxmark3 contributors. See AUTHORS.md for details.
   5 //
   6 // This program is free software: you can redistribute it and/or modify
   7 // it under the terms of the GNU General Public License as published by
   8 // the Free Software Foundation, either version 3 of the License, or
   9 // (at your option) any later version.
  10 //
  11 // This program is distributed in the hope that it will be useful,
  12 // but WITHOUT ANY WARRANTY; without even the implied warranty of
  13 // MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14 // GNU General Public License for more details.
  15 //
  16 // See LICENSE.txt for the text of the license.
  17 //-----------------------------------------------------------------------------
  18 // Routines to support ISO 14443 type A.
  19 //-----------------------------------------------------------------------------
  20
  21 #ifndef __ISO14443A_H
  22 #define __ISO14443A_H
  23
  24 #include "common.h"
  25 #include "mifare.h" // struct
  26 #include "pm3_cmd.h"
  27 #include "crc16.h"  // compute_crc
  28
  29 // When the PM acts as tag and is receiving it takes
  30 // 2 ticks delay in the RF part (for the first falling edge),
  31 // 3 ticks for the A/D conversion,
  32 // 8 ticks on average until the start of the SSC transfer,
  33 // 8 ticks until the SSC samples the first data
  34 // 7*16 ticks to complete the transfer from FPGA to ARM
  35 // 8 ticks until the next ssp_clk rising edge
  36 // 4*16 ticks until we measure the time
  37 // - 8*16 ticks because we measure the time of the previous transfer
  38 #define DELAY_AIR2ARM_AS_TAG (2 + 3 + 8 + 8 + 7*16 + 8 + 4*16 - 8*16)
  39
  40 typedef struct {
  41     enum {
  42         DEMOD_14A_UNSYNCD,
  43         // DEMOD_14A_HALF_SYNCD,
  44         // DEMOD_14A_MOD_FIRST_HALF,
  45         // DEMOD_14A_NOMOD_FIRST_HALF,
  46         DEMOD_14A_MANCHESTER_DATA
  47     } state;
  48     uint16_t twoBits;
  49     uint16_t highCnt;
  50     uint16_t bitCount;
  51     uint16_t collisionPos;
  52     uint16_t syncBit;
  53     uint8_t  parityBits;
  54     uint8_t  parityLen;
  55     uint16_t shiftReg;
  56     uint16_t samples;
  57     uint16_t len;
  58     uint32_t startTime, endTime;
  59     uint16_t output_len;
  60     uint8_t  *output;
  61     uint8_t  *parity;
  62 } tDemod14a;
  63 /*
  64 typedef enum {
  65     MOD_NOMOD = 0,
  66     MOD_SECOND_HALF,
  67     MOD_FIRST_HALF,
  68     MOD_BOTH_HALVES
  69     } Modulation_t;
  70 */
  71
  72 typedef struct {
  73     enum {
  74         STATE_14A_UNSYNCD,
  75         STATE_14A_START_OF_COMMUNICATION,
  76         STATE_14A_MILLER_X,
  77         STATE_14A_MILLER_Y,
  78         STATE_14A_MILLER_Z,
  79         // DROP_NONE,
  80         // DROP_FIRST_HALF,
  81     } state;
  82     uint16_t shiftReg;
  83     int16_t bitCount;
  84     uint16_t len;
  85     //uint16_t byteCntMax;
  86     uint16_t posCnt;
  87     uint16_t syncBit;
  88     uint8_t  parityBits;
  89     uint8_t  parityLen;
  90     uint32_t fourBits;
  91     uint32_t startTime, endTime;
  92     uint16_t output_len;
  93     uint8_t *output;
  94     uint8_t *parity;
  95 } tUart14a;
  96
  97 // indices into responses array:
  98 typedef enum {
  99     RESP_INDEX_ATQA,
 100     RESP_INDEX_UIDC1,
 101     RESP_INDEX_UIDC2,
 102     RESP_INDEX_UIDC3,
 103     RESP_INDEX_SAKC1,
 104     RESP_INDEX_SAKC2,
 105     RESP_INDEX_SAKC3,
 106     RESP_INDEX_RATS,
 107     RESP_INDEX_VERSION,
 108     RESP_INDEX_SIGNATURE,
 109     RESP_INDEX_PPS,
 110     RESP_INDEX_PACK,
 111 } resp_index_t;
 112
 113 #ifndef AddCrc14A
 114 # define AddCrc14A(data, len) compute_crc(CRC_14443_A, (data), (len), (data)+(len), (data)+(len)+1)
 115 #endif
 116
 117 #ifndef AddCrc14B
 118 # define AddCrc14B(data, len) compute_crc(CRC_14443_B, (data), (len), (data)+(len), (data)+(len)+1)
 119 #endif
 120
 121 #ifndef CheckCrc14A
 122 # define CheckCrc14A(data, len) check_crc(CRC_14443_A, (data), (len))
 123 #endif
 124
 125 void printHf14aConfig(void);
 126 void setHf14aConfig(const hf14a_config *hc);
 127 hf14a_config *getHf14aConfig(void);
 128 void iso14a_set_timeout(uint32_t timeout);
 129 uint32_t iso14a_get_timeout(void);
 130
 131 void GetParity(const uint8_t *pbtCmd, uint16_t len, uint8_t *par);
 132
 133 tDemod14a *GetDemod14a(void);
 134 void Demod14aReset(void);
 135 void Demod14aInit(uint8_t *d, uint16_t n, uint8_t *par);
 136 tUart14a *GetUart14a(void);
 137 void Uart14aReset(void);
 138 void Uart14aInit(uint8_t *d, uint16_t n, uint8_t *par);
 139 RAMFUNC bool MillerDecoding(uint8_t bit, uint32_t non_real_time);
 140 RAMFUNC int ManchesterDecoding(uint8_t bit, uint16_t offset, uint32_t non_real_time);
 141
 142 void RAMFUNC SniffIso14443a(uint8_t param);
 143 void SimulateIso14443aTag(uint8_t tagType, uint16_t flags, uint8_t *data, uint8_t exitAfterNReads, uint8_t *iRATs);
 144 bool SimulateIso14443aInit(uint8_t tagType, uint16_t flags, uint8_t *data, uint8_t *iRATs, tag_response_info_t **responses, uint32_t *cuid, uint32_t counters[3], uint8_t tearings[3], uint8_t *pages);
 145 bool GetIso14443aCommandFromReader(uint8_t *received, uint16_t received_maxlen, uint8_t *par, int *len);
 146 void iso14443a_antifuzz(uint32_t flags);
 147 void ReaderIso14443a(PacketCommandNG *c);
 148 void ReaderTransmit(uint8_t *frame, uint16_t len, uint32_t *timing);
 149 void ReaderTransmitBitsPar(uint8_t *frame, uint16_t bits, uint8_t *par, uint32_t *timing);
 150 void ReaderTransmitPar(uint8_t *frame, uint16_t len, uint8_t *par, uint32_t *timing);
 151 uint16_t ReaderReceive(uint8_t *receivedAnswer, uint16_t answer_maxlen, uint8_t *par);
 152
 153 void iso14443a_setup(uint8_t fpga_minor_mode);
 154 int iso14_apdu(uint8_t *cmd, uint16_t cmd_len, bool send_chaining, void *data, uint16_t data_len, uint8_t *res);
 155 int iso14443a_select_card(uint8_t *uid_ptr, iso14a_card_select_t *p_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades, bool no_rats);
 156 int iso14443a_select_cardEx(uint8_t *uid_ptr, iso14a_card_select_t *p_card, uint32_t *cuid_ptr, bool anticollision, uint8_t num_cascades, bool no_rats, iso14a_polling_parameters_t *polling_parameters);
 157 int iso14443a_fast_select_card(uint8_t *uid_ptr, uint8_t num_cascades);
 158 void iso14a_set_trigger(bool enable);
 159
 160 int EmSendCmd14443aRaw(const uint8_t *resp, uint16_t respLen);
 161 int EmSend4bit(uint8_t resp);
 162 int EmSendCmd(uint8_t *resp, uint16_t respLen);
 163 int EmSendCmdEx(uint8_t *resp, uint16_t respLen, bool collision);
 164 int EmGetCmd(uint8_t *received, uint16_t received_max_len, uint16_t *len, uint8_t *par);
 165 int EmSendCmdPar(uint8_t *resp, uint16_t respLen, uint8_t *par);
 166 int EmSendCmdParEx(uint8_t *resp, uint16_t respLen, uint8_t *par, bool collision);
 167 int EmSendPrecompiledCmd(tag_response_info_t *p_response);
 168
 169 bool prepare_allocated_tag_modulation(tag_response_info_t *response_info, uint8_t **buffer, size_t *max_buffer_size);
 170 bool prepare_tag_modulation(tag_response_info_t *response_info, size_t max_buffer_size);
 171
 172 bool EmLogTrace(uint8_t *reader_data, uint16_t reader_len, uint32_t reader_StartTime, uint32_t reader_EndTime, uint8_t *reader_Parity,
 173                 uint8_t *tag_data, uint16_t tag_len, uint32_t tag_StartTime, uint32_t tag_EndTime, uint8_t *tag_Parity);
 174
 175 void ReaderMifare(bool first_try, uint8_t block, uint8_t keytype);
 176 void DetectNACKbug(void);
 177 void SimulateIso14443aTagAID(uint8_t tagType, uint16_t flags, uint8_t *data, uint8_t *iRATs, uint8_t *aid, uint8_t *resp, uint8_t *apdu, int aid_len, int respond_len, int apdu_len, bool enumerate);
 178
 179 bool GetIso14443aAnswerFromTag_Thinfilm(uint8_t *receivedResponse, uint16_t rec_maxlen, uint8_t *received_len);
 180
 181 extern iso14a_polling_parameters_t WUPA_POLLING_PARAMETERS;
 182 extern iso14a_polling_parameters_t REQA_POLLING_PARAMETERS;
 183
 184 #endif /* __ISO14443A_H */