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Adding some more judges, here and there.
[andmenj-acm.git]
/
NEERC
/
yield
/
yield_re_dpr_except.dpr
blob
d91da57be36c8b82dc97c9d8757f459c28c4f4ea
1
{$apptype console}
\r
2
{$r+,o+}
\r
3
\r
4
uses
\r
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SysUtils;
\r
6
\r
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var
\r
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a, b, s: integer;
\r
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\r
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begin
\r
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AssignFile(input, 'yield.in');
\r
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Reset(input);
\r
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AssignFile(output, 'yield.out');
\r
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Rewrite(output);
\r
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\r
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ReadLn(a, b);
\r
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s := 0;
\r
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try
\r
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s := a div s;
\r
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except
\r
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on EDivByZero do s := a + b;
\r
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end;
\r
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\r
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WriteLn(s);
\r
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\r
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Close(input);
\r
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Close(output);
\r
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end.