llvm/repos/testing-x86_64/disable-bswap-for-spir.patch

   1 # Based on https://github.com/ispc/ispc/blob/main/llvm_patches/12_0_disable-A-B-A-B-and-BSWAP-in-InstCombine.patch
   2
   3 diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
   4 index d01a021bf3f4..bccce825a03d 100644
   5 --- a/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
   6 +++ b/llvm/lib/Transforms/InstCombine/InstCombineAddSub.cpp
   7 @@ -15,6 +15,7 @@
   8  #include "llvm/ADT/APInt.h"
   9  #include "llvm/ADT/STLExtras.h"
  10  #include "llvm/ADT/SmallVector.h"
  11 +#include "llvm/ADT/Triple.h"
  12  #include "llvm/Analysis/InstructionSimplify.h"
  13  #include "llvm/Analysis/ValueTracking.h"
  14  #include "llvm/IR/Constant.h"
  15 @@ -1369,9 +1370,12 @@ Instruction *InstCombinerImpl::visitAdd(BinaryOperator &I) {
  16      }
  17    }
  18
  19 -  // A+B --> A|B iff A and B have no bits set in common.
  20 -  if (haveNoCommonBitsSet(LHS, RHS, DL, &AC, &I, &DT))
  21 -    return BinaryOperator::CreateOr(LHS, RHS);
  22 +  // Disable this transformation for ISPC SPIR-V
  23 +  if (!Triple(I.getModule()->getTargetTriple()).isSPIR()) {
  24 +    // A+B --> A|B iff A and B have no bits set in common.
  25 +    if (haveNoCommonBitsSet(LHS, RHS, DL, &AC, &I, &DT))
  26 +      return BinaryOperator::CreateOr(LHS, RHS);
  27 +  }
  28
  29    // add (select X 0 (sub n A)) A  -->  select X A n
  30    {
  31 diff --git a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
  32 index 120852c44474..8de55311ce3e 100644
  33 --- a/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
  34 +++ b/llvm/lib/Transforms/InstCombine/InstCombineAndOrXor.cpp
  35 @@ -2671,9 +2671,12 @@ Instruction *InstCombinerImpl::visitOr(BinaryOperator &I) {
  36    if (Instruction *FoldedLogic = foldBinOpIntoSelectOrPhi(I))
  37      return FoldedLogic;
  38
  39 -  if (Instruction *BitOp = matchBSwapOrBitReverse(I, /*MatchBSwaps*/ true,
  40 -                                                  /*MatchBitReversals*/ true))
  41 -    return BitOp;
  42 +  // Disable this transformation for ISPC SPIR-V
  43 +  if (!Triple(I.getModule()->getTargetTriple()).isSPIR()) {
  44 +    if (Instruction *BitOp = matchBSwapOrBitReverse(I, /*MatchBSwaps*/ true,
  45 +                                                    /*MatchBitReversals*/ true))
  46 +      return BitOp;
  47 +  }
  48
  49    if (Instruction *Funnel = matchFunnelShift(I, *this))
  50      return Funnel;