kvm-opensuse/kvm-bios.patch

   1 # Send to upstream BOCHS
   2 This ACPI BIOS patch provides:
   3 - The PCI bus definition for PIC, HPET, RTC, SMC and OSYS and SMIF
   4 - An PBLK which provides the size of the L2 and L3 caches
   5 - If newer hardware like ICH6 IDE is found, init it
   6 Signed-off-by: Alex Graf - http://alex.csgraf.de
   7 Index: kvm-77/bios-mac/acpi-dsdt.dsl
   8 ===================================================================
   9 --- kvm-77.orig/bios-mac/acpi-dsdt.dsl
  10 +++ kvm-77/bios-mac/acpi-dsdt.dsl
  11 @@ -78,6 +78,47 @@ DefinitionBlock (
  12
  13      /* PCI Bus definition */
  14      Scope(\_SB) {
  15 +        Device (HPET)
  16 +        {
  17 +            Name (_HID, EisaId ("PNP0103"))
  18 +            Name (_CID, 0x010CD041)
  19 +            Name (BUF0, ResourceTemplate ()
  20 +            {
  21 +                IRQNoFlags ()
  22 +                    {2}
  23 +                IRQNoFlags ()
  24 +                    {8}
  25 +                Memory32Fixed (ReadOnly,
  26 +                    0xFED00000,         // Address Base
  27 +                    0x00000400,         // Address Length
  28 +                    _Y16)
  29 +            })
  30 +            Method (_STA, 0, NotSerialized)
  31 +            {
  32 +                Return (0x0F)
  33 +            }
  34 +            Method (_CRS, 0, Serialized)
  35 +            {
  36 +                Return (BUF0)
  37 +            }
  38 +        }
  39 +        Device (SMC)
  40 +        {
  41 +            Name (_HID, EisaId ("APP0001"))
  42 +            Name (_CID, "smc-napa")
  43 +            Name (_STA, 0x0B)
  44 +            Name (_CRS, ResourceTemplate ()
  45 +            {
  46 +                IO (Decode16,
  47 +                    0x0300,             // Range Minimum
  48 +                    0x0300,             // Range Maximum
  49 +                    0x01,               // Alignment
  50 +                    0x20,               // Length
  51 +                    )
  52 +                IRQNoFlags ()
  53 +                    {6}
  54 +            })
  55 +        }
  56          Device(PCI0) {
  57              Name (_HID, EisaId ("PNP0A03"))
  58              Name (_ADR, 0x00)
  59 Index: kvm-77/bios-mac/rombios32.c
  60 ===================================================================
  61 --- kvm-77.orig/bios-mac/rombios32.c
  62 +++ kvm-77/bios-mac/rombios32.c
  63 @@ -628,6 +628,9 @@ void smp_probe(void)
  64  #define PCI_DEVICE_ID_INTEL_82371AB_0   0x7110
  65  #define PCI_DEVICE_ID_INTEL_82371AB     0x7111
  66  #define PCI_DEVICE_ID_INTEL_82371AB_3   0x7113
  67 +#define PCI_DEVICE_ID_INTEL_874079      0x27a0 /* i945GM Express Chipset */
  68 +#define PCI_DEVICE_ID_INTEL_945GL       0x27b9 /* ICH7 LPC */
  69 +#define PCI_DEVICE_ID_INTEL_ICH6IDE     0x269e
  70
  71  #define PCI_VENDOR_ID_IBM               0x1014
  72  #define PCI_VENDOR_ID_APPLE             0x106b
  73 @@ -641,7 +644,9 @@ static uint32_t pci_bios_io_addr;
  74  static uint32_t pci_bios_mem_addr;
  75  static uint32_t pci_bios_bigmem_addr;
  76  /* host irqs corresponding to PCI irqs A-D */
  77 -static uint8_t pci_irqs[4] = { 10, 10, 11, 11 };
  78 +static uint8_t pci_irqs[4] = { 11, 10, 11, 10 };
  79 +//static uint8_t pci_irqs[4] = { 10, 10, 11, 11 };
  80 +//static uint8_t pci_irqs[4] = { 0x10, 0x11, 0x12, 0x13 };
  81  static PCIDevice i440_pcidev;
  82
  83  static void pci_config_writel(PCIDevice *d, uint32_t addr, uint32_t val)
  84 @@ -772,7 +777,9 @@ static void pci_bios_init_bridges(PCIDev
  85
  86      if (vendor_id == PCI_VENDOR_ID_INTEL &&
  87         (device_id == PCI_DEVICE_ID_INTEL_82371SB_0 ||
  88 -        device_id == PCI_DEVICE_ID_INTEL_82371AB_0)) {
  89 +        device_id == PCI_DEVICE_ID_INTEL_82371AB_0 ||
  90 +        device_id == PCI_DEVICE_ID_INTEL_874079 ||
  91 +        device_id == PCI_DEVICE_ID_INTEL_945GL)) {
  92          int i, irq;
  93          uint8_t elcr[2];
  94
  95 @@ -854,8 +861,9 @@ static void pci_bios_init_device(PCIDevi
  96      case 0x0101:
  97          if (vendor_id == PCI_VENDOR_ID_INTEL &&
  98             (device_id == PCI_DEVICE_ID_INTEL_82371SB_1 ||
  99 -            device_id == PCI_DEVICE_ID_INTEL_82371AB)) {
 100 -            /* PIIX3/PIIX4 IDE */
 101 +            device_id == PCI_DEVICE_ID_INTEL_82371AB ||
 102 +            device_id == PCI_DEVICE_ID_INTEL_ICH6IDE)) {
 103 +            /* PIIX3/PIIX4/ICH6 IDE */
 104              pci_config_writew(d, 0x40, 0x8000); // enable IDE0
 105              pci_config_writew(d, 0x42, 0x8000); // enable IDE1
 106              goto default_map;
 107 @@ -1559,6 +1567,13 @@ void acpi_bios_init(void)
 108          acpi_build_table_header((struct acpi_table_header *)madt,
 109                                  "APIC", madt_size, 1);
 110      }
 111 +    /* PBLK (CPU information structure) */
 112 +    {
 113 +       uint32_t *pblk = (void*) (0x410);
 114 +       *pblk = 0;
 115 +       ((char*)pblk)[4] = 64; /* size of the Level 2 cache */
 116 +       ((char*)pblk)[5] = 0;  /* size of the Level 3 cache */
 117 +    }
 118  }
 119
 120  /* SMBIOS entry point -- must be written to a 16-bit aligned address