linux-ck/i915-gpu-finish.patch

   1 commit 389a55581e30607af0fcde6cdb4e54f189cf46cf
   2 Author: Chris Wilson <chris@chris-wilson.co.uk>
   3 Date:   Tue Nov 29 15:12:16 2011 +0000
   4
   5     drm/i915: Only clear the GPU domains upon a successful finish
   6
   7     By clearing the GPU read domains before waiting upon the buffer, we run
   8     the risk of the wait being interrupted and the domains prematurely
   9     cleared. The next time we attempt to wait upon the buffer (after
  10     userspace handles the signal), we believe that the buffer is idle and so
  11     skip the wait.
  12
  13     There are a number of bugs across all generations which show signs of an
  14     overly haste reuse of active buffers.
  15
  16     Such as:
  17
  18       https://bugs.freedesktop.org/show_bug.cgi?id=29046
  19       https://bugs.freedesktop.org/show_bug.cgi?id=35863
  20       https://bugs.freedesktop.org/show_bug.cgi?id=38952
  21       https://bugs.freedesktop.org/show_bug.cgi?id=40282
  22       https://bugs.freedesktop.org/show_bug.cgi?id=41098
  23       https://bugs.freedesktop.org/show_bug.cgi?id=41102
  24       https://bugs.freedesktop.org/show_bug.cgi?id=41284
  25       https://bugs.freedesktop.org/show_bug.cgi?id=42141
  26
  27     A couple of those pre-date i915_gem_object_finish_gpu(), so may be
  28     unrelated (such as a wild write from a userspace command buffer), but
  29     this does look like a convincing cause for most of those bugs.
  30
  31     Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
  32     Cc: stable@kernel.org
  33     Reviewed-by: Daniel Vetter <daniel.vetter@ffwll.ch>
  34     Reviewed-by: Eugeni Dodonov <eugeni.dodonov@intel.com>
  35
  36 diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
  37 index d560175..036bc58 100644
  38 --- a/drivers/gpu/drm/i915/i915_gem.c
  39 +++ b/drivers/gpu/drm/i915/i915_gem.c
  40 @@ -3087,10 +3087,13 @@ i915_gem_object_finish_gpu(struct drm_i915_gem_object *obj)
  41                         return ret;
  42         }
  43
  44 +       ret = i915_gem_object_wait_rendering(obj);
  45 +       if (ret)
  46 +               return ret;
  47 +
  48         /* Ensure that we invalidate the GPU's caches and TLBs. */
  49         obj->base.read_domains &= ~I915_GEM_GPU_DOMAINS;
  50 -
  51 -       return i915_gem_object_wait_rendering(obj);
  52 +       return 0;
  53  }
  54
  55  /**