lib/main/STM32F1/Drivers/STM32F1xx_HAL_Driver/Src/stm32f1xx_ll_usart.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f1xx_ll_usart.c
   4   * @author  MCD Application Team
   5   * @version V1.1.1
   6   * @date    12-May-2017
   7   * @brief   USART LL module driver.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37 #if defined(USE_FULL_LL_DRIVER)
  38
  39 /* Includes ------------------------------------------------------------------*/
  40 #include "stm32f1xx_ll_usart.h"
  41 #include "stm32f1xx_ll_rcc.h"
  42 #include "stm32f1xx_ll_bus.h"
  43 #ifdef  USE_FULL_ASSERT
  44 #include "stm32_assert.h"
  45 #else
  46 #define assert_param(expr) ((void)0U)
  47 #endif
  48
  49 /** @addtogroup STM32F1xx_LL_Driver
  50   * @{
  51   */
  52
  53 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
  54
  55 /** @addtogroup USART_LL
  56   * @{
  57   */
  58
  59 /* Private types -------------------------------------------------------------*/
  60 /* Private variables ---------------------------------------------------------*/
  61 /* Private constants ---------------------------------------------------------*/
  62 /** @addtogroup USART_LL_Private_Constants
  63   * @{
  64   */
  65
  66 /**
  67   * @}
  68   */
  69
  70
  71 /* Private macros ------------------------------------------------------------*/
  72 /** @addtogroup USART_LL_Private_Macros
  73   * @{
  74   */
  75
  76 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
  77  *              divided by the smallest oversampling used on the USART (i.e. 8)    */
  78 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 10000000U)
  79
  80 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
  81                                        || ((__VALUE__) == LL_USART_DIRECTION_RX) \
  82                                        || ((__VALUE__) == LL_USART_DIRECTION_TX) \
  83                                        || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
  84
  85 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
  86                                     || ((__VALUE__) == LL_USART_PARITY_EVEN) \
  87                                     || ((__VALUE__) == LL_USART_PARITY_ODD))
  88
  89 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  90                                        || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
  91
  92 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
  93                                           || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
  94
  95 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
  96                                               || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
  97
  98 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
  99                                         || ((__VALUE__) == LL_USART_PHASE_2EDGE))
 100
 101 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
 102                                            || ((__VALUE__) == LL_USART_POLARITY_HIGH))
 103
 104 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
 105                                          || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
 106
 107 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
 108                                       || ((__VALUE__) == LL_USART_STOPBITS_1) \
 109                                       || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
 110                                       || ((__VALUE__) == LL_USART_STOPBITS_2))
 111
 112 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
 113                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
 114                                        || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
 115                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
 116
 117 /**
 118   * @}
 119   */
 120
 121 /* Private function prototypes -----------------------------------------------*/
 122
 123 /* Exported functions --------------------------------------------------------*/
 124 /** @addtogroup USART_LL_Exported_Functions
 125   * @{
 126   */
 127
 128 /** @addtogroup USART_LL_EF_Init
 129   * @{
 130   */
 131
 132 /**
 133   * @brief  De-initialize USART registers (Registers restored to their default values).
 134   * @param  USARTx USART Instance
 135   * @retval An ErrorStatus enumeration value:
 136   *          - SUCCESS: USART registers are de-initialized
 137   *          - ERROR: USART registers are not de-initialized
 138   */
 139 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
 140 {
 141   ErrorStatus status = SUCCESS;
 142
 143   /* Check the parameters */
 144   assert_param(IS_UART_INSTANCE(USARTx));
 145
 146   if (USARTx == USART1)
 147   {
 148     /* Force reset of USART clock */
 149     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
 150
 151     /* Release reset of USART clock */
 152     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
 153   }
 154   else if (USARTx == USART2)
 155   {
 156     /* Force reset of USART clock */
 157     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
 158
 159     /* Release reset of USART clock */
 160     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
 161   }
 162 #if defined(USART3)
 163   else if (USARTx == USART3)
 164   {
 165     /* Force reset of USART clock */
 166     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
 167
 168     /* Release reset of USART clock */
 169     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
 170   }
 171 #endif /* USART3 */
 172 #if defined(UART4)
 173   else if (USARTx == UART4)
 174   {
 175     /* Force reset of UART clock */
 176     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
 177
 178     /* Release reset of UART clock */
 179     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
 180   }
 181 #endif /* UART4 */
 182 #if defined(UART5)
 183   else if (USARTx == UART5)
 184   {
 185     /* Force reset of UART clock */
 186     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
 187
 188     /* Release reset of UART clock */
 189     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
 190   }
 191 #endif /* UART5 */
 192   else
 193   {
 194     status = ERROR;
 195   }
 196
 197   return (status);
 198 }
 199
 200 /**
 201   * @brief  Initialize USART registers according to the specified
 202   *         parameters in USART_InitStruct.
 203   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 204   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 205   * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
 206   * @param  USARTx USART Instance
 207   * @param  USART_InitStruct: pointer to a LL_USART_InitTypeDef structure
 208   *         that contains the configuration information for the specified USART peripheral.
 209   * @retval An ErrorStatus enumeration value:
 210   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
 211   *          - ERROR: Problem occurred during USART Registers initialization
 212   */
 213 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
 214 {
 215   ErrorStatus status = ERROR;
 216   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
 217   LL_RCC_ClocksTypeDef rcc_clocks;
 218
 219   /* Check the parameters */
 220   assert_param(IS_UART_INSTANCE(USARTx));
 221   assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
 222   assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
 223   assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
 224   assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
 225   assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
 226   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
 227 #if defined(USART_CR1_OVER8)
 228   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
 229 #endif /* USART_OverSampling_Feature */
 230
 231   /* USART needs to be in disabled state, in order to be able to configure some bits in
 232      CRx registers */
 233   if (LL_USART_IsEnabled(USARTx) == 0U)
 234   {
 235     /*---------------------------- USART CR1 Configuration -----------------------
 236      * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
 237      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
 238      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
 239      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
 240      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
 241      */
 242 #if defined(USART_CR1_OVER8)
 243     MODIFY_REG(USARTx->CR1,
 244                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
 245                 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
 246                (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
 247                 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
 248 #else
 249     MODIFY_REG(USARTx->CR1,
 250                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
 251                 USART_CR1_TE | USART_CR1_RE),
 252                (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
 253                 USART_InitStruct->TransferDirection));
 254 #endif /* USART_OverSampling_Feature */
 255
 256     /*---------------------------- USART CR2 Configuration -----------------------
 257      * Configure USARTx CR2 (Stop bits) with parameters:
 258      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
 259      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
 260      */
 261     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
 262
 263     /*---------------------------- USART CR3 Configuration -----------------------
 264      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
 265      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
 266      */
 267     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
 268
 269     /*---------------------------- USART BRR Configuration -----------------------
 270      * Retrieve Clock frequency used for USART Peripheral
 271      */
 272     LL_RCC_GetSystemClocksFreq(&rcc_clocks);
 273     if (USARTx == USART1)
 274     {
 275       periphclk = rcc_clocks.PCLK2_Frequency;
 276     }
 277     else if (USARTx == USART2)
 278     {
 279       periphclk = rcc_clocks.PCLK1_Frequency;
 280     }
 281 #if defined(USART3)
 282     else if (USARTx == USART3)
 283     {
 284       periphclk = rcc_clocks.PCLK1_Frequency;
 285     }
 286 #endif /* USART3 */
 287 #if defined(UART4)
 288     else if (USARTx == UART4)
 289     {
 290       periphclk = rcc_clocks.PCLK1_Frequency;
 291     }
 292 #endif /* UART4 */
 293 #if defined(UART5)
 294     else if (USARTx == UART5)
 295     {
 296       periphclk = rcc_clocks.PCLK1_Frequency;
 297     }
 298 #endif /* UART5 */
 299     else
 300     {
 301       /* Nothing to do, as error code is already assigned to ERROR value */
 302     }
 303
 304     /* Configure the USART Baud Rate :
 305        - valid baud rate value (different from 0) is required
 306        - Peripheral clock as returned by RCC service, should be valid (different from 0).
 307     */
 308     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
 309         && (USART_InitStruct->BaudRate != 0U))
 310     {
 311       status = SUCCESS;
 312 #if defined(USART_CR1_OVER8)
 313       LL_USART_SetBaudRate(USARTx,
 314                            periphclk,
 315                            USART_InitStruct->OverSampling,
 316                            USART_InitStruct->BaudRate);
 317 #else
 318       LL_USART_SetBaudRate(USARTx,
 319                            periphclk,
 320                            USART_InitStruct->BaudRate);
 321 #endif /* USART_OverSampling_Feature */
 322     }
 323   }
 324   /* Endif (=> USART not in Disabled state => return ERROR) */
 325
 326   return (status);
 327 }
 328
 329 /**
 330   * @brief Set each @ref LL_USART_InitTypeDef field to default value.
 331   * @param USART_InitStruct: pointer to a @ref LL_USART_InitTypeDef structure
 332   *                          whose fields will be set to default values.
 333   * @retval None
 334   */
 335
 336 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
 337 {
 338   /* Set USART_InitStruct fields to default values */
 339   USART_InitStruct->BaudRate            = 9600U;
 340   USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
 341   USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
 342   USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
 343   USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
 344   USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
 345 #if defined(USART_CR1_OVER8)
 346   USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
 347 #endif /* USART_OverSampling_Feature */
 348 }
 349
 350 /**
 351   * @brief  Initialize USART Clock related settings according to the
 352   *         specified parameters in the USART_ClockInitStruct.
 353   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 354   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 355   * @param  USARTx USART Instance
 356   * @param  USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
 357   *         that contains the Clock configuration information for the specified USART peripheral.
 358   * @retval An ErrorStatus enumeration value:
 359   *          - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
 360   *          - ERROR: Problem occurred during USART Registers initialization
 361   */
 362 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 363 {
 364   ErrorStatus status = SUCCESS;
 365
 366   /* Check USART Instance and Clock signal output parameters */
 367   assert_param(IS_UART_INSTANCE(USARTx));
 368   assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
 369
 370   /* USART needs to be in disabled state, in order to be able to configure some bits in
 371      CRx registers */
 372   if (LL_USART_IsEnabled(USARTx) == 0U)
 373   {
 374     /*---------------------------- USART CR2 Configuration -----------------------*/
 375     /* If Clock signal has to be output */
 376     if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
 377     {
 378       /* Deactivate Clock signal delivery :
 379        * - Disable Clock Output:        USART_CR2_CLKEN cleared
 380        */
 381       LL_USART_DisableSCLKOutput(USARTx);
 382     }
 383     else
 384     {
 385       /* Ensure USART instance is USART capable */
 386       assert_param(IS_USART_INSTANCE(USARTx));
 387
 388       /* Check clock related parameters */
 389       assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
 390       assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
 391       assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
 392
 393       /*---------------------------- USART CR2 Configuration -----------------------
 394        * Configure USARTx CR2 (Clock signal related bits) with parameters:
 395        * - Enable Clock Output:         USART_CR2_CLKEN set
 396        * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
 397        * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
 398        * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
 399        */
 400       MODIFY_REG(USARTx->CR2,
 401                  USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
 402                  USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
 403                  USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
 404     }
 405   }
 406   /* Else (USART not in Disabled state => return ERROR */
 407   else
 408   {
 409     status = ERROR;
 410   }
 411
 412   return (status);
 413 }
 414
 415 /**
 416   * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
 417   * @param USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
 418   *                               whose fields will be set to default values.
 419   * @retval None
 420   */
 421 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 422 {
 423   /* Set LL_USART_ClockInitStruct fields with default values */
 424   USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
 425   USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 426   USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 427   USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 428 }
 429
 430 /**
 431   * @}
 432   */
 433
 434 /**
 435   * @}
 436   */
 437
 438 /**
 439   * @}
 440   */
 441
 442 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
 443
 444 /**
 445   * @}
 446   */
 447
 448 #endif /* USE_FULL_LL_DRIVER */
 449
 450 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 451