lib/main/STM32F3/Drivers/STM32F3xx_HAL_Driver/Inc/stm32f3xx_hal_pcd.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f3xx_hal_pcd.h
   4   * @author  MCD Application Team
   5   * @brief   Header file of PCD HAL module.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10   *
  11   * Redistribution and use in source and binary forms, with or without modification,
  12   * are permitted provided that the following conditions are met:
  13   *   1. Redistributions of source code must retain the above copyright notice,
  14   *      this list of conditions and the following disclaimer.
  15   *   2. Redistributions in binary form must reproduce the above copyright notice,
  16   *      this list of conditions and the following disclaimer in the documentation
  17   *      and/or other materials provided with the distribution.
  18   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  19   *      may be used to endorse or promote products derived from this software
  20   *      without specific prior written permission.
  21   *
  22   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32   *
  33   ******************************************************************************
  34   */
  35
  36 /* Define to prevent recursive inclusion -------------------------------------*/
  37 #ifndef __STM32F3xx_HAL_PCD_H
  38 #define __STM32F3xx_HAL_PCD_H
  39
  40 #ifdef __cplusplus
  41  extern "C" {
  42 #endif
  43
  44 #if defined(STM32F302xE) || defined(STM32F303xE) || \
  45     defined(STM32F302xC) || defined(STM32F303xC) || \
  46     defined(STM32F302x8)                         || \
  47     defined(STM32F373xC)
  48
  49 /* Includes ------------------------------------------------------------------*/
  50 #include "stm32f3xx_hal_def.h"
  51
  52 /** @addtogroup STM32F3xx_HAL_Driver
  53   * @{
  54   */
  55
  56 /** @addtogroup PCD
  57   * @{
  58   */
  59
  60 /* Exported types ------------------------------------------------------------*/
  61 /** @defgroup PCD_Exported_Types PCD Exported Types
  62   * @{
  63   */
  64
  65 /**
  66   * @brief  PCD State structure definition
  67   */
  68 typedef enum
  69 {
  70   HAL_PCD_STATE_RESET   = 0x00U,
  71   HAL_PCD_STATE_READY   = 0x01U,
  72   HAL_PCD_STATE_ERROR   = 0x02U,
  73   HAL_PCD_STATE_BUSY    = 0x03U,
  74   HAL_PCD_STATE_TIMEOUT = 0x04U
  75 } PCD_StateTypeDef;
  76
  77 /**
  78   * @brief  PCD double buffered endpoint direction
  79   */
  80 typedef enum
  81 {
  82   PCD_EP_DBUF_OUT,
  83   PCD_EP_DBUF_IN,
  84   PCD_EP_DBUF_ERR,
  85 }PCD_EP_DBUF_DIR;
  86
  87 /**
  88   * @brief  PCD endpoint buffer number
  89   */
  90 typedef enum
  91 {
  92   PCD_EP_NOBUF,
  93   PCD_EP_BUF0,
  94   PCD_EP_BUF1
  95 }PCD_EP_BUF_NUM;
  96
  97 /**
  98   * @brief  PCD Initialization Structure definition
  99   */
 100 typedef struct
 101 {
 102   uint32_t dev_endpoints;        /*!< Device Endpoints number.
 103                                       This parameter depends on the used USB core.
 104                                       This parameter must be a number between Min_Data = 1 and Max_Data = 15 */
 105
 106   uint32_t speed;                /*!< USB Core speed.
 107                                       This parameter can be any value of @ref PCD_Core_Speed                 */
 108
 109   uint32_t ep0_mps;              /*!< Set the Endpoint 0 Max Packet size.
 110                                       This parameter can be any value of @ref PCD_EP0_MPS                    */
 111
 112   uint32_t phy_itface;           /*!< Select the used PHY interface.
 113                                       This parameter can be any value of @ref PCD_Core_PHY                   */
 114
 115   uint32_t Sof_enable;           /*!< Enable or disable the output of the SOF signal.
 116                                       This parameter can be set to ENABLE or DISABLE                      */
 117
 118   uint32_t low_power_enable;     /*!< Enable or disable Low Power mode
 119                                       This parameter can be set to ENABLE or DISABLE                      */
 120
 121   uint32_t lpm_enable;           /*!< Enable or disable the Link Power Management .
 122                                       This parameter can be set to ENABLE or DISABLE                      */
 123
 124   uint32_t battery_charging_enable; /*!< Enable or disable Battery charging.
 125                                       This parameter can be set to ENABLE or DISABLE                      */
 126
 127 }PCD_InitTypeDef;
 128
 129 typedef struct
 130 {
 131   uint8_t   num;            /*!< Endpoint number
 132                                 This parameter must be a number between Min_Data = 1 and Max_Data = 15    */
 133
 134   uint8_t   is_in;          /*!< Endpoint direction
 135                                 This parameter must be a number between Min_Data = 0 and Max_Data = 1     */
 136
 137   uint8_t   is_stall;       /*!< Endpoint stall condition
 138                                 This parameter must be a number between Min_Data = 0 and Max_Data = 1     */
 139
 140   uint8_t   type;           /*!< Endpoint type
 141                                  This parameter can be any value of @ref PCD_EP_Type                      */
 142
 143   uint16_t  pmaadress;      /*!< PMA Address
 144                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 145
 146
 147   uint16_t  pmaaddr0;       /*!< PMA Address0
 148                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 149
 150
 151   uint16_t  pmaaddr1;        /*!< PMA Address1
 152                                  This parameter can be any value between Min_addr = 0 and Max_addr = 1K   */
 153
 154
 155   uint8_t   doublebuffer;    /*!< Double buffer enable
 156                                  This parameter can be 0 or 1                                             */
 157
 158   uint32_t  maxpacket;      /*!< Endpoint Max packet size
 159                                  This parameter must be a number between Min_Data = 0 and Max_Data = 64KB */
 160
 161   uint8_t   *xfer_buff;     /*!< Pointer to transfer buffer                                               */
 162
 163
 164   uint32_t  xfer_len;       /*!< Current transfer length                                                  */
 165
 166   uint32_t  xfer_count;     /*!< Partial transfer length in case of multi packet transfer                 */
 167
 168 }PCD_EPTypeDef;
 169
 170 typedef   USB_TypeDef PCD_TypeDef;
 171
 172 /**
 173   * @brief  PCD Handle Structure definition
 174   */
 175 typedef struct
 176 {
 177   PCD_TypeDef             *Instance;   /*!< Register base address              */
 178   PCD_InitTypeDef         Init;       /*!< PCD required parameters            */
 179   __IO uint8_t            USB_Address; /*!< USB Address            */
 180   PCD_EPTypeDef           IN_ep[15];  /*!< IN endpoint parameters             */
 181   PCD_EPTypeDef           OUT_ep[15]; /*!< OUT endpoint parameters            */
 182   HAL_LockTypeDef         Lock;       /*!< PCD peripheral status              */
 183   __IO PCD_StateTypeDef   State;      /*!< PCD communication state            */
 184   uint32_t                Setup[12];  /*!< Setup packet buffer                */
 185   void                    *pData;      /*!< Pointer to upper stack Handler     */
 186
 187 } PCD_HandleTypeDef;
 188
 189 /**
 190   * @}
 191   */
 192
 193 /* Include PCD HAL Extension module */
 194 #include "stm32f3xx_hal_pcd_ex.h"
 195
 196 /* Exported constants --------------------------------------------------------*/
 197 /** @defgroup PCD_Exported_Constants PCD Exported Constants
 198   * @{
 199   */
 200
 201 /** @defgroup PCD_Core_Speed PCD Core Speed
 202   * @{
 203   */
 204 #define PCD_SPEED_HIGH               0U /* Not Supported */
 205 #define PCD_SPEED_FULL               2U
 206 /**
 207   * @}
 208   */
 209
 210   /** @defgroup PCD_Core_PHY PCD Core PHY
 211   * @{
 212   */
 213 #define PCD_PHY_EMBEDDED             2U
 214 /**
 215   * @}
 216   */
 217 /**
 218   * @}
 219   */
 220
 221 /* Exported macros -----------------------------------------------------------*/
 222 /** @defgroup PCD_Exported_Macros PCD Exported Macros
 223  *  @brief macros to handle interrupts and specific clock configurations
 224   * @{
 225   */
 226 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__)      ((((__HANDLE__)->Instance->ISTR) & (__INTERRUPT__)) == (__INTERRUPT__))
 227 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__)    ((((__HANDLE__)->Instance->ISTR) = (uint16_t)(~(__INTERRUPT__))))
 228
 229 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT()                 EXTI->IMR |= USB_WAKEUP_EXTI_LINE
 230 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT()                EXTI->IMR &= ~(USB_WAKEUP_EXTI_LINE)
 231 #define __HAL_USB_EXTI_GENERATE_SWIT(__EXTILINE__) (EXTI->SWIER |= (__EXTILINE__))
 232
 233 #define __HAL_USB_WAKEUP_EXTI_GET_FLAG()                  EXTI->PR & (USB_WAKEUP_EXTI_LINE)
 234 #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG()                EXTI->PR = USB_WAKEUP_EXTI_LINE
 235
 236 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE()   do {\
 237                                                      EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\
 238                                                      EXTI->RTSR |= USB_WAKEUP_EXTI_LINE;\
 239                                                    } while(0U)
 240
 241 #define __HAL_USB_WAKEUP_EXTI_ENABLE_FALLING_EDGE()  do {\
 242                                                      EXTI->FTSR |= (USB_WAKEUP_EXTI_LINE);\
 243                                                      EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE);\
 244                                                    } while(0U)
 245
 246 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_FALLING_EDGE() do {\
 247                                                      EXTI->RTSR &= ~(USB_WAKEUP_EXTI_LINE);\
 248                                                      EXTI->FTSR &= ~(USB_WAKEUP_EXTI_LINE);\
 249                                                      EXTI->RTSR |= USB_WAKEUP_EXTI_LINE;\
 250                                                      EXTI->FTSR |= USB_WAKEUP_EXTI_LINE;\
 251                                                    } while(0U)
 252 /**
 253   * @}
 254   */
 255
 256 /* Exported functions --------------------------------------------------------*/
 257 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
 258   * @{
 259   */
 260
 261 /* Initialization/de-initialization functions  ********************************/
 262 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
 263   * @{
 264   */
 265 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
 266 HAL_StatusTypeDef HAL_PCD_DeInit (PCD_HandleTypeDef *hpcd);
 267 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
 268 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
 269 /**
 270   * @}
 271   */
 272
 273 /* I/O operation functions  ***************************************************/
 274 /* Non-Blocking mode: Interrupt */
 275 /** @addtogroup PCD_Exported_Functions_Group2 IO operation functions
 276   * @{
 277   */
 278 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
 279 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
 280 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
 281
 282 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 283 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 284 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
 285 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
 286 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
 287 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
 288 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
 289 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 290 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
 291 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
 292 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
 293 /**
 294   * @}
 295   */
 296
 297 /* Peripheral Control functions  **********************************************/
 298 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
 299   * @{
 300   */
 301 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
 302 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
 303 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
 304 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
 305 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 306 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 307 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 308 uint16_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 309 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 310 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 311 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 312 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
 313 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
 314 /**
 315   * @}
 316   */
 317
 318 /* Peripheral State functions  ************************************************/
 319 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
 320   * @{
 321   */
 322 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
 323 /**
 324   * @}
 325   */
 326
 327 /**
 328   * @}
 329   */
 330
 331 /* Private constants ---------------------------------------------------------*/
 332 /** @defgroup PCD_Private_Constants PCD Private Constants
 333   * @{
 334   */
 335 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
 336   * @{
 337   */
 338 #define  USB_WAKEUP_EXTI_LINE              ((uint32_t)EXTI_IMR_MR18)  /*!< External interrupt line 18 Connected to the USB FS EXTI Line */
 339 /**
 340   * @}
 341   */
 342
 343 /** @defgroup PCD_EP0_MPS PCD EP0 MPS
 344   * @{
 345   */
 346 #define DEP0CTL_MPS_64                         0U
 347 #define DEP0CTL_MPS_32                         1U
 348 #define DEP0CTL_MPS_16                         2U
 349 #define DEP0CTL_MPS_8                          3U
 350
 351 #define PCD_EP0MPS_64                          DEP0CTL_MPS_64
 352 #define PCD_EP0MPS_32                          DEP0CTL_MPS_32
 353 #define PCD_EP0MPS_16                          DEP0CTL_MPS_16
 354 #define PCD_EP0MPS_08                          DEP0CTL_MPS_8
 355 /**
 356   * @}
 357   */
 358
 359 /** @defgroup PCD_EP_Type PCD EP Type
 360   * @{
 361   */
 362 #define PCD_EP_TYPE_CTRL                       0U
 363 #define PCD_EP_TYPE_ISOC                       1U
 364 #define PCD_EP_TYPE_BULK                       2U
 365 #define PCD_EP_TYPE_INTR                       3U
 366 /**
 367   * @}
 368   */
 369
 370 /** @defgroup PCD_ENDP PCD ENDP
 371   * @{
 372   */
 373 #define PCD_ENDP0                              ((uint8_t)0U)
 374 #define PCD_ENDP1                              ((uint8_t)1U)
 375 #define PCD_ENDP2                              ((uint8_t)2U)
 376 #define PCD_ENDP3                              ((uint8_t)3U)
 377 #define PCD_ENDP4                              ((uint8_t)4U)
 378 #define PCD_ENDP5                              ((uint8_t)5U)
 379 #define PCD_ENDP6                              ((uint8_t)6U)
 380 #define PCD_ENDP7                              ((uint8_t)7U)
 381 /**
 382   * @}
 383   */
 384
 385 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
 386   * @{
 387   */
 388 #define PCD_SNG_BUF                            0U
 389 #define PCD_DBL_BUF                            1U
 390 /**
 391   * @}
 392   */
 393
 394 /**
 395   * @}
 396   */
 397 /* Internal macros -----------------------------------------------------------*/
 398
 399 /* Private macros ------------------------------------------------------------*/
 400 /** @addtogroup PCD_Private_Macros PCD Private Macros
 401   * @{
 402   */
 403
 404 /* SetENDPOINT */
 405 #define PCD_SET_ENDPOINT(USBx, bEpNum,wRegValue)  (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U))))= (uint16_t)(wRegValue))
 406
 407 /* GetENDPOINT */
 408 #define PCD_GET_ENDPOINT(USBx, bEpNum)            (*((uint16_t *)(((uint32_t)(&(USBx)->EP0R + (bEpNum) * 2U)))))
 409
 410
 411
 412 /**
 413   * @brief  sets the type in the endpoint register(bits EP_TYPE[1:0])
 414   * @param  USBx USB peripheral instance register address.
 415   * @param  bEpNum Endpoint Number.
 416   * @param  wType Endpoint Type.
 417   * @retval None
 418   */
 419 #define PCD_SET_EPTYPE(USBx, bEpNum,wType) (PCD_SET_ENDPOINT((USBx), (bEpNum),\
 420                                   ((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & ((uint32_t)(USB_EP_T_MASK))) | ((uint32_t)(wType)) )))
 421
 422 /**
 423   * @brief  gets the type in the endpoint register(bits EP_TYPE[1:0])
 424   * @param  USBx USB peripheral instance register address.
 425   * @param  bEpNum Endpoint Number.
 426   * @retval Endpoint Type
 427   */
 428 #define PCD_GET_EPTYPE(USBx, bEpNum) (((uint16_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_T_FIELD)
 429
 430
 431 /**
 432   * @brief free buffer used from the application realizing it to the line
 433           toggles bit SW_BUF in the double buffered endpoint register
 434   * @param  USBx USB peripheral instance register address.
 435   * @param  bEpNum Endpoint Number.
 436   * @param  bDir Direction
 437   * @retval None
 438   */
 439 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir)\
 440 {\
 441   if ((bDir) == PCD_EP_DBUF_OUT)\
 442   { /* OUT double buffered endpoint */\
 443     PCD_TX_DTOG((USBx), (bEpNum));\
 444   }\
 445   else if ((bDir) == PCD_EP_DBUF_IN)\
 446   { /* IN double buffered endpoint */\
 447     PCD_RX_DTOG((USBx), (bEpNum));\
 448   }\
 449 }
 450
 451 /**
 452   * @brief gets direction of the double buffered endpoint
 453   * @param   USBx: USB peripheral instance register address.
 454   * @param   bEpNum: Endpoint Number.
 455   * @retval EP_DBUF_OUT, EP_DBUF_IN,
 456   *         EP_DBUF_ERR if the endpoint counter not yet programmed.
 457   */
 458 #define PCD_GET_DB_DIR(USBx, bEpNum)\
 459 {\
 460   if ((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum)) & 0xFC00U) != 0U)\
 461     return(PCD_EP_DBUF_OUT);\
 462   else if (((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x03FFU) != 0U)\
 463     return(PCD_EP_DBUF_IN);\
 464   else\
 465     return(PCD_EP_DBUF_ERR);\
 466 }
 467
 468 /**
 469   * @brief  sets the status for tx transfer (bits STAT_TX[1:0]).
 470   * @param  USBx USB peripheral instance register address.
 471   * @param  bEpNum Endpoint Number.
 472   * @param  wState new state
 473   * @retval None
 474   */
 475 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) { register uint16_t _wRegVal;\
 476    \
 477     _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_DTOGMASK);\
 478    /* toggle first bit ? */     \
 479    if((USB_EPTX_DTOG1 & (wState))!= 0U)\
 480    {                                                                            \
 481      _wRegVal ^=(uint16_t) USB_EPTX_DTOG1;        \
 482    }                                                                            \
 483    /* toggle second bit ?  */         \
 484    if((USB_EPTX_DTOG2 & ((uint32_t)(wState)))!= 0U)      \
 485    {                                                                            \
 486      _wRegVal ^=(uint16_t) USB_EPTX_DTOG2;        \
 487    }                                                                            \
 488    PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX));\
 489   } /* PCD_SET_EP_TX_STATUS */
 490
 491 /**
 492   * @brief  sets the status for rx transfer (bits STAT_TX[1:0])
 493   * @param  USBx USB peripheral instance register address.
 494   * @param  bEpNum Endpoint Number.
 495   * @param  wState new state
 496   * @retval None
 497   */
 498 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) {\
 499     register uint16_t _wRegVal;   \
 500     \
 501     _wRegVal = (uint32_t) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_DTOGMASK);\
 502     /* toggle first bit ? */  \
 503     if((USB_EPRX_DTOG1 & (wState))!= 0U) \
 504     {                                                                             \
 505       _wRegVal ^= (uint16_t) USB_EPRX_DTOG1;  \
 506     }                                                                             \
 507     /* toggle second bit ? */  \
 508     if((USB_EPRX_DTOG2 & ((uint32_t)(wState)))!= 0U) \
 509     {                                                                             \
 510       _wRegVal ^= (uint16_t) USB_EPRX_DTOG2;  \
 511     }                                                                             \
 512     PCD_SET_ENDPOINT((USBx), (bEpNum), (((uint32_t)(_wRegVal)) | USB_EP_CTR_RX|USB_EP_CTR_TX)); \
 513   } /* PCD_SET_EP_RX_STATUS */
 514
 515 /**
 516   * @brief  sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
 517   * @param  USBx USB peripheral instance register address.
 518   * @param  bEpNum Endpoint Number.
 519   * @param  wStaterx new state.
 520   * @param  wStatetx new state.
 521   * @retval None
 522   */
 523 #define PCD_SET_EP_TXRX_STATUS(USBx,bEpNum,wStaterx,wStatetx) {\
 524     register uint32_t _wRegVal;   \
 525     \
 526     _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK |USB_EPTX_STAT) ;\
 527     /* toggle first bit ? */  \
 528     if((USB_EPRX_DTOG1 & ((wStaterx)))!= 0U) \
 529     {                                                                                    \
 530       _wRegVal ^= USB_EPRX_DTOG1;  \
 531     }                                                                                    \
 532     /* toggle second bit ? */  \
 533     if((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
 534     {                                                                                    \
 535       _wRegVal ^= USB_EPRX_DTOG2;  \
 536     }                                                                                    \
 537     /* toggle first bit ? */     \
 538     if((USB_EPTX_DTOG1 & (wStatetx))!= 0U)      \
 539     {                                                                                    \
 540       _wRegVal ^= USB_EPTX_DTOG1;        \
 541     }                                                                                    \
 542     /* toggle second bit ?  */         \
 543     if((USB_EPTX_DTOG2 & (wStatetx))!= 0U)      \
 544     {                                                                                    \
 545       _wRegVal ^= USB_EPTX_DTOG2;        \
 546     }                                                                                    \
 547     PCD_SET_ENDPOINT((USBx), (bEpNum), _wRegVal | USB_EP_CTR_RX|USB_EP_CTR_TX);    \
 548   } /* PCD_SET_EP_TXRX_STATUS */
 549
 550 /**
 551   * @brief  gets the status for tx/rx transfer (bits STAT_TX[1:0]
 552   *         /STAT_RX[1:0])
 553   * @param  USBx USB peripheral instance register address.
 554   * @param  bEpNum Endpoint Number.
 555   * @retval status
 556   */
 557 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPTX_STAT)
 558 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPRX_STAT)
 559
 560 /**
 561   * @brief  sets directly the VALID tx/rx-status into the endpoint register
 562   * @param  USBx USB peripheral instance register address.
 563   * @param  bEpNum Endpoint Number.
 564   * @retval None
 565   */
 566 #define PCD_SET_EP_TX_VALID(USBx, bEpNum)     (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
 567
 568 #define PCD_SET_EP_RX_VALID(USBx, bEpNum)     (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
 569
 570 /**
 571   * @brief  checks stall condition in an endpoint.
 572   * @param  USBx USB peripheral instance register address.
 573   * @param  bEpNum Endpoint Number.
 574   * @retval TRUE = endpoint in stall condition.
 575   */
 576 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
 577                                    == USB_EP_TX_STALL)
 578 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
 579                                    == USB_EP_RX_STALL)
 580
 581 /**
 582   * @brief  set & clear EP_KIND bit.
 583   * @param  USBx USB peripheral instance register address.
 584   * @param  bEpNum Endpoint Number.
 585   * @retval None
 586   */
 587 #define PCD_SET_EP_KIND(USBx, bEpNum)    (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 588                                 (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) | USB_EP_KIND) & USB_EPREG_MASK))))
 589 #define PCD_CLEAR_EP_KIND(USBx, bEpNum)  (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 590                                 (USB_EP_CTR_RX|USB_EP_CTR_TX|((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPKIND_MASK))))
 591
 592 /**
 593   * @brief  Sets/clears directly STATUS_OUT bit in the endpoint register.
 594   * @param  USBx USB peripheral instance register address.
 595   * @param  bEpNum Endpoint Number.
 596   * @retval None
 597   */
 598 #define PCD_SET_OUT_STATUS(USBx, bEpNum)    PCD_SET_EP_KIND((USBx), (bEpNum))
 599 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum)  PCD_CLEAR_EP_KIND((USBx), (bEpNum))
 600
 601 /**
 602   * @brief  Sets/clears directly EP_KIND bit in the endpoint register.
 603   * @param  USBx USB peripheral instance register address.
 604   * @param  bEpNum Endpoint Number.
 605   * @retval None
 606   */
 607 #define PCD_SET_EP_DBUF(USBx, bEpNum)   PCD_SET_EP_KIND((USBx), (bEpNum))
 608 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
 609
 610 /**
 611   * @brief  Clears bit CTR_RX / CTR_TX in the endpoint register.
 612   * @param  USBx USB peripheral instance register address.
 613   * @param  bEpNum Endpoint Number.
 614   * @retval None
 615   */
 616 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT((USBx), (bEpNum),\
 617                                    PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0x7FFFU & USB_EPREG_MASK))
 618 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum)   (PCD_SET_ENDPOINT((USBx), (bEpNum),\
 619                                    PCD_GET_ENDPOINT((USBx), (bEpNum)) & 0xFF7FU & USB_EPREG_MASK))
 620
 621 /**
 622   * @brief  Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
 623   * @param  USBx USB peripheral instance register address.
 624   * @param  bEpNum Endpoint Number.
 625   * @retval None
 626   */
 627 #define PCD_RX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 628                                    USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_RX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
 629 #define PCD_TX_DTOG(USBx, bEpNum)    (PCD_SET_ENDPOINT((USBx), (bEpNum), \
 630                                    USB_EP_CTR_RX|USB_EP_CTR_TX|USB_EP_DTOG_TX | (((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK)))
 631
 632 /**
 633   * @brief  Clears DTOG_RX / DTOG_TX bit in the endpoint register.
 634   * @param  USBx USB peripheral instance register address.
 635   * @param  bEpNum Endpoint Number.
 636   * @retval None
 637   */
 638 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum)  if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_RX) != 0)\
 639                                          {                                                              \
 640                                            PCD_RX_DTOG((USBx),(bEpNum));\
 641                                          }
 642 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum)  if((((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EP_DTOG_TX) != 0)\
 643                                          {\
 644                                            PCD_TX_DTOG((USBx),(bEpNum));\
 645                                          }
 646
 647 /**
 648   * @brief  Sets address in an endpoint register.
 649   * @param  USBx USB peripheral instance register address.
 650   * @param  bEpNum Endpoint Number.
 651   * @param  bAddr Address.
 652   * @retval None
 653   */
 654 #define PCD_SET_EP_ADDRESS(USBx, bEpNum,bAddr) PCD_SET_ENDPOINT((USBx), (bEpNum),\
 655     USB_EP_CTR_RX|USB_EP_CTR_TX|(((uint32_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)))) & USB_EPREG_MASK) | (bAddr))
 656
 657 /**
 658   * @brief  Gets address in an endpoint register.
 659   * @param  USBx USB peripheral instance register address.
 660   * @param  bEpNum Endpoint Number.
 661   * @retval None
 662   */
 663 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
 664
 665 /**
 666   * @brief  sets address of the tx/rx buffer.
 667   * @param  USBx USB peripheral instance register address.
 668   * @param  bEpNum Endpoint Number.
 669   * @param  wAddr address to be set (must be word aligned).
 670   * @retval None
 671   */
 672 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_TX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
 673 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum,wAddr) (*PCD_EP_RX_ADDRESS((USBx), (bEpNum)) = (((wAddr) >> 1U) << 1U))
 674
 675 /**
 676   * @brief  Gets address of the tx/rx buffer.
 677   * @param  USBx USB peripheral instance register address.
 678   * @param  bEpNum Endpoint Number.
 679   * @retval address of the buffer.
 680   */
 681 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
 682 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
 683
 684 /**
 685   * @brief  Sets counter of rx buffer with no. of blocks.
 686   * @param  dwReg Register
 687   * @param  wCount Counter.
 688   * @param  wNBlocks no. of Blocks.
 689   * @retval None
 690   */
 691 #define PCD_CALC_BLK32(dwReg,wCount,wNBlocks) {\
 692     (wNBlocks) = (wCount) >> 5U;\
 693     if(((wCount) & 0x1fU) == 0U)\
 694     {                                                  \
 695       (wNBlocks)--;\
 696     }                                                  \
 697     *pdwReg = (uint16_t)((uint16_t)((wNBlocks) << 10U) | (uint16_t)0x8000U); \
 698   }/* PCD_CALC_BLK32 */
 699
 700
 701 #define PCD_CALC_BLK2(dwReg,wCount,wNBlocks) {\
 702     (wNBlocks) = (wCount) >> 1U;\
 703     if(((wCount) & 0x1U) != 0U)\
 704     {                                                  \
 705       (wNBlocks)++;\
 706     }                                                  \
 707     *pdwReg = (uint16_t)((wNBlocks) << 10U);\
 708   }/* PCD_CALC_BLK2 */
 709
 710 #define PCD_SET_EP_CNT_RX_REG(dwReg,wCount)  {\
 711     uint16_t wNBlocks;\
 712     if((wCount) > 62U)                                \
 713     {                                                \
 714       PCD_CALC_BLK32((dwReg),(wCount),wNBlocks)     \
 715     }                                                \
 716     else                                             \
 717     {                                                \
 718       PCD_CALC_BLK2((dwReg),(wCount),wNBlocks)     \
 719     }                                                \
 720   }/* PCD_SET_EP_CNT_RX_REG */
 721
 722 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum,wCount) {\
 723     uint16_t *pdwReg = PCD_EP_TX_CNT((USBx), (bEpNum)); \
 724     PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount))\
 725   }
 726
 727 /**
 728   * @brief  sets counter for the tx/rx buffer.
 729   * @param  USBx USB peripheral instance register address.
 730   * @param  bEpNum Endpoint Number.
 731   * @param  wCount Counter value.
 732   * @retval None
 733   */
 734 #define PCD_SET_EP_TX_CNT(USBx, bEpNum,wCount) (*PCD_EP_TX_CNT((USBx), (bEpNum)) = (wCount))
 735
 736 /**
 737   * @brief  gets counter of the tx buffer.
 738   * @param  USBx USB peripheral instance register address.
 739   * @param  bEpNum Endpoint Number.
 740   * @retval Counter value
 741   */
 742 #define PCD_GET_EP_TX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
 743 #define PCD_GET_EP_RX_CNT(USBx, bEpNum)((uint16_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
 744
 745 /**
 746   * @brief  Sets buffer 0/1 address in a double buffer endpoint.
 747   * @param  USBx USB peripheral instance register address.
 748   * @param  bEpNum Endpoint Number.
 749   * @param  wBuf0Addr: buffer 0 address.
 750   * @retval Counter value
 751   */
 752 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum,wBuf0Addr) (PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)))
 753 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum,wBuf1Addr) (PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)))
 754
 755 /**
 756   * @brief  Sets addresses in a double buffer endpoint.
 757   * @param  USBx USB peripheral instance register address.
 758   * @param  bEpNum Endpoint Number.
 759   * @param  wBuf0Addr: buffer 0 address.
 760   * @param  wBuf1Addr = buffer 1 address.
 761   * @retval None
 762   */
 763 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum,wBuf0Addr,wBuf1Addr) { \
 764     PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr));\
 765     PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr));\
 766   } /* PCD_SET_EP_DBUF_ADDR */
 767
 768 /**
 769   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 770   * @param  USBx USB peripheral instance register address.
 771   * @param  bEpNum Endpoint Number.
 772   * @retval None
 773   */
 774 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
 775 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
 776
 777 /**
 778   * @brief  Gets buffer 0/1 address of a double buffer endpoint.
 779   * @param  USBx USB peripheral instance register address.
 780   * @param  bEpNum Endpoint Number.
 781   * @param  bDir endpoint dir  EP_DBUF_OUT = OUT
 782   *         EP_DBUF_IN  = IN
 783   * @param  wCount Counter value
 784   * @retval None
 785   */
 786 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount)  { \
 787     if((bDir) == PCD_EP_DBUF_OUT)\
 788       /* OUT endpoint */ \
 789     {PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum),(wCount))} \
 790     else if((bDir) == PCD_EP_DBUF_IN)\
 791       {                                                       \
 792       *PCD_EP_TX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount);  \
 793       }                                                       \
 794   } /* SetEPDblBuf0Count*/
 795
 796 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount)  { \
 797     if((bDir) == PCD_EP_DBUF_OUT)\
 798     {/* OUT endpoint */                                       \
 799       PCD_SET_EP_RX_CNT((USBx), (bEpNum),(wCount))           \
 800     }                                                         \
 801     else if((bDir) == PCD_EP_DBUF_IN)\
 802     {/* IN endpoint */                                        \
 803       *PCD_EP_RX_CNT((USBx), (bEpNum)) = (uint32_t)(wCount); \
 804     }                                                         \
 805   } /* SetEPDblBuf1Count */
 806
 807 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) {\
 808     PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)) \
 809     PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)) \
 810   } /
 811
 812 /**
 813   * @brief  Gets buffer 0/1 rx/tx counter for double buffering.
 814   * @param  USBx USB peripheral instance register address.
 815   * @param  bEpNum Endpoint Number.
 816   * @retval None
 817   */
 818 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
 819 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
 820 /**
 821   * @}
 822   */
 823
 824 /** @defgroup PCD_Instance_definition PCD Instance definition
 825   * @{
 826   */
 827 #define IS_PCD_ALL_INSTANCE                    IS_USB_ALL_INSTANCE
 828 /**
 829   * @}
 830   */
 831
 832 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
 833   * @{
 834   */
 835 /* Peripheral Control functions  ************************************************/
 836 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
 837 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
 838 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
 839 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
 840 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 841 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 842 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
 843 uint16_t          HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 844 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 845 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 846 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
 847 HAL_StatusTypeDef HAL_PCD_ActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
 848 HAL_StatusTypeDef HAL_PCD_DeActiveRemoteWakeup(PCD_HandleTypeDef *hpcd);
 849 /**
 850   * @}
 851   */
 852
 853 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
 854   * @{
 855   */
 856 /* Peripheral State functions  **************************************************/
 857 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
 858 /**
 859   * @}
 860   */
 861
 862 /** @addtogroup PCDEx_Private_Functions PCD Extended Private Functions
 863   * @{
 864   */
 865 void PCD_WritePMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
 866 void PCD_ReadPMA(USB_TypeDef  *USBx, uint8_t *pbUsrBuf, uint16_t wPMABufAddr, uint16_t wNBytes);
 867 /**
 868   * @}
 869   */
 870
 871 /**
 872   * @}
 873   */
 874
 875 /**
 876   * @}
 877   */
 878
 879 #endif /* STM32F302xE || STM32F303xE || */
 880        /* STM32F302xC || STM32F303xC || */
 881        /* STM32F302x8                || */
 882        /* STM32F373xC                   */
 883
 884 #ifdef __cplusplus
 885 }
 886 #endif
 887
 888
 889 #endif /* __STM32F3xx_HAL_PCD_H */
 890
 891 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/