[betaflight.git] / lib / main / STM32F3 / Drivers / STM32F3xx_HAL_Driver / Inc / stm32f3xx_ll_hrtim.h
| blob | 61bc9a039dd603f5e850aa9cc1e7b9ef2d6fd527 |
1 /**
2 ******************************************************************************
3 * @file stm32f3xx_ll_hrtim.h
4 * @author MCD Application Team
5 * @brief Header file of HRTIM LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>© COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
10 *
11 * Redistribution and use in source and binary forms, with or without modification,
12 * are permitted provided that the following conditions are met:
13 * 1. Redistributions of source code must retain the above copyright notice,
14 * this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright notice,
16 * this list of conditions and the following disclaimer in the documentation
17 * and/or other materials provided with the distribution.
18 * 3. Neither the name of STMicroelectronics nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
23 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
25 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
28 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
29 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
30 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
31 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 ******************************************************************************
34 */
36 /* Define to prevent recursive inclusion -------------------------------------*/
37 #ifndef __STM32F3xx_LL_HRTIM_H
38 #define __STM32F3xx_LL_HRTIM_H
40 #ifdef __cplusplus
42 #endif
44 /* Includes ------------------------------------------------------------------*/
47 /** @addtogroup STM32F3xx_LL_Driver
48 * @{
49 */
51 #if defined (HRTIM1)
53 /** @defgroup HRTIM_LL HRTIM
54 * @{
55 */
57 /* Private types -------------------------------------------------------------*/
58 /* Private variables ---------------------------------------------------------*/
59 /** @defgroup HRTIM_LL_Private_Variables HRTIM Private Variables
60 * @{
61 */
63 {
70 };
73 {
78 };
81 {
92 };
95 {
106 };
110 {
113 };
116 {
127 };
130 {
136 };
139 {
146 };
149 {
156 };
159 {
170 };
173 {
180 };
183 {
190 };
193 {
204 };
207 {
218 };
221 {
227 };
229 /**
230 * @}
231 */
234 /* Private constants ---------------------------------------------------------*/
235 /** @defgroup HRTIM_LL_Private_Constants HRTIM Private Constants
236 * @{
237 */
238 #define HRTIM_CR1_UDIS_MASK ((uint32_t)(HRTIM_CR1_MUDIS |\
239 HRTIM_CR1_TAUDIS |\
240 HRTIM_CR1_TBUDIS |\
241 HRTIM_CR1_TCUDIS |\
242 HRTIM_CR1_TDUDIS |\
243 HRTIM_CR1_TEUDIS))
245 #define HRTIM_CR2_SWUPD_MASK ((uint32_t)(HRTIM_CR2_MSWU |\
246 HRTIM_CR2_TASWU |\
247 HRTIM_CR2_TBSWU |\
248 HRTIM_CR2_TCSWU |\
249 HRTIM_CR2_TDSWU |\
250 HRTIM_CR2_TESWU))
252 #define HRTIM_CR2_SWRST_MASK ((uint32_t)(HRTIM_CR2_MRST |\
253 HRTIM_CR2_TARST |\
254 HRTIM_CR2_TBRST |\
255 HRTIM_CR2_TCRST |\
256 HRTIM_CR2_TDRST |\
257 HRTIM_CR2_TERST))
259 #define HRTIM_OENR_OEN_MASK ((uint32_t)(HRTIM_OENR_TA1OEN |\
260 HRTIM_OENR_TA2OEN |\
261 HRTIM_OENR_TB1OEN |\
262 HRTIM_OENR_TB2OEN |\
263 HRTIM_OENR_TC1OEN |\
264 HRTIM_OENR_TC2OEN |\
265 HRTIM_OENR_TD1OEN |\
266 HRTIM_OENR_TD2OEN |\
267 HRTIM_OENR_TE1OEN |\
268 HRTIM_OENR_TE2OEN))
270 #define HRTIM_OENR_ODIS_MASK ((uint32_t)(HRTIM_ODISR_TA1ODIS |\
271 HRTIM_ODISR_TA2ODIS |\
272 HRTIM_ODISR_TB1ODIS |\
273 HRTIM_ODISR_TB2ODIS |\
274 HRTIM_ODISR_TC1ODIS |\
275 HRTIM_ODISR_TC2ODIS |\
276 HRTIM_ODISR_TD1ODIS |\
277 HRTIM_ODISR_TD2ODIS |\
278 HRTIM_ODISR_TE1ODIS |\
279 HRTIM_ODISR_TE2ODIS))
281 #define HRTIM_OUT_CONFIG_MASK ((uint32_t)(HRTIM_OUTR_POL1 |\
282 HRTIM_OUTR_IDLM1 |\
283 HRTIM_OUTR_IDLES1 |\
284 HRTIM_OUTR_FAULT1 |\
285 HRTIM_OUTR_CHP1 |\
286 HRTIM_OUTR_DIDL1))
288 #define HRTIM_EE_CONFIG_MASK ((uint32_t)(HRTIM_EECR1_EE1SRC |\
289 HRTIM_EECR1_EE1POL |\
290 HRTIM_EECR1_EE1SNS |\
291 HRTIM_EECR1_EE1FAST))
293 #define HRTIM_FLT_CONFIG_MASK ((uint32_t)(HRTIM_FLTINR1_FLT1P |\
294 HRTIM_FLTINR1_FLT1SRC))
296 #define HRTIM_BM_CONFIG_MASK ((uint32_t)( HRTIM_BMCR_BMPRSC |\
297 HRTIM_BMCR_BMCLK |\
298 HRTIM_BMCR_BMOM))
300 /**
301 * @}
302 */
305 /* Private macros ------------------------------------------------------------*/
306 /* Exported types ------------------------------------------------------------*/
307 #if defined(USE_FULL_LL_DRIVER)
308 /** @defgroup HRTIM_LL_ES_INIT HRTIM Exported Init structure
309 * @{
310 */
311 /* TO BE COMPLETED */
312 /**
313 * @}
314 */
317 /* Exported constants --------------------------------------------------------*/
318 /** @defgroup HRTIM_LL_Exported_Constants HRTIM Exported Constants
319 * @{
320 */
322 /** @defgroup HRTIM_EC_GET_FLAG Get Flags Defines
323 * @brief Flags defines which can be used with LL_HRTIM_ReadReg function
324 * @{
325 */
326 #define LL_HRTIM_ISR_FLT1 HRTIM_ISR_FLT1
327 #define LL_HRTIM_ISR_FLT2 HRTIM_ISR_FLT2
328 #define LL_HRTIM_ISR_FLT3 HRTIM_ISR_FLT3
329 #define LL_HRTIM_ISR_FLT4 HRTIM_ISR_FLT4
330 #define LL_HRTIM_ISR_FLT5 HRTIM_ISR_FLT5
331 #define LL_HRTIM_ISR_SYSFLT HRTIM_ISR_SYSFLT
332 #define LL_HRTIM_ISR_DLLRDY HRTIM_ISR_DLLRDY
333 #define LL_HRTIM_ISR_BMPER HRTIM_ISR_BMPER
335 #define LL_HRTIM_MISR_MCMP1 HRTIM_MISR_MCMP1
336 #define LL_HRTIM_MISR_MCMP2 HRTIM_MISR_MCMP2
337 #define LL_HRTIM_MISR_MCMP3 HRTIM_MISR_MCMP3
338 #define LL_HRTIM_MISR_MCMP4 HRTIM_MISR_MCMP4
339 #define LL_HRTIM_MISR_MREP HRTIM_MISR_MREP
340 #define LL_HRTIM_MISR_SYNC HRTIM_MISR_SYNC
341 #define LL_HRTIM_MISR_MUPD HRTIM_MISR_MUPD
343 #define LL_HRTIM_TIMISR_CMP1 HRTIM_TIMISR_CMP1
344 #define LL_HRTIM_TIMISR_CMP2 HRTIM_TIMISR_CMP2
345 #define LL_HRTIM_TIMISR_CMP3 HRTIM_TIMISR_CMP3
346 #define LL_HRTIM_TIMISR_CMP4 HRTIM_TIMISR_CMP4
347 #define LL_HRTIM_TIMISR_REP HRTIM_TIMISR_REP
348 #define LL_HRTIM_TIMISR_UPD HRTIM_TIMISR_UPD
349 #define LL_HRTIM_TIMISR_CPT1 HRTIM_TIMISR_CPT1
350 #define LL_HRTIM_TIMISR_CPT2 HRTIM_TIMISR_CPT2
351 #define LL_HRTIM_TIMISR_SET1 HRTIM_TIMISR_SET1
352 #define LL_HRTIM_TIMISR_RST1 HRTIM_TIMISR_RST1
353 #define LL_HRTIM_TIMISR_SET2 HRTIM_TIMISR_SET2
354 #define LL_HRTIM_TIMISR_RST2 HRTIM_TIMISR_RST2
355 #define LL_HRTIM_TIMISR_RST HRTIM_TIMISR_RST
356 #define LL_HRTIM_TIMISR_DLYPRT HRTIM_TIMISR_DLYPRT
357 /**
358 * @}
359 */
361 /** @defgroup HRTIM_EC_IT IT Defines
362 * @brief IT defines which can be used with LL_HRTIM_ReadReg and LL_HRTIM_WriteReg functions
363 * @{
364 */
365 #define LL_HRTIM_IER_FLT1IE HRTIM_IER_FLT1IE
366 #define LL_HRTIM_IER_FLT2IE HRTIM_IER_FLT2IE
367 #define LL_HRTIM_IER_FLT3IE HRTIM_IER_FLT3IE
368 #define LL_HRTIM_IER_FLT4IE HRTIM_IER_FLT4IE
369 #define LL_HRTIM_IER_FLT5IE HRTIM_IER_FLT5IE
370 #define LL_HRTIM_IER_SYSFLTIE HRTIM_IER_SYSFLTIE
371 #define LL_HRTIM_IER_DLLRDYIE HRTIM_IER_DLLRDYIE
372 #define LL_HRTIM_IER_BMPERIE HRTIM_IER_BMPERIE
374 #define LL_HRTIM_MDIER_MCMP1IE HRTIM_MDIER_MCMP1IE
375 #define LL_HRTIM_MDIER_MCMP2IE HRTIM_MDIER_MCMP2IE
376 #define LL_HRTIM_MDIER_MCMP3IE HRTIM_MDIER_MCMP3IE
377 #define LL_HRTIM_MDIER_MCMP4IE HRTIM_MDIER_MCMP4IE
378 #define LL_HRTIM_MDIER_MREPIE HRTIM_MDIER_MREPIE
379 #define LL_HRTIM_MDIER_SYNCIE HRTIM_MDIER_SYNCIE
380 #define LL_HRTIM_MDIER_MUPDIE HRTIM_MDIER_MUPDIE
383 #define LL_HRTIM_TIMDIER_CMP1IE HRTIM_TIMDIER_CMP1IE
384 #define LL_HRTIM_TIMDIER_CMP2IE HRTIM_TIMDIER_CMP2IE
385 #define LL_HRTIM_TIMDIER_CMP3IE HRTIM_TIMDIER_CMP3IE
386 #define LL_HRTIM_TIMDIER_CMP4IE HRTIM_TIMDIER_CMP4IE
387 #define LL_HRTIM_TIMDIER_REPIE HRTIM_TIMDIER_REPIE
388 #define LL_HRTIM_TIMDIER_UPDIE HRTIM_TIMDIER_UPDIE
389 #define LL_HRTIM_TIMDIER_CPT1IE HRTIM_TIMDIER_CPT1IE
390 #define LL_HRTIM_TIMDIER_CPT2IE HRTIM_TIMDIER_CPT2IE
391 #define LL_HRTIM_TIMDIER_SET1IE HRTIM_TIMDIER_SET1IE
392 #define LL_HRTIM_TIMDIER_RST1IE HRTIM_TIMDIER_RST1IE
393 #define LL_HRTIM_TIMDIER_SET2IE HRTIM_TIMDIER_SET2IE
394 #define LL_HRTIM_TIMDIER_RST2IE HRTIM_TIMDIER_RST2IE
395 #define LL_HRTIM_TIMDIER_RSTIE HRTIM_TIMDIER_RSTIE
396 #define LL_HRTIM_TIMDIER_DLYPRTIE HRTIM_TIMDIER_DLYPRTIE
397 /**
398 * @}
399 */
401 /** @defgroup HRTIM_EC_SYNCIN_SRC SYNCHRONIZATION INPUT SOURCE
402 * @{
403 * @brief Constants defining defining the synchronization input source.
404 */
405 #define LL_HRTIM_SYNCIN_SRC_NONE ((uint32_t)0x00000000U) /*!< HRTIM is not synchronized and runs in standalone mode */
406 #define LL_HRTIM_SYNCIN_SRC_TIM_EVENT (HRTIM_MCR_SYNC_IN_1) /*!< The HRTIM is synchronized with the on-chip timer */
407 #define LL_HRTIM_SYNCIN_SRC_EXTERNAL_EVENT (HRTIM_MCR_SYNC_IN_1 | HRTIM_MCR_SYNC_IN_0) /*!< A positive pulse on SYNCIN input triggers the HRTIM */
408 /**
409 * @}
410 */
412 /** @defgroup HRTIM_EC_SYNCOUT_SRC SYNCHRONIZATION OUTPUT SOURCE
413 * @{
414 * @brief Constants defining the source and event to be sent on the synchronization output.
415 */
416 #define LL_HRTIM_SYNCOUT_SRC_MASTER_START ((uint32_t)0x00000000U) /*!< A pulse is sent on the SYNCOUT output upon master timer start event */
417 #define LL_HRTIM_SYNCOUT_SRC_MASTER_CMP1 (HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on the SYNCOUT output upon master timer compare 1 event*/
418 #define LL_HRTIM_SYNCOUT_SRC_TIMA_START (HRTIM_MCR_SYNC_SRC_1) /*!< A pulse is sent on the SYNCOUT output upon timer A start or reset events */
419 #define LL_HRTIM_SYNCOUT_SRC_TIMA_CMP1 (HRTIM_MCR_SYNC_SRC_1 | HRTIM_MCR_SYNC_SRC_0) /*!< A pulse is sent on the SYNCOUT output upon timer A compare 1 event */
420 /**
421 * @}
422 */
424 /** @defgroup HRTIM_EC_SYNCOUT_POLARITY SYNCHRONIZATION OUTPUT POLARITY
425 * @{
426 * @brief Constants defining the routing and conditioning of the synchronization output event.
427 */
428 #define LL_HRTIM_SYNCOUT_DISABLED ((uint32_t)0x00000000U) /*!< Synchronization output event is disabled */
429 #define LL_HRTIM_SYNCOUT_POSITIVE_PULSE (HRTIM_MCR_SYNC_OUT_1) /*!< SCOUT pin has a low idle level and issues a positive pulse of 16 fHRTIM clock cycles length for the synchronization */
430 #define LL_HRTIM_SYNCOUT_NEGATIVE_PULSE (HRTIM_MCR_SYNC_OUT_1 | HRTIM_MCR_SYNC_OUT_0) /*!< SCOUT pin has a high idle level and issues a negative pulse of 16 fHRTIM clock cycles length for the synchronization */
431 /**
432 * @}
433 */
435 /** @defgroup HRTIM_EC_TIMER TIMER ID
436 * @{
437 * @brief Constants identifying a timing unit.
438 */
445 /**
446 * @}
447 */
449 /** @defgroup HRTIM_EC_OUTPUT OUTPUT ID
450 * @{
451 * @brief Constants identifying an HRTIM output.
452 */
463 /**
464 * @}
465 */
467 /** @defgroup HRTIM_EC_COMPAREUNIT COMPARE UNIT ID
468 * @{
469 * @brief Constants identifying a compare unit.
470 */
473 /**
474 * @}
475 */
477 /** @defgroup HRTIM_EC_CAPTUREUNIT CAPTURE UNIT ID
478 * @{
479 * @brief Constants identifying a capture unit.
480 */
483 /**
484 * @}
485 */
487 /** @defgroup HRTIM_EC_FAULT FAULT ID
488 * @{
489 * @brief Constants identifying a fault channel.
490 */
496 /**
497 * @}
498 */
500 /** @defgroup HRTIM_EC_EVENT EXTERNAL EVENT ID
501 * @{
502 * @brief Constants identifying an external event channel.
503 */
514 /**
515 * @}
516 */
518 /** @defgroup HRTIM_EC_OUTPUTSTATE OUTPUT STATE
519 * @{
520 * @brief Constants defining the state of an HRTIM output.
521 */
522 #define LL_HRTIM_OUTPUTSTATE_IDLE ((uint32_t)0x00000001U) /*!< Main operating mode, where the output can take the active or inactive level as programmed in the crossbar unit */
523 #define LL_HRTIM_OUTPUTSTATE_RUN ((uint32_t)0x00000002U) /*!< Default operating state (e.g. after an HRTIM reset, when the outputs are disabled by software or during a burst mode operation) */
524 #define LL_HRTIM_OUTPUTSTATE_FAULT ((uint32_t)0x00000003U) /*!< Safety state, entered in case of a shut-down request on FAULTx inputs */
525 /**
526 * @}
527 */
529 /** @defgroup HRTIM_EC_ADCTRIG ADC TRIGGER
530 * @{
531 * @brief Constants identifying an ADC trigger.
532 */
537 /**
538 * @}
539 */
541 /** @defgroup HRTIM_EC_ADCTRIG_UPDATE ADC TRIGGER UPDATE
542 * @{
543 * @brief constants defining the source triggering the update of the HRTIM_ADCxR register (transfer from preload to active register).
544 */
545 #define LL_HRTIM_ADCTRIG_UPDATE_MASTER ((uint32_t)0x00000000U) /*!< HRTIM_ADCxR register update is triggered by the Master timer */
546 #define LL_HRTIM_ADCTRIG_UPDATE_TIMER_A (HRTIM_CR1_ADC1USRC_0) /*!< HRTIM_ADCxR register update is triggered by the Timer A */
547 #define LL_HRTIM_ADCTRIG_UPDATE_TIMER_B (HRTIM_CR1_ADC1USRC_1) /*!< HRTIM_ADCxR register update is triggered by the Timer B */
548 #define LL_HRTIM_ADCTRIG_UPDATE_TIMER_C (HRTIM_CR1_ADC1USRC_1 | HRTIM_CR1_ADC1USRC_0) /*!< HRTIM_ADCxR register update is triggered by the Timer C */
549 #define LL_HRTIM_ADCTRIG_UPDATE_TIMER_D (HRTIM_CR1_ADC1USRC_2) /*!< HRTIM_ADCxR register update is triggered by the Timer D */
550 #define LL_HRTIM_ADCTRIG_UPDATE_TIMER_E (HRTIM_CR1_ADC1USRC_2 | HRTIM_CR1_ADC1USRC_0) /*!< HRTIM_ADCxR register update is triggered by the Timer E */
551 /**
552 * @}
553 */
555 /** @defgroup HRTIM_EC_ADCTRIG_SRC13 ADC TRIGGER 1/3 SOURCE
556 * @{
557 * @brief constants defining the events triggering ADC conversion for ADC Triggers 1 and 3.
558 */
570 #define LL_HRTIM_ADCTRIG_SRC13_TIMACMP2 HRTIM_ADC1R_AD1TAC2 /*!< ADC Trigger on Timer A compare 2 */
571 #define LL_HRTIM_ADCTRIG_SRC13_TIMACMP3 HRTIM_ADC1R_AD1TAC3 /*!< ADC Trigger on Timer A compare 3 */
572 #define LL_HRTIM_ADCTRIG_SRC13_TIMACMP4 HRTIM_ADC1R_AD1TAC4 /*!< ADC Trigger on Timer A compare 4 */
573 #define LL_HRTIM_ADCTRIG_SRC13_TIMAPER HRTIM_ADC1R_AD1TAPER /*!< ADC Trigger on Timer A period */
574 #define LL_HRTIM_ADCTRIG_SRC13_TIMARST HRTIM_ADC1R_AD1TARST /*!< ADC Trigger on Timer A reset */
575 #define LL_HRTIM_ADCTRIG_SRC13_TIMBCMP2 HRTIM_ADC1R_AD1TBC2 /*!< ADC Trigger on Timer B compare 2 */
576 #define LL_HRTIM_ADCTRIG_SRC13_TIMBCMP3 HRTIM_ADC1R_AD1TBC3 /*!< ADC Trigger on Timer B compare 3 */
577 #define LL_HRTIM_ADCTRIG_SRC13_TIMBCMP4 HRTIM_ADC1R_AD1TBC4 /*!< ADC Trigger on Timer B compare 4 */
578 #define LL_HRTIM_ADCTRIG_SRC13_TIMBPER HRTIM_ADC1R_AD1TBPER /*!< ADC Trigger on Timer B period */
579 #define LL_HRTIM_ADCTRIG_SRC13_TIMBRST HRTIM_ADC1R_AD1TBRST /*!< ADC Trigger on Timer B reset */
580 #define LL_HRTIM_ADCTRIG_SRC13_TIMCCMP2 HRTIM_ADC1R_AD1TCC2 /*!< ADC Trigger on Timer C compare 2 */
581 #define LL_HRTIM_ADCTRIG_SRC13_TIMCCMP3 HRTIM_ADC1R_AD1TCC3 /*!< ADC Trigger on Timer C compare 3 */
582 #define LL_HRTIM_ADCTRIG_SRC13_TIMCCMP4 HRTIM_ADC1R_AD1TCC4 /*!< ADC Trigger on Timer C compare 4 */
583 #define LL_HRTIM_ADCTRIG_SRC13_TIMCPER HRTIM_ADC1R_AD1TCPER /*!< ADC Trigger on Timer C period */
584 #define LL_HRTIM_ADCTRIG_SRC13_TIMDCMP2 HRTIM_ADC1R_AD1TDC2 /*!< ADC Trigger on Timer D compare 2 */
585 #define LL_HRTIM_ADCTRIG_SRC13_TIMDCMP3 HRTIM_ADC1R_AD1TDC3 /*!< ADC Trigger on Timer D compare 3 */
586 #define LL_HRTIM_ADCTRIG_SRC13_TIMDCMP4 HRTIM_ADC1R_AD1TDC4 /*!< ADC Trigger on Timer D compare 4 */
587 #define LL_HRTIM_ADCTRIG_SRC13_TIMDPER HRTIM_ADC1R_AD1TDPER /*!< ADC Trigger on Timer D period */
588 #define LL_HRTIM_ADCTRIG_SRC13_TIMECMP2 HRTIM_ADC1R_AD1TEC2 /*!< ADC Trigger on Timer E compare 2 */
589 #define LL_HRTIM_ADCTRIG_SRC13_TIMECMP3 HRTIM_ADC1R_AD1TEC3 /*!< ADC Trigger on Timer E compare 3 */
590 #define LL_HRTIM_ADCTRIG_SRC13_TIMECMP4 HRTIM_ADC1R_AD1TEC4 /*!< ADC Trigger on Timer E compare 4 */
591 #define LL_HRTIM_ADCTRIG_SRC13_TIMEPER HRTIM_ADC1R_AD1TEPER /*!< ADC Trigger on Timer E period */
592 /**
593 * @}
594 */
596 /** @defgroup HRTIM_EC_ADCTRIG_SRC24 ADC TRIGGER 2/4 SOURCE
597 * @{
598 * @brief constants defining the events triggering ADC conversion for ADC Triggers 2 and 4.
599 */
610 #define LL_HRTIM_ADCTRIG_SRC24_EEV10 HRTIM_ADC2R_AD2EEV10 /*!< ADC Trigger on external event 10 */
611 #define LL_HRTIM_ADCTRIG_SRC24_TIMACMP2 HRTIM_ADC2R_AD2TAC2 /*!< ADC Trigger on Timer A compare 2 */
612 #define LL_HRTIM_ADCTRIG_SRC24_TIMACMP3 HRTIM_ADC2R_AD2TAC3 /*!< ADC Trigger on Timer A compare 3 */
613 #define LL_HRTIM_ADCTRIG_SRC24_TIMACMP4 HRTIM_ADC2R_AD2TAC4 /*!< ADC Trigger on Timer A compare 4 */
614 #define LL_HRTIM_ADCTRIG_SRC24_TIMAPER HRTIM_ADC2R_AD2TAPER /*!< ADC Trigger on Timer A period */
615 #define LL_HRTIM_ADCTRIG_SRC24_TIMBCMP2 HRTIM_ADC2R_AD2TBC2 /*!< ADC Trigger on Timer B compare 2 */
616 #define LL_HRTIM_ADCTRIG_SRC24_TIMBCMP3 HRTIM_ADC2R_AD2TBC3 /*!< ADC Trigger on Timer B compare 3 */
617 #define LL_HRTIM_ADCTRIG_SRC24_TIMBCMP4 HRTIM_ADC2R_AD2TBC4 /*!< ADC Trigger on Timer B compare 4 */
618 #define LL_HRTIM_ADCTRIG_SRC24_TIMBPER HRTIM_ADC2R_AD2TBPER /*!< ADC Trigger on Timer B period */
619 #define LL_HRTIM_ADCTRIG_SRC24_TIMCCMP2 HRTIM_ADC2R_AD2TCC2 /*!< ADC Trigger on Timer C compare 2 */
620 #define LL_HRTIM_ADCTRIG_SRC24_TIMCCMP3 HRTIM_ADC2R_AD2TCC3 /*!< ADC Trigger on Timer C compare 3 */
621 #define LL_HRTIM_ADCTRIG_SRC24_TIMCCMP4 HRTIM_ADC2R_AD2TCC4 /*!< ADC Trigger on Timer C compare 4 */
622 #define LL_HRTIM_ADCTRIG_SRC24_TIMCPER HRTIM_ADC2R_AD2TCPER /*!< ADC Trigger on Timer C period */
623 #define LL_HRTIM_ADCTRIG_SRC24_TIMCRST HRTIM_ADC2R_AD2TCRST /*!< ADC Trigger on Timer C reset */
624 #define LL_HRTIM_ADCTRIG_SRC24_TIMDCMP2 HRTIM_ADC2R_AD2TDC2 /*!< ADC Trigger on Timer D compare 2 */
625 #define LL_HRTIM_ADCTRIG_SRC24_TIMDCMP3 HRTIM_ADC2R_AD2TDC3 /*!< ADC Trigger on Timer D compare 3 */
626 #define LL_HRTIM_ADCTRIG_SRC24_TIMDCMP4 HRTIM_ADC2R_AD2TDC4 /*!< ADC Trigger on Timer D compare 4 */
627 #define LL_HRTIM_ADCTRIG_SRC24_TIMDPER HRTIM_ADC2R_AD2TDPER /*!< ADC Trigger on Timer D period */
628 #define LL_HRTIM_ADCTRIG_SRC24_TIMDRST HRTIM_ADC2R_AD2TDRST /*!< ADC Trigger on Timer D reset */
629 #define LL_HRTIM_ADCTRIG_SRC24_TIMECMP2 HRTIM_ADC2R_AD2TEC2 /*!< ADC Trigger on Timer E compare 2 */
630 #define LL_HRTIM_ADCTRIG_SRC24_TIMECMP3 HRTIM_ADC2R_AD2TEC3 /*!< ADC Trigger on Timer E compare 3 */
631 #define LL_HRTIM_ADCTRIG_SRC24_TIMECMP4 HRTIM_ADC2R_AD2TEC4 /*!< ADC Trigger on Timer E compare 4 */
632 #define LL_HRTIM_ADCTRIG_SRC24_TIMERST HRTIM_ADC2R_AD2TERST /*!< ADC Trigger on Timer E reset */
633 /**
634 * @}
635 */
637 /** @defgroup HRTIM_EC_DLLCALIBRATION_MODE DLL CALIBRATION MODE
638 * @{
639 * @brief Constants defining the DLL calibration mode.
640 */
641 #define LL_HRTIM_DLLCALIBRATION_MODE_SINGLESHOT ((uint32_t)0x00000000U)/*!<Calibration is perfomed only once */
642 #define LL_HRTIM_DLLCALIBRATION_MODE_CONTINUOUS HRTIM_DLLCR_CALEN /*!<Calibration is performed periodically */
643 /**
644 * @}
645 */
647 /** @defgroup HRTIM_EC_CALIBRATIONRATE DLL CALIBRATION RATE
648 * @{
649 * @brief Constants defining the DLL calibration periods (in micro seconds).
650 */
651 #define LL_HRTIM_DLLCALIBRATION_RATE_7300 ((uint32_t)0x00000000U) /*!< Periodic DLL calibration: T = 1048576 * tHRTIM (7.3 ms) */
652 #define LL_HRTIM_DLLCALIBRATION_RATE_910 (HRTIM_DLLCR_CALRTE_0) /*!< Periodic DLL calibration: T = 131072 * tHRTIM (910 ms) */
653 #define LL_HRTIM_DLLCALIBRATION_RATE_114 (HRTIM_DLLCR_CALRTE_1) /*!< Periodic DLL calibration: T = 16384 * tHRTIM (114 ms) */
654 #define LL_HRTIM_DLLCALIBRATION_RATE_14 (HRTIM_DLLCR_CALRTE_1 | HRTIM_DLLCR_CALRTE_0) /*!< Periodic DLL calibration: T = 2048 * tHRTIM (14 ms) */
655 /**
656 * @}
657 */
659 /** @defgroup HRTIM_EC_PRESCALERRATIO PRESCALER RATIO
660 * @{
661 * @brief Constants defining timer high-resolution clock prescaler ratio.
662 */
663 #define LL_HRTIM_PRESCALERRATIO_MUL32 ((uint32_t)0x00000000U) /*!< fHRCK: fHRTIM x 32 = 4.608 GHz - Resolution: 217 ps - Min PWM frequency: 70.3 kHz (fHRTIM=144MHz) */
664 #define LL_HRTIM_PRESCALERRATIO_MUL16 ((uint32_t)0x00000001U) /*!< fHRCK: fHRTIM x 16 = 2.304 GHz - Resolution: 434 ps - Min PWM frequency: 35.1 KHz (fHRTIM=144MHz) */
665 #define LL_HRTIM_PRESCALERRATIO_MUL8 ((uint32_t)0x00000002U) /*!< fHRCK: fHRTIM x 8 = 1.152 GHz - Resolution: 868 ps - Min PWM frequency: 17.6 kHz (fHRTIM=144MHz) */
666 #define LL_HRTIM_PRESCALERRATIO_MUL4 ((uint32_t)0x00000003U) /*!< fHRCK: fHRTIM x 4 = 576 MHz - Resolution: 1.73 ns - Min PWM frequency: 8.8 kHz (fHRTIM=144MHz) */
667 #define LL_HRTIM_PRESCALERRATIO_MUL2 ((uint32_t)0x00000004U) /*!< fHRCK: fHRTIM x 2 = 288 MHz - Resolution: 3.47 ns - Min PWM frequency: 4.4 kHz (fHRTIM=144MHz) */
668 #define LL_HRTIM_PRESCALERRATIO_DIV1 ((uint32_t)0x00000005U) /*!< fHRCK: fHRTIM = 144 MHz - Resolution: 6.95 ns - Min PWM frequency: 2.2 kHz (fHRTIM=144MHz) */
669 #define LL_HRTIM_PRESCALERRATIO_DIV2 ((uint32_t)0x00000006U) /*!< fHRCK: fHRTIM / 2 = 72 MHz - Resolution: 13.88 ns- Min PWM frequency: 1.1 kHz (fHRTIM=144MHz) */
670 #define LL_HRTIM_PRESCALERRATIO_DIV4 ((uint32_t)0x00000007U) /*!< fHRCK: fHRTIM / 4 = 36 MHz - Resolution: 27.7 ns- Min PWM frequency: 550Hz (fHRTIM=144MHz) */
671 /**
672 * @}
673 */
675 /** @defgroup HRTIM_EC_MODE COUNTER MODE
676 * @{
677 * @brief Constants defining timer counter operating mode.
678 */
679 #define LL_HRTIM_MODE_CONTINUOUS ((uint32_t)0x00000008U) /*!< The timer operates in continuous (free-running) mode */
680 #define LL_HRTIM_MODE_SINGLESHOT ((uint32_t)0x00000000U) /*!< The timer operates in non retriggerable single-shot mode */
681 #define LL_HRTIM_MODE_RETRIGGERABLE ((uint32_t)0x00000010U) /*!< The timer operates in retriggerable single-shot mode */
682 /**
683 * @}
684 */
686 /** @defgroup HRTIM_EC_DACTRIG DAC TRIGGER
687 * @{
688 * @brief Constants defining on which output the DAC synchronization event is sent.
689 */
690 #define LL_HRTIM_DACTRIG_NONE ((uint32_t)0x00000000U) /*!< No DAC synchronization event generated */
691 #define LL_HRTIM_DACTRIG_DACTRIGOUT_1 (HRTIM_MCR_DACSYNC_0) /*!< DAC synchronization event generated on DACTrigOut1 output upon timer update */
692 #define LL_HRTIM_DACTRIG_DACTRIGOUT_2 (HRTIM_MCR_DACSYNC_1) /*!< DAC synchronization event generated on DACTrigOut2 output upon timer update */
693 #define LL_HRTIM_DACTRIG_DACTRIGOUT_3 (HRTIM_MCR_DACSYNC_1 | HRTIM_MCR_DACSYNC_0) /*!< DAC synchronization event generated on DACTrigOut3 output upon timer update */
694 /**
695 * @}
696 */
698 /** @defgroup HRTIM_EC_UPDATETRIG UPDATE TRIGGER
699 * @{
700 * @brief Constants defining whether the registers update is done synchronously with any other timer or master update.
701 */
703 #define LL_HRTIM_UPDATETRIG_MASTER HRTIM_TIMCR_MSTU /*!< Register update is triggered by the master timer update */
704 #define LL_HRTIM_UPDATETRIG_TIMER_A HRTIM_TIMCR_TAU /*!< Register update is triggered by the timer A update */
705 #define LL_HRTIM_UPDATETRIG_TIMER_B HRTIM_TIMCR_TBU /*!< Register update is triggered by the timer B update */
706 #define LL_HRTIM_UPDATETRIG_TIMER_C HRTIM_TIMCR_TCU /*!< Register update is triggered by the timer C update*/
707 #define LL_HRTIM_UPDATETRIG_TIMER_D HRTIM_TIMCR_TDU /*!< Register update is triggered by the timer D update */
708 #define LL_HRTIM_UPDATETRIG_TIMER_E HRTIM_TIMCR_TEU /*!< Register update is triggered by the timer E update */
709 #define LL_HRTIM_UPDATETRIG_REPETITION HRTIM_TIMCR_TREPU /*!< Register update is triggered when the counter rolls over and HRTIM_REPx = 0*/
710 #define LL_HRTIM_UPDATETRIG_RESET HRTIM_TIMCR_TRSTU /*!< Register update is triggered by counter reset or roll-over to 0 after reaching the period value in continuous mode */
711 /**
712 * @}
713 */
715 /** @defgroup HRTIM_EC_UPDATEGATING UPDATE GATING
716 * @{
717 * @brief Constants defining how the update occurs relatively to the burst DMA transaction and the external update request on update enable inputs 1 to 3.
718 */
719 #define LL_HRTIM_UPDATEGATING_INDEPENDENT ((uint32_t)0x00000000U) /*!< Update done independently from the DMA burst transfer completion */
720 #define LL_HRTIM_UPDATEGATING_DMABURST (HRTIM_TIMCR_UPDGAT_0) /*!< Update done when the DMA burst transfer is completed */
721 #define LL_HRTIM_UPDATEGATING_DMABURST_UPDATE (HRTIM_TIMCR_UPDGAT_1) /*!< Update done on timer roll-over following a DMA burst transfer completion*/
722 #define LL_HRTIM_UPDATEGATING_UPDEN1 (HRTIM_TIMCR_UPDGAT_1 | HRTIM_TIMCR_UPDGAT_0) /*!< Slave timer only - Update done on a rising edge of HRTIM update enable input 1 */
723 #define LL_HRTIM_UPDATEGATING_UPDEN2 (HRTIM_TIMCR_UPDGAT_2) /*!< Slave timer only - Update done on a rising edge of HRTIM update enable input 2 */
724 #define LL_HRTIM_UPDATEGATING_UPDEN3 (HRTIM_TIMCR_UPDGAT_2 | HRTIM_TIMCR_UPDGAT_0) /*!< Slave timer only - Update done on a rising edge of HRTIM update enable input 3 */
725 #define LL_HRTIM_UPDATEGATING_UPDEN1_UPDATE (HRTIM_TIMCR_UPDGAT_2 | HRTIM_TIMCR_UPDGAT_1) /*!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 1 */
726 #define LL_HRTIM_UPDATEGATING_UPDEN2_UPDATE (HRTIM_TIMCR_UPDGAT_2 | HRTIM_TIMCR_UPDGAT_1 | HRTIM_TIMCR_UPDGAT_0) /*!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 2 */
727 #define LL_HRTIM_UPDATEGATING_UPDEN3_UPDATE (HRTIM_TIMCR_UPDGAT_3) /*!< Slave timer only - Update done on the update event following a rising edge of HRTIM update enable input 3 */
728 /**
729 * @}
730 */
732 /** @defgroup HRTIM_EC_COMPAREMODE COMPARE MODE
733 * @{
734 * @brief Constants defining whether the compare register is behaving in regular mode (compare match issued as soon as counter equal compare) or in auto-delayed mode.
735 */
737 #define LL_HRTIM_COMPAREMODE_DELAY_NOTIMEOUT (HRTIM_TIMCR_DELCMP2_0) /*!< Compare event generated only if a capture has occurred */
738 #define LL_HRTIM_COMPAREMODE_DELAY_CMP1 (HRTIM_TIMCR_DELCMP2_1) /*!< Compare event generated if a capture has occurred or after a Compare 1 match (timeout if capture event is missing) */
739 #define LL_HRTIM_COMPAREMODE_DELAY_CMP3 (HRTIM_TIMCR_DELCMP2_1 | HRTIM_TIMCR_DELCMP2_0) /*!< Compare event generated if a capture has occurred or after a Compare 3 match (timeout if capture event is missing) */
740 /**
741 * @}
742 */
744 /** @defgroup HRTIM_EC_RESETTRIG RESET TRIGGER
745 * @{
746 * @brief Constants defining the events that can be selected to trigger the reset of the timer counter.
747 */
749 #define LL_HRTIM_RESETTRIG_UPDATE HRTIM_RSTR_UPDATE /*!< The timer counter is reset upon update event */
750 #define LL_HRTIM_RESETTRIG_CMP2 HRTIM_RSTR_CMP2 /*!< The timer counter is reset upon Timer Compare 2 event */
751 #define LL_HRTIM_RESETTRIG_CMP4 HRTIM_RSTR_CMP4 /*!< The timer counter is reset upon Timer Compare 4 event */
752 #define LL_HRTIM_RESETTRIG_MASTER_PER HRTIM_RSTR_MSTPER /*!< The timer counter is reset upon master timer period event */
753 #define LL_HRTIM_RESETTRIG_MASTER_CMP1 HRTIM_RSTR_MSTCMP1 /*!< The timer counter is reset upon master timer Compare 1 event */
754 #define LL_HRTIM_RESETTRIG_MASTER_CMP2 HRTIM_RSTR_MSTCMP2 /*!< The timer counter is reset upon master timer Compare 2 event */
755 #define LL_HRTIM_RESETTRIG_MASTER_CMP3 HRTIM_RSTR_MSTCMP3 /*!< The timer counter is reset upon master timer Compare 3 event */
756 #define LL_HRTIM_RESETTRIG_MASTER_CMP4 HRTIM_RSTR_MSTCMP4 /*!< The timer counter is reset upon master timer Compare 4 event */
757 #define LL_HRTIM_RESETTRIG_EEV_1 HRTIM_RSTR_EXTEVNT1 /*!< The timer counter is reset upon external event 1 */
758 #define LL_HRTIM_RESETTRIG_EEV_2 HRTIM_RSTR_EXTEVNT2 /*!< The timer counter is reset upon external event 2 */
759 #define LL_HRTIM_RESETTRIG_EEV_3 HRTIM_RSTR_EXTEVNT3 /*!< The timer counter is reset upon external event 3 */
760 #define LL_HRTIM_RESETTRIG_EEV_4 HRTIM_RSTR_EXTEVNT4 /*!< The timer counter is reset upon external event 4 */
761 #define LL_HRTIM_RESETTRIG_EEV_5 HRTIM_RSTR_EXTEVNT5 /*!< The timer counter is reset upon external event 5 */
762 #define LL_HRTIM_RESETTRIG_EEV_6 HRTIM_RSTR_EXTEVNT6 /*!< The timer counter is reset upon external event 6 */
763 #define LL_HRTIM_RESETTRIG_EEV_7 HRTIM_RSTR_EXTEVNT7 /*!< The timer counter is reset upon external event 7 */
764 #define LL_HRTIM_RESETTRIG_EEV_8 HRTIM_RSTR_EXTEVNT8 /*!< The timer counter is reset upon external event 8 */
765 #define LL_HRTIM_RESETTRIG_EEV_9 HRTIM_RSTR_EXTEVNT9 /*!< The timer counter is reset upon external event 9 */
766 #define LL_HRTIM_RESETTRIG_EEV_10 HRTIM_RSTR_EXTEVNT10 /*!< The timer counter is reset upon external event 10 */
767 #define LL_HRTIM_RESETTRIG_OTHER1_CMP1 HRTIM_RSTR_TIMBCMP1 /*!< The timer counter is reset upon other timer Compare 1 event */
768 #define LL_HRTIM_RESETTRIG_OTHER1_CMP2 HRTIM_RSTR_TIMBCMP2 /*!< The timer counter is reset upon other timer Compare 2 event */
769 #define LL_HRTIM_RESETTRIG_OTHER1_CMP4 HRTIM_RSTR_TIMBCMP4 /*!< The timer counter is reset upon other timer Compare 4 event */
770 #define LL_HRTIM_RESETTRIG_OTHER2_CMP1 HRTIM_RSTR_TIMCCMP1 /*!< The timer counter is reset upon other timer Compare 1 event */
771 #define LL_HRTIM_RESETTRIG_OTHER2_CMP2 HRTIM_RSTR_TIMCCMP2 /*!< The timer counter is reset upon other timer Compare 2 event */
772 #define LL_HRTIM_RESETTRIG_OTHER2_CMP4 HRTIM_RSTR_TIMCCMP4 /*!< The timer counter is reset upon other timer Compare 4 event */
773 #define LL_HRTIM_RESETTRIG_OTHER3_CMP1 HRTIM_RSTR_TIMDCMP1 /*!< The timer counter is reset upon other timer Compare 1 event */
774 #define LL_HRTIM_RESETTRIG_OTHER3_CMP2 HRTIM_RSTR_TIMDCMP2 /*!< The timer counter is reset upon other timer Compare 2 event */
775 #define LL_HRTIM_RESETTRIG_OTHER3_CMP4 HRTIM_RSTR_TIMDCMP4 /*!< The timer counter is reset upon other timer Compare 4 event */
776 #define LL_HRTIM_RESETTRIG_OTHER4_CMP1 HRTIM_RSTR_TIMECMP1 /*!< The timer counter is reset upon other timer Compare 1 event */
777 #define LL_HRTIM_RESETTRIG_OTHER4_CMP2 HRTIM_RSTR_TIMECMP2 /*!< The timer counter is reset upon other timer Compare 2 event */
778 #define LL_HRTIM_RESETTRIG_OTHER4_CMP4 HRTIM_RSTR_TIMECMP4 /*!< The timer counter is reset upon other timer Compare 4 event */
779 /**
780 * @}
781 */
783 /** @defgroup HRTIM_EC_CAPTURETRIG CAPTURE TRIGGER
784 * @{
785 * @brief Constants defining the events that can be selected to trigger the capture of the timing unit counter.
786 */
788 #define LL_HRTIM_CAPTURETRIG_UPDATE HRTIM_CPT1CR_UPDCPT /*!< The update event triggers the Capture */
789 #define LL_HRTIM_CAPTURETRIG_EEV_1 HRTIM_CPT1CR_EXEV1CPT /*!< The External event 1 triggers the Capture */
790 #define LL_HRTIM_CAPTURETRIG_EEV_2 HRTIM_CPT1CR_EXEV2CPT /*!< The External event 2 triggers the Capture */
791 #define LL_HRTIM_CAPTURETRIG_EEV_3 HRTIM_CPT1CR_EXEV3CPT /*!< The External event 3 triggers the Capture */
792 #define LL_HRTIM_CAPTURETRIG_EEV_4 HRTIM_CPT1CR_EXEV4CPT /*!< The External event 4 triggers the Capture */
793 #define LL_HRTIM_CAPTURETRIG_EEV_5 HRTIM_CPT1CR_EXEV5CPT /*!< The External event 5 triggers the Capture */
794 #define LL_HRTIM_CAPTURETRIG_EEV_6 HRTIM_CPT1CR_EXEV6CPT /*!< The External event 6 triggers the Capture */
795 #define LL_HRTIM_CAPTURETRIG_EEV_7 HRTIM_CPT1CR_EXEV7CPT /*!< The External event 7 triggers the Capture */
796 #define LL_HRTIM_CAPTURETRIG_EEV_8 HRTIM_CPT1CR_EXEV8CPT /*!< The External event 8 triggers the Capture */
797 #define LL_HRTIM_CAPTURETRIG_EEV_9 HRTIM_CPT1CR_EXEV9CPT /*!< The External event 9 triggers the Capture */
798 #define LL_HRTIM_CAPTURETRIG_EEV_10 HRTIM_CPT1CR_EXEV10CPT /*!< The External event 10 triggers the Capture */
799 #define LL_HRTIM_CAPTURETRIG_TA1_SET HRTIM_CPT1CR_TA1SET /*!< Capture is triggered by TA1 output inactive to active transition */
800 #define LL_HRTIM_CAPTURETRIG_TA1_RESET HRTIM_CPT1CR_TA1RST /*!< Capture is triggered by TA1 output active to inactive transition */
801 #define LL_HRTIM_CAPTURETRIG_TIMA_CMP1 HRTIM_CPT1CR_TIMACMP1 /*!< Timer A Compare 1 triggers Capture */
802 #define LL_HRTIM_CAPTURETRIG_TIMA_CMP2 HRTIM_CPT1CR_TIMACMP2 /*!< Timer A Compare 2 triggers Capture */
803 #define LL_HRTIM_CAPTURETRIG_TB1_SET HRTIM_CPT1CR_TB1SET /*!< Capture is triggered by TB1 output inactive to active transition */
804 #define LL_HRTIM_CAPTURETRIG_TB1_RESET HRTIM_CPT1CR_TB1RST /*!< Capture is triggered by TB1 output active to inactive transition */
805 #define LL_HRTIM_CAPTURETRIG_TIMB_CMP1 HRTIM_CPT1CR_TIMBCMP1 /*!< Timer B Compare 1 triggers Capture */
806 #define LL_HRTIM_CAPTURETRIG_TIMB_CMP2 HRTIM_CPT1CR_TIMBCMP2 /*!< Timer B Compare 2 triggers Capture */
807 #define LL_HRTIM_CAPTURETRIG_TC1_SET HRTIM_CPT1CR_TC1SET /*!< Capture is triggered by TC1 output inactive to active transition */
808 #define LL_HRTIM_CAPTURETRIG_TC1_RESET HRTIM_CPT1CR_TC1RST /*!< Capture is triggered by TC1 output active to inactive transition */
809 #define LL_HRTIM_CAPTURETRIG_TIMC_CMP1 HRTIM_CPT1CR_TIMCCMP1 /*!< Timer C Compare 1 triggers Capture */
810 #define LL_HRTIM_CAPTURETRIG_TIMC_CMP2 HRTIM_CPT1CR_TIMCCMP2 /*!< Timer C Compare 2 triggers Capture */
811 #define LL_HRTIM_CAPTURETRIG_TD1_SET HRTIM_CPT1CR_TD1SET /*!< Capture is triggered by TD1 output inactive to active transition */
812 #define LL_HRTIM_CAPTURETRIG_TD1_RESET HRTIM_CPT1CR_TD1RST /*!< Capture is triggered by TD1 output active to inactive transition */
813 #define LL_HRTIM_CAPTURETRIG_TIMD_CMP1 HRTIM_CPT1CR_TIMDCMP1 /*!< Timer D Compare 1 triggers Capture */
814 #define LL_HRTIM_CAPTURETRIG_TIMD_CMP2 HRTIM_CPT1CR_TIMDCMP2 /*!< Timer D Compare 2 triggers Capture */
815 #define LL_HRTIM_CAPTURETRIG_TE1_SET HRTIM_CPT1CR_TE1SET /*!< Capture is triggered by TE1 output inactive to active transition */
816 #define LL_HRTIM_CAPTURETRIG_TE1_RESET HRTIM_CPT1CR_TE1RST /*!< Capture is triggered by TE1 output active to inactive transition */
817 #define LL_HRTIM_CAPTURETRIG_TIME_CMP1 HRTIM_CPT1CR_TIMECMP1 /*!< Timer E Compare 1 triggers Capture */
818 #define LL_HRTIM_CAPTURETRIG_TIME_CMP2 HRTIM_CPT1CR_TIMECMP2 /*!< Timer E Compare 2 triggers Capture */
819 /**
820 * @}
821 */
823 /** @defgroup HRTIM_EC_DLYPRT DELAYED PROTECTION (DLYPRT) MODE
824 * @{
825 * @brief Constants defining all possible delayed protection modes for a timer (also define the source and outputs on which the delayed protection schemes are applied).
826 */
827 #define LL_HRTIM_DLYPRT_DELAYOUT1_EEV6 ((uint32_t)0x00000000U) /*!< Timers A, B, C: Output 1 delayed Idle on external Event 6 */
828 #define LL_HRTIM_DLYPRT_DELAYOUT2_EEV6 (HRTIM_OUTR_DLYPRT_0) /*!< Timers A, B, C: Output 2 delayed Idle on external Event 6 */
829 #define LL_HRTIM_DLYPRT_DELAYBOTH_EEV6 (HRTIM_OUTR_DLYPRT_1) /*!< Timers A, B, C: Output 1 and output 2 delayed Idle on external Event 6 */
830 #define LL_HRTIM_DLYPRT_BALANCED_EEV6 (HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0) /*!< Timers A, B, C: Balanced Idle on external Event 6 */
831 #define LL_HRTIM_DLYPRT_DELAYOUT1_EEV7 (HRTIM_OUTR_DLYPRT_2) /*!< Timers A, B, C: Output 1 delayed Idle on external Event 7 */
832 #define LL_HRTIM_DLYPRT_DELAYOUT2_EEV7 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_0) /*!< Timers A, B, C: Output 2 delayed Idle on external Event 7 */
833 #define LL_HRTIM_DLYPRT_DELAYBOTH_EEV7 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1) /*!< Timers A, B, C: Output 1 and output2 delayed Idle on external Event 7 */
834 #define LL_HRTIM_DLYPRT_BALANCED_EEV7 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0) /*!< Timers A, B, C: Balanced Idle on external Event 7 */
836 #define LL_HRTIM_DLYPRT_DELAYOUT1_EEV8 ((uint32_t)0x00000000U) /*!< Timers D, E: Output 1 delayed Idle on external Event 8 */
837 #define LL_HRTIM_DLYPRT_DELAYOUT2_EEV8 (HRTIM_OUTR_DLYPRT_0) /*!< Timers D, E: Output 2 delayed Idle on external Event 8 */
838 #define LL_HRTIM_DLYPRT_DELAYBOTH_EEV8 (HRTIM_OUTR_DLYPRT_1) /*!< Timers D, E: Output 1 and output 2 delayed Idle on external Event 8 */
839 #define LL_HRTIM_DLYPRT_BALANCED_EEV8 (HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0) /*!< Timers D, E: Balanced Idle on external Event 8 */
840 #define LL_HRTIM_DLYPRT_DELAYOUT1_EEV9 (HRTIM_OUTR_DLYPRT_2) /*!< Timers D, E: Output 1 delayed Idle on external Event 9 */
841 #define LL_HRTIM_DLYPRT_DELAYOUT2_EEV9 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_0) /*!< Timers D, E: Output 2 delayed Idle on external Event 9 */
842 #define LL_HRTIM_DLYPRT_DELAYBOTH_EEV9 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1) /*!< Timers D, E: Output 1 and output2 delayed Idle on external Event 9 */
843 #define LL_HRTIM_DLYPRT_BALANCED_EEV9 (HRTIM_OUTR_DLYPRT_2 | HRTIM_OUTR_DLYPRT_1 | HRTIM_OUTR_DLYPRT_0) /*!< Timers D, E: Balanced Idle on external Event 9 */
844 /**
845 * @}
846 */
848 /** @defgroup HRTIM_EC_BURSTMODE BURST MODE
849 * @{
850 * @brief Constants defining how the timer behaves during a burst mode operation.
851 */
852 #define LL_HRTIM_BURSTMODE_MAINTAINCLOCK (uint32_t)0x000000 /*!< Timer counter clock is maintained and the timer operates normally */
853 #define LL_HRTIM_BURSTMODE_RESETCOUNTER (HRTIM_BMCR_MTBM) /*!< Timer counter clock is stopped and the counter is reset */
854 /**
855 * @}
856 */
858 /** @defgroup HRTIM_EC_BURSTDMA BURST DMA
859 * @{
860 * @brief Constants defining the registers that can be written during a burst DMA operation.
861 */
862 #define LL_HRTIM_BURSTDMA_NONE ((uint32_t)0x00000000U) /*!< No register is updated by Burst DMA accesses */
864 #define LL_HRTIM_BURSTDMA_MCR (HRTIM_BDMUPR_MCR) /*!< MCR register is updated by Burst DMA accesses */
865 #define LL_HRTIM_BURSTDMA_MICR (HRTIM_BDMUPR_MICR) /*!< MICR register is updated by Burst DMA accesses */
866 #define LL_HRTIM_BURSTDMA_MDIER (HRTIM_BDMUPR_MDIER) /*!< MDIER register is updated by Burst DMA accesses */
867 #define LL_HRTIM_BURSTDMA_MCNT (HRTIM_BDMUPR_MCNT) /*!< MCNTR register is updated by Burst DMA accesses */
868 #define LL_HRTIM_BURSTDMA_MPER (HRTIM_BDMUPR_MPER) /*!< MPER register is updated by Burst DMA accesses */
869 #define LL_HRTIM_BURSTDMA_MREP (HRTIM_BDMUPR_MREP) /*!< MREPR register is updated by Burst DMA accesses */
870 #define LL_HRTIM_BURSTDMA_MCMP1 (HRTIM_BDMUPR_MCMP1) /*!< MCMP1R register is updated by Burst DMA accesses */
871 #define LL_HRTIM_BURSTDMA_MCMP2 (HRTIM_BDMUPR_MCMP2) /*!< MCMP2R register is updated by Burst DMA accesses */
872 #define LL_HRTIM_BURSTDMA_MCMP3 (HRTIM_BDMUPR_MCMP3) /*!< MCMP3R register is updated by Burst DMA accesses */
873 #define LL_HRTIM_BURSTDMA_MCMP4 (HRTIM_BDMUPR_MCMP4) /*!< MCMP4R register is updated by Burst DMA accesses */
875 #define LL_HRTIM_BURSTDMA_TIMMCR (HRTIM_BDTUPR_TIMCR) /*!< TIMxCR register is updated by Burst DMA accesses */
876 #define LL_HRTIM_BURSTDMA_TIMICR (HRTIM_BDTUPR_TIMICR) /*!< TIMxICR register is updated by Burst DMA accesses */
877 #define LL_HRTIM_BURSTDMA_TIMDIER (HRTIM_BDTUPR_TIMDIER) /*!< TIMxDIER register is updated by Burst DMA accesses */
878 #define LL_HRTIM_BURSTDMA_TIMCNT (HRTIM_BDTUPR_TIMCNT) /*!< CNTxCR register is updated by Burst DMA accesses */
879 #define LL_HRTIM_BURSTDMA_TIMPER (HRTIM_BDTUPR_TIMPER) /*!< PERxR register is updated by Burst DMA accesses */
880 #define LL_HRTIM_BURSTDMA_TIMREP (HRTIM_BDTUPR_TIMREP) /*!< REPxR register is updated by Burst DMA accesses */
881 #define LL_HRTIM_BURSTDMA_TIMCMP1 (HRTIM_BDTUPR_TIMCMP1) /*!< CMP1xR register is updated by Burst DMA accesses */
882 #define LL_HRTIM_BURSTDMA_TIMCMP2 (HRTIM_BDTUPR_TIMCMP2) /*!< CMP2xR register is updated by Burst DMA accesses */
883 #define LL_HRTIM_BURSTDMA_TIMCMP3 (HRTIM_BDTUPR_TIMCMP3) /*!< CMP3xR register is updated by Burst DMA accesses */
884 #define LL_HRTIM_BURSTDMA_TIMCMP4 (HRTIM_BDTUPR_TIMCMP4) /*!< CMP4xR register is updated by Burst DMA accesses */
885 #define LL_HRTIM_BURSTDMA_TIMDTR (HRTIM_BDTUPR_TIMDTR) /*!< DTxR register is updated by Burst DMA accesses */
886 #define LL_HRTIM_BURSTDMA_TIMSET1R (HRTIM_BDTUPR_TIMSET1R) /*!< SET1R register is updated by Burst DMA accesses */
887 #define LL_HRTIM_BURSTDMA_TIMRST1R (HRTIM_BDTUPR_TIMRST1R) /*!< RST1R register is updated by Burst DMA accesses */
888 #define LL_HRTIM_BURSTDMA_TIMSET2R (HRTIM_BDTUPR_TIMSET2R) /*!< SET2R register is updated by Burst DMA accesses */
889 #define LL_HRTIM_BURSTDMA_TIMRST2R (HRTIM_BDTUPR_TIMRST2R) /*!< RST1R register is updated by Burst DMA accesses */
890 #define LL_HRTIM_BURSTDMA_TIMEEFR1 (HRTIM_BDTUPR_TIMEEFR1) /*!< EEFxR1 register is updated by Burst DMA accesses */
891 #define LL_HRTIM_BURSTDMA_TIMEEFR2 (HRTIM_BDTUPR_TIMEEFR2) /*!< EEFxR2 register is updated by Burst DMA accesses */
892 #define LL_HRTIM_BURSTDMA_TIMRSTR (HRTIM_BDTUPR_TIMRSTR) /*!< RSTxR register is updated by Burst DMA accesses */
893 #define LL_HRTIM_BURSTDMA_TIMCHPR (HRTIM_BDTUPR_TIMCHPR) /*!< CHPxR register is updated by Burst DMA accesses */
894 #define LL_HRTIM_BURSTDMA_TIMOUTR (HRTIM_BDTUPR_TIMOUTR) /*!< OUTxR register is updated by Burst DMA accesses */
895 #define LL_HRTIM_BURSTDMA_TIMFLTR (HRTIM_BDTUPR_TIMFLTR) /*!< FLTxR register is updated by Burst DMA accesses */
896 /**
897 * @}
898 */
900 /** @defgroup HRTIM_EC_CPPSTAT CURRENT PUSH-PULL STATUS
901 * @{
902 * @brief Constants defining on which output the signal is currently applied in push-pull mode.
903 */
904 #define LL_HRTIM_CPPSTAT_OUTPUT1 ((uint32_t) 0x00000000U) /*!< Signal applied on output 1 and output 2 forced inactive */
905 #define LL_HRTIM_CPPSTAT_OUTPUT2 (HRTIM_TIMISR_CPPSTAT) /*!< Signal applied on output 2 and output 1 forced inactive */
906 /**
907 * @}
908 */
910 /** @defgroup HRTIM_EC_IPPSTAT IDLE PUSH-PULL STATUS
911 * @{
912 * @brief Constants defining on which output the signal was applied, in push-pull mode balanced fault mode or delayed idle mode, when the protection was triggered.
913 */
914 #define LL_HRTIM_IPPSTAT_OUTPUT1 ((uint32_t) 0x00000000U) /*!< Protection occurred when the output 1 was active and output 2 forced inactive */
915 #define LL_HRTIM_IPPSTAT_OUTPUT2 (HRTIM_TIMISR_IPPSTAT) /*!< Protection occurred when the output 2 was active and output 1 forced inactive */
916 /**
917 * @}
918 */
920 /** @defgroup HRTIM_EC_TIM_EEFLTR TIMER EXTERNAL EVENT FILTER
921 * @{
922 * @brief Constants defining the event filtering applied to external events by a timer.
923 */
924 #define LL_HRTIM_EEFLTR_NONE ((uint32_t)0x00000000U)
925 #define LL_HRTIM_EEFLTR_BLANKINGCMP1 (HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from counter reset/roll-over to Compare 1 */
926 #define LL_HRTIM_EEFLTR_BLANKINGCMP2 (HRTIM_EEFR1_EE1FLTR_1) /*!< Blanking from counter reset/roll-over to Compare 2 */
927 #define LL_HRTIM_EEFLTR_BLANKINGCMP3 (HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from counter reset/roll-over to Compare 3 */
928 #define LL_HRTIM_EEFLTR_BLANKINGCMP4 (HRTIM_EEFR1_EE1FLTR_2) /*!< Blanking from counter reset/roll-over to Compare 4 */
929 #define LL_HRTIM_EEFLTR_BLANKINGFLTR1 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from another timing unit: TIMFLTR1 source */
930 #define LL_HRTIM_EEFLTR_BLANKINGFLTR2 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) /*!< Blanking from another timing unit: TIMFLTR2 source */
931 #define LL_HRTIM_EEFLTR_BLANKINGFLTR3 (HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from another timing unit: TIMFLTR3 source */
932 #define LL_HRTIM_EEFLTR_BLANKINGFLTR4 (HRTIM_EEFR1_EE1FLTR_3) /*!< Blanking from another timing unit: TIMFLTR4 source */
933 #define LL_HRTIM_EEFLTR_BLANKINGFLTR5 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from another timing unit: TIMFLTR5 source */
934 #define LL_HRTIM_EEFLTR_BLANKINGFLTR6 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1) /*!< Blanking from another timing unit: TIMFLTR6 source */
935 #define LL_HRTIM_EEFLTR_BLANKINGFLTR7 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_0) /*!< Blanking from another timing unit: TIMFLTR7 source */
936 #define LL_HRTIM_EEFLTR_BLANKINGFLTR8 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2) /*!< Blanking from another timing unit: TIMFLTR8 source */
937 #define LL_HRTIM_EEFLTR_WINDOWINGCMP2 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) /*!< Windowing from counter reset/roll-over to Compare 2 */
938 #define LL_HRTIM_EEFLTR_WINDOWINGCMP3 (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1) /*!< Windowing from counter reset/roll-over to Compare 3 */
939 #define LL_HRTIM_EEFLTR_WINDOWINGTIM (HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_1 | HRTIM_EEFR1_EE1FLTR_3 | HRTIM_EEFR1_EE1FLTR_2 | HRTIM_EEFR1_EE1FLTR_0) /*!< Windowing from another timing unit: TIMWIN source */
940 /**
941 * @}
942 */
944 /** @defgroup HRTIM_EC_TIM_LATCHSTATUS TIMER EXTERNAL EVENT LATCH STATUS
945 * @{
946 * @brief Constants defining whether or not the external event is memorized (latched) and generated as soon as the blanking period is completed or the window ends.
947 */
948 #define LL_HRTIM_EELATCH_DISABLED ((uint32_t)0x00000000U) /*!< Event is ignored if it happens during a blank, or passed through during a window */
949 #define LL_HRTIM_EELATCH_ENABLED HRTIM_EEFR1_EE1LTCH /*!< Event is latched and delayed till the end of the blanking or windowing period */
950 /**
951 * @}
952 */
954 /** @defgroup HRTIM_EC_DT_PRESCALER DEADTIME PRESCALER
955 * @{
956 * @brief Constants defining division ratio between the timer clock frequency (fHRTIM) and the deadtime generator clock (fDTG).
957 */
961 #define LL_HRTIM_DT_PRESCALER_DIV1 (HRTIM_DTR_DTPRSC_1 | HRTIM_DTR_DTPRSC_0) /*!< fDTG = fHRTIM */
963 #define LL_HRTIM_DT_PRESCALER_DIV4 (HRTIM_DTR_DTPRSC_2 | HRTIM_DTR_DTPRSC_0) /*!< fDTG = fHRTIM / 4 */
964 #define LL_HRTIM_DT_PRESCALER_DIV8 (HRTIM_DTR_DTPRSC_2 | HRTIM_DTR_DTPRSC_1) /*!< fDTG = fHRTIM / 8 */
965 #define LL_HRTIM_DT_PRESCALER_DIV16 (HRTIM_DTR_DTPRSC_2 | HRTIM_DTR_DTPRSC_1 | HRTIM_DTR_DTPRSC_0) /*!< fDTG = fHRTIM / 16 */
966 /**
967 * @}
968 */
970 /** @defgroup HRTIM_EC_DT_RISING_SIGN DEADTIME RISING SIGN
971 * @{
972 * @brief Constants defining whether the deadtime is positive or negative (overlapping signal) on rising edge.
973 */
974 #define LL_HRTIM_DT_RISING_POSITIVE ((uint32_t)0x00000000U) /*!< Positive deadtime on rising edge */
976 /**
977 * @}
978 */
980 /** @defgroup HRTIM_EC_DT_FALLING_SIGN DEADTIME FALLING SIGN
981 * @{
982 * @brief Constants defining whether the deadtime is positive or negative (overlapping signal) on falling edge.
983 */
984 #define LL_HRTIM_DT_FALLING_POSITIVE ((uint32_t)0x00000000U) /*!< Positive deadtime on falling edge */
986 /**
987 * @}
988 */
990 /** @defgroup HRTIM_EC_CHP_PRESCALER CHOPPER MODE PRESCALER
991 * @{
992 * @brief Constants defining the frequency of the generated high frequency carrier (fCHPFRQ).
993 */
997 #define LL_HRTIM_CHP_PRESCALER_DIV64 (HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 64 */
999 #define LL_HRTIM_CHP_PRESCALER_DIV96 (HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 96 */
1000 #define LL_HRTIM_CHP_PRESCALER_DIV112 (HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1) /*!< fCHPFRQ = fHRTIM / 112 */
1001 #define LL_HRTIM_CHP_PRESCALER_DIV128 (HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 128 */
1003 #define LL_HRTIM_CHP_PRESCALER_DIV160 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 160 */
1004 #define LL_HRTIM_CHP_PRESCALER_DIV176 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_1) /*!< fCHPFRQ = fHRTIM / 176 */
1005 #define LL_HRTIM_CHP_PRESCALER_DIV192 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 192 */
1006 #define LL_HRTIM_CHP_PRESCALER_DIV208 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2) /*!< fCHPFRQ = fHRTIM / 208 */
1007 #define LL_HRTIM_CHP_PRESCALER_DIV224 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 224 */
1008 #define LL_HRTIM_CHP_PRESCALER_DIV240 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1) /*!< fCHPFRQ = fHRTIM / 240 */
1009 #define LL_HRTIM_CHP_PRESCALER_DIV256 (HRTIM_CHPR_CARFRQ_3 | HRTIM_CHPR_CARFRQ_2 | HRTIM_CHPR_CARFRQ_1 | HRTIM_CHPR_CARFRQ_0) /*!< fCHPFRQ = fHRTIM / 256 */
1010 /**
1011 * @}
1012 */
1014 /** @defgroup HRTIM_EC_CHP_DUTYCYCLE CHOPPER MODE DUTY CYCLE
1015 * @{
1016 * @brief Constants defining the duty cycle of the generated high frequency carrier. Duty cycle can be adjusted by 1/8 step (from 0/8 up to 7/8).
1017 */
1019 #define LL_HRTIM_CHP_DUTYCYCLE_125 (HRTIM_CHPR_CARDTY_0) /*!< Duty cycle of the carrier signal is 12.5 % */
1020 #define LL_HRTIM_CHP_DUTYCYCLE_250 (HRTIM_CHPR_CARDTY_1) /*!< Duty cycle of the carrier signal is 25 % */
1021 #define LL_HRTIM_CHP_DUTYCYCLE_375 (HRTIM_CHPR_CARDTY_1 | HRTIM_CHPR_CARDTY_0) /*!< Duty cycle of the carrier signal is 37.5 % */
1022 #define LL_HRTIM_CHP_DUTYCYCLE_500 (HRTIM_CHPR_CARDTY_2) /*!< Duty cycle of the carrier signal is 50 % */
1023 #define LL_HRTIM_CHP_DUTYCYCLE_625 (HRTIM_CHPR_CARDTY_2 | HRTIM_CHPR_CARDTY_0) /*!< Duty cycle of the carrier signal is 62.5 % */
1024 #define LL_HRTIM_CHP_DUTYCYCLE_750 (HRTIM_CHPR_CARDTY_2 | HRTIM_CHPR_CARDTY_1) /*!< Duty cycle of the carrier signal is 75 % */
1025 #define LL_HRTIM_CHP_DUTYCYCLE_875 (HRTIM_CHPR_CARDTY_2 | HRTIM_CHPR_CARDTY_1 | HRTIM_CHPR_CARDTY_0) /*!< Duty cycle of the carrier signal is 87.5 % */
1026 /**
1027 * @}
1028 */
1030 /** @defgroup HRTIM_EC_CHP_PULSEWIDTH CHOPPER MODE PULSE WIDTH
1031 * @{
1032 * @brief Constants defining the pulse width of the first pulse of the generated high frequency carrier.
1033 */
1037 #define LL_HRTIM_CHP_PULSEWIDTH_64 (HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 64 */
1039 #define LL_HRTIM_CHP_PULSEWIDTH_96 (HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 96 */
1040 #define LL_HRTIM_CHP_PULSEWIDTH_112 (HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1) /*!< tSTPW = tHRTIM x 112 */
1041 #define LL_HRTIM_CHP_PULSEWIDTH_128 (HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 128 */
1043 #define LL_HRTIM_CHP_PULSEWIDTH_160 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 160 */
1044 #define LL_HRTIM_CHP_PULSEWIDTH_176 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_1) /*!< tSTPW = tHRTIM x 176 */
1045 #define LL_HRTIM_CHP_PULSEWIDTH_192 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 192 */
1046 #define LL_HRTIM_CHP_PULSEWIDTH_208 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2) /*!< tSTPW = tHRTIM x 208 */
1047 #define LL_HRTIM_CHP_PULSEWIDTH_224 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 224 */
1048 #define LL_HRTIM_CHP_PULSEWIDTH_240 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1) /*!< tSTPW = tHRTIM x 240 */
1049 #define LL_HRTIM_CHP_PULSEWIDTH_256 (HRTIM_CHPR_STRPW_3 | HRTIM_CHPR_STRPW_2 | HRTIM_CHPR_STRPW_1 | HRTIM_CHPR_STRPW_0) /*!< tSTPW = tHRTIM x 256 */
1050 /**
1051 * @}
1052 */
1054 /** @defgroup HRTIM_EC_CROSSBAR_INPUT CROSSBAR INPUT
1055 * @{
1056 * @brief Constants defining the events that can be selected to configure the set/reset crossbar of a timer output.
1057 */
1059 #define LL_HRTIM_CROSSBAR_RESYNC (HRTIM_SET1R_RESYNC) /*!< Timer reset event coming solely from software or SYNC input forces an output level transision */
1060 #define LL_HRTIM_CROSSBAR_TIMPER (HRTIM_SET1R_PER) /*!< Timer period event forces an output level transision */
1061 #define LL_HRTIM_CROSSBAR_TIMCMP1 (HRTIM_SET1R_CMP1) /*!< Timer compare 1 event forces an output level transision */
1062 #define LL_HRTIM_CROSSBAR_TIMCMP2 (HRTIM_SET1R_CMP2) /*!< Timer compare 2 event forces an output level transision */
1063 #define LL_HRTIM_CROSSBAR_TIMCMP3 (HRTIM_SET1R_CMP3) /*!< Timer compare 3 event forces an output level transision */
1064 #define LL_HRTIM_CROSSBAR_TIMCMP4 (HRTIM_SET1R_CMP4) /*!< Timer compare 4 event forces an output level transision */
1065 #define LL_HRTIM_CROSSBAR_MASTERPER (HRTIM_SET1R_MSTPER) /*!< The master timer period event forces an output level transision */
1066 #define LL_HRTIM_CROSSBAR_MASTERCMP1 (HRTIM_SET1R_MSTCMP1) /*!< Master Timer compare 1 event forces an output level transision */
1067 #define LL_HRTIM_CROSSBAR_MASTERCMP2 (HRTIM_SET1R_MSTCMP2) /*!< Master Timer compare 2 event forces an output level transision */
1068 #define LL_HRTIM_CROSSBAR_MASTERCMP3 (HRTIM_SET1R_MSTCMP3) /*!< Master Timer compare 3 event forces an output level transision */
1069 #define LL_HRTIM_CROSSBAR_MASTERCMP4 (HRTIM_SET1R_MSTCMP4) /*!< Master Timer compare 4 event forces an output level transision */
1070 #define LL_HRTIM_CROSSBAR_TIMEV_1 (HRTIM_SET1R_TIMEVNT1) /*!< Timer event 1 forces an output level transision */
1071 #define LL_HRTIM_CROSSBAR_TIMEV_2 (HRTIM_SET1R_TIMEVNT2) /*!< Timer event 2 forces an output level transision */
1072 #define LL_HRTIM_CROSSBAR_TIMEV_3 (HRTIM_SET1R_TIMEVNT3) /*!< Timer event 3 forces an output level transision */
1073 #define LL_HRTIM_CROSSBAR_TIMEV_4 (HRTIM_SET1R_TIMEVNT4) /*!< Timer event 4 forces an output level transision */
1074 #define LL_HRTIM_CROSSBAR_TIMEV_5 (HRTIM_SET1R_TIMEVNT5) /*!< Timer event 5 forces an output level transision */
1075 #define LL_HRTIM_CROSSBAR_TIMEV_6 (HRTIM_SET1R_TIMEVNT6) /*!< Timer event 6 forces an output level transision */
1076 #define LL_HRTIM_CROSSBAR_TIMEV_7 (HRTIM_SET1R_TIMEVNT7) /*!< Timer event 7 forces an output level transision */
1077 #define LL_HRTIM_CROSSBAR_TIMEV_8 (HRTIM_SET1R_TIMEVNT8) /*!< Timer event 8 forces an output level transision */
1078 #define LL_HRTIM_CROSSBAR_TIMEV_9 (HRTIM_SET1R_TIMEVNT9) /*!< Timer event 9 forces an output level transision */
1079 #define LL_HRTIM_CROSSBAR_EEV_1 (HRTIM_SET1R_EXTVNT1) /*!< External event 1 forces an output level transision */
1080 #define LL_HRTIM_CROSSBAR_EEV_2 (HRTIM_SET1R_EXTVNT2) /*!< External event 2 forces an output level transision */
1081 #define LL_HRTIM_CROSSBAR_EEV_3 (HRTIM_SET1R_EXTVNT3) /*!< External event 3 forces an output level transision */
1082 #define LL_HRTIM_CROSSBAR_EEV_4 (HRTIM_SET1R_EXTVNT4) /*!< External event 4 forces an output level transision */
1083 #define LL_HRTIM_CROSSBAR_EEV_5 (HRTIM_SET1R_EXTVNT5) /*!< External event 5 forces an output level transision */
1084 #define LL_HRTIM_CROSSBAR_EEV_6 (HRTIM_SET1R_EXTVNT6) /*!< External event 6 forces an output level transision */
1085 #define LL_HRTIM_CROSSBAR_EEV_7 (HRTIM_SET1R_EXTVNT7) /*!< External event 7 forces an output level transision */
1086 #define LL_HRTIM_CROSSBAR_EEV_8 (HRTIM_SET1R_EXTVNT8) /*!< External event 8 forces an output level transision */
1087 #define LL_HRTIM_CROSSBAR_EEV_9 (HRTIM_SET1R_EXTVNT9) /*!< External event 9 forces an output level transision */
1088 #define LL_HRTIM_CROSSBAR_EEV_10 (HRTIM_SET1R_EXTVNT10) /*!< External event 10 forces an output level transision */
1089 #define LL_HRTIM_CROSSBAR_UPDATE (HRTIM_SET1R_UPDATE) /*!< Timer register update event forces an output level transision */
1090 /**
1091 * @}
1092 */
1094 /** @defgroup HRTIM_EC_OUT_POLARITY OUPUT_POLARITY
1095 * @{
1096 * @brief Constants defining the polarity of a timer output.
1097 */
1100 /**
1101 * @}
1102 */
1104 /** @defgroup HRTIM_EC_OUT_IDLEMODE OUTPUT IDLE MODE
1105 * @{
1106 * @brief Constants defining whether or not the timer output transition to its IDLE state when burst mode is entered.
1107 */
1108 #define LL_HRTIM_OUT_NO_IDLE ((uint32_t)0x00000000U)/*!< The output is not affected by the burst mode operation */
1109 #define LL_HRTIM_OUT_IDLE_WHEN_BURST (HRTIM_OUTR_IDLM1) /*!< The output is in idle state when requested by the burst mode controller */
1110 /**
1111 * @}
1112 */
1114 /** @defgroup HRTIM_EC_OUT_IDLELEVEL OUTPUT IDLE LEVEL
1115 * @{
1116 * @brief Constants defining the output level when output is in IDLE state
1117 */
1118 #define LL_HRTIM_OUT_IDLELEVEL_INACTIVE ((uint32_t)0x00000000U)/*!< Output at inactive level when in IDLE state */
1119 #define LL_HRTIM_OUT_IDLELEVEL_ACTIVE (HRTIM_OUTR_IDLES1) /*!< Output at active level when in IDLE state */
1120 /**
1121 * @}
1122 */
1124 /** @defgroup HRTIM_EC_OUT_FAULTSTATE OUTPUT FAULT STATE
1125 * @{
1126 * @brief Constants defining the output level when output is in FAULT state.
1127 */
1128 #define LL_HRTIM_OUT_FAULTSTATE_NO_ACTION ((uint32_t)0x00000000U) /*!< The output is not affected by the fault input */
1129 #define LL_HRTIM_OUT_FAULTSTATE_ACTIVE (HRTIM_OUTR_FAULT1_0) /*!< Output at active level when in FAULT state */
1130 #define LL_HRTIM_OUT_FAULTSTATE_INACTIVE (HRTIM_OUTR_FAULT1_1) /*!< Output at inactive level when in FAULT state */
1131 #define LL_HRTIM_OUT_FAULTSTATE_HIGHZ (HRTIM_OUTR_FAULT1_1 | HRTIM_OUTR_FAULT1_0) /*!< Output is tri-stated when in FAULT state */
1132 /**
1133 * @}
1134 */
1136 /** @defgroup HRTIM_EC_OUT_CHOPPERMODE OUTPUT CHOPPER MODE
1137 * @{
1138 * @brief Constants defining whether or not chopper mode is enabled for a timer output.
1139 */
1140 #define LL_HRTIM_OUT_CHOPPERMODE_DISABLED ((uint32_t)0x00000000U) /*!< Output signal is not altered */
1141 #define LL_HRTIM_OUT_CHOPPERMODE_ENABLED (HRTIM_OUTR_CHP1) /*!< Output signal is chopped by a carrier signal */
1142 /**
1143 * @}
1144 */
1146 /** @defgroup HRTIM_EC_OUT_BM_ENTRYMODE OUTPUT BURST MODE ENTRY MODE
1147 * @{
1148 * @brief Constants defining the idle state entry mode during a burst mode operation. It is possible to delay the burst mode entry and force the output to an inactive state
1149 during a programmable period before the output takes its idle state.
1150 */
1151 #define LL_HRTIM_OUT_BM_ENTRYMODE_REGULAR ((uint32_t)0x00000000U)/*!< The programmed Idle state is applied immediately to the Output */
1152 #define LL_HRTIM_OUT_BM_ENTRYMODE_DELAYED (HRTIM_OUTR_DIDL1) /*!< Deadtime is inserted on output before entering the idle mode */
1153 /**
1154 * @}
1155 */
1156 /** @defgroup HRTIM_EC_OUT_LEVEL OUTPUT LEVEL
1157 * @{
1158 * @brief Constants defining the level of a timer output.
1159 */
1160 #define LL_HRTIM_OUT_LEVEL_INACTIVE ((uint32_t)0x00000000U)/*!< Corresponds to a logic level 0 for a positive polarity (High) and to a logic level 1 for a negative polarity (Low) */
1161 #define LL_HRTIM_OUT_LEVEL_ACTIVE ((uint32_t)0x00000001) /*!< Corresponds to a logic level 1 for a positive polarity (High) and to a logic level 0 for a negative polarity (Low) */
1162 /**
1163 * @}
1164 */
1166 /** @defgroup HRTIM_EC_EE_SRC EXTERNAL EVENT SOURCE
1167 * @{
1168 * @brief Constants defining available sources associated to external events.
1169 */
1173 #define LL_HRTIM_EE_SRC_4 (HRTIM_EECR1_EE1SRC_1 | HRTIM_EECR1_EE1SRC_0) /*!< External event source 4 (EExSrc4) */
1174 /**
1175 * @}
1176 */
1177 /** @defgroup HRTIM_EC_EE_POLARITY EXTERNAL EVENT POLARITY
1178 * @{
1179 * @brief Constants defining the polarity of an external event.
1180 */
1181 #define LL_HRTIM_EE_POLARITY_HIGH ((uint32_t)0x00000000U) /*!< External event is active high */
1183 /**
1184 * @}
1185 */
1187 /** @defgroup HRTIM_EC_EE_SENSITIVITY EXTERNAL EVENT SENSITIVITY
1188 * @{
1189 * @brief Constants defining the sensitivity (level-sensitive or edge-sensitive) of an external event.
1190 */
1191 #define LL_HRTIM_EE_SENSITIVITY_LEVEL ((uint32_t)0x00000000U) /*!< External event is active on level */
1192 #define LL_HRTIM_EE_SENSITIVITY_RISINGEDGE (HRTIM_EECR1_EE1SNS_0) /*!< External event is active on Rising edge */
1193 #define LL_HRTIM_EE_SENSITIVITY_FALLINGEDGE (HRTIM_EECR1_EE1SNS_1) /*!< External event is active on Falling edge */
1194 #define LL_HRTIM_EE_SENSITIVITY_BOTHEDGES (HRTIM_EECR1_EE1SNS_1 | HRTIM_EECR1_EE1SNS_0) /*!< External event is active on Rising and Falling edges */
1195 /**
1196 * @}
1197 */
1199 /** @defgroup HRTIM_EC_EE_FASTMODE EXTERNAL EVENT FAST MODE
1200 * @{
1201 * @brief Constants defining whether or not an external event is programmed in fast mode.
1202 */
1203 #define LL_HRTIM_EE_FASTMODE_DISABLE ((uint32_t)0x00000000U) /*!< External Event is re-synchronized by the HRTIM logic before acting on outputs */
1204 #define LL_HRTIM_EE_FASTMODE_ENABLE (HRTIM_EECR1_EE1FAST) /*!< External Event is acting asynchronously on outputs (low latency mode) */
1205 /**
1206 * @}
1207 */
1209 /** @defgroup HRTIM_EC_EE_FILTER EXTERNAL EVENT DIGITAL FILTER
1210 * @{
1211 * @brief Constants defining the frequency used to sample an external event input (fSAMPLING) and the length (N) of the digital filter applied.
1212 */
1216 #define LL_HRTIM_EE_FILTER_3 (HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fHRTIM, N=8 */
1218 #define LL_HRTIM_EE_FILTER_5 (HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/2, N=8 */
1219 #define LL_HRTIM_EE_FILTER_6 (HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_1) /*!< fSAMPLING = fEEVS/4, N=6 */
1220 #define LL_HRTIM_EE_FILTER_7 (HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/4, N=8 */
1222 #define LL_HRTIM_EE_FILTER_9 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/8, N=8 */
1223 #define LL_HRTIM_EE_FILTER_10 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_1) /*!< fSAMPLING = fEEVS/16, N=5 */
1224 #define LL_HRTIM_EE_FILTER_11 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/16, N=6 */
1225 #define LL_HRTIM_EE_FILTER_12 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2) /*!< fSAMPLING = fEEVS/16, N=8 */
1226 #define LL_HRTIM_EE_FILTER_13 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/32, N=5 */
1227 #define LL_HRTIM_EE_FILTER_14 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_1) /*!< fSAMPLING = fEEVS/32, N=6 */
1228 #define LL_HRTIM_EE_FILTER_15 (HRTIM_EECR3_EE6F_3 | HRTIM_EECR3_EE6F_2 | HRTIM_EECR3_EE6F_1 | HRTIM_EECR3_EE6F_0) /*!< fSAMPLING = fEEVS/32, N=8 */
1229 /**
1230 * @}
1231 */
1233 /** @defgroup HRTIM_EC_EE_PRESCALER EXTERNAL EVENT PRESCALER
1234 * @{
1235 * @brief Constants defining division ratio between the timer clock frequency (fHRTIM) and the external event signal sampling clock (fEEVS) used by the digital filters.
1236 */
1240 #define LL_HRTIM_EE_PRESCALER_DIV8 (HRTIM_EECR3_EEVSD_1 | HRTIM_EECR3_EEVSD_0) /*!< fEEVS = fHRTIM / 8 */
1241 /**
1242 * @}
1243 */
1245 /** @defgroup HRTIM_EC_FLT_SRC FAULT SOURCE
1246 * @{
1247 * @brief Constants defining whether a faults is be triggered by any external or internal fault source.
1248 */
1249 #define LL_HRTIM_FLT_SRC_DIGITALINPUT ((uint32_t)0x00000000U) /*!< Fault input is FLT input pin */
1250 #define LL_HRTIM_FLT_SRC_INTERNAL (HRTIM_FLTINR1_FLT1SRC) /*!< Fault input is FLT_Int signal (e.g. internal comparator) */
1251 /**
1252 * @}
1253 */
1255 /** @defgroup HRTIM_EC_FLT_POLARITY FAULT POLARITY
1256 * @{
1257 * @brief Constants defining the polarity of a fault event.
1258 */
1261 /**
1262 * @}
1263 */
1265 /** @defgroup HRTIM_EC_FLT_FILTER FAULT DIGITAL FILTER
1266 * @{
1267 * @brief Constants defining the frequency used to sample the fault input (fSAMPLING) and the length (N) of the digital filter applied.
1268 */
1272 #define LL_HRTIM_FLT_FILTER_3 (HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fHRTIM, N=8 */
1274 #define LL_HRTIM_FLT_FILTER_5 (HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/2, N=8 */
1275 #define LL_HRTIM_FLT_FILTER_6 (HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1) /*!< fSAMPLING= fFLTS/4, N=6 */
1276 #define LL_HRTIM_FLT_FILTER_7 (HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/4, N=8 */
1278 #define LL_HRTIM_FLT_FILTER_9 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/8, N=8 */
1279 #define LL_HRTIM_FLT_FILTER_10 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_1) /*!< fSAMPLING= fFLTS/16, N=5 */
1280 #define LL_HRTIM_FLT_FILTER_11 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/16, N=6 */
1281 #define LL_HRTIM_FLT_FILTER_12 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2) /*!< fSAMPLING= fFLTS/16, N=8 */
1282 #define LL_HRTIM_FLT_FILTER_13 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/32, N=5 */
1283 #define LL_HRTIM_FLT_FILTER_14 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1) /*!< fSAMPLING= fFLTS/32, N=6 */
1284 #define LL_HRTIM_FLT_FILTER_15 (HRTIM_FLTINR1_FLT1F_3 | HRTIM_FLTINR1_FLT1F_2 | HRTIM_FLTINR1_FLT1F_1 | HRTIM_FLTINR1_FLT1F_0) /*!< fSAMPLING= fFLTS/32, N=8 */
1285 /**
1286 * @}
1287 */
1289 /** @defgroup HRTIM_EC_FLT_PRESCALER BURST FAULT PRESCALER
1290 * @{
1291 * @brief Constants defining the division ratio between the timer clock frequency (fHRTIM) and the fault signal sampling clock (fFLTS) used by the digital filters.
1292 */
1296 #define LL_HRTIM_FLT_PRESCALER_DIV8 (HRTIM_FLTINR2_FLTSD_1 | HRTIM_FLTINR2_FLTSD_0) /*!< fFLTS = fHRTIM / 8 */
1297 /**
1298 * @}
1299 */
1301 /** @defgroup HRTIM_EC_BM_MODE BURST MODE OPERATING MODE
1302 * @{
1303 * @brief Constants defining if the burst mode is entered once or if it is continuously operating.
1304 */
1305 #define LL_HRTIM_BM_MODE_SINGLESHOT ((uint32_t)0x00000000U) /*!< Burst mode operates in single shot mode */
1306 #define LL_HRTIM_BM_MODE_CONTINOUS (HRTIM_BMCR_BMOM) /*!< Burst mode operates in continuous mode */
1307 /**
1308 * @}
1309 */
1311 /** @defgroup HRTIM_EC_BM_CLKSRC BURST MODE CLOCK SOURCE
1312 * @{
1313 * @brief Constants defining the clock source for the burst mode counter.
1314 */
1315 #define LL_HRTIM_BM_CLKSRC_MASTER ((uint32_t)0x00000000U) /*!< Master timer counter reset/roll-over is used as clock source for the burst mode counter */
1316 #define LL_HRTIM_BM_CLKSRC_TIMER_A (HRTIM_BMCR_BMCLK_0) /*!< Timer A counter reset/roll-over is used as clock source for the burst mode counter */
1317 #define LL_HRTIM_BM_CLKSRC_TIMER_B (HRTIM_BMCR_BMCLK_1) /*!< Timer B counter reset/roll-over is used as clock source for the burst mode counter */
1318 #define LL_HRTIM_BM_CLKSRC_TIMER_C (HRTIM_BMCR_BMCLK_1 | HRTIM_BMCR_BMCLK_0) /*!< Timer C counter reset/roll-over is used as clock source for the burst mode counter */
1319 #define LL_HRTIM_BM_CLKSRC_TIMER_D (HRTIM_BMCR_BMCLK_2) /*!< Timer D counter reset/roll-over is used as clock source for the burst mode counter */
1320 #define LL_HRTIM_BM_CLKSRC_TIMER_E (HRTIM_BMCR_BMCLK_2 | HRTIM_BMCR_BMCLK_0) /*!< Timer E counter reset/roll-over is used as clock source for the burst mode counter */
1321 #define LL_HRTIM_BM_CLKSRC_TIM16_OC (HRTIM_BMCR_BMCLK_2 | HRTIM_BMCR_BMCLK_1) /*!< On-chip Event 1 (BMClk[1]), acting as a burst mode counter clock */
1322 #define LL_HRTIM_BM_CLKSRC_TIM17_OC (HRTIM_BMCR_BMCLK_2 | HRTIM_BMCR_BMCLK_1 | HRTIM_BMCR_BMCLK_0) /*!< On-chip Event 2 (BMClk[2]), acting as a burst mode counter clock */
1323 #define LL_HRTIM_BM_CLKSRC_TIM7_TRGO (HRTIM_BMCR_BMCLK_3) /*!< On-chip Event 3 (BMClk[3]), acting as a burst mode counter clock */
1324 #define LL_HRTIM_BM_CLKSRC_FHRTIM (HRTIM_BMCR_BMCLK_3 | HRTIM_BMCR_BMCLK_1) /*!< Prescaled fHRTIM clock is used as clock source for the burst mode counter */
1325 /**
1326 * @}
1327 */
1329 /** @defgroup HRTIM_EC_BM_PRESCALER BURST MODE PRESCALER
1330 * @{
1331 * @brief Constants defining the prescaling ratio of the fHRTIM clock for the burst mode controller (fBRST).
1332 */
1336 #define LL_HRTIM_BM_PRESCALER_DIV8 (HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/8 */
1338 #define LL_HRTIM_BM_PRESCALER_DIV32 (HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/32 */
1339 #define LL_HRTIM_BM_PRESCALER_DIV64 (HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1) /*!< fBRST = fHRTIM/64 */
1340 #define LL_HRTIM_BM_PRESCALER_DIV128 (HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/128 */
1342 #define LL_HRTIM_BM_PRESCALER_DIV512 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/512 */
1343 #define LL_HRTIM_BM_PRESCALER_DIV1024 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_1) /*!< fBRST = fHRTIM/1024 */
1344 #define LL_HRTIM_BM_PRESCALER_DIV2048 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/2048*/
1345 #define LL_HRTIM_BM_PRESCALER_DIV4096 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2) /*!< fBRST = fHRTIM/4096 */
1346 #define LL_HRTIM_BM_PRESCALER_DIV8192 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/8192 */
1347 #define LL_HRTIM_BM_PRESCALER_DIV16384 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1) /*!< fBRST = fHRTIM/16384 */
1348 #define LL_HRTIM_BM_PRESCALER_DIV32768 (HRTIM_BMCR_BMPRSC_3 | HRTIM_BMCR_BMPRSC_2 | HRTIM_BMCR_BMPRSC_1 | HRTIM_BMCR_BMPRSC_0) /*!< fBRST = fHRTIM/32768 */
1349 /**
1350 * @}
1351 */
1353 /** @defgroup HRTIM_EC_BM_TRIG HRTIM BURST MODE TRIGGER
1354 * @{
1355 * @brief Constants defining the events that can be used to trig the burst mode operation.
1356 */
1358 #define LL_HRTIM_BM_TRIG_MASTER_RESET (HRTIM_BMTRGR_MSTRST) /*!< Master timer reset event is starting the burst mode operation */
1359 #define LL_HRTIM_BM_TRIG_MASTER_REPETITION (HRTIM_BMTRGR_MSTREP) /*!< Master timer repetition event is starting the burst mode operation */
1360 #define LL_HRTIM_BM_TRIG_MASTER_CMP1 (HRTIM_BMTRGR_MSTCMP1) /*!< Master timer compare 1 event is starting the burst mode operation */
1361 #define LL_HRTIM_BM_TRIG_MASTER_CMP2 (HRTIM_BMTRGR_MSTCMP2) /*!< Master timer compare 2 event is starting the burst mode operation */
1362 #define LL_HRTIM_BM_TRIG_MASTER_CMP3 (HRTIM_BMTRGR_MSTCMP3) /*!< Master timer compare 3 event is starting the burst mode operation */
1363 #define LL_HRTIM_BM_TRIG_MASTER_CMP4 (HRTIM_BMTRGR_MSTCMP4) /*!< Master timer compare 4 event is starting the burst mode operation */
1364 #define LL_HRTIM_BM_TRIG_TIMA_RESET (HRTIM_BMTRGR_TARST) /*!< Timer A reset event is starting the burst mode operation */
1365 #define LL_HRTIM_BM_TRIG_TIMA_REPETITION (HRTIM_BMTRGR_TAREP) /*!< Timer A repetition event is starting the burst mode operation */
1366 #define LL_HRTIM_BM_TRIG_TIMA_CMP1 (HRTIM_BMTRGR_TACMP1) /*!< Timer A compare 1 event is starting the burst mode operation */
1367 #define LL_HRTIM_BM_TRIG_TIMA_CMP2 (HRTIM_BMTRGR_TACMP2) /*!< Timer A compare 2 event is starting the burst mode operation */
1368 #define LL_HRTIM_BM_TRIG_TIMB_RESET (HRTIM_BMTRGR_TBRST) /*!< Timer B reset event is starting the burst mode operation */
1369 #define LL_HRTIM_BM_TRIG_TIMB_REPETITION (HRTIM_BMTRGR_TBREP) /*!< Timer B repetition event is starting the burst mode operation */
1370 #define LL_HRTIM_BM_TRIG_TIMB_CMP1 (HRTIM_BMTRGR_TBCMP1) /*!< Timer B compare 1 event is starting the burst mode operation */
1371 #define LL_HRTIM_BM_TRIG_TIMB_CMP2 (HRTIM_BMTRGR_TBCMP2) /*!< Timer B compare 2 event is starting the burst mode operation */
1372 #define LL_HRTIM_BM_TRIG_TIMC_RESET (HRTIM_BMTRGR_TCRST) /*!< Timer C resetevent is starting the burst mode operation */
1373 #define LL_HRTIM_BM_TRIG_TIMC_REPETITION (HRTIM_BMTRGR_TCREP) /*!< Timer C repetition event is starting the burst mode operation */
1374 #define LL_HRTIM_BM_TRIG_TIMC_CMP1 (HRTIM_BMTRGR_TCCMP1) /*!< Timer C compare 1 event is starting the burst mode operation */
1375 #define LL_HRTIM_BM_TRIG_TIMC_CMP2 (HRTIM_BMTRGR_TCCMP2) /*!< Timer C compare 2 event is starting the burst mode operation */
1376 #define LL_HRTIM_BM_TRIG_TIMD_RESET (HRTIM_BMTRGR_TDRST) /*!< Timer D reset event is starting the burst mode operation */
1377 #define LL_HRTIM_BM_TRIG_TIMD_REPETITION (HRTIM_BMTRGR_TDREP) /*!< Timer D repetition event is starting the burst mode operation */
1378 #define LL_HRTIM_BM_TRIG_TIMD_CMP1 (HRTIM_BMTRGR_TDCMP1) /*!< Timer D compare 1 event is starting the burst mode operation */
1379 #define LL_HRTIM_BM_TRIG_TIMD_CMP2 (HRTIM_BMTRGR_TDCMP2) /*!< Timer D compare 2 event is starting the burst mode operation */
1380 #define LL_HRTIM_BM_TRIG_TIME_RESET (HRTIM_BMTRGR_TERST) /*!< Timer E reset event is starting the burst mode operation */
1381 #define LL_HRTIM_BM_TRIG_TIME_REPETITION (HRTIM_BMTRGR_TEREP) /*!< Timer E repetition event is starting the burst mode operation */
1382 #define LL_HRTIM_BM_TRIG_TIME_CMP1 (HRTIM_BMTRGR_TECMP1) /*!< Timer E compare 1 event is starting the burst mode operation */
1383 #define LL_HRTIM_BM_TRIG_TIME_CMP2 (HRTIM_BMTRGR_TECMP2) /*!< Timer E compare 2 event is starting the burst mode operation */
1384 #define LL_HRTIM_BM_TRIG_TIMA_EVENT7 (HRTIM_BMTRGR_TAEEV7) /*!< Timer A period following an external event 7 (conditioned by TIMA filters) is starting the burst
1385 mode operation */
1386 #define LL_HRTIM_BM_TRIG_TIMD_EVENT8 (HRTIM_BMTRGR_TDEEV8) /*!< Timer D period following an external event 8 (conditioned by TIMD filters) is starting the burst
1387 mode operation */
1388 #define LL_HRTIM_BM_TRIG_EVENT_7 (HRTIM_BMTRGR_EEV7) /*!< External event 7 conditioned by TIMA filters is starting the burst mode operation */
1389 #define LL_HRTIM_BM_TRIG_EVENT_8 (HRTIM_BMTRGR_EEV8) /*!< External event 8 conditioned by TIMD filters is starting the burst mode operation */
1390 #define LL_HRTIM_BM_TRIG_EVENT_ONCHIP (HRTIM_BMTRGR_OCHPEV) /*!< A rising edge on an on-chip Event (for instance from GP timer or comparator) triggers the burst mode
1391 operation */
1392 /**
1393 * @}
1394 */
1396 /** @defgroup HRTIM_EC_BM_STATUS HRTIM BURST MODE STATUS
1397 * @{
1398 * @brief Constants defining the operating state of the burst mode controller.
1399 */
1402 /**
1403 * @}
1404 */
1406 /**
1407 * @}
1408 */
1410 /* Exported macro ------------------------------------------------------------*/
1411 /** @defgroup HRTIM_LL_Exported_Macros HRTIM Exported Macros
1412 * @{
1413 */
1415 /** @defgroup HRTIM_LL_EM_WRITE_READ Common Write and read registers Macros
1416 * @{
1417 */
1419 /**
1420 * @brief Write a value in HRTIM register
1421 * @param __INSTANCE__ HRTIM Instance
1422 * @param __REG__ Register to be written
1423 * @param __VALUE__ Value to be written in the register
1424 * @retval None
1425 */
1426 #define LL_HRTIM_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
1428 /**
1429 * @brief Read a value in HRTIM register
1430 * @param __INSTANCE__ HRTIM Instance
1431 * @param __REG__ Register to be read
1432 * @retval Register value
1433 */
1434 #define LL_HRTIM_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
1435 /**
1436 * @}
1437 */
1439 /** @defgroup HRTIM_LL_EM_Exported_Macros Exported_Macros
1440 * @{
1441 */
1442 /**
1443 * @brief HELPER macro returning the output state from output enable/disable status
1444 * @param __OUTPUT_STATUS_EN__ output enable status
1445 * @param __OUTPUT_STATUS_DIS__ output Disable status
1446 * @retval Returned value can be one of the following values:
1447 * @arg @ref LL_HRTIM_OUTPUTSTATE_IDLE
1448 * @arg @ref LL_HRTIM_OUTPUTSTATE_RUN
1449 * @arg @ref LL_HRTIM_OUTPUTSTATE_FAULT
1450 */
1451 #define __LL_HRTIM_GET_OUTPUT_STATE(__OUTPUT_STATUS_EN__, __OUTPUT_STATUS_DIS__)\
1452 (((__OUTPUT_STATUS_EN__) == 1) ? LL_HRTIM_OUTPUTSTATE_RUN :\
1453 ((__OUTPUT_STATUS_DIS__) == 0) ? LL_HRTIM_OUTPUTSTATE_IDLE : LL_HRTIM_OUTPUTSTATE_FAULT)
1454 /**
1455 * @}
1456 */
1459 /**
1460 * @}
1461 */
1463 /* Exported functions --------------------------------------------------------*/
1464 /** @defgroup HRTIM_LL_Exported_Functions HRTIM Exported Functions
1465 * @{
1466 */
1467 /** @defgroup HRTIM_EF_HRTIM_Control HRTIM_Control
1468 * @{
1469 */
1471 /**
1472 * @brief Select the HRTIM synchronization input source.
1473 * @note This function must not be called when the concerned timer(s) is (are) enabled .
1474 * @rmtoll MCR SYNCIN LL_HRTIM_SetSyncInSrc
1475 * @param HRTIMx High Resolution Timer instance
1476 * @param SyncInSrc This parameter can be one of the following values:
1477 * @arg @ref LL_HRTIM_SYNCIN_SRC_NONE
1478 * @arg @ref LL_HRTIM_SYNCIN_SRC_TIM_EVENT
1479 * @arg @ref LL_HRTIM_SYNCIN_SRC_EXTERNAL_EVENT
1480 * @retval None
1481 */
1483 {
1485 }
1487 /**
1488 * @brief Get actual HRTIM synchronization input source.
1489 * @rmtoll MCR SYNCIN LL_HRTIM_SetSyncInSrc
1490 * @param HRTIMx High Resolution Timer instance
1491 * @retval SyncInSrc Returned value can be one of the following values:
1492 * @arg @ref LL_HRTIM_SYNCIN_SRC_NONE
1493 * @arg @ref LL_HRTIM_SYNCIN_SRC_TIM_EVENT
1494 * @arg @ref LL_HRTIM_SYNCIN_SRC_EXTERNAL_EVENT
1495 */
1497 {
1499 }
1501 /**
1502 * @brief Configure the HRTIM synchronization output.
1503 * @rmtoll MCR SYNCSRC LL_HRTIM_ConfigSyncOut\n
1504 * MCR SYNCOUT LL_HRTIM_ConfigSyncOut
1505 * @param HRTIMx High Resolution Timer instance
1506 * @param Config This parameter can be one of the following values:
1507 * @arg @ref LL_HRTIM_SYNCOUT_DISABLED
1508 * @arg @ref LL_HRTIM_SYNCOUT_POSITIVE_PULSE
1509 * @arg @ref LL_HRTIM_SYNCOUT_NEGATIVE_PULSE
1510 * @param Src This parameter can be one of the following values:
1511 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_START
1512 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_CMP1
1513 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_START
1514 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_CMP1
1515 * @retval None
1516 */
1517 __STATIC_INLINE void LL_HRTIM_ConfigSyncOut(HRTIM_TypeDef *HRTIMx, uint32_t Config, uint32_t Src)
1518 {
1519 MODIFY_REG(HRTIMx->sMasterRegs.MCR, (HRTIM_MCR_SYNC_OUT | HRTIM_MCR_SYNC_SRC), (Config | Src));
1520 }
1522 /**
1523 * @brief Set the routing and conditioning of the synchronization output event.
1524 * @rmtoll MCR SYNCOUT LL_HRTIM_SetSyncOutConfig
1525 * @note This function can be called only when the master timer is enabled.
1526 * @param HRTIMx High Resolution Timer instance
1527 * @param SyncOutConfig This parameter can be one of the following values:
1528 * @arg @ref LL_HRTIM_SYNCOUT_DISABLED
1529 * @arg @ref LL_HRTIM_SYNCOUT_POSITIVE_PULSE
1530 * @arg @ref LL_HRTIM_SYNCOUT_NEGATIVE_PULSE
1531 * @retval None
1532 */
1534 {
1536 }
1538 /**
1539 * @brief Get actual routing and conditioning of the synchronization output event.
1540 * @rmtoll MCR SYNCOUT LL_HRTIM_GetSyncOutConfig
1541 * @param HRTIMx High Resolution Timer instance
1542 * @retval SyncOutConfig Returned value can be one of the following values:
1543 * @arg @ref LL_HRTIM_SYNCOUT_DISABLED
1544 * @arg @ref LL_HRTIM_SYNCOUT_POSITIVE_PULSE
1545 * @arg @ref LL_HRTIM_SYNCOUT_NEGATIVE_PULSE
1546 */
1548 {
1550 }
1552 /**
1553 * @brief Set the source and event to be sent on the HRTIM synchronization output.
1554 * @rmtoll MCR SYNCSRC LL_HRTIM_SetSyncOutSrc
1555 * @param HRTIMx High Resolution Timer instance
1556 * @param SyncOutSrc This parameter can be one of the following values:
1557 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_START
1558 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_CMP1
1559 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_START
1560 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_CMP1
1561 * @retval None
1562 */
1564 {
1566 }
1568 /**
1569 * @brief Get actual source and event sent on the HRTIM synchronization output.
1570 * @rmtoll MCR SYNCSRC LL_HRTIM_GetSyncOutSrc
1571 * @param HRTIMx High Resolution Timer instance
1572 * @retval SyncOutSrc Returned value can be one of the following values:
1573 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_START
1574 * @arg @ref LL_HRTIM_SYNCOUT_SRC_MASTER_CMP1
1575 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_START
1576 * @arg @ref LL_HRTIM_SYNCOUT_SRC_TIMA_CMP1
1577 */
1579 {
1581 }
1583 /**
1584 * @brief Disable (temporarily) update event generation.
1585 * @rmtoll CR1 MUDIS LL_HRTIM_SuspendUpdate\n
1586 * CR1 TAUDIS LL_HRTIM_SuspendUpdate\n
1587 * CR1 TBUDIS LL_HRTIM_SuspendUpdate\n
1588 * CR1 TCUDIS LL_HRTIM_SuspendUpdate\n
1589 * CR1 TDUDIS LL_HRTIM_SuspendUpdate\n
1590 * CR1 TEUDIS LL_HRTIM_SuspendUpdate
1591 * @note Allow to temporarily disable the transfer from preload to active
1592 * registers, whatever the selected update event. This allows to modify
1593 * several registers in multiple timers.
1594 * @param HRTIMx High Resolution Timer instance
1595 * @param Timers This parameter can be a combination of the following values:
1596 * @arg @ref LL_HRTIM_TIMER_MASTER
1597 * @arg @ref LL_HRTIM_TIMER_A
1598 * @arg @ref LL_HRTIM_TIMER_B
1599 * @arg @ref LL_HRTIM_TIMER_C
1600 * @arg @ref LL_HRTIM_TIMER_D
1601 * @arg @ref LL_HRTIM_TIMER_E
1602 * @retval None
1603 */
1605 {
1607 }
1609 /**
1610 * @brief Enable update event generation.
1611 * @rmtoll CR1 MUDIS LL_HRTIM_ResumeUpdate\n
1612 * CR1 TAUDIS LL_HRTIM_ResumeUpdate\n
1613 * CR1 TBUDIS LL_HRTIM_ResumeUpdate\n
1614 * CR1 TCUDIS LL_HRTIM_ResumeUpdate\n
1615 * CR1 TDUDIS LL_HRTIM_ResumeUpdate\n
1616 * CR1 TEUDIS LL_HRTIM_ResumeUpdate
1617 * @note The regular update event takes place.
1618 * @param HRTIMx High Resolution Timer instance
1619 * @param Timers This parameter can be a combination of the following values:
1620 * @arg @ref LL_HRTIM_TIMER_MASTER
1621 * @arg @ref LL_HRTIM_TIMER_A
1622 * @arg @ref LL_HRTIM_TIMER_B
1623 * @arg @ref LL_HRTIM_TIMER_C
1624 * @arg @ref LL_HRTIM_TIMER_D
1625 * @arg @ref LL_HRTIM_TIMER_E
1626 * @retval None
1627 */
1629 {
1631 }
1633 /**
1634 * @brief Force an immediate transfer from the preload to the active register .
1635 * @rmtoll CR2 MSWU LL_HRTIM_ForceUpdate\n
1636 * CR2 TASWU LL_HRTIM_ForceUpdate\n
1637 * CR2 TBSWU LL_HRTIM_ForceUpdate\n
1638 * CR2 TCSWU LL_HRTIM_ForceUpdate\n
1639 * CR2 TDSWU LL_HRTIM_ForceUpdate\n
1640 * CR2 TESWU LL_HRTIM_ForceUpdate
1641 * @note Any pending update request is cancelled.
1642 * @param HRTIMx High Resolution Timer instance
1643 * @param Timers This parameter can be a combination of the following values:
1644 * @arg @ref LL_HRTIM_TIMER_MASTER
1645 * @arg @ref LL_HRTIM_TIMER_A
1646 * @arg @ref LL_HRTIM_TIMER_B
1647 * @arg @ref LL_HRTIM_TIMER_C
1648 * @arg @ref LL_HRTIM_TIMER_D
1649 * @arg @ref LL_HRTIM_TIMER_E
1650 * @retval None
1651 */
1653 {
1655 }
1657 /**
1658 * @brief Reset the HRTIM timer(s) counter.
1659 * @rmtoll CR2 MRST LL_HRTIM_CounterReset\n
1660 * CR2 TARST LL_HRTIM_CounterReset\n
1661 * CR2 TBRST LL_HRTIM_CounterReset\n
1662 * CR2 TCRST LL_HRTIM_CounterReset\n
1663 * CR2 TDRST LL_HRTIM_CounterReset\n
1664 * CR2 TERST LL_HRTIM_CounterReset
1665 * @param HRTIMx High Resolution Timer instance
1666 * @param Timers This parameter can be a combination of the following values:
1667 * @arg @ref LL_HRTIM_TIMER_MASTER
1668 * @arg @ref LL_HRTIM_TIMER_A
1669 * @arg @ref LL_HRTIM_TIMER_B
1670 * @arg @ref LL_HRTIM_TIMER_C
1671 * @arg @ref LL_HRTIM_TIMER_D
1672 * @arg @ref LL_HRTIM_TIMER_E
1673 * @retval None
1674 */
1676 {
1677 SET_BIT(HRTIMx->sCommonRegs.CR2, (((Timers >> HRTIM_MCR_MCEN_Pos) << HRTIM_CR2_MRST_Pos) & HRTIM_CR2_SWRST_MASK));
1678 }
1680 /**
1681 * @brief Enable the HRTIM timer(s) output(s) .
1682 * @rmtoll OENR TA1OEN LL_HRTIM_EnableOutput\n
1683 * OENR TA2OEN LL_HRTIM_EnableOutput\n
1684 * OENR TB1OEN LL_HRTIM_EnableOutput\n
1685 * OENR TB2OEN LL_HRTIM_EnableOutput\n
1686 * OENR TC1OEN LL_HRTIM_EnableOutput\n
1687 * OENR TC2OEN LL_HRTIM_EnableOutput\n
1688 * OENR TD1OEN LL_HRTIM_EnableOutput\n
1689 * OENR TD2OEN LL_HRTIM_EnableOutput\n
1690 * OENR TE1OEN LL_HRTIM_EnableOutput\n
1691 * OENR TE2OEN LL_HRTIM_EnableOutput
1692 * @param HRTIMx High Resolution Timer instance
1693 * @param Outputs This parameter can be a combination of the following values:
1694 * @arg @ref LL_HRTIM_OUTPUT_TA1
1695 * @arg @ref LL_HRTIM_OUTPUT_TA2
1696 * @arg @ref LL_HRTIM_OUTPUT_TB1
1697 * @arg @ref LL_HRTIM_OUTPUT_TB2
1698 * @arg @ref LL_HRTIM_OUTPUT_TC1
1699 * @arg @ref LL_HRTIM_OUTPUT_TC2
1700 * @arg @ref LL_HRTIM_OUTPUT_TD1
1701 * @arg @ref LL_HRTIM_OUTPUT_TD2
1702 * @arg @ref LL_HRTIM_OUTPUT_TE1
1703 * @arg @ref LL_HRTIM_OUTPUT_TE2
1704 * @retval None
1705 */
1707 {
1709 }
1711 /**
1712 * @brief Disable the HRTIM timer(s) output(s) .
1713 * @rmtoll OENR TA1OEN LL_HRTIM_DisableOutput\n
1714 * OENR TA2OEN LL_HRTIM_DisableOutput\n
1715 * OENR TB1OEN LL_HRTIM_DisableOutput\n
1716 * OENR TB2OEN LL_HRTIM_DisableOutput\n
1717 * OENR TC1OEN LL_HRTIM_DisableOutput\n
1718 * OENR TC2OEN LL_HRTIM_DisableOutput\n
1719 * OENR TD1OEN LL_HRTIM_DisableOutput\n
1720 * OENR TD2OEN LL_HRTIM_DisableOutput\n
1721 * OENR TE1OEN LL_HRTIM_DisableOutput\n
1722 * OENR TE2OEN LL_HRTIM_DisableOutput
1723 * @param HRTIMx High Resolution Timer instance
1724 * @param Outputs This parameter can be a combination of the following values:
1725 * @arg @ref LL_HRTIM_OUTPUT_TA1
1726 * @arg @ref LL_HRTIM_OUTPUT_TA2
1727 * @arg @ref LL_HRTIM_OUTPUT_TB1
1728 * @arg @ref LL_HRTIM_OUTPUT_TB2
1729 * @arg @ref LL_HRTIM_OUTPUT_TC1
1730 * @arg @ref LL_HRTIM_OUTPUT_TC2
1731 * @arg @ref LL_HRTIM_OUTPUT_TD1
1732 * @arg @ref LL_HRTIM_OUTPUT_TD2
1733 * @arg @ref LL_HRTIM_OUTPUT_TE1
1734 * @arg @ref LL_HRTIM_OUTPUT_TE2
1735 * @retval None
1736 */
1738 {
1740 }
1742 /**
1743 * @brief Indicates whether the HRTIM timer output is enabled.
1744 * @rmtoll OENR TA1OEN LL_HRTIM_IsEnabledOutput\n
1745 * OENR TA2OEN LL_HRTIM_IsEnabledOutput\n
1746 * OENR TB1OEN LL_HRTIM_IsEnabledOutput\n
1747 * OENR TB2OEN LL_HRTIM_IsEnabledOutput\n
1748 * OENR TC1OEN LL_HRTIM_IsEnabledOutput\n
1749 * OENR TC2OEN LL_HRTIM_IsEnabledOutput\n
1750 * OENR TD1OEN LL_HRTIM_IsEnabledOutput\n
1751 * OENR TD2OEN LL_HRTIM_IsEnabledOutput\n
1752 * OENR TE1OEN LL_HRTIM_IsEnabledOutput\n
1753 * OENR TE2OEN LL_HRTIM_IsEnabledOutput
1754 * @param HRTIMx High Resolution Timer instance
1755 * @param Output This parameter can be one of the following values:
1756 * @arg @ref LL_HRTIM_OUTPUT_TA1
1757 * @arg @ref LL_HRTIM_OUTPUT_TA2
1758 * @arg @ref LL_HRTIM_OUTPUT_TB1
1759 * @arg @ref LL_HRTIM_OUTPUT_TB2
1760 * @arg @ref LL_HRTIM_OUTPUT_TC1
1761 * @arg @ref LL_HRTIM_OUTPUT_TC2
1762 * @arg @ref LL_HRTIM_OUTPUT_TD1
1763 * @arg @ref LL_HRTIM_OUTPUT_TD2
1764 * @arg @ref LL_HRTIM_OUTPUT_TE1
1765 * @arg @ref LL_HRTIM_OUTPUT_TE2
1766 * @retval State of TxyOEN bit in HRTIM_OENR register (1 or 0).
1767 */
1769 {
1771 }
1773 /**
1774 * @brief Indicates whether the HRTIM timer output is disabled.
1775 * @rmtoll ODISR TA1ODIS LL_HRTIM_IsDisabledOutput\n
1776 * ODISR TA2ODIS LL_HRTIM_IsDisabledOutput\n
1777 * ODISR TB1ODIS LL_HRTIM_IsDisabledOutput\n
1778 * ODISR TB2ODIS LL_HRTIM_IsDisabledOutput\n
1779 * ODISR TC1ODIS LL_HRTIM_IsDisabledOutput\n
1780 * ODISR TC2ODIS LL_HRTIM_IsDisabledOutput\n
1781 * ODISR TD1ODIS LL_HRTIM_IsDisabledOutput\n
1782 * ODISR TD2ODIS LL_HRTIM_IsDisabledOutput\n
1783 * ODISR TE1ODIS LL_HRTIM_IsDisabledOutput\n
1784 * ODISR TE2ODIS LL_HRTIM_IsDisabledOutput
1785 * @param HRTIMx High Resolution Timer instance
1786 * @param Output This parameter can be one of the following values:
1787 * @arg @ref LL_HRTIM_OUTPUT_TA1
1788 * @arg @ref LL_HRTIM_OUTPUT_TA2
1789 * @arg @ref LL_HRTIM_OUTPUT_TB1
1790 * @arg @ref LL_HRTIM_OUTPUT_TB2
1791 * @arg @ref LL_HRTIM_OUTPUT_TC1
1792 * @arg @ref LL_HRTIM_OUTPUT_TC2
1793 * @arg @ref LL_HRTIM_OUTPUT_TD1
1794 * @arg @ref LL_HRTIM_OUTPUT_TD2
1795 * @arg @ref LL_HRTIM_OUTPUT_TE1
1796 * @arg @ref LL_HRTIM_OUTPUT_TE2
1797 * @retval State of TxyODS bit in HRTIM_ODSR register (1 or 0).
1798 */
1800 {
1802 }
1804 /**
1805 * @brief Configure an ADC trigger.
1806 * @rmtoll CR1 ADC1USRC LL_HRTIM_ConfigADCTrig\n
1807 * CR1 ADC2USRC LL_HRTIM_ConfigADCTrig\n
1808 * CR1 ADC3USRC LL_HRTIM_ConfigADCTrig\n
1809 * CR1 ADC4USRC LL_HRTIM_ConfigADCTrig\n
1810 * ADC1R ADC1MC4 LL_HRTIM_ConfigADCTrig\n
1811 * ADC1R ADC1MPER LL_HRTIM_ConfigADCTrig\n
1812 * ADC1R ADC1EEV1 LL_HRTIM_ConfigADCTrig\n
1813 * ADC1R ADC1EEV2 LL_HRTIM_ConfigADCTrig\n
1814 * ADC1R ADC1EEV3 LL_HRTIM_ConfigADCTrig\n
1815 * ADC1R ADC1EEV4 LL_HRTIM_ConfigADCTrig\n
1816 * ADC1R ADC1EEV5 LL_HRTIM_ConfigADCTrig\n
1817 * ADC1R ADC1TAC2 LL_HRTIM_ConfigADCTrig\n
1818 * ADC1R ADC1TAC3 LL_HRTIM_ConfigADCTrig\n
1819 * ADC1R ADC1TAC4 LL_HRTIM_ConfigADCTrig\n
1820 * ADC1R ADC1TAPER LL_HRTIM_ConfigADCTrig\n
1821 * ADC1R ADC1TARST LL_HRTIM_ConfigADCTrig\n
1822 * ADC1R ADC1TBC2 LL_HRTIM_ConfigADCTrig\n
1823 * ADC1R ADC1TBC3 LL_HRTIM_ConfigADCTrig\n
1824 * ADC1R ADC1TBC4 LL_HRTIM_ConfigADCTrig\n
1825 * ADC1R ADC1TBPER LL_HRTIM_ConfigADCTrig\n
1826 * ADC1R ADC1TBRST LL_HRTIM_ConfigADCTrig\n
1827 * ADC1R ADC1TCC2 LL_HRTIM_ConfigADCTrig\n
1828 * ADC1R ADC1TCC3 LL_HRTIM_ConfigADCTrig\n
1829 * ADC1R ADC1TCC4 LL_HRTIM_ConfigADCTrig\n
1830 * ADC1R ADC1TCPER LL_HRTIM_ConfigADCTrig\n
1831 * ADC1R ADC1TDC2 LL_HRTIM_ConfigADCTrig\n
1832 * ADC1R ADC1TDC3 LL_HRTIM_ConfigADCTrig\n
1833 * ADC1R ADC1TDC4 LL_HRTIM_ConfigADCTrig\n
1834 * ADC1R ADC1TDPER LL_HRTIM_ConfigADCTrig\n
1835 * ADC1R ADC1TEC2 LL_HRTIM_ConfigADCTrig\n
1836 * ADC1R ADC1TEC3 LL_HRTIM_ConfigADCTrig\n
1837 * ADC1R ADC1TEC4 LL_HRTIM_ConfigADCTrig\n
1838 * ADC1R ADC1TEPER LL_HRTIM_ConfigADCTrig\n
1839 * ADC2R ADC2MC1 LL_HRTIM_ConfigADCTrig\n
1840 * ADC2R ADC2MC2 LL_HRTIM_ConfigADCTrig\n
1841 * ADC2R ADC2MC3 LL_HRTIM_ConfigADCTrig\n
1842 * ADC2R ADC2MC4 LL_HRTIM_ConfigADCTrig\n
1843 * ADC2R ADC2MPER LL_HRTIM_ConfigADCTrig\n
1844 * ADC2R ADC2EEV6 LL_HRTIM_ConfigADCTrig\n
1845 * ADC2R ADC2EEV7 LL_HRTIM_ConfigADCTrig\n
1846 * ADC2R ADC2EEV8 LL_HRTIM_ConfigADCTrig\n
1847 * ADC2R ADC2EEV9 LL_HRTIM_ConfigADCTrig\n
1848 * ADC2R ADC2EEV10 LL_HRTIM_ConfigADCTrig\n
1849 * ADC2R ADC2TAC2 LL_HRTIM_ConfigADCTrig\n
1850 * ADC2R ADC2TAC3 LL_HRTIM_ConfigADCTrig\n
1851 * ADC2R ADC2TAC4 LL_HRTIM_ConfigADCTrig\n
1852 * ADC2R ADC2TAPER LL_HRTIM_ConfigADCTrig\n
1853 * ADC2R ADC2TBC2 LL_HRTIM_ConfigADCTrig\n
1854 * ADC2R ADC2TBC3 LL_HRTIM_ConfigADCTrig\n
1855 * ADC2R ADC2TBC4 LL_HRTIM_ConfigADCTrig\n
1856 * ADC2R ADC2TBPER LL_HRTIM_ConfigADCTrig\n
1857 * ADC2R ADC2TCC2 LL_HRTIM_ConfigADCTrig\n
1858 * ADC2R ADC2TCC3 LL_HRTIM_ConfigADCTrig\n
1859 * ADC2R ADC2TCC4 LL_HRTIM_ConfigADCTrig\n
1860 * ADC2R ADC2TCPER LL_HRTIM_ConfigADCTrig\n
1861 * ADC2R ADC2TCRST LL_HRTIM_ConfigADCTrig\n
1862 * ADC2R ADC2TDC2 LL_HRTIM_ConfigADCTrig\n
1863 * ADC2R ADC2TDC3 LL_HRTIM_ConfigADCTrig\n
1864 * ADC2R ADC2TDC4 LL_HRTIM_ConfigADCTrig\n
1865 * ADC2R ADC2TDPER LL_HRTIM_ConfigADCTrig\n
1866 * ADC2R ADC2TDRST LL_HRTIM_ConfigADCTrig\n
1867 * ADC2R ADC2TEC2 LL_HRTIM_ConfigADCTrig\n
1868 * ADC2R ADC2TEC3 LL_HRTIM_ConfigADCTrig\n
1869 * ADC2R ADC2TEC4 LL_HRTIM_ConfigADCTrig\n
1870 * ADC2R ADC2TERST LL_HRTIM_ConfigADCTrig\n
1871 * ADC3R ADC3MC1 LL_HRTIM_ConfigADCTrig\n
1872 * ADC3R ADC3MC2 LL_HRTIM_ConfigADCTrig\n
1873 * ADC3R ADC3MC3 LL_HRTIM_ConfigADCTrig\n
1874 * ADC3R ADC3MC4 LL_HRTIM_ConfigADCTrig\n
1875 * ADC3R ADC3MPER LL_HRTIM_ConfigADCTrig\n
1876 * ADC3R ADC3EEV1 LL_HRTIM_ConfigADCTrig\n
1877 * ADC3R ADC3EEV2 LL_HRTIM_ConfigADCTrig\n
1878 * ADC3R ADC3EEV3 LL_HRTIM_ConfigADCTrig\n
1879 * ADC3R ADC3EEV4 LL_HRTIM_ConfigADCTrig\n
1880 * ADC3R ADC3EEV5 LL_HRTIM_ConfigADCTrig\n
1881 * ADC3R ADC3TAC2 LL_HRTIM_ConfigADCTrig\n
1882 * ADC3R ADC3TAC3 LL_HRTIM_ConfigADCTrig\n
1883 * ADC3R ADC3TAC4 LL_HRTIM_ConfigADCTrig\n
1884 * ADC3R ADC3TAPER LL_HRTIM_ConfigADCTrig\n
1885 * ADC3R ADC3TARST LL_HRTIM_ConfigADCTrig\n
1886 * ADC3R ADC3TBC2 LL_HRTIM_ConfigADCTrig\n
1887 * ADC3R ADC3TBC3 LL_HRTIM_ConfigADCTrig\n
1888 * ADC3R ADC3TBC4 LL_HRTIM_ConfigADCTrig\n
1889 * ADC3R ADC3TBPER LL_HRTIM_ConfigADCTrig\n
1890 * ADC3R ADC3TBRST LL_HRTIM_ConfigADCTrig\n
1891 * ADC3R ADC3TCC2 LL_HRTIM_ConfigADCTrig\n
1892 * ADC3R ADC3TCC3 LL_HRTIM_ConfigADCTrig\n
1893 * ADC3R ADC3TCC4 LL_HRTIM_ConfigADCTrig\n
1894 * ADC3R ADC3TCPER LL_HRTIM_ConfigADCTrig\n
1895 * ADC3R ADC3TDC2 LL_HRTIM_ConfigADCTrig\n
1896 * ADC3R ADC3TDC3 LL_HRTIM_ConfigADCTrig\n
1897 * ADC3R ADC3TDC4 LL_HRTIM_ConfigADCTrig\n
1898 * ADC3R ADC3TDPER LL_HRTIM_ConfigADCTrig\n
1899 * ADC3R ADC3TEC2 LL_HRTIM_ConfigADCTrig\n
1900 * ADC3R ADC3TEC3 LL_HRTIM_ConfigADCTrig\n
1901 * ADC3R ADC3TEC4 LL_HRTIM_ConfigADCTrig\n
1902 * ADC3R ADC3TEPER LL_HRTIM_ConfigADCTrig\n
1903 * ADC4R ADC4MC1 LL_HRTIM_ConfigADCTrig\n
1904 * ADC4R ADC4MC2 LL_HRTIM_ConfigADCTrig\n
1905 * ADC4R ADC4MC3 LL_HRTIM_ConfigADCTrig\n
1906 * ADC4R ADC4MC4 LL_HRTIM_ConfigADCTrig\n
1907 * ADC4R ADC4MPER LL_HRTIM_ConfigADCTrig\n
1908 * ADC4R ADC4EEV6 LL_HRTIM_ConfigADCTrig\n
1909 * ADC4R ADC4EEV7 LL_HRTIM_ConfigADCTrig\n
1910 * ADC4R ADC4EEV8 LL_HRTIM_ConfigADCTrig\n
1911 * ADC4R ADC4EEV9 LL_HRTIM_ConfigADCTrig\n
1912 * ADC4R ADC4EEV10 LL_HRTIM_ConfigADCTrig\n
1913 * ADC4R ADC4TAC2 LL_HRTIM_ConfigADCTrig\n
1914 * ADC4R ADC4TAC3 LL_HRTIM_ConfigADCTrig\n
1915 * ADC4R ADC4TAC4 LL_HRTIM_ConfigADCTrig\n
1916 * ADC4R ADC4TAPER LL_HRTIM_ConfigADCTrig\n
1917 * ADC4R ADC4TBC2 LL_HRTIM_ConfigADCTrig\n
1918 * ADC4R ADC4TBC3 LL_HRTIM_ConfigADCTrig\n
1919 * ADC4R ADC4TBC4 LL_HRTIM_ConfigADCTrig\n
1920 * ADC4R ADC4TBPER LL_HRTIM_ConfigADCTrig\n
1921 * ADC4R ADC4TCC2 LL_HRTIM_ConfigADCTrig\n
1922 * ADC4R ADC4TCC3 LL_HRTIM_ConfigADCTrig\n
1923 * ADC4R ADC4TCC4 LL_HRTIM_ConfigADCTrig\n
1924 * ADC4R ADC4TCPER LL_HRTIM_ConfigADCTrig\n
1925 * ADC4R ADC4TCRST LL_HRTIM_ConfigADCTrig\n
1926 * ADC4R ADC4TDC2 LL_HRTIM_ConfigADCTrig\n
1927 * ADC4R ADC4TDC3 LL_HRTIM_ConfigADCTrig\n
1928 * ADC4R ADC4TDC4 LL_HRTIM_ConfigADCTrig\n
1929 * ADC4R ADC4TDPER LL_HRTIM_ConfigADCTrig\n
1930 * ADC4R ADC4TDRST LL_HRTIM_ConfigADCTrig\n
1931 * ADC4R ADC4TEC2 LL_HRTIM_ConfigADCTrig\n
1932 * ADC4R ADC4TEC3 LL_HRTIM_ConfigADCTrig\n
1933 * ADC4R ADC4TEC4 LL_HRTIM_ConfigADCTrig\n
1934 * ADC4R ADC4TERST LL_HRTIM_ConfigADCTrig
1935 * @param HRTIMx High Resolution Timer instance
1936 * @param ADCTrig This parameter can be one of the following values:
1937 * @arg @ref LL_HRTIM_ADCTRIG_1
1938 * @arg @ref LL_HRTIM_ADCTRIG_2
1939 * @arg @ref LL_HRTIM_ADCTRIG_3
1940 * @arg @ref LL_HRTIM_ADCTRIG_4
1941 * @param Update This parameter can be one of the following values:
1942 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_MASTER
1943 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_A
1944 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_B
1945 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_C
1946 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_D
1947 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_E
1948 * @param Src This parameter can be a combination of the following values:
1949 *
1950 * For ADC trigger 1 and ADC trigger 3:
1951 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_NONE
1952 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP1
1953 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP2
1954 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP3
1955 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP4
1956 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MPER
1957 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP2
1958 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP3
1959 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP4
1960 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMAPER
1961 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV1
1962 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV2
1963 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV3
1964 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV4
1965 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV5
1966 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMARST
1967 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP2
1968 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP3
1969 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP4
1970 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBPER
1971 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBRST
1972 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP2
1973 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP3
1974 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP4
1975 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCPER
1976 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP2
1977 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP3
1978 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP4
1979 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDPER
1980 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP2
1981 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP3
1982 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP4
1983 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMEPER
1984 *
1985 * For ADC trigger 2 and ADC trigger 4:
1986 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_NONE
1987 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP1
1988 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP2
1989 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP3
1990 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP4
1991 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MPER
1992 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV6
1993 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV7
1994 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV8
1995 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV9
1996 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV10
1997 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP2
1998 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP3
1999 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP4
2000 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMAPER
2001 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP2
2002 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP3
2003 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP4
2004 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBPER
2005 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP2
2006 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP3
2007 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP4
2008 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCPER
2009 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCRST
2010 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP2
2011 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP3
2012 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP4
2013 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDPER
2014 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDRST
2015 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP2
2016 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP3
2017 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP4
2018 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMERST
2019 * @retval None
2020 */
2021 __STATIC_INLINE void LL_HRTIM_ConfigADCTrig(HRTIM_TypeDef *HRTIMx, uint32_t ADCTrig, uint32_t Update, uint32_t Src)
2022 {
2028 }
2030 /**
2031 * @brief Associate the ADCx trigger to a timer triggering the update of the HRTIM_ADCxR register.
2032 * @rmtoll CR1 ADC1USRC LL_HRTIM_SetADCTrigUpdate\n
2033 * CR1 ADC2USRC LL_HRTIM_SetADCTrigUpdate\n
2034 * CR1 ADC3USRC LL_HRTIM_SetADCTrigUpdate\n
2035 * CR1 ADC4USRC LL_HRTIM_SetADCTrigUpdate
2036 * @note When the preload is disabled in the source timer, the HRTIM_ADCxR
2037 * registers are not preloaded either: a write access will result in an
2038 * immediate update of the trigger source.
2039 * @param HRTIMx High Resolution Timer instance
2040 * @param ADCTrig This parameter can be one of the following values:
2041 * @arg @ref LL_HRTIM_ADCTRIG_1
2042 * @arg @ref LL_HRTIM_ADCTRIG_2
2043 * @arg @ref LL_HRTIM_ADCTRIG_3
2044 * @arg @ref LL_HRTIM_ADCTRIG_4
2045 * @param Update This parameter can be one of the following values:
2046 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_MASTER
2047 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_A
2048 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_B
2049 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_C
2050 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_D
2051 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_E
2052 * @retval None
2053 */
2054 __STATIC_INLINE void LL_HRTIM_SetADCTrigUpdate(HRTIM_TypeDef *HRTIMx, uint32_t ADCTrig, uint32_t Update)
2055 {
2058 }
2060 /**
2061 * @brief Get the source timer triggering the update of the HRTIM_ADCxR register.
2062 * @rmtoll CR1 ADC1USRC LL_HRTIM_GetADCTrigUpdate\n
2063 * CR1 ADC2USRC LL_HRTIM_GetADCTrigUpdate\n
2064 * CR1 ADC3USRC LL_HRTIM_GetADCTrigUpdate\n
2065 * CR1 ADC4USRC LL_HRTIM_GetADCTrigUpdate
2066 * @param HRTIMx High Resolution Timer instance
2067 * @param ADCTrig This parameter can be one of the following values:
2068 * @arg @ref LL_HRTIM_ADCTRIG_1
2069 * @arg @ref LL_HRTIM_ADCTRIG_2
2070 * @arg @ref LL_HRTIM_ADCTRIG_3
2071 * @arg @ref LL_HRTIM_ADCTRIG_4
2072 * @retval Update Returned value can be one of the following values:
2073 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_MASTER
2074 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_A
2075 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_B
2076 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_C
2077 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_D
2078 * @arg @ref LL_HRTIM_ADCTRIG_UPDATE_TIMER_E
2079 */
2081 {
2084 }
2086 /**
2087 * @brief Specify which events (timer events and/or external events) are used as triggers for ADC conversion.
2088 * @rmtoll ADC1R ADC1MC4 LL_HRTIM_SetADCTrigSrc\n
2089 * ADC1R ADC1MPER LL_HRTIM_SetADCTrigSrc\n
2090 * ADC1R ADC1EEV1 LL_HRTIM_SetADCTrigSrc\n
2091 * ADC1R ADC1EEV2 LL_HRTIM_SetADCTrigSrc\n
2092 * ADC1R ADC1EEV3 LL_HRTIM_SetADCTrigSrc\n
2093 * ADC1R ADC1EEV4 LL_HRTIM_SetADCTrigSrc\n
2094 * ADC1R ADC1EEV5 LL_HRTIM_SetADCTrigSrc\n
2095 * ADC1R ADC1TAC2 LL_HRTIM_SetADCTrigSrc\n
2096 * ADC1R ADC1TAC3 LL_HRTIM_SetADCTrigSrc\n
2097 * ADC1R ADC1TAC4 LL_HRTIM_SetADCTrigSrc\n
2098 * ADC1R ADC1TAPER LL_HRTIM_SetADCTrigSrc\n
2099 * ADC1R ADC1TARST LL_HRTIM_SetADCTrigSrc\n
2100 * ADC1R ADC1TBC2 LL_HRTIM_SetADCTrigSrc\n
2101 * ADC1R ADC1TBC3 LL_HRTIM_SetADCTrigSrc\n
2102 * ADC1R ADC1TBC4 LL_HRTIM_SetADCTrigSrc\n
2103 * ADC1R ADC1TBPER LL_HRTIM_SetADCTrigSrc\n
2104 * ADC1R ADC1TBRST LL_HRTIM_SetADCTrigSrc\n
2105 * ADC1R ADC1TCC2 LL_HRTIM_SetADCTrigSrc\n
2106 * ADC1R ADC1TCC3 LL_HRTIM_SetADCTrigSrc\n
2107 * ADC1R ADC1TCC4 LL_HRTIM_SetADCTrigSrc\n
2108 * ADC1R ADC1TCPER LL_HRTIM_SetADCTrigSrc\n
2109 * ADC1R ADC1TDC2 LL_HRTIM_SetADCTrigSrc\n
2110 * ADC1R ADC1TDC3 LL_HRTIM_SetADCTrigSrc\n
2111 * ADC1R ADC1TDC4 LL_HRTIM_SetADCTrigSrc\n
2112 * ADC1R ADC1TDPER LL_HRTIM_SetADCTrigSrc\n
2113 * ADC1R ADC1TEC2 LL_HRTIM_SetADCTrigSrc\n
2114 * ADC1R ADC1TEC3 LL_HRTIM_SetADCTrigSrc\n
2115 * ADC1R ADC1TEC4 LL_HRTIM_SetADCTrigSrc\n
2116 * ADC1R ADC1TEPER LL_HRTIM_SetADCTrigSrc\n
2117 * ADC2R ADC2MC1 LL_HRTIM_SetADCTrigSrc\n
2118 * ADC2R ADC2MC2 LL_HRTIM_SetADCTrigSrc\n
2119 * ADC2R ADC2MC3 LL_HRTIM_SetADCTrigSrc\n
2120 * ADC2R ADC2MC4 LL_HRTIM_SetADCTrigSrc\n
2121 * ADC2R ADC2MPER LL_HRTIM_SetADCTrigSrc\n
2122 * ADC2R ADC2EEV6 LL_HRTIM_SetADCTrigSrc\n
2123 * ADC2R ADC2EEV7 LL_HRTIM_SetADCTrigSrc\n
2124 * ADC2R ADC2EEV8 LL_HRTIM_SetADCTrigSrc\n
2125 * ADC2R ADC2EEV9 LL_HRTIM_SetADCTrigSrc\n
2126 * ADC2R ADC2EEV10 LL_HRTIM_SetADCTrigSrc\n
2127 * ADC2R ADC2TAC2 LL_HRTIM_SetADCTrigSrc\n
2128 * ADC2R ADC2TAC3 LL_HRTIM_SetADCTrigSrc\n
2129 * ADC2R ADC2TAC4 LL_HRTIM_SetADCTrigSrc\n
2130 * ADC2R ADC2TAPER LL_HRTIM_SetADCTrigSrc\n
2131 * ADC2R ADC2TBC2 LL_HRTIM_SetADCTrigSrc\n
2132 * ADC2R ADC2TBC3 LL_HRTIM_SetADCTrigSrc\n
2133 * ADC2R ADC2TBC4 LL_HRTIM_SetADCTrigSrc\n
2134 * ADC2R ADC2TBPER LL_HRTIM_SetADCTrigSrc\n
2135 * ADC2R ADC2TCC2 LL_HRTIM_SetADCTrigSrc\n
2136 * ADC2R ADC2TCC3 LL_HRTIM_SetADCTrigSrc\n
2137 * ADC2R ADC2TCC4 LL_HRTIM_SetADCTrigSrc\n
2138 * ADC2R ADC2TCPER LL_HRTIM_SetADCTrigSrc\n
2139 * ADC2R ADC2TCRST LL_HRTIM_SetADCTrigSrc\n
2140 * ADC2R ADC2TDC2 LL_HRTIM_SetADCTrigSrc\n
2141 * ADC2R ADC2TDC3 LL_HRTIM_SetADCTrigSrc\n
2142 * ADC2R ADC2TDC4 LL_HRTIM_SetADCTrigSrc\n
2143 * ADC2R ADC2TDPER LL_HRTIM_SetADCTrigSrc\n
2144 * ADC2R ADC2TDRST LL_HRTIM_SetADCTrigSrc\n
2145 * ADC2R ADC2TEC2 LL_HRTIM_SetADCTrigSrc\n
2146 * ADC2R ADC2TEC3 LL_HRTIM_SetADCTrigSrc\n
2147 * ADC2R ADC2TEC4 LL_HRTIM_SetADCTrigSrc\n
2148 * ADC2R ADC2TERST LL_HRTIM_SetADCTrigSrc\n
2149 * ADC3R ADC3MC1 LL_HRTIM_SetADCTrigSrc\n
2150 * ADC3R ADC3MC2 LL_HRTIM_SetADCTrigSrc\n
2151 * ADC3R ADC3MC3 LL_HRTIM_SetADCTrigSrc\n
2152 * ADC3R ADC3MC4 LL_HRTIM_SetADCTrigSrc\n
2153 * ADC3R ADC3MPER LL_HRTIM_SetADCTrigSrc\n
2154 * ADC3R ADC3EEV1 LL_HRTIM_SetADCTrigSrc\n
2155 * ADC3R ADC3EEV2 LL_HRTIM_SetADCTrigSrc\n
2156 * ADC3R ADC3EEV3 LL_HRTIM_SetADCTrigSrc\n
2157 * ADC3R ADC3EEV4 LL_HRTIM_SetADCTrigSrc\n
2158 * ADC3R ADC3EEV5 LL_HRTIM_SetADCTrigSrc\n
2159 * ADC3R ADC3TAC2 LL_HRTIM_SetADCTrigSrc\n
2160 * ADC3R ADC3TAC3 LL_HRTIM_SetADCTrigSrc\n
2161 * ADC3R ADC3TAC4 LL_HRTIM_SetADCTrigSrc\n
2162 * ADC3R ADC3TAPER LL_HRTIM_SetADCTrigSrc\n
2163 * ADC3R ADC3TARST LL_HRTIM_SetADCTrigSrc\n
2164 * ADC3R ADC3TBC2 LL_HRTIM_SetADCTrigSrc\n
2165 * ADC3R ADC3TBC3 LL_HRTIM_SetADCTrigSrc\n
2166 * ADC3R ADC3TBC4 LL_HRTIM_SetADCTrigSrc\n
2167 * ADC3R ADC3TBPER LL_HRTIM_SetADCTrigSrc\n
2168 * ADC3R ADC3TBRST LL_HRTIM_SetADCTrigSrc\n
2169 * ADC3R ADC3TCC2 LL_HRTIM_SetADCTrigSrc\n
2170 * ADC3R ADC3TCC3 LL_HRTIM_SetADCTrigSrc\n
2171 * ADC3R ADC3TCC4 LL_HRTIM_SetADCTrigSrc\n
2172 * ADC3R ADC3TCPER LL_HRTIM_SetADCTrigSrc\n
2173 * ADC3R ADC3TDC2 LL_HRTIM_SetADCTrigSrc\n
2174 * ADC3R ADC3TDC3 LL_HRTIM_SetADCTrigSrc\n
2175 * ADC3R ADC3TDC4 LL_HRTIM_SetADCTrigSrc\n
2176 * ADC3R ADC3TDPER LL_HRTIM_SetADCTrigSrc\n
2177 * ADC3R ADC3TEC2 LL_HRTIM_SetADCTrigSrc\n
2178 * ADC3R ADC3TEC3 LL_HRTIM_SetADCTrigSrc\n
2179 * ADC3R ADC3TEC4 LL_HRTIM_SetADCTrigSrc\n
2180 * ADC3R ADC3TEPER LL_HRTIM_SetADCTrigSrc\n
2181 * ADC4R ADC4MC1 LL_HRTIM_SetADCTrigSrc\n
2182 * ADC4R ADC4MC2 LL_HRTIM_SetADCTrigSrc\n
2183 * ADC4R ADC4MC3 LL_HRTIM_SetADCTrigSrc\n
2184 * ADC4R ADC4MC4 LL_HRTIM_SetADCTrigSrc\n
2185 * ADC4R ADC4MPER LL_HRTIM_SetADCTrigSrc\n
2186 * ADC4R ADC4EEV6 LL_HRTIM_SetADCTrigSrc\n
2187 * ADC4R ADC4EEV7 LL_HRTIM_SetADCTrigSrc\n
2188 * ADC4R ADC4EEV8 LL_HRTIM_SetADCTrigSrc\n
2189 * ADC4R ADC4EEV9 LL_HRTIM_SetADCTrigSrc\n
2190 * ADC4R ADC4EEV10 LL_HRTIM_SetADCTrigSrc\n
2191 * ADC4R ADC4TAC2 LL_HRTIM_SetADCTrigSrc\n
2192 * ADC4R ADC4TAC3 LL_HRTIM_SetADCTrigSrc\n
2193 * ADC4R ADC4TAC4 LL_HRTIM_SetADCTrigSrc\n
2194 * ADC4R ADC4TAPER LL_HRTIM_SetADCTrigSrc\n
2195 * ADC4R ADC4TBC2 LL_HRTIM_SetADCTrigSrc\n
2196 * ADC4R ADC4TBC3 LL_HRTIM_SetADCTrigSrc\n
2197 * ADC4R ADC4TBC4 LL_HRTIM_SetADCTrigSrc\n
2198 * ADC4R ADC4TBPER LL_HRTIM_SetADCTrigSrc\n
2199 * ADC4R ADC4TCC2 LL_HRTIM_SetADCTrigSrc\n
2200 * ADC4R ADC4TCC3 LL_HRTIM_SetADCTrigSrc\n
2201 * ADC4R ADC4TCC4 LL_HRTIM_SetADCTrigSrc\n
2202 * ADC4R ADC4TCPER LL_HRTIM_SetADCTrigSrc\n
2203 * ADC4R ADC4TCRST LL_HRTIM_SetADCTrigSrc\n
2204 * ADC4R ADC4TDC2 LL_HRTIM_SetADCTrigSrc\n
2205 * ADC4R ADC4TDC3 LL_HRTIM_SetADCTrigSrc\n
2206 * ADC4R ADC4TDC4 LL_HRTIM_SetADCTrigSrc\n
2207 * ADC4R ADC4TDPER LL_HRTIM_SetADCTrigSrc\n
2208 * ADC4R ADC4TDRST LL_HRTIM_SetADCTrigSrc\n
2209 * ADC4R ADC4TEC2 LL_HRTIM_SetADCTrigSrc\n
2210 * ADC4R ADC4TEC3 LL_HRTIM_SetADCTrigSrc\n
2211 * ADC4R ADC4TEC4 LL_HRTIM_SetADCTrigSrc\n
2212 * ADC4R ADC4TERST LL_HRTIM_SetADCTrigSrc
2213 * @param HRTIMx High Resolution Timer instance
2214 * @param ADCTrig This parameter can be one of the following values:
2215 * @arg @ref LL_HRTIM_ADCTRIG_1
2216 * @arg @ref LL_HRTIM_ADCTRIG_2
2217 * @arg @ref LL_HRTIM_ADCTRIG_3
2218 * @arg @ref LL_HRTIM_ADCTRIG_4
2219 * @param Src This parameter can be a combination of the following values:
2220 *
2221 * For ADC trigger 1 and ADC trigger 3:
2222 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_NONE
2223 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP1
2224 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP2
2225 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP3
2226 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP4
2227 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MPER
2228 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP2
2229 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP3
2230 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP4
2231 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMAPER
2232 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV1
2233 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV2
2234 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV3
2235 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV4
2236 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV5
2237 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMARST
2238 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP2
2239 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP3
2240 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP4
2241 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBPER
2242 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBRST
2243 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP2
2244 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP3
2245 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP4
2246 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCPER
2247 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP2
2248 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP3
2249 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP4
2250 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDPER
2251 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP2
2252 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP3
2253 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP4
2254 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMEPER
2255 *
2256 * For ADC trigger 2 and ADC trigger 4:
2257 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_NONE
2258 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP1
2259 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP2
2260 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP3
2261 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP4
2262 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MPER
2263 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV6
2264 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV7
2265 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV8
2266 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV9
2267 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV10
2268 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP2
2269 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP3
2270 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP4
2271 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMAPER
2272 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP2
2273 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP3
2274 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP4
2275 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBPER
2276 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP2
2277 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP3
2278 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP4
2279 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCPER
2280 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCRST
2281 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP2
2282 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP3
2283 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP4
2284 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDPER
2285 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDRST
2286 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP2
2287 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP3
2288 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP4
2289 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMERST
2290 * @retval None
2291 */
2292 __STATIC_INLINE void LL_HRTIM_SetADCTrigSrc(HRTIM_TypeDef *HRTIMx, uint32_t ADCTrig, uint32_t Src)
2293 {
2297 }
2299 /**
2300 * @brief Indicate which events (timer events and/or external events) are currently used as triggers for ADC conversion.
2301 * @rmtoll ADC1R ADC1MC4 LL_HRTIM_GetADCTrigSrc\n
2302 * ADC1R ADC1MPER LL_HRTIM_GetADCTrigSrc\n
2303 * ADC1R ADC1EEV1 LL_HRTIM_GetADCTrigSrc\n
2304 * ADC1R ADC1EEV2 LL_HRTIM_GetADCTrigSrc\n
2305 * ADC1R ADC1EEV3 LL_HRTIM_GetADCTrigSrc\n
2306 * ADC1R ADC1EEV4 LL_HRTIM_GetADCTrigSrc\n
2307 * ADC1R ADC1EEV5 LL_HRTIM_GetADCTrigSrc\n
2308 * ADC1R ADC1TAC2 LL_HRTIM_GetADCTrigSrc\n
2309 * ADC1R ADC1TAC3 LL_HRTIM_GetADCTrigSrc\n
2310 * ADC1R ADC1TAC4 LL_HRTIM_GetADCTrigSrc\n
2311 * ADC1R ADC1TAPER LL_HRTIM_GetADCTrigSrc\n
2312 * ADC1R ADC1TARST LL_HRTIM_GetADCTrigSrc\n
2313 * ADC1R ADC1TBC2 LL_HRTIM_GetADCTrigSrc\n
2314 * ADC1R ADC1TBC3 LL_HRTIM_GetADCTrigSrc\n
2315 * ADC1R ADC1TBC4 LL_HRTIM_GetADCTrigSrc\n
2316 * ADC1R ADC1TBPER LL_HRTIM_GetADCTrigSrc\n
2317 * ADC1R ADC1TBRST LL_HRTIM_GetADCTrigSrc\n
2318 * ADC1R ADC1TCC2 LL_HRTIM_GetADCTrigSrc\n
2319 * ADC1R ADC1TCC3 LL_HRTIM_GetADCTrigSrc\n
2320 * ADC1R ADC1TCC4 LL_HRTIM_GetADCTrigSrc\n
2321 * ADC1R ADC1TCPER LL_HRTIM_GetADCTrigSrc\n
2322 * ADC1R ADC1TDC2 LL_HRTIM_GetADCTrigSrc\n
2323 * ADC1R ADC1TDC3 LL_HRTIM_GetADCTrigSrc\n
2324 * ADC1R ADC1TDC4 LL_HRTIM_GetADCTrigSrc\n
2325 * ADC1R ADC1TDPER LL_HRTIM_GetADCTrigSrc\n
2326 * ADC1R ADC1TEC2 LL_HRTIM_GetADCTrigSrc\n
2327 * ADC1R ADC1TEC3 LL_HRTIM_GetADCTrigSrc\n
2328 * ADC1R ADC1TEC4 LL_HRTIM_GetADCTrigSrc\n
2329 * ADC1R ADC1TEPER LL_HRTIM_GetADCTrigSrc\n
2330 * ADC2R ADC2MC1 LL_HRTIM_GetADCTrigSrc\n
2331 * ADC2R ADC2MC2 LL_HRTIM_GetADCTrigSrc\n
2332 * ADC2R ADC2MC3 LL_HRTIM_GetADCTrigSrc\n
2333 * ADC2R ADC2MC4 LL_HRTIM_GetADCTrigSrc\n
2334 * ADC2R ADC2MPER LL_HRTIM_GetADCTrigSrc\n
2335 * ADC2R ADC2EEV6 LL_HRTIM_GetADCTrigSrc\n
2336 * ADC2R ADC2EEV7 LL_HRTIM_GetADCTrigSrc\n
2337 * ADC2R ADC2EEV8 LL_HRTIM_GetADCTrigSrc\n
2338 * ADC2R ADC2EEV9 LL_HRTIM_GetADCTrigSrc\n
2339 * ADC2R ADC2EEV10 LL_HRTIM_GetADCTrigSrc\n
2340 * ADC2R ADC2TAC2 LL_HRTIM_GetADCTrigSrc\n
2341 * ADC2R ADC2TAC3 LL_HRTIM_GetADCTrigSrc\n
2342 * ADC2R ADC2TAC4 LL_HRTIM_GetADCTrigSrc\n
2343 * ADC2R ADC2TAPER LL_HRTIM_GetADCTrigSrc\n
2344 * ADC2R ADC2TBC2 LL_HRTIM_GetADCTrigSrc\n
2345 * ADC2R ADC2TBC3 LL_HRTIM_GetADCTrigSrc\n
2346 * ADC2R ADC2TBC4 LL_HRTIM_GetADCTrigSrc\n
2347 * ADC2R ADC2TBPER LL_HRTIM_GetADCTrigSrc\n
2348 * ADC2R ADC2TCC2 LL_HRTIM_GetADCTrigSrc\n
2349 * ADC2R ADC2TCC3 LL_HRTIM_GetADCTrigSrc\n
2350 * ADC2R ADC2TCC4 LL_HRTIM_GetADCTrigSrc\n
2351 * ADC2R ADC2TCPER LL_HRTIM_GetADCTrigSrc\n
2352 * ADC2R ADC2TCRST LL_HRTIM_GetADCTrigSrc\n
2353 * ADC2R ADC2TDC2 LL_HRTIM_GetADCTrigSrc\n
2354 * ADC2R ADC2TDC3 LL_HRTIM_GetADCTrigSrc\n
2355 * ADC2R ADC2TDC4 LL_HRTIM_GetADCTrigSrc\n
2356 * ADC2R ADC2TDPER LL_HRTIM_GetADCTrigSrc\n
2357 * ADC2R ADC2TDRST LL_HRTIM_GetADCTrigSrc\n
2358 * ADC2R ADC2TEC2 LL_HRTIM_GetADCTrigSrc\n
2359 * ADC2R ADC2TEC3 LL_HRTIM_GetADCTrigSrc\n
2360 * ADC2R ADC2TEC4 LL_HRTIM_GetADCTrigSrc\n
2361 * ADC2R ADC2TERST LL_HRTIM_GetADCTrigSrc\n
2362 * ADC3R ADC3MC1 LL_HRTIM_GetADCTrigSrc\n
2363 * ADC3R ADC3MC2 LL_HRTIM_GetADCTrigSrc\n
2364 * ADC3R ADC3MC3 LL_HRTIM_GetADCTrigSrc\n
2365 * ADC3R ADC3MC4 LL_HRTIM_GetADCTrigSrc\n
2366 * ADC3R ADC3MPER LL_HRTIM_GetADCTrigSrc\n
2367 * ADC3R ADC3EEV1 LL_HRTIM_GetADCTrigSrc\n
2368 * ADC3R ADC3EEV2 LL_HRTIM_GetADCTrigSrc\n
2369 * ADC3R ADC3EEV3 LL_HRTIM_GetADCTrigSrc\n
2370 * ADC3R ADC3EEV4 LL_HRTIM_GetADCTrigSrc\n
2371 * ADC3R ADC3EEV5 LL_HRTIM_GetADCTrigSrc\n
2372 * ADC3R ADC3TAC2 LL_HRTIM_GetADCTrigSrc\n
2373 * ADC3R ADC3TAC3 LL_HRTIM_GetADCTrigSrc\n
2374 * ADC3R ADC3TAC4 LL_HRTIM_GetADCTrigSrc\n
2375 * ADC3R ADC3TAPER LL_HRTIM_GetADCTrigSrc\n
2376 * ADC3R ADC3TARST LL_HRTIM_GetADCTrigSrc\n
2377 * ADC3R ADC3TBC2 LL_HRTIM_GetADCTrigSrc\n
2378 * ADC3R ADC3TBC3 LL_HRTIM_GetADCTrigSrc\n
2379 * ADC3R ADC3TBC4 LL_HRTIM_GetADCTrigSrc\n
2380 * ADC3R ADC3TBPER LL_HRTIM_GetADCTrigSrc\n
2381 * ADC3R ADC3TBRST LL_HRTIM_GetADCTrigSrc\n
2382 * ADC3R ADC3TCC2 LL_HRTIM_GetADCTrigSrc\n
2383 * ADC3R ADC3TCC3 LL_HRTIM_GetADCTrigSrc\n
2384 * ADC3R ADC3TCC4 LL_HRTIM_GetADCTrigSrc\n
2385 * ADC3R ADC3TCPER LL_HRTIM_GetADCTrigSrc\n
2386 * ADC3R ADC3TDC2 LL_HRTIM_GetADCTrigSrc\n
2387 * ADC3R ADC3TDC3 LL_HRTIM_GetADCTrigSrc\n
2388 * ADC3R ADC3TDC4 LL_HRTIM_GetADCTrigSrc\n
2389 * ADC3R ADC3TDPER LL_HRTIM_GetADCTrigSrc\n
2390 * ADC3R ADC3TEC2 LL_HRTIM_GetADCTrigSrc\n
2391 * ADC3R ADC3TEC3 LL_HRTIM_GetADCTrigSrc\n
2392 * ADC3R ADC3TEC4 LL_HRTIM_GetADCTrigSrc\n
2393 * ADC3R ADC3TEPER LL_HRTIM_GetADCTrigSrc\n
2394 * ADC4R ADC4MC1 LL_HRTIM_GetADCTrigSrc\n
2395 * ADC4R ADC4MC2 LL_HRTIM_GetADCTrigSrc\n
2396 * ADC4R ADC4MC3 LL_HRTIM_GetADCTrigSrc\n
2397 * ADC4R ADC4MC4 LL_HRTIM_GetADCTrigSrc\n
2398 * ADC4R ADC4MPER LL_HRTIM_GetADCTrigSrc\n
2399 * ADC4R ADC4EEV6 LL_HRTIM_GetADCTrigSrc\n
2400 * ADC4R ADC4EEV7 LL_HRTIM_GetADCTrigSrc\n
2401 * ADC4R ADC4EEV8 LL_HRTIM_GetADCTrigSrc\n
2402 * ADC4R ADC4EEV9 LL_HRTIM_GetADCTrigSrc\n
2403 * ADC4R ADC4EEV10 LL_HRTIM_GetADCTrigSrc\n
2404 * ADC4R ADC4TAC2 LL_HRTIM_GetADCTrigSrc\n
2405 * ADC4R ADC4TAC3 LL_HRTIM_GetADCTrigSrc\n
2406 * ADC4R ADC4TAC4 LL_HRTIM_GetADCTrigSrc\n
2407 * ADC4R ADC4TAPER LL_HRTIM_GetADCTrigSrc\n
2408 * ADC4R ADC4TBC2 LL_HRTIM_GetADCTrigSrc\n
2409 * ADC4R ADC4TBC3 LL_HRTIM_GetADCTrigSrc\n
2410 * ADC4R ADC4TBC4 LL_HRTIM_GetADCTrigSrc\n
2411 * ADC4R ADC4TBPER LL_HRTIM_GetADCTrigSrc\n
2412 * ADC4R ADC4TCC2 LL_HRTIM_GetADCTrigSrc\n
2413 * ADC4R ADC4TCC3 LL_HRTIM_GetADCTrigSrc\n
2414 * ADC4R ADC4TCC4 LL_HRTIM_GetADCTrigSrc\n
2415 * ADC4R ADC4TCPER LL_HRTIM_GetADCTrigSrc\n
2416 * ADC4R ADC4TCRST LL_HRTIM_GetADCTrigSrc\n
2417 * ADC4R ADC4TDC2 LL_HRTIM_GetADCTrigSrc\n
2418 * ADC4R ADC4TDC3 LL_HRTIM_GetADCTrigSrc\n
2419 * ADC4R ADC4TDC4 LL_HRTIM_GetADCTrigSrc\n
2420 * ADC4R ADC4TDPER LL_HRTIM_GetADCTrigSrc\n
2421 * ADC4R ADC4TDRST LL_HRTIM_GetADCTrigSrc\n
2422 * ADC4R ADC4TEC2 LL_HRTIM_GetADCTrigSrc\n
2423 * ADC4R ADC4TEC3 LL_HRTIM_GetADCTrigSrc\n
2424 * ADC4R ADC4TEC4 LL_HRTIM_GetADCTrigSrc\n
2425 * ADC4R ADC4TERST LL_HRTIM_GetADCTrigSrc
2426 * @param HRTIMx High Resolution Timer instance
2427 * @param ADCTrig This parameter can be one of the following values:
2428 * @arg @ref LL_HRTIM_ADCTRIG_1
2429 * @arg @ref LL_HRTIM_ADCTRIG_2
2430 * @arg @ref LL_HRTIM_ADCTRIG_3
2431 * @arg @ref LL_HRTIM_ADCTRIG_4
2432 * @retval Src This parameter can be a combination of the following values:
2433 *
2434 * For ADC trigger 1 and ADC trigger 3:
2435 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_NONE
2436 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP1
2437 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP2
2438 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP3
2439 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MCMP4
2440 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_MPER
2441 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP2
2442 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP3
2443 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMACMP4
2444 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMAPER
2445 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV1
2446 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV2
2447 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV3
2448 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV4
2449 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_EEV5
2450 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMARST
2451 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP2
2452 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP3
2453 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBCMP4
2454 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBPER
2455 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMBRST
2456 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP2
2457 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP3
2458 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCCMP4
2459 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMCPER
2460 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP2
2461 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP3
2462 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDCMP4
2463 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMDPER
2464 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP2
2465 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP3
2466 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMECMP4
2467 * @arg @ref LL_HRTIM_ADCTRIG_SRC13_TIMEPER
2468 *
2469 * For ADC trigger 2 and ADC trigger 4:
2470 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_NONE
2471 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP1
2472 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP2
2473 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP3
2474 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MCMP4
2475 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_MPER
2476 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV6
2477 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV7
2478 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV8
2479 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV9
2480 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_EEV10
2481 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP2
2482 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP3
2483 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMACMP4
2484 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMAPER
2485 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP2
2486 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP3
2487 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBCMP4
2488 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMBPER
2489 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP2
2490 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP3
2491 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCCMP4
2492 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCPER
2493 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMCRST
2494 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP2
2495 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP3
2496 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDCMP4
2497 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDPER
2498 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMDRST
2499 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP2
2500 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP3
2501 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMECMP4
2502 * @arg @ref LL_HRTIM_ADCTRIG_SRC24_TIMERST
2503 */
2505 {
2509 }
2511 /**
2512 * @brief Configure the DLL calibration mode.
2513 * @rmtoll DLLCR CALEN LL_HRTIM_ConfigDLLCalibration\n
2514 * DLLCR CALRTE LL_HRTIM_ConfigDLLCalibration
2515 * @param HRTIMx High Resolution Timer instance
2516 * @param Mode This parameter can be one of the following values:
2517 * @arg @ref LL_HRTIM_DLLCALIBRATION_MODE_SINGLESHOT
2518 * @arg @ref LL_HRTIM_DLLCALIBRATION_MODE_CONTINUOUS
2519 * @param Period This parameter can be one of the following values:
2520 * @arg @ref LL_HRTIM_DLLCALIBRATION_RATE_7300
2521 * @arg @ref LL_HRTIM_DLLCALIBRATION_RATE_910
2522 * @arg @ref LL_HRTIM_DLLCALIBRATION_RATE_114
2523 * @arg @ref LL_HRTIM_DLLCALIBRATION_RATE_14
2524 * @retval None
2525 */
2526 __STATIC_INLINE void LL_HRTIM_ConfigDLLCalibration(HRTIM_TypeDef *HRTIMx, uint32_t Mode, uint32_t Period)
2527 {
2528 MODIFY_REG(HRTIMx->sCommonRegs.DLLCR, (HRTIM_DLLCR_CALEN | HRTIM_DLLCR_CALRTE), (Mode | Period));
2529 }
2531 /**
2532 * @brief Launch DLL calibration
2533 * @rmtoll DLLCR CAL LL_HRTIM_StartDLLCalibration
2534 * @param HRTIMx High Resolution Timer instance
2535 * @retval None
2536 */
2538 {
2540 }
2542 /**
2543 * @}
2544 */
2546 /** @defgroup HRTIM_EF_HRTIM_Timer_Control HRTIM_Timer_Control
2547 * @{
2548 */
2550 /**
2551 * @brief Enable timer(s) counter.
2552 * @rmtoll MDIER TECEN LL_HRTIM_TIM_CounterEnable\n
2553 * MDIER TDCEN LL_HRTIM_TIM_CounterEnable\n
2554 * MDIER TCCEN LL_HRTIM_TIM_CounterEnable\n
2555 * MDIER TBCEN LL_HRTIM_TIM_CounterEnable\n
2556 * MDIER TACEN LL_HRTIM_TIM_CounterEnable\n
2557 * MDIER MCEN LL_HRTIM_TIM_CounterEnable
2558 * @param HRTIMx High Resolution Timer instance
2559 * @param Timers This parameter can be a combination of the following values:
2560 * @arg @ref LL_HRTIM_TIMER_MASTER
2561 * @arg @ref LL_HRTIM_TIMER_A
2562 * @arg @ref LL_HRTIM_TIMER_B
2563 * @arg @ref LL_HRTIM_TIMER_C
2564 * @arg @ref LL_HRTIM_TIMER_D
2565 * @arg @ref LL_HRTIM_TIMER_E
2566 * @retval None
2567 */
2569 {
2571 }
2573 /**
2574 * @brief Disable timer(s) counter.
2575 * @rmtoll MDIER TECEN LL_HRTIM_TIM_CounterDisable\n
2576 * MDIER TDCEN LL_HRTIM_TIM_CounterDisable\n
2577 * MDIER TCCEN LL_HRTIM_TIM_CounterDisable\n
2578 * MDIER TBCEN LL_HRTIM_TIM_CounterDisable\n
2579 * MDIER TACEN LL_HRTIM_TIM_CounterDisable\n
2580 * MDIER MCEN LL_HRTIM_TIM_CounterDisable
2581 * @param HRTIMx High Resolution Timer instance
2582 * @param Timers This parameter can be a combination of the following values:
2583 * @arg @ref LL_HRTIM_TIMER_MASTER
2584 * @arg @ref LL_HRTIM_TIMER_A
2585 * @arg @ref LL_HRTIM_TIMER_B
2586 * @arg @ref LL_HRTIM_TIMER_C
2587 * @arg @ref LL_HRTIM_TIMER_D
2588 * @arg @ref LL_HRTIM_TIMER_E
2589 * @retval None
2590 */
2592 {
2594 }
2596 /**
2597 * @brief Indicate whether the timer counter is enabled.
2598 * @rmtoll MDIER TECEN LL_HRTIM_TIM_IsCounterEnabled\n
2599 * MDIER TDCEN LL_HRTIM_TIM_IsCounterEnabled\n
2600 * MDIER TCCEN LL_HRTIM_TIM_IsCounterEnabled\n
2601 * MDIER TBCEN LL_HRTIM_TIM_IsCounterEnabled\n
2602 * MDIER TACEN LL_HRTIM_TIM_IsCounterEnabled\n
2603 * MDIER MCEN LL_HRTIM_TIM_IsCounterEnabled
2604 * @param HRTIMx High Resolution Timer instance
2605 * @param Timer This parameter can be one of the following values:
2606 * @arg @ref LL_HRTIM_TIMER_MASTER
2607 * @arg @ref LL_HRTIM_TIMER_A
2608 * @arg @ref LL_HRTIM_TIMER_B
2609 * @arg @ref LL_HRTIM_TIMER_C
2610 * @arg @ref LL_HRTIM_TIMER_D
2611 * @arg @ref LL_HRTIM_TIMER_E
2612 * @retval State of MCEN or TxCEN bit HRTIM_MCR register (1 or 0).
2613 */
2615 {
2617 }
2619 /**
2620 * @brief Set the timer clock prescaler ratio.
2621 * @rmtoll MCR CKPSC LL_HRTIM_TIM_SetPrescaler\n
2622 * TIMxCR CKPSC LL_HRTIM_TIM_SetPrescaler
2623 * @note The counter clock equivalent frequency (CK_CNT) is equal to fHRCK / 2^CKPSC[2:0].
2624 * @note The prescaling ratio cannot be modified once the timer counter is enabled.
2625 * @param HRTIMx High Resolution Timer instance
2626 * @param Timer This parameter can be one of the following values:
2627 * @arg @ref LL_HRTIM_TIMER_MASTER
2628 * @arg @ref LL_HRTIM_TIMER_A
2629 * @arg @ref LL_HRTIM_TIMER_B
2630 * @arg @ref LL_HRTIM_TIMER_C
2631 * @arg @ref LL_HRTIM_TIMER_D
2632 * @arg @ref LL_HRTIM_TIMER_E
2633 * @param Prescaler This parameter can be one of the following values:
2634 * @arg @ref LL_HRTIM_PRESCALERRATIO_MUL32
2635 * @arg @ref LL_HRTIM_PRESCALERRATIO_MUL16
2636 * @arg @ref LL_HRTIM_PRESCALERRATIO_MUL8
2637 * @arg @ref LL_HRTIM_PRESCALERRATIO_MUL4
2638 * @arg @ref LL_HRTIM_PRESCALERRATIO_MUL2
2639 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV1
2640 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV2
2641 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV4
2642 * @retval None
2643 */
2644 __STATIC_INLINE void LL_HRTIM_TIM_SetPrescaler(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Prescaler)
2645 {
2647 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2649 }
2651 /**
2652 * @brief Get the timer clock prescaler ratio
2653 * @rmtoll MCR CKPSC LL_HRTIM_TIM_GetPrescaler\n
2654 * TIMxCR CKPSC LL_HRTIM_TIM_GetPrescaler
2655 * @param HRTIMx High Resolution Timer instance
2656 * @param Timer This parameter can be one of the following values:
2657 * @arg @ref LL_HRTIM_TIMER_MASTER
2658 * @arg @ref LL_HRTIM_TIMER_A
2659 * @arg @ref LL_HRTIM_TIMER_B
2660 * @arg @ref LL_HRTIM_TIMER_C
2661 * @arg @ref LL_HRTIM_TIMER_D
2662 * @arg @ref LL_HRTIM_TIMER_E
2663 * @retval Prescaler Returned value can be one of the following values:
2664 * @arg @ref LL_HRTIM_PRESCALERRATIO_MUL32
2665 * @arg @ref LL_HRTIM_PRESCALERRATIO_MUL16
2666 * @arg @ref LL_HRTIM_PRESCALERRATIO_MUL8
2667 * @arg @ref LL_HRTIM_PRESCALERRATIO_MUL4
2668 * @arg @ref LL_HRTIM_PRESCALERRATIO_MUL2
2669 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV1
2670 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV2
2671 * @arg @ref LL_HRTIM_PRESCALERRATIO_DIV4
2672 */
2674 {
2676 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2678 }
2680 /**
2681 * @brief Set the counter operating mode mode (single-shot, continuous or re-triggerable).
2682 * @rmtoll MCR CONT LL_HRTIM_TIM_SetCounterMode\n
2683 * MCR RETRIG LL_HRTIM_TIM_SetCounterMode\n
2684 * TIMxCR CONT LL_HRTIM_TIM_SetCounterMode\n
2685 * TIMxCR RETRIG LL_HRTIM_TIM_SetCounterMode
2686 * @param HRTIMx High Resolution Timer instance
2687 * @param Timer This parameter can be one of the following values:
2688 * @arg @ref LL_HRTIM_TIMER_MASTER
2689 * @arg @ref LL_HRTIM_TIMER_A
2690 * @arg @ref LL_HRTIM_TIMER_B
2691 * @arg @ref LL_HRTIM_TIMER_C
2692 * @arg @ref LL_HRTIM_TIMER_D
2693 * @arg @ref LL_HRTIM_TIMER_E
2694 * @param Mode This parameter can be one of the following values:
2695 * @arg @ref LL_HRTIM_MODE_CONTINUOUS
2696 * @arg @ref LL_HRTIM_MODE_SINGLESHOT
2697 * @arg @ref LL_HRTIM_MODE_RETRIGGERABLE
2698 * @retval None
2699 */
2700 __STATIC_INLINE void LL_HRTIM_TIM_SetCounterMode(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Mode)
2701 {
2703 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2705 }
2707 /**
2708 * @brief Get the counter operating mode mode
2709 * @rmtoll MCR CONT LL_HRTIM_TIM_GetCounterMode\n
2710 * MCR RETRIG LL_HRTIM_TIM_GetCounterMode\n
2711 * TIMxCR CONT LL_HRTIM_TIM_GetCounterMode\n
2712 * TIMxCR RETRIG LL_HRTIM_TIM_GetCounterMode
2713 * @param HRTIMx High Resolution Timer instance
2714 * @param Timer This parameter can be one of the following values:
2715 * @arg @ref LL_HRTIM_TIMER_MASTER
2716 * @arg @ref LL_HRTIM_TIMER_A
2717 * @arg @ref LL_HRTIM_TIMER_B
2718 * @arg @ref LL_HRTIM_TIMER_C
2719 * @arg @ref LL_HRTIM_TIMER_D
2720 * @arg @ref LL_HRTIM_TIMER_E
2721 * @retval Mode Returned value can be one of the following values:
2722 * @arg @ref LL_HRTIM_MODE_CONTINUOUS
2723 * @arg @ref LL_HRTIM_MODE_SINGLESHOT
2724 * @arg @ref LL_HRTIM_MODE_RETRIGGERABLE
2725 */
2727 {
2729 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2731 }
2733 /**
2734 * @brief Enable the half duty-cycle mode.
2735 * @rmtoll MCR HALF LL_HRTIM_TIM_EnableHalfMode\n
2736 * TIMxCR HALF LL_HRTIM_TIM_EnableHalfMode
2737 * @note When the half mode is enabled, HRTIM_MCMP1R (or HRTIM_CMP1xR)
2738 * active register is automatically updated with HRTIM_MPER/2
2739 * (or HRTIM_PERxR/2) value when HRTIM_MPER (or HRTIM_PERxR) register is written.
2740 * @param HRTIMx High Resolution Timer instance
2741 * @param Timer This parameter can be one of the following values:
2742 * @arg @ref LL_HRTIM_TIMER_MASTER
2743 * @arg @ref LL_HRTIM_TIMER_A
2744 * @arg @ref LL_HRTIM_TIMER_B
2745 * @arg @ref LL_HRTIM_TIMER_C
2746 * @arg @ref LL_HRTIM_TIMER_D
2747 * @arg @ref LL_HRTIM_TIMER_E
2748 * @retval None
2749 */
2751 {
2753 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2755 }
2757 /**
2758 * @brief Disable the half duty-cycle mode.
2759 * @rmtoll MCR HALF LL_HRTIM_TIM_DisableHalfMode\n
2760 * TIMxCR HALF LL_HRTIM_TIM_DisableHalfMode
2761 * @param HRTIMx High Resolution Timer instance
2762 * @param Timer This parameter can be one of the following values:
2763 * @arg @ref LL_HRTIM_TIMER_MASTER
2764 * @arg @ref LL_HRTIM_TIMER_A
2765 * @arg @ref LL_HRTIM_TIMER_B
2766 * @arg @ref LL_HRTIM_TIMER_C
2767 * @arg @ref LL_HRTIM_TIMER_D
2768 * @arg @ref LL_HRTIM_TIMER_E
2769 * @retval None
2770 */
2772 {
2774 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2776 }
2778 /**
2779 * @brief Indicate whether half duty-cycle mode is enabled for a given timer.
2780 * @rmtoll MCR HALF LL_HRTIM_TIM_IsEnabledHalfMode\n
2781 * TIMxCR HALF LL_HRTIM_TIM_IsEnabledHalfMode
2782 * @param HRTIMx High Resolution Timer instance
2783 * @param Timer This parameter can be one of the following values:
2784 * @arg @ref LL_HRTIM_TIMER_MASTER
2785 * @arg @ref LL_HRTIM_TIMER_A
2786 * @arg @ref LL_HRTIM_TIMER_B
2787 * @arg @ref LL_HRTIM_TIMER_C
2788 * @arg @ref LL_HRTIM_TIMER_D
2789 * @arg @ref LL_HRTIM_TIMER_E
2790 * @retval State of HALF bit to 1 in HRTIM_MCR or HRTIM_TIMxCR register (1 or 0).
2791 */
2793 {
2795 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2797 }
2799 /**
2800 * @brief Enable the timer start when receiving a synchronization input event.
2801 * @rmtoll MCR SYNCSTRTM LL_HRTIM_TIM_EnableStartOnSync\n
2802 * TIMxCR SYNSTRTA LL_HRTIM_TIM_EnableStartOnSync
2803 * @param HRTIMx High Resolution Timer instance
2804 * @param Timer This parameter can be one of the following values:
2805 * @arg @ref LL_HRTIM_TIMER_MASTER
2806 * @arg @ref LL_HRTIM_TIMER_A
2807 * @arg @ref LL_HRTIM_TIMER_B
2808 * @arg @ref LL_HRTIM_TIMER_C
2809 * @arg @ref LL_HRTIM_TIMER_D
2810 * @arg @ref LL_HRTIM_TIMER_E
2811 * @retval None
2812 */
2814 {
2816 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2818 }
2820 /**
2821 * @brief Disable the timer start when receiving a synchronization input event.
2822 * @rmtoll MCR SYNCSTRTM LL_HRTIM_TIM_DisableStartOnSync\n
2823 * TIMxCR SYNSTRTA LL_HRTIM_TIM_DisableStartOnSync
2824 * @param HRTIMx High Resolution Timer instance
2825 * @param Timer This parameter can be one of the following values:
2826 * @arg @ref LL_HRTIM_TIMER_MASTER
2827 * @arg @ref LL_HRTIM_TIMER_A
2828 * @arg @ref LL_HRTIM_TIMER_B
2829 * @arg @ref LL_HRTIM_TIMER_C
2830 * @arg @ref LL_HRTIM_TIMER_D
2831 * @arg @ref LL_HRTIM_TIMER_E
2832 * @retval None
2833 */
2835 {
2837 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2839 }
2841 /**
2842 * @brief Indicate whether the timer start when receiving a synchronization input event.
2843 * @rmtoll MCR SYNCSTRTM LL_HRTIM_TIM_IsEnabledStartOnSync\n
2844 * TIMxCR SYNSTRTA LL_HRTIM_TIM_IsEnabledStartOnSync
2845 * @param HRTIMx High Resolution Timer instance
2846 * @param Timer This parameter can be one of the following values:
2847 * @arg @ref LL_HRTIM_TIMER_MASTER
2848 * @arg @ref LL_HRTIM_TIMER_A
2849 * @arg @ref LL_HRTIM_TIMER_B
2850 * @arg @ref LL_HRTIM_TIMER_C
2851 * @arg @ref LL_HRTIM_TIMER_D
2852 * @arg @ref LL_HRTIM_TIMER_E
2853 * @retval State of SYNCSTRTx bit in HRTIM_MCR or HRTIM_TIMxCR register (1 or 0).
2854 */
2855 __STATIC_INLINE uint32_t LL_HRTIM_TIM_IsEnabledStartOnSync(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
2856 {
2858 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2860 }
2862 /**
2863 * @brief Enable the timer reset when receiving a synchronization input event.
2864 * @rmtoll MCR SYNCRSTM LL_HRTIM_TIM_EnableResetOnSync\n
2865 * TIMxCR SYNCRSTA LL_HRTIM_TIM_EnableResetOnSync
2866 * @param HRTIMx High Resolution Timer instance
2867 * @param Timer This parameter can be one of the following values:
2868 * @arg @ref LL_HRTIM_TIMER_MASTER
2869 * @arg @ref LL_HRTIM_TIMER_A
2870 * @arg @ref LL_HRTIM_TIMER_B
2871 * @arg @ref LL_HRTIM_TIMER_C
2872 * @arg @ref LL_HRTIM_TIMER_D
2873 * @arg @ref LL_HRTIM_TIMER_E
2874 * @retval None
2875 */
2877 {
2879 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2881 }
2883 /**
2884 * @brief Disable the timer reset when receiving a synchronization input event.
2885 * @rmtoll MCR SYNCRSTM LL_HRTIM_TIM_DisableResetOnSync\n
2886 * TIMxCR SYNCRSTA LL_HRTIM_TIM_DisableResetOnSync
2887 * @param HRTIMx High Resolution Timer instance
2888 * @param Timer This parameter can be one of the following values:
2889 * @arg @ref LL_HRTIM_TIMER_MASTER
2890 * @arg @ref LL_HRTIM_TIMER_A
2891 * @arg @ref LL_HRTIM_TIMER_B
2892 * @arg @ref LL_HRTIM_TIMER_C
2893 * @arg @ref LL_HRTIM_TIMER_D
2894 * @arg @ref LL_HRTIM_TIMER_E
2895 * @retval None
2896 */
2898 {
2900 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2902 }
2904 /**
2905 * @brief Indicate whether the timer reset when receiving a synchronization input event.
2906 * @rmtoll MCR SYNCRSTM LL_HRTIM_TIM_IsEnabledResetOnSync\n
2907 * TIMxCR SYNCRSTA LL_HRTIM_TIM_IsEnabledResetOnSync
2908 * @param HRTIMx High Resolution Timer instance
2909 * @param Timer This parameter can be one of the following values:
2910 * @arg @ref LL_HRTIM_TIMER_MASTER
2911 * @arg @ref LL_HRTIM_TIMER_A
2912 * @arg @ref LL_HRTIM_TIMER_B
2913 * @arg @ref LL_HRTIM_TIMER_C
2914 * @arg @ref LL_HRTIM_TIMER_D
2915 * @arg @ref LL_HRTIM_TIMER_E
2916 * @retval None
2917 */
2918 __STATIC_INLINE uint32_t LL_HRTIM_TIM_IsEnabledResetOnSync(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
2919 {
2921 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2923 }
2925 /**
2926 * @brief Set the HRTIM output the DAC synchronization event is generated on (DACtrigOutx).
2927 * @rmtoll MCR DACSYNC LL_HRTIM_TIM_SetDACTrig\n
2928 * TIMxCR DACSYNC LL_HRTIM_TIM_SetDACTrig
2929 * @param HRTIMx High Resolution Timer instance
2930 * @param Timer This parameter can be one of the following values:
2931 * @arg @ref LL_HRTIM_TIMER_MASTER
2932 * @arg @ref LL_HRTIM_TIMER_A
2933 * @arg @ref LL_HRTIM_TIMER_B
2934 * @arg @ref LL_HRTIM_TIMER_C
2935 * @arg @ref LL_HRTIM_TIMER_D
2936 * @arg @ref LL_HRTIM_TIMER_E
2937 * @param DACTrig This parameter can be one of the following values:
2938 * @arg @ref LL_HRTIM_DACTRIG_NONE
2939 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_1
2940 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_2
2941 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_3
2942 * @retval None
2943 */
2944 __STATIC_INLINE void LL_HRTIM_TIM_SetDACTrig(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t DACTrig)
2945 {
2947 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2949 }
2951 /**
2952 * @brief Get the HRTIM output the DAC synchronization event is generated on (DACtrigOutx).
2953 * @rmtoll MCR DACSYNC LL_HRTIM_TIM_GetDACTrig\n
2954 * TIMxCR DACSYNC LL_HRTIM_TIM_GetDACTrig
2955 * @param HRTIMx High Resolution Timer instance
2956 * @param Timer This parameter can be one of the following values:
2957 * @arg @ref LL_HRTIM_TIMER_MASTER
2958 * @arg @ref LL_HRTIM_TIMER_A
2959 * @arg @ref LL_HRTIM_TIMER_B
2960 * @arg @ref LL_HRTIM_TIMER_C
2961 * @arg @ref LL_HRTIM_TIMER_D
2962 * @arg @ref LL_HRTIM_TIMER_E
2963 * @retval DACTrig Returned value can be one of the following values:
2964 * @arg @ref LL_HRTIM_DACTRIG_NONE
2965 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_1
2966 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_2
2967 * @arg @ref LL_HRTIM_DACTRIG_DACTRIGOUT_3
2968 */
2970 {
2972 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2974 }
2976 /**
2977 * @brief Enable the timer registers preload mechanism.
2978 * @rmtoll MCR PREEN LL_HRTIM_TIM_EnablePreload\n
2979 * TIMxCR PREEN LL_HRTIM_TIM_EnablePreload
2980 * @note When the preload mode is enabled, accessed registers are shadow registers.
2981 * Their content is transferred into the active register after an update request,
2982 * either software or synchronized with an event.
2983 * @param HRTIMx High Resolution Timer instance
2984 * @param Timer This parameter can be one of the following values:
2985 * @arg @ref LL_HRTIM_TIMER_MASTER
2986 * @arg @ref LL_HRTIM_TIMER_A
2987 * @arg @ref LL_HRTIM_TIMER_B
2988 * @arg @ref LL_HRTIM_TIMER_C
2989 * @arg @ref LL_HRTIM_TIMER_D
2990 * @arg @ref LL_HRTIM_TIMER_E
2991 * @retval None
2992 */
2994 {
2996 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
2998 }
3000 /**
3001 * @brief Disable the timer registers preload mechanism.
3002 * @rmtoll MCR PREEN LL_HRTIM_TIM_DisablePreload\n
3003 * TIMxCR PREEN LL_HRTIM_TIM_DisablePreload
3004 * @param HRTIMx High Resolution Timer instance
3005 * @param Timer This parameter can be one of the following values:
3006 * @arg @ref LL_HRTIM_TIMER_MASTER
3007 * @arg @ref LL_HRTIM_TIMER_A
3008 * @arg @ref LL_HRTIM_TIMER_B
3009 * @arg @ref LL_HRTIM_TIMER_C
3010 * @arg @ref LL_HRTIM_TIMER_D
3011 * @arg @ref LL_HRTIM_TIMER_E
3012 * @retval None
3013 */
3015 {
3017 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
3019 }
3021 /**
3022 * @brief Indicate whether the timer registers preload mechanism is enabled.
3023 * @rmtoll MCR PREEN LL_HRTIM_TIM_IsEnabledPreload\n
3024 * TIMxCR PREEN LL_HRTIM_TIM_IsEnabledPreload
3025 * @param HRTIMx High Resolution Timer instance
3026 * @param Timer This parameter can be one of the following values:
3027 * @arg @ref LL_HRTIM_TIMER_MASTER
3028 * @arg @ref LL_HRTIM_TIMER_A
3029 * @arg @ref LL_HRTIM_TIMER_B
3030 * @arg @ref LL_HRTIM_TIMER_C
3031 * @arg @ref LL_HRTIM_TIMER_D
3032 * @arg @ref LL_HRTIM_TIMER_E
3033 * @retval State of PREEN bit in HRTIM_MCR or HRTIM_TIMxCR register (1 or 0).
3034 */
3036 {
3038 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
3040 }
3042 /**
3043 * @brief Set the timer register update trigger.
3044 * @rmtoll MCR MREPU LL_HRTIM_TIM_SetUpdateTrig\n
3045 * TIMxCR TAU LL_HRTIM_TIM_SetUpdateTrig\n
3046 * TIMxCR TBU LL_HRTIM_TIM_SetUpdateTrig\n
3047 * TIMxCR TCU LL_HRTIM_TIM_SetUpdateTrig\n
3048 * TIMxCR TDU LL_HRTIM_TIM_SetUpdateTrig\n
3049 * TIMxCR TEU LL_HRTIM_TIM_SetUpdateTrig\n
3050 * TIMxCR MSTU LL_HRTIM_TIM_SetUpdateTrig
3051 * @param HRTIMx High Resolution Timer instance
3052 * @param Timer This parameter can be one of the following values:
3053 * @arg @ref LL_HRTIM_TIMER_MASTER
3054 * @arg @ref LL_HRTIM_TIMER_A
3055 * @arg @ref LL_HRTIM_TIMER_B
3056 * @arg @ref LL_HRTIM_TIMER_C
3057 * @arg @ref LL_HRTIM_TIMER_D
3058 * @arg @ref LL_HRTIM_TIMER_E
3059 * @param UpdateTrig This parameter can be one of the following values:
3060 *
3061 * For the master timer this parameter can be one of the following values:
3062 * @arg @ref LL_HRTIM_UPDATETRIG_NONE
3063 * @arg @ref LL_HRTIM_UPDATETRIG_REPETITION
3064 *
3065 * For timer A..E this parameter can be:
3066 * @arg @ref LL_HRTIM_UPDATETRIG_NONE
3067 * or a combination of the following values:
3068 * @arg @ref LL_HRTIM_UPDATETRIG_MASTER
3069 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_A
3070 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_B
3071 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_C
3072 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_D
3073 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_E
3074 * @arg @ref LL_HRTIM_UPDATETRIG_REPETITION
3075 * @arg @ref LL_HRTIM_UPDATETRIG_RESET
3076 * @retval None
3077 */
3078 __STATIC_INLINE void LL_HRTIM_TIM_SetUpdateTrig(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t UpdateTrig)
3079 {
3081 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
3082 MODIFY_REG(*pReg, REG_MASK_TAB_UPDATETRIG[iTimer], UpdateTrig << REG_SHIFT_TAB_UPDATETRIG[iTimer]);
3083 }
3085 /**
3086 * @brief Set the timer register update trigger.
3087 * @rmtoll MCR MREPU LL_HRTIM_TIM_GetUpdateTrig\n
3088 * TIMxCR TBU LL_HRTIM_TIM_GetUpdateTrig\n
3089 * TIMxCR TCU LL_HRTIM_TIM_GetUpdateTrig\n
3090 * TIMxCR TDU LL_HRTIM_TIM_GetUpdateTrig\n
3091 * TIMxCR TEU LL_HRTIM_TIM_GetUpdateTrig\n
3092 * TIMxCR MSTU LL_HRTIM_TIM_GetUpdateTrig
3093 * @param HRTIMx High Resolution Timer instance
3094 * @param Timer This parameter can be one of the following values:
3095 * @arg @ref LL_HRTIM_TIMER_MASTER
3096 * @arg @ref LL_HRTIM_TIMER_A
3097 * @arg @ref LL_HRTIM_TIMER_B
3098 * @arg @ref LL_HRTIM_TIMER_C
3099 * @arg @ref LL_HRTIM_TIMER_D
3100 * @arg @ref LL_HRTIM_TIMER_E
3101 * @retval UpdateTrig Returned value can be one of the following values:
3102 *
3103 * For the master timer this parameter can be one of the following values:
3104 * @arg @ref LL_HRTIM_UPDATETRIG_NONE
3105 * @arg @ref LL_HRTIM_UPDATETRIG_REPETITION
3106 *
3107 * For timer A..E this parameter can be:
3108 * @arg @ref LL_HRTIM_UPDATETRIG_NONE
3109 * or a combination of the following values:
3110 * @arg @ref LL_HRTIM_UPDATETRIG_MASTER
3111 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_A
3112 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_B
3113 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_C
3114 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_D
3115 * @arg @ref LL_HRTIM_UPDATETRIG_TIMER_E
3116 * @arg @ref LL_HRTIM_UPDATETRIG_REPETITION
3117 * @arg @ref LL_HRTIM_UPDATETRIG_RESET
3118 */
3120 {
3122 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
3124 }
3126 /**
3127 * @brief Set the timer registers update condition (how the registers update occurs relatively to the burst DMA transaction or an external update request received on one of the update enable inputs (UPD_EN[3:1])).
3128 * @rmtoll MCR BRSTDMA LL_HRTIM_TIM_SetUpdateGating\n
3129 * TIMxCR UPDGAT LL_HRTIM_TIM_SetUpdateGating
3130 * @param HRTIMx High Resolution Timer instance
3131 * @param Timer This parameter can be one of the following values:
3132 * @arg @ref LL_HRTIM_TIMER_MASTER
3133 * @arg @ref LL_HRTIM_TIMER_A
3134 * @arg @ref LL_HRTIM_TIMER_B
3135 * @arg @ref LL_HRTIM_TIMER_C
3136 * @arg @ref LL_HRTIM_TIMER_D
3137 * @arg @ref LL_HRTIM_TIMER_E
3138 * @param UpdateGating This parameter can be one of the following values:
3139 *
3140 * For the master timer this parameter can be one of the following values:
3141 * @arg @ref LL_HRTIM_UPDATEGATING_INDEPENDENT
3142 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST
3143 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST_UPDATE
3144 *
3145 * For the timer A..E this parameter can be one of the following values:
3146 * @arg @ref LL_HRTIM_UPDATEGATING_INDEPENDENT
3147 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST
3148 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST_UPDATE
3149 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN1
3150 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN2
3151 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN3
3152 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN1_UPDATE
3153 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN2_UPDATE
3154 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN3_UPDATE
3155 * @retval None
3156 */
3157 __STATIC_INLINE void LL_HRTIM_TIM_SetUpdateGating(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t UpdateGating)
3158 {
3160 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
3161 MODIFY_REG(*pReg, REG_MASK_TAB_UPDATEGATING[iTimer], (UpdateGating << REG_SHIFT_TAB_UPDATEGATING[iTimer]));
3162 }
3164 /**
3165 * @brief Get the timer registers update condition.
3166 * @rmtoll MCR BRSTDMA LL_HRTIM_TIM_GetUpdateGating\n
3167 * TIMxCR UPDGAT LL_HRTIM_TIM_GetUpdateGating
3168 * @param HRTIMx High Resolution Timer instance
3169 * @param Timer This parameter can be one of the following values:
3170 * @arg @ref LL_HRTIM_TIMER_MASTER
3171 * @arg @ref LL_HRTIM_TIMER_A
3172 * @arg @ref LL_HRTIM_TIMER_B
3173 * @arg @ref LL_HRTIM_TIMER_C
3174 * @arg @ref LL_HRTIM_TIMER_D
3175 * @arg @ref LL_HRTIM_TIMER_E
3176 * @retval UpdateGating Returned value can be one of the following values:
3177 *
3178 * For the master timer this parameter can be one of the following values:
3179 * @arg @ref LL_HRTIM_UPDATEGATING_INDEPENDENT
3180 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST
3181 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST_UPDATE
3182 *
3183 * For the timer A..E this parameter can be one of the following values:
3184 * @arg @ref LL_HRTIM_UPDATEGATING_INDEPENDENT
3185 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST
3186 * @arg @ref LL_HRTIM_UPDATEGATING_DMABURST_UPDATE
3187 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN1
3188 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN2
3189 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN3
3190 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN1_UPDATE
3191 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN2_UPDATE
3192 * @arg @ref LL_HRTIM_UPDATEGATING_UPDEN3_UPDATE
3193 */
3195 {
3197 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sMasterRegs.MCR) + REG_OFFSET_TAB_TIMER[iTimer]));
3198 return (READ_BIT(*pReg, REG_MASK_TAB_UPDATEGATING[iTimer]) >> REG_SHIFT_TAB_UPDATEGATING[iTimer]);
3199 }
3201 /**
3202 * @brief Enable the push-pull mode.
3203 * @rmtoll TIMxCR PSHPLL LL_HRTIM_TIM_EnablePushPullMode
3204 * @param HRTIMx High Resolution Timer instance
3205 * @param Timer This parameter can be one of the following values:
3206 * @arg @ref LL_HRTIM_TIMER_A
3207 * @arg @ref LL_HRTIM_TIMER_B
3208 * @arg @ref LL_HRTIM_TIMER_C
3209 * @arg @ref LL_HRTIM_TIMER_D
3210 * @arg @ref LL_HRTIM_TIMER_E
3211 * @retval None
3212 */
3214 {
3219 }
3221 /**
3222 * @brief Disable the push-pull mode.
3223 * @rmtoll TIMxCR PSHPLL LL_HRTIM_TIM_DisablePushPullMode
3224 * @param HRTIMx High Resolution Timer instance
3225 * @param Timer This parameter can be one of the following values:
3226 * @arg @ref LL_HRTIM_TIMER_A
3227 * @arg @ref LL_HRTIM_TIMER_B
3228 * @arg @ref LL_HRTIM_TIMER_C
3229 * @arg @ref LL_HRTIM_TIMER_D
3230 * @arg @ref LL_HRTIM_TIMER_E
3231 * @retval None
3232 */
3234 {
3239 }
3241 /**
3242 * @brief Indicate whether the push-pull mode is enabled.
3243 * @rmtoll TIMxCR PSHPLL LL_HRTIM_TIM_IsEnabledPushPullMode\n
3244 * @param HRTIMx High Resolution Timer instance
3245 * @param Timer This parameter can be one of the following values:
3246 * @arg @ref LL_HRTIM_TIMER_A
3247 * @arg @ref LL_HRTIM_TIMER_B
3248 * @arg @ref LL_HRTIM_TIMER_C
3249 * @arg @ref LL_HRTIM_TIMER_D
3250 * @arg @ref LL_HRTIM_TIMER_E
3251 * @retval State of PSHPLL bit in HRTIM_TIMxCR register (1 or 0).
3252 */
3253 __STATIC_INLINE uint32_t LL_HRTIM_TIM_IsEnabledPushPullMode(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
3254 {
3259 }
3261 /**
3262 * @brief Set the functioning mode of the compare unit (CMP2 or CMP4 can operate in standard mode or in auto delayed mode).
3263 * @rmtoll TIMxCR DELCMP2 LL_HRTIM_TIM_SetCompareMode\n
3264 * TIMxCR DELCMP4 LL_HRTIM_TIM_SetCompareMode
3265 * @note In auto-delayed mode the compare match occurs independently from the timer counter value.
3266 * @param HRTIMx High Resolution Timer instance
3267 * @param Timer This parameter can be one of the following values:
3268 * @arg @ref LL_HRTIM_TIMER_A
3269 * @arg @ref LL_HRTIM_TIMER_B
3270 * @arg @ref LL_HRTIM_TIMER_C
3271 * @arg @ref LL_HRTIM_TIMER_D
3272 * @arg @ref LL_HRTIM_TIMER_E
3273 * @param CompareUnit This parameter can be one of the following values:
3274 * @arg @ref LL_HRTIM_COMPAREUNIT_2
3275 * @arg @ref LL_HRTIM_COMPAREUNIT_4
3276 * @param Mode This parameter can be one of the following values:
3277 * @arg @ref LL_HRTIM_COMPAREMODE_REGULAR
3278 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_NOTIMEOUT
3279 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_CMP1
3280 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_CMP3
3281 * @retval None
3282 */
3283 __STATIC_INLINE void LL_HRTIM_TIM_SetCompareMode(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareUnit,
3285 {
3291 }
3293 /**
3294 * @brief Get the functioning mode of the compare unit.
3295 * @rmtoll TIMxCR DELCMP2 LL_HRTIM_TIM_GetCompareMode\n
3296 * TIMxCR DELCMP4 LL_HRTIM_TIM_GetCompareMode
3297 * @param HRTIMx High Resolution Timer instance
3298 * @param Timer This parameter can be one of the following values:
3299 * @arg @ref LL_HRTIM_TIMER_A
3300 * @arg @ref LL_HRTIM_TIMER_B
3301 * @arg @ref LL_HRTIM_TIMER_C
3302 * @arg @ref LL_HRTIM_TIMER_D
3303 * @arg @ref LL_HRTIM_TIMER_E
3304 * @param CompareUnit This parameter can be one of the following values:
3305 * @arg @ref LL_HRTIM_COMPAREUNIT_2
3306 * @arg @ref LL_HRTIM_COMPAREUNIT_4
3307 * @retval Mode Returned value can be one of the following values:
3308 * @arg @ref LL_HRTIM_COMPAREMODE_REGULAR
3309 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_NOTIMEOUT
3310 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_CMP1
3311 * @arg @ref LL_HRTIM_COMPAREMODE_DELAY_CMP3
3312 */
3313 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetCompareMode(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareUnit)
3314 {
3320 }
3322 /**
3323 * @brief Set the timer counter value.
3324 * @rmtoll MCNTR MCNT LL_HRTIM_TIM_SetCounter\n
3325 * CNTxR CNTx LL_HRTIM_TIM_SetCounter
3326 * @note This function can only be called when the timer is stopped.
3327 * @note For HR clock prescaling ratio below 32 (CKPSC[2:0] < 5), the least
3328 * significant bits of the counter are not significant. They cannot be
3329 * written and return 0 when read.
3330 * @note The timer behavior is not guaranteed if the counter value is set above
3331 * the period.
3332 * @param HRTIMx High Resolution Timer instance
3333 * @param Timer This parameter can be one of the following values:
3334 * @arg @ref LL_HRTIM_TIMER_MASTER
3335 * @arg @ref LL_HRTIM_TIMER_A
3336 * @arg @ref LL_HRTIM_TIMER_B
3337 * @arg @ref LL_HRTIM_TIMER_C
3338 * @arg @ref LL_HRTIM_TIMER_D
3339 * @arg @ref LL_HRTIM_TIMER_E
3340 * @param Counter Value between 0 and 0xFFFF
3341 * @retval None
3342 */
3343 __STATIC_INLINE void LL_HRTIM_TIM_SetCounter(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Counter)
3344 {
3349 }
3351 /**
3352 * @brief Get actual timer counter value.
3353 * @rmtoll MCNTR MCNT LL_HRTIM_TIM_GetCounter\n
3354 * CNTxR CNTx LL_HRTIM_TIM_GetCounter
3355 * @param HRTIMx High Resolution Timer instance
3356 * @param Timer This parameter can be one of the following values:
3357 * @arg @ref LL_HRTIM_TIMER_MASTER
3358 * @arg @ref LL_HRTIM_TIMER_A
3359 * @arg @ref LL_HRTIM_TIMER_B
3360 * @arg @ref LL_HRTIM_TIMER_C
3361 * @arg @ref LL_HRTIM_TIMER_D
3362 * @arg @ref LL_HRTIM_TIMER_E
3363 * @retval Counter Value between 0 and 0xFFFF
3364 */
3366 {
3371 }
3373 /**
3374 * @brief Set the timer period value.
3375 * @rmtoll MPER MPER LL_HRTIM_TIM_SetPeriod\n
3376 * PERxR PERx LL_HRTIM_TIM_SetPeriod
3377 * @param HRTIMx High Resolution Timer instance
3378 * @param Timer This parameter can be one of the following values:
3379 * @arg @ref LL_HRTIM_TIMER_MASTER
3380 * @arg @ref LL_HRTIM_TIMER_A
3381 * @arg @ref LL_HRTIM_TIMER_B
3382 * @arg @ref LL_HRTIM_TIMER_C
3383 * @arg @ref LL_HRTIM_TIMER_D
3384 * @arg @ref LL_HRTIM_TIMER_E
3385 * @param Period Value between 0 and 0xFFFF
3386 * @retval None
3387 */
3388 __STATIC_INLINE void LL_HRTIM_TIM_SetPeriod(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Period)
3389 {
3394 }
3396 /**
3397 * @brief Get actual timer period value.
3398 * @rmtoll MPER MPER LL_HRTIM_TIM_GetPeriod\n
3399 * PERxR PERx LL_HRTIM_TIM_GetPeriod
3400 * @param HRTIMx High Resolution Timer instance
3401 * @param Timer This parameter can be one of the following values:
3402 * @arg @ref LL_HRTIM_TIMER_MASTER
3403 * @arg @ref LL_HRTIM_TIMER_A
3404 * @arg @ref LL_HRTIM_TIMER_B
3405 * @arg @ref LL_HRTIM_TIMER_C
3406 * @arg @ref LL_HRTIM_TIMER_D
3407 * @arg @ref LL_HRTIM_TIMER_E
3408 * @retval Period Value between 0 and 0xFFFF
3409 */
3411 {
3416 }
3418 /**
3419 * @brief Set the timer repetition period value.
3420 * @rmtoll MREP MREP LL_HRTIM_TIM_SetRepetition\n
3421 * REPxR REPx LL_HRTIM_TIM_SetRepetition
3422 * @param HRTIMx High Resolution Timer instance
3423 * @param Timer This parameter can be one of the following values:
3424 * @arg @ref LL_HRTIM_TIMER_MASTER
3425 * @arg @ref LL_HRTIM_TIMER_A
3426 * @arg @ref LL_HRTIM_TIMER_B
3427 * @arg @ref LL_HRTIM_TIMER_C
3428 * @arg @ref LL_HRTIM_TIMER_D
3429 * @arg @ref LL_HRTIM_TIMER_E
3430 * @param Repetition Value between 0 and 0xFF
3431 * @retval None
3432 */
3433 __STATIC_INLINE void LL_HRTIM_TIM_SetRepetition(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Repetition)
3434 {
3439 }
3441 /**
3442 * @brief Get actual timer repetition period value.
3443 * @rmtoll MREP MREP LL_HRTIM_TIM_GetRepetition\n
3444 * REPxR REPx LL_HRTIM_TIM_GetRepetition
3445 * @param HRTIMx High Resolution Timer instance
3446 * @param Timer This parameter can be one of the following values:
3447 * @arg @ref LL_HRTIM_TIMER_MASTER
3448 * @arg @ref LL_HRTIM_TIMER_A
3449 * @arg @ref LL_HRTIM_TIMER_B
3450 * @arg @ref LL_HRTIM_TIMER_C
3451 * @arg @ref LL_HRTIM_TIMER_D
3452 * @arg @ref LL_HRTIM_TIMER_E
3453 * @retval Repetition Value between 0 and 0xFF
3454 */
3456 {
3461 }
3463 /**
3464 * @brief Set the compare value of the compare unit 1.
3465 * @rmtoll MCMP1R MCMP1 LL_HRTIM_TIM_SetCompare1\n
3466 * CMP1xR CMP1x LL_HRTIM_TIM_SetCompare1
3467 * @param HRTIMx High Resolution Timer instance
3468 * @param Timer This parameter can be one of the following values:
3469 * @arg @ref LL_HRTIM_TIMER_MASTER
3470 * @arg @ref LL_HRTIM_TIMER_A
3471 * @arg @ref LL_HRTIM_TIMER_B
3472 * @arg @ref LL_HRTIM_TIMER_C
3473 * @arg @ref LL_HRTIM_TIMER_D
3474 * @arg @ref LL_HRTIM_TIMER_E
3475 * @param CompareValue Compare value must be above or equal to 3
3476 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3477 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3478 * @retval None
3479 */
3480 __STATIC_INLINE void LL_HRTIM_TIM_SetCompare1(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareValue)
3481 {
3486 }
3488 /**
3489 * @brief Get actual compare value of the compare unit 1.
3490 * @rmtoll MCMP1R MCMP1 LL_HRTIM_TIM_GetCompare1\n
3491 * CMP1xR CMP1x LL_HRTIM_TIM_GetCompare1
3492 * @param HRTIMx High Resolution Timer instance
3493 * @param Timer This parameter can be one of the following values:
3494 * @arg @ref LL_HRTIM_TIMER_MASTER
3495 * @arg @ref LL_HRTIM_TIMER_A
3496 * @arg @ref LL_HRTIM_TIMER_B
3497 * @arg @ref LL_HRTIM_TIMER_C
3498 * @arg @ref LL_HRTIM_TIMER_D
3499 * @arg @ref LL_HRTIM_TIMER_E
3500 * @retval CompareValue Compare value must be above or equal to 3
3501 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3502 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3503 */
3505 {
3510 }
3512 /**
3513 * @brief Set the compare value of the compare unit 2.
3514 * @rmtoll MCMP2R MCMP2 LL_HRTIM_TIM_SetCompare2\n
3515 * CMP2xR CMP2x LL_HRTIM_TIM_SetCompare2
3516 * @param HRTIMx High Resolution Timer instance
3517 * @param Timer This parameter can be one of the following values:
3518 * @arg @ref LL_HRTIM_TIMER_MASTER
3519 * @arg @ref LL_HRTIM_TIMER_A
3520 * @arg @ref LL_HRTIM_TIMER_B
3521 * @arg @ref LL_HRTIM_TIMER_C
3522 * @arg @ref LL_HRTIM_TIMER_D
3523 * @arg @ref LL_HRTIM_TIMER_E
3524 * @param CompareValue Compare value must be above or equal to 3
3525 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3526 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3527 * @retval None
3528 */
3529 __STATIC_INLINE void LL_HRTIM_TIM_SetCompare2(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareValue)
3530 {
3535 }
3537 /**
3538 * @brief Get actual compare value of the compare unit 2.
3539 * @rmtoll MCMP2R MCMP2 LL_HRTIM_TIM_GetCompare2\n
3540 * CMP2xR CMP2x LL_HRTIM_TIM_GetCompare2\n
3541 * @param HRTIMx High Resolution Timer instance
3542 * @param Timer This parameter can be one of the following values:
3543 * @arg @ref LL_HRTIM_TIMER_MASTER
3544 * @arg @ref LL_HRTIM_TIMER_A
3545 * @arg @ref LL_HRTIM_TIMER_B
3546 * @arg @ref LL_HRTIM_TIMER_C
3547 * @arg @ref LL_HRTIM_TIMER_D
3548 * @arg @ref LL_HRTIM_TIMER_E
3549 * @retval CompareValue Compare value must be above or equal to 3
3550 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3551 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3552 */
3554 {
3559 }
3561 /**
3562 * @brief Set the compare value of the compare unit 3.
3563 * @rmtoll MCMP3R MCMP3 LL_HRTIM_TIM_SetCompare3\n
3564 * CMP3xR CMP3x LL_HRTIM_TIM_SetCompare3
3565 * @param HRTIMx High Resolution Timer instance
3566 * @param Timer This parameter can be one of the following values:
3567 * @arg @ref LL_HRTIM_TIMER_MASTER
3568 * @arg @ref LL_HRTIM_TIMER_A
3569 * @arg @ref LL_HRTIM_TIMER_B
3570 * @arg @ref LL_HRTIM_TIMER_C
3571 * @arg @ref LL_HRTIM_TIMER_D
3572 * @arg @ref LL_HRTIM_TIMER_E
3573 * @param CompareValue Compare value must be above or equal to 3
3574 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3575 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3576 * @retval None
3577 */
3578 __STATIC_INLINE void LL_HRTIM_TIM_SetCompare3(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareValue)
3579 {
3584 }
3586 /**
3587 * @brief Get actual compare value of the compare unit 3.
3588 * @rmtoll MCMP3R MCMP3 LL_HRTIM_TIM_GetCompare3\n
3589 * CMP3xR CMP3x LL_HRTIM_TIM_GetCompare3
3590 * @param HRTIMx High Resolution Timer instance
3591 * @param Timer This parameter can be one of the following values:
3592 * @arg @ref LL_HRTIM_TIMER_MASTER
3593 * @arg @ref LL_HRTIM_TIMER_A
3594 * @arg @ref LL_HRTIM_TIMER_B
3595 * @arg @ref LL_HRTIM_TIMER_C
3596 * @arg @ref LL_HRTIM_TIMER_D
3597 * @arg @ref LL_HRTIM_TIMER_E
3598 * @retval CompareValue Compare value must be above or equal to 3
3599 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3600 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3601 */
3603 {
3608 }
3610 /**
3611 * @brief Set the compare value of the compare unit 4.
3612 * @rmtoll MCMP4R MCMP4 LL_HRTIM_TIM_SetCompare4\n
3613 * CMP4xR CMP4x LL_HRTIM_TIM_SetCompare4
3614 * @param HRTIMx High Resolution Timer instance
3615 * @param Timer This parameter can be one of the following values:
3616 * @arg @ref LL_HRTIM_TIMER_MASTER
3617 * @arg @ref LL_HRTIM_TIMER_A
3618 * @arg @ref LL_HRTIM_TIMER_B
3619 * @arg @ref LL_HRTIM_TIMER_C
3620 * @arg @ref LL_HRTIM_TIMER_D
3621 * @arg @ref LL_HRTIM_TIMER_E
3622 * @param CompareValue Compare value must be above or equal to 3
3623 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3624 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3625 * @retval None
3626 */
3627 __STATIC_INLINE void LL_HRTIM_TIM_SetCompare4(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CompareValue)
3628 {
3633 }
3635 /**
3636 * @brief Get actual compare value of the compare unit 4.
3637 * @rmtoll MCMP4R MCMP4 LL_HRTIM_TIM_GetCompare4\n
3638 * CMP4xR CMP4x LL_HRTIM_TIM_GetCompare4
3639 * @param HRTIMx High Resolution Timer instance
3640 * @param Timer This parameter can be one of the following values:
3641 * @arg @ref LL_HRTIM_TIMER_MASTER
3642 * @arg @ref LL_HRTIM_TIMER_A
3643 * @arg @ref LL_HRTIM_TIMER_B
3644 * @arg @ref LL_HRTIM_TIMER_C
3645 * @arg @ref LL_HRTIM_TIMER_D
3646 * @arg @ref LL_HRTIM_TIMER_E
3647 * @retval CompareValue Compare value must be above or equal to 3
3648 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
3649 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
3650 */
3652 {
3657 }
3659 /**
3660 * @brief Set the reset trigger of a timer counter.
3661 * @rmtoll RSTxR UPDT LL_HRTIM_TIM_SetResetTrig\n
3662 * RSTxR CMP2 LL_HRTIM_TIM_SetResetTrig\n
3663 * RSTxR CMP4 LL_HRTIM_TIM_SetResetTrig\n
3664 * RSTxR MSTPER LL_HRTIM_TIM_SetResetTrig\n
3665 * RSTxR MSTCMP1 LL_HRTIM_TIM_SetResetTrig\n
3666 * RSTxR MSTCMP2 LL_HRTIM_TIM_SetResetTrig\n
3667 * RSTxR MSTCMP3 LL_HRTIM_TIM_SetResetTrig\n
3668 * RSTxR MSTCMP4 LL_HRTIM_TIM_SetResetTrig\n
3669 * RSTxR EXTEVNT1 LL_HRTIM_TIM_SetResetTrig\n
3670 * RSTxR EXTEVNT2 LL_HRTIM_TIM_SetResetTrig\n
3671 * RSTxR EXTEVNT3 LL_HRTIM_TIM_SetResetTrig\n
3672 * RSTxR EXTEVNT4 LL_HRTIM_TIM_SetResetTrig\n
3673 * RSTxR EXTEVNT5 LL_HRTIM_TIM_SetResetTrig\n
3674 * RSTxR EXTEVNT6 LL_HRTIM_TIM_SetResetTrig\n
3675 * RSTxR EXTEVNT7 LL_HRTIM_TIM_SetResetTrig\n
3676 * RSTxR EXTEVNT8 LL_HRTIM_TIM_SetResetTrig\n
3677 * RSTxR EXTEVNT9 LL_HRTIM_TIM_SetResetTrig\n
3678 * RSTxR EXTEVNT10 LL_HRTIM_TIM_SetResetTrig\n
3679 * RSTxR TIMBCMP1 LL_HRTIM_TIM_SetResetTrig\n
3680 * RSTxR TIMBCMP2 LL_HRTIM_TIM_SetResetTrig\n
3681 * RSTxR TIMBCMP4 LL_HRTIM_TIM_SetResetTrig\n
3682 * RSTxR TIMCCMP1 LL_HRTIM_TIM_SetResetTrig\n
3683 * RSTxR TIMCCMP2 LL_HRTIM_TIM_SetResetTrig\n
3684 * RSTxR TIMCCMP4 LL_HRTIM_TIM_SetResetTrig\n
3685 * RSTxR TIMDCMP1 LL_HRTIM_TIM_SetResetTrig\n
3686 * RSTxR TIMDCMP2 LL_HRTIM_TIM_SetResetTrig\n
3687 * RSTxR TIMDCMP4 LL_HRTIM_TIM_SetResetTrig\n
3688 * RSTxR TIMECMP1 LL_HRTIM_TIM_SetResetTrig\n
3689 * RSTxR TIMECMP2 LL_HRTIM_TIM_SetResetTrig\n
3690 * RSTxR TIMECMP4 LL_HRTIM_TIM_SetResetTrig
3691 * @note The reset of the timer counter can be triggered by up to 30 events
3692 * that can be selected among the following sources:
3693 * @arg The timing unit: Compare 2, Compare 4 and Update (3 events).
3694 * @arg The master timer: Reset and Compare 1..4 (5 events).
3695 * @arg The external events EXTEVNT1..10 (10 events).
3696 * @arg All other timing units (e.g. Timer B..E for timer A): Compare 1, 2 and 4 (12 events).
3697 * @param HRTIMx High Resolution Timer instance
3698 * @param Timer This parameter can be one of the following values:
3699 * @arg @ref LL_HRTIM_TIMER_A
3700 * @arg @ref LL_HRTIM_TIMER_B
3701 * @arg @ref LL_HRTIM_TIMER_C
3702 * @arg @ref LL_HRTIM_TIMER_D
3703 * @arg @ref LL_HRTIM_TIMER_E
3704 * @param ResetTrig This parameter can be a combination of the following values:
3705 * @arg @ref LL_HRTIM_RESETTRIG_NONE
3706 * @arg @ref LL_HRTIM_RESETTRIG_UPDATE
3707 * @arg @ref LL_HRTIM_RESETTRIG_CMP2
3708 * @arg @ref LL_HRTIM_RESETTRIG_CMP4
3709 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_PER
3710 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP1
3711 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP2
3712 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP3
3713 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP4
3714 * @arg @ref LL_HRTIM_RESETTRIG_EEV_1
3715 * @arg @ref LL_HRTIM_RESETTRIG_EEV_2
3716 * @arg @ref LL_HRTIM_RESETTRIG_EEV_3
3717 * @arg @ref LL_HRTIM_RESETTRIG_EEV_4
3718 * @arg @ref LL_HRTIM_RESETTRIG_EEV_5
3719 * @arg @ref LL_HRTIM_RESETTRIG_EEV_6
3720 * @arg @ref LL_HRTIM_RESETTRIG_EEV_7
3721 * @arg @ref LL_HRTIM_RESETTRIG_EEV_8
3722 * @arg @ref LL_HRTIM_RESETTRIG_EEV_9
3723 * @arg @ref LL_HRTIM_RESETTRIG_EEV_10
3724 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP1
3725 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP2
3726 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP4
3727 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP1
3728 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP2
3729 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP4
3730 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP1
3731 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP2
3732 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP4
3733 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP1
3734 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP2
3735 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP4
3736 * @retval None
3737 */
3738 __STATIC_INLINE void LL_HRTIM_TIM_SetResetTrig(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t ResetTrig)
3739 {
3744 }
3746 /**
3747 * @brief Get actual reset trigger of a timer counter.
3748 * @rmtoll RSTxR UPDT LL_HRTIM_TIM_GetResetTrig\n
3749 * RSTxR CMP2 LL_HRTIM_TIM_GetResetTrig\n
3750 * RSTxR CMP4 LL_HRTIM_TIM_GetResetTrig\n
3751 * RSTxR MSTPER LL_HRTIM_TIM_GetResetTrig\n
3752 * RSTxR MSTCMP1 LL_HRTIM_TIM_GetResetTrig\n
3753 * RSTxR MSTCMP2 LL_HRTIM_TIM_GetResetTrig\n
3754 * RSTxR MSTCMP3 LL_HRTIM_TIM_GetResetTrig\n
3755 * RSTxR MSTCMP4 LL_HRTIM_TIM_GetResetTrig\n
3756 * RSTxR EXTEVNT1 LL_HRTIM_TIM_GetResetTrig\n
3757 * RSTxR EXTEVNT2 LL_HRTIM_TIM_GetResetTrig\n
3758 * RSTxR EXTEVNT3 LL_HRTIM_TIM_GetResetTrig\n
3759 * RSTxR EXTEVNT4 LL_HRTIM_TIM_GetResetTrig\n
3760 * RSTxR EXTEVNT5 LL_HRTIM_TIM_GetResetTrig\n
3761 * RSTxR EXTEVNT6 LL_HRTIM_TIM_GetResetTrig\n
3762 * RSTxR EXTEVNT7 LL_HRTIM_TIM_GetResetTrig\n
3763 * RSTxR EXTEVNT8 LL_HRTIM_TIM_GetResetTrig\n
3764 * RSTxR EXTEVNT9 LL_HRTIM_TIM_GetResetTrig\n
3765 * RSTxR EXTEVNT10 LL_HRTIM_TIM_GetResetTrig\n
3766 * RSTxR TIMBCMP1 LL_HRTIM_TIM_GetResetTrig\n
3767 * RSTxR TIMBCMP2 LL_HRTIM_TIM_GetResetTrig\n
3768 * RSTxR TIMBCMP4 LL_HRTIM_TIM_GetResetTrig\n
3769 * RSTxR TIMCCMP1 LL_HRTIM_TIM_GetResetTrig\n
3770 * RSTxR TIMCCMP2 LL_HRTIM_TIM_GetResetTrig\n
3771 * RSTxR TIMCCMP4 LL_HRTIM_TIM_GetResetTrig\n
3772 * RSTxR TIMDCMP1 LL_HRTIM_TIM_GetResetTrig\n
3773 * RSTxR TIMDCMP2 LL_HRTIM_TIM_GetResetTrig\n
3774 * RSTxR TIMDCMP4 LL_HRTIM_TIM_GetResetTrig\n
3775 * RSTxR TIMECMP1 LL_HRTIM_TIM_GetResetTrig\n
3776 * RSTxR TIMECMP2 LL_HRTIM_TIM_GetResetTrig\n
3777 * RSTxR TIMECMP4 LL_HRTIM_TIM_GetResetTrig
3778 * @param HRTIMx High Resolution Timer instance
3779 * @param Timer This parameter can be one of the following values:
3780 * @arg @ref LL_HRTIM_TIMER_A
3781 * @arg @ref LL_HRTIM_TIMER_B
3782 * @arg @ref LL_HRTIM_TIMER_C
3783 * @arg @ref LL_HRTIM_TIMER_D
3784 * @arg @ref LL_HRTIM_TIMER_E
3785 * @retval ResetTrig Returned value can be one of the following values:
3786 * @arg @ref LL_HRTIM_RESETTRIG_NONE
3787 * @arg @ref LL_HRTIM_RESETTRIG_UPDATE
3788 * @arg @ref LL_HRTIM_RESETTRIG_CMP2
3789 * @arg @ref LL_HRTIM_RESETTRIG_CMP4
3790 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_PER
3791 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP1
3792 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP2
3793 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP3
3794 * @arg @ref LL_HRTIM_RESETTRIG_MASTER_CMP4
3795 * @arg @ref LL_HRTIM_RESETTRIG_EEV_1
3796 * @arg @ref LL_HRTIM_RESETTRIG_EEV_2
3797 * @arg @ref LL_HRTIM_RESETTRIG_EEV_3
3798 * @arg @ref LL_HRTIM_RESETTRIG_EEV_4
3799 * @arg @ref LL_HRTIM_RESETTRIG_EEV_5
3800 * @arg @ref LL_HRTIM_RESETTRIG_EEV_6
3801 * @arg @ref LL_HRTIM_RESETTRIG_EEV_7
3802 * @arg @ref LL_HRTIM_RESETTRIG_EEV_8
3803 * @arg @ref LL_HRTIM_RESETTRIG_EEV_9
3804 * @arg @ref LL_HRTIM_RESETTRIG_EEV_10
3805 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP1
3806 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP2
3807 * @arg @ref LL_HRTIM_RESETTRIG_OTHER1_CMP4
3808 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP1
3809 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP2
3810 * @arg @ref LL_HRTIM_RESETTRIG_OTHER2_CMP4
3811 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP1
3812 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP2
3813 * @arg @ref LL_HRTIM_RESETTRIG_OTHER3_CMP4
3814 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP1
3815 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP2
3816 * @arg @ref LL_HRTIM_RESETTRIG_OTHER4_CMP4
3817 */
3819 {
3824 }
3826 /**
3827 * @brief Get captured value for capture unit 1.
3828 * @rmtoll CPT1xR CPT1x LL_HRTIM_TIM_GetCapture1
3829 * @param HRTIMx High Resolution Timer instance
3830 * @param Timer This parameter can be one of the following values:
3831 * @arg @ref LL_HRTIM_TIMER_A
3832 * @arg @ref LL_HRTIM_TIMER_B
3833 * @arg @ref LL_HRTIM_TIMER_C
3834 * @arg @ref LL_HRTIM_TIMER_D
3835 * @arg @ref LL_HRTIM_TIMER_E
3836 * @retval Captured value
3837 */
3839 {
3844 }
3846 /**
3847 * @brief Get captured value for capture unit 2.
3848 * @rmtoll CPT2xR CPT2x LL_HRTIM_TIM_GetCapture2
3849 * @param HRTIMx High Resolution Timer instance
3850 * @param Timer This parameter can be one of the following values:
3851 * @arg @ref LL_HRTIM_TIMER_A
3852 * @arg @ref LL_HRTIM_TIMER_B
3853 * @arg @ref LL_HRTIM_TIMER_C
3854 * @arg @ref LL_HRTIM_TIMER_D
3855 * @arg @ref LL_HRTIM_TIMER_E
3856 * @retval Captured value
3857 */
3859 {
3864 }
3866 /**
3867 * @brief Set the trigger of a capture unit for a given timer.
3868 * @rmtoll CPT1xCR SWCPT LL_HRTIM_TIM_SetCaptureTrig\n
3869 * CPT1xCR UPDCPT LL_HRTIM_TIM_SetCaptureTrig\n
3870 * CPT1xCR EXEV1CPT LL_HRTIM_TIM_SetCaptureTrig\n
3871 * CPT1xCR EXEV2CPT LL_HRTIM_TIM_SetCaptureTrig\n
3872 * CPT1xCR EXEV3CPT LL_HRTIM_TIM_SetCaptureTrig\n
3873 * CPT1xCR EXEV4CPT LL_HRTIM_TIM_SetCaptureTrig\n
3874 * CPT1xCR EXEV5CPT LL_HRTIM_TIM_SetCaptureTrig\n
3875 * CPT1xCR EXEV6CPT LL_HRTIM_TIM_SetCaptureTrig\n
3876 * CPT1xCR EXEV7CPT LL_HRTIM_TIM_SetCaptureTrig\n
3877 * CPT1xCR EXEV8CPT LL_HRTIM_TIM_SetCaptureTrig\n
3878 * CPT1xCR EXEV9CPT LL_HRTIM_TIM_SetCaptureTrig\n
3879 * CPT1xCR EXEV10CPT LL_HRTIM_TIM_SetCaptureTrig\n
3880 * CPT1xCR TA1SET LL_HRTIM_TIM_SetCaptureTrig\n
3881 * CPT1xCR TA1RST LL_HRTIM_TIM_SetCaptureTrig\n
3882 * CPT1xCR TACMP1 LL_HRTIM_TIM_SetCaptureTrig\n
3883 * CPT1xCR TACMP2 LL_HRTIM_TIM_SetCaptureTrig\n
3884 * CPT1xCR TB1SET LL_HRTIM_TIM_SetCaptureTrig\n
3885 * CPT1xCR TB1RST LL_HRTIM_TIM_SetCaptureTrig\n
3886 * CPT1xCR TBCMP1 LL_HRTIM_TIM_SetCaptureTrig\n
3887 * CPT1xCR TBCMP2 LL_HRTIM_TIM_SetCaptureTrig\n
3888 * CPT1xCR TC1SET LL_HRTIM_TIM_SetCaptureTrig\n
3889 * CPT1xCR TC1RST LL_HRTIM_TIM_SetCaptureTrig\n
3890 * CPT1xCR TCCMP1 LL_HRTIM_TIM_SetCaptureTrig\n
3891 * CPT1xCR TCCMP2 LL_HRTIM_TIM_SetCaptureTrig\n
3892 * CPT1xCR TD1SET LL_HRTIM_TIM_SetCaptureTrig\n
3893 * CPT1xCR TD1RST LL_HRTIM_TIM_SetCaptureTrig\n
3894 * CPT1xCR TDCMP1 LL_HRTIM_TIM_SetCaptureTrig\n
3895 * CPT1xCR TDCMP2 LL_HRTIM_TIM_SetCaptureTrig\n
3896 * CPT1xCR TE1SET LL_HRTIM_TIM_SetCaptureTrig\n
3897 * CPT1xCR TE1RST LL_HRTIM_TIM_SetCaptureTrig\n
3898 * CPT1xCR TECMP1 LL_HRTIM_TIM_SetCaptureTrig\n
3899 * CPT1xCR TECMP2 LL_HRTIM_TIM_SetCaptureTrig
3900 * @param HRTIMx High Resolution Timer instance
3901 * @param Timer This parameter can be one of the following values:
3902 * @arg @ref LL_HRTIM_TIMER_A
3903 * @arg @ref LL_HRTIM_TIMER_B
3904 * @arg @ref LL_HRTIM_TIMER_C
3905 * @arg @ref LL_HRTIM_TIMER_D
3906 * @arg @ref LL_HRTIM_TIMER_E
3907 * @param CaptureUnit This parameter can be one of the following values:
3908 * @arg @ref LL_HRTIM_CAPTUREUNIT_1
3909 * @arg @ref LL_HRTIM_CAPTUREUNIT_2
3910 * @param CaptureTrig This parameter can be a combination of the following values:
3911 * @arg @ref LL_HRTIM_CAPTURETRIG_NONE
3912 * @arg @ref LL_HRTIM_CAPTURETRIG_UPDATE
3913 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_1
3914 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_2
3915 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_3
3916 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_4
3917 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_5
3918 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_6
3919 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_7
3920 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_8
3921 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_9
3922 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_10
3923 * @arg @ref LL_HRTIM_CAPTURETRIG_TA1_SET
3924 * @arg @ref LL_HRTIM_CAPTURETRIG_TA1_RESET
3925 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMA_CMP1
3926 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMA_CMP2
3927 * @arg @ref LL_HRTIM_CAPTURETRIG_TB1_SET
3928 * @arg @ref LL_HRTIM_CAPTURETRIG_TB1_RESET
3929 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMB_CMP1
3930 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMB_CMP2
3931 * @arg @ref LL_HRTIM_CAPTURETRIG_TC1_SET
3932 * @arg @ref LL_HRTIM_CAPTURETRIG_TC1_RESET
3933 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMC_CMP1
3934 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMC_CMP2
3935 * @arg @ref LL_HRTIM_CAPTURETRIG_TD1_SET
3936 * @arg @ref LL_HRTIM_CAPTURETRIG_TD1_RESET
3937 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMD_CMP1
3938 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMD_CMP2
3939 * @arg @ref LL_HRTIM_CAPTURETRIG_TE1_SET
3940 * @arg @ref LL_HRTIM_CAPTURETRIG_TE1_RESET
3941 * @arg @ref LL_HRTIM_CAPTURETRIG_TIME_CMP1
3942 * @arg @ref LL_HRTIM_CAPTURETRIG_TIME_CMP2
3943 * @retval None
3944 */
3945 __STATIC_INLINE void LL_HRTIM_TIM_SetCaptureTrig(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CaptureUnit,
3947 {
3949 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].CPT1xCR) +
3952 }
3954 /**
3955 * @brief Get actual trigger of a capture unit for a given timer.
3956 * @rmtoll CPT1xCR SWCPT LL_HRTIM_TIM_GetCaptureTrig\n
3957 * CPT1xCR UPDCPT LL_HRTIM_TIM_GetCaptureTrig\n
3958 * CPT1xCR EXEV1CPT LL_HRTIM_TIM_GetCaptureTrig\n
3959 * CPT1xCR EXEV2CPT LL_HRTIM_TIM_GetCaptureTrig\n
3960 * CPT1xCR EXEV3CPT LL_HRTIM_TIM_GetCaptureTrig\n
3961 * CPT1xCR EXEV4CPT LL_HRTIM_TIM_GetCaptureTrig\n
3962 * CPT1xCR EXEV5CPT LL_HRTIM_TIM_GetCaptureTrig\n
3963 * CPT1xCR EXEV6CPT LL_HRTIM_TIM_GetCaptureTrig\n
3964 * CPT1xCR EXEV7CPT LL_HRTIM_TIM_GetCaptureTrig\n
3965 * CPT1xCR EXEV8CPT LL_HRTIM_TIM_GetCaptureTrig\n
3966 * CPT1xCR EXEV9CPT LL_HRTIM_TIM_GetCaptureTrig\n
3967 * CPT1xCR EXEV10CPT LL_HRTIM_TIM_GetCaptureTrig\n
3968 * CPT1xCR TA1SET LL_HRTIM_TIM_GetCaptureTrig\n
3969 * CPT1xCR TA1RST LL_HRTIM_TIM_GetCaptureTrig\n
3970 * CPT1xCR TACMP1 LL_HRTIM_TIM_GetCaptureTrig\n
3971 * CPT1xCR TACMP2 LL_HRTIM_TIM_GetCaptureTrig\n
3972 * CPT1xCR TB1SET LL_HRTIM_TIM_GetCaptureTrig\n
3973 * CPT1xCR TB1RST LL_HRTIM_TIM_GetCaptureTrig\n
3974 * CPT1xCR TBCMP1 LL_HRTIM_TIM_GetCaptureTrig\n
3975 * CPT1xCR TBCMP2 LL_HRTIM_TIM_GetCaptureTrig\n
3976 * CPT1xCR TC1SET LL_HRTIM_TIM_GetCaptureTrig\n
3977 * CPT1xCR TC1RST LL_HRTIM_TIM_GetCaptureTrig\n
3978 * CPT1xCR TCCMP1 LL_HRTIM_TIM_GetCaptureTrig\n
3979 * CPT1xCR TCCMP2 LL_HRTIM_TIM_GetCaptureTrig\n
3980 * CPT1xCR TD1SET LL_HRTIM_TIM_GetCaptureTrig\n
3981 * CPT1xCR TD1RST LL_HRTIM_TIM_GetCaptureTrig\n
3982 * CPT1xCR TDCMP1 LL_HRTIM_TIM_GetCaptureTrig\n
3983 * CPT1xCR TDCMP2 LL_HRTIM_TIM_GetCaptureTrig\n
3984 * CPT1xCR TE1SET LL_HRTIM_TIM_GetCaptureTrig\n
3985 * CPT1xCR TE1RST LL_HRTIM_TIM_GetCaptureTrig\n
3986 * CPT1xCR TECMP1 LL_HRTIM_TIM_GetCaptureTrig\n
3987 * CPT1xCR TECMP2 LL_HRTIM_TIM_GetCaptureTrig
3988 * @param HRTIMx High Resolution Timer instance
3989 * @param Timer This parameter can be one of the following values:
3990 * @arg @ref LL_HRTIM_TIMER_A
3991 * @arg @ref LL_HRTIM_TIMER_B
3992 * @arg @ref LL_HRTIM_TIMER_C
3993 * @arg @ref LL_HRTIM_TIMER_D
3994 * @arg @ref LL_HRTIM_TIMER_E
3995 * @param CaptureUnit This parameter can be one of the following values:
3996 * @arg @ref LL_HRTIM_CAPTUREUNIT_1
3997 * @arg @ref LL_HRTIM_CAPTUREUNIT_2
3998 * @retval CaptureTrig This parameter can be a combination of the following values:
3999 * @arg @ref LL_HRTIM_CAPTURETRIG_NONE
4000 * @arg @ref LL_HRTIM_CAPTURETRIG_UPDATE
4001 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_1
4002 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_2
4003 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_3
4004 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_4
4005 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_5
4006 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_6
4007 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_7
4008 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_8
4009 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_9
4010 * @arg @ref LL_HRTIM_CAPTURETRIG_EEV_10
4011 * @arg @ref LL_HRTIM_CAPTURETRIG_TA1_SET
4012 * @arg @ref LL_HRTIM_CAPTURETRIG_TA1_RESET
4013 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMA_CMP1
4014 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMA_CMP2
4015 * @arg @ref LL_HRTIM_CAPTURETRIG_TB1_SET
4016 * @arg @ref LL_HRTIM_CAPTURETRIG_TB1_RESET
4017 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMB_CMP1
4018 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMB_CMP2
4019 * @arg @ref LL_HRTIM_CAPTURETRIG_TC1_SET
4020 * @arg @ref LL_HRTIM_CAPTURETRIG_TC1_RESET
4021 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMC_CMP1
4022 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMC_CMP2
4023 * @arg @ref LL_HRTIM_CAPTURETRIG_TD1_SET
4024 * @arg @ref LL_HRTIM_CAPTURETRIG_TD1_RESET
4025 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMD_CMP1
4026 * @arg @ref LL_HRTIM_CAPTURETRIG_TIMD_CMP2
4027 * @arg @ref LL_HRTIM_CAPTURETRIG_TE1_SET
4028 * @arg @ref LL_HRTIM_CAPTURETRIG_TE1_RESET
4029 * @arg @ref LL_HRTIM_CAPTURETRIG_TIME_CMP1
4030 * @arg @ref LL_HRTIM_CAPTURETRIG_TIME_CMP2
4031 */
4032 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetCaptureTrig(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t CaptureUnit)
4033 {
4035 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].CPT1xCR) +
4038 }
4040 /**
4041 * @brief Enable deadtime insertion for a given timer.
4042 * @rmtoll OUTxR DTEN LL_HRTIM_TIM_EnableDeadTime
4043 * @param HRTIMx High Resolution Timer instance
4044 * @param Timer This parameter can be one of the following values:
4045 * @arg @ref LL_HRTIM_TIMER_A
4046 * @arg @ref LL_HRTIM_TIMER_B
4047 * @arg @ref LL_HRTIM_TIMER_C
4048 * @arg @ref LL_HRTIM_TIMER_D
4049 * @arg @ref LL_HRTIM_TIMER_E
4050 * @retval None
4051 */
4053 {
4058 }
4060 /**
4061 * @brief Disable deadtime insertion for a given timer.
4062 * @rmtoll OUTxR DTEN LL_HRTIM_TIM_DisableDeadTime
4063 * @param HRTIMx High Resolution Timer instance
4064 * @param Timer This parameter can be one of the following values:
4065 * @arg @ref LL_HRTIM_TIMER_A
4066 * @arg @ref LL_HRTIM_TIMER_B
4067 * @arg @ref LL_HRTIM_TIMER_C
4068 * @arg @ref LL_HRTIM_TIMER_D
4069 * @arg @ref LL_HRTIM_TIMER_E
4070 * @retval None
4071 */
4073 {
4078 }
4080 /**
4081 * @brief Indicate whether deadtime insertion is enabled for a given timer.
4082 * @rmtoll OUTxR DTEN LL_HRTIM_TIM_IsEnabledDeadTime
4083 * @param HRTIMx High Resolution Timer instance
4084 * @param Timer This parameter can be one of the following values:
4085 * @arg @ref LL_HRTIM_TIMER_A
4086 * @arg @ref LL_HRTIM_TIMER_B
4087 * @arg @ref LL_HRTIM_TIMER_C
4088 * @arg @ref LL_HRTIM_TIMER_D
4089 * @arg @ref LL_HRTIM_TIMER_E
4090 * @retval State of DTEN bit in HRTIM_OUTxR register (1 or 0).
4091 */
4093 {
4098 }
4100 /**
4101 * @brief Set the delayed protection (DLYPRT) mode.
4102 * @rmtoll OUTxR DLYPRTEN LL_HRTIM_TIM_SetDLYPRTMode\n
4103 * OUTxR DLYPRT LL_HRTIM_TIM_SetDLYPRTMode
4104 * @note This function must be called prior enabling the delayed protection
4105 * @note Balanced Idle mode is only available in push-pull mode
4106 * @param HRTIMx High Resolution Timer instance
4107 * @param Timer This parameter can be one of the following values:
4108 * @arg @ref LL_HRTIM_TIMER_A
4109 * @arg @ref LL_HRTIM_TIMER_B
4110 * @arg @ref LL_HRTIM_TIMER_C
4111 * @arg @ref LL_HRTIM_TIMER_D
4112 * @arg @ref LL_HRTIM_TIMER_E
4113 * @param DLYPRTMode Delayed protection (DLYPRT) mode
4114 *
4115 * For timers A, B and C this parameter can be one of the following vallues:
4116 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV6
4117 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV6
4118 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV6
4119 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV6
4120 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV7
4121 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV7
4122 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV7
4123 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV7
4124 *
4125 * For timers D and E this parameter can be one of the following vallues:
4126 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV8
4127 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV8
4128 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV8
4129 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV8
4130 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV9
4131 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV9
4132 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV9
4133 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV9
4134 * @retval None
4135 */
4136 __STATIC_INLINE void LL_HRTIM_TIM_SetDLYPRTMode(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t DLYPRTMode)
4137 {
4142 }
4144 /**
4145 * @brief Get the delayed protection (DLYPRT) mode.
4146 * @rmtoll OUTxR DLYPRTEN LL_HRTIM_TIM_GetDLYPRTMode\n
4147 * OUTxR DLYPRT LL_HRTIM_TIM_GetDLYPRTMode
4148 * @param HRTIMx High Resolution Timer instance
4149 * @param Timer This parameter can be one of the following values:
4150 * @arg @ref LL_HRTIM_TIMER_A
4151 * @arg @ref LL_HRTIM_TIMER_B
4152 * @arg @ref LL_HRTIM_TIMER_C
4153 * @arg @ref LL_HRTIM_TIMER_D
4154 * @arg @ref LL_HRTIM_TIMER_E
4155 * @retval DLYPRTMode Delayed protection (DLYPRT) mode
4156 *
4157 * For timers A, B and C this parameter can be one of the following vallues:
4158 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV6
4159 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV6
4160 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV6
4161 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV6
4162 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV7
4163 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV7
4164 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV7
4165 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV7
4166 *
4167 * For timers D and E this parameter can be one of the following vallues:
4168 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV8
4169 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV8
4170 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV8
4171 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV8
4172 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT1_EEV9
4173 * @arg @ref LL_HRTIM_DLYPRT_DELAYOUT2_EEV9
4174 * @arg @ref LL_HRTIM_DLYPRT_DELAYBOTH_EEV9
4175 * @arg @ref LL_HRTIM_DLYPRT_BALANCED_EEV9
4176 */
4178 {
4183 }
4185 /**
4186 * @brief Enable delayed protection (DLYPRT) for a given timer.
4187 * @rmtoll OUTxR DLYPRTEN LL_HRTIM_TIM_EnableDLYPRT
4188 * @note This function must not be called once the concerned timer is enabled
4189 * @param HRTIMx High Resolution Timer instance
4190 * @param Timer This parameter can be one of the following values:
4191 * @arg @ref LL_HRTIM_TIMER_A
4192 * @arg @ref LL_HRTIM_TIMER_B
4193 * @arg @ref LL_HRTIM_TIMER_C
4194 * @arg @ref LL_HRTIM_TIMER_D
4195 * @arg @ref LL_HRTIM_TIMER_E
4196 * @retval None
4197 */
4199 {
4204 }
4206 /**
4207 * @brief Disable delayed protection (DLYPRT) for a given timer.
4208 * @rmtoll OUTxR DLYPRTEN LL_HRTIM_TIM_DisableDLYPRT
4209 * @note This function must not be called once the concerned timer is enabled
4210 * @param HRTIMx High Resolution Timer instance
4211 * @param Timer This parameter can be one of the following values:
4212 * @arg @ref LL_HRTIM_TIMER_A
4213 * @arg @ref LL_HRTIM_TIMER_B
4214 * @arg @ref LL_HRTIM_TIMER_C
4215 * @arg @ref LL_HRTIM_TIMER_D
4216 * @arg @ref LL_HRTIM_TIMER_E
4217 * @retval None
4218 */
4220 {
4225 }
4227 /**
4228 * @brief Indicate whether delayed protection (DLYPRT) is enabled for a given timer.
4229 * @rmtoll OUTxR DLYPRTEN LL_HRTIM_TIM_IsEnabledDLYPRT
4230 * @param HRTIMx High Resolution Timer instance
4231 * @param Timer This parameter can be one of the following values:
4232 * @arg @ref LL_HRTIM_TIMER_A
4233 * @arg @ref LL_HRTIM_TIMER_B
4234 * @arg @ref LL_HRTIM_TIMER_C
4235 * @arg @ref LL_HRTIM_TIMER_D
4236 * @arg @ref LL_HRTIM_TIMER_E
4237 * @retval State of DLYPRTEN bit in HRTIM_OUTxR register (1 or 0).
4238 */
4240 {
4245 }
4247 /**
4248 * @brief Enable the fault channel(s) for a given timer.
4249 * @rmtoll FLTxR FLT1EN LL_HRTIM_TIM_EnableFault\n
4250 * FLTxR FLT2EN LL_HRTIM_TIM_EnableFault\n
4251 * FLTxR FLT3EN LL_HRTIM_TIM_EnableFault\n
4252 * FLTxR FLT4EN LL_HRTIM_TIM_EnableFault\n
4253 * FLTxR FLT5EN LL_HRTIM_TIM_EnableFault
4254 * @param HRTIMx High Resolution Timer instance
4255 * @param Timer This parameter can be one of the following values:
4256 * @arg @ref LL_HRTIM_TIMER_A
4257 * @arg @ref LL_HRTIM_TIMER_B
4258 * @arg @ref LL_HRTIM_TIMER_C
4259 * @arg @ref LL_HRTIM_TIMER_D
4260 * @arg @ref LL_HRTIM_TIMER_E
4261 * @param Faults This parameter can be a combination of the following values:
4262 * @arg @ref LL_HRTIM_FAULT_1
4263 * @arg @ref LL_HRTIM_FAULT_2
4264 * @arg @ref LL_HRTIM_FAULT_3
4265 * @arg @ref LL_HRTIM_FAULT_4
4266 * @arg @ref LL_HRTIM_FAULT_5
4267 * @retval None
4268 */
4269 __STATIC_INLINE void LL_HRTIM_TIM_EnableFault(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Faults)
4270 {
4275 }
4277 /**
4278 * @brief Disable the fault channel(s) for a given timer.
4279 * @rmtoll FLTxR FLT1EN LL_HRTIM_TIM_DisableFault\n
4280 * FLTxR FLT2EN LL_HRTIM_TIM_DisableFault\n
4281 * FLTxR FLT3EN LL_HRTIM_TIM_DisableFault\n
4282 * FLTxR FLT4EN LL_HRTIM_TIM_DisableFault\n
4283 * FLTxR FLT5EN LL_HRTIM_TIM_DisableFault
4284 * @param HRTIMx High Resolution Timer instance
4285 * @param Timer This parameter can be one of the following values:
4286 * @arg @ref LL_HRTIM_TIMER_A
4287 * @arg @ref LL_HRTIM_TIMER_B
4288 * @arg @ref LL_HRTIM_TIMER_C
4289 * @arg @ref LL_HRTIM_TIMER_D
4290 * @arg @ref LL_HRTIM_TIMER_E
4291 * @param Faults This parameter can be a combination of the following values:
4292 * @arg @ref LL_HRTIM_FAULT_1
4293 * @arg @ref LL_HRTIM_FAULT_2
4294 * @arg @ref LL_HRTIM_FAULT_3
4295 * @arg @ref LL_HRTIM_FAULT_4
4296 * @arg @ref LL_HRTIM_FAULT_5
4297 * @retval None
4298 */
4299 __STATIC_INLINE void LL_HRTIM_TIM_DisableFault(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Faults)
4300 {
4305 }
4307 /**
4308 * @brief Indicate whether the fault channel is enabled for a given timer.
4309 * @rmtoll FLTxR FLT1EN LL_HRTIM_TIM_IsEnabledFault\n
4310 * FLTxR FLT2EN LL_HRTIM_TIM_IsEnabledFault\n
4311 * FLTxR FLT3EN LL_HRTIM_TIM_IsEnabledFault\n
4312 * FLTxR FLT4EN LL_HRTIM_TIM_IsEnabledFault\n
4313 * FLTxR FLT5EN LL_HRTIM_TIM_IsEnabledFault
4314 * @param HRTIMx High Resolution Timer instance
4315 * @param Timer This parameter can be one of the following values:
4316 * @arg @ref LL_HRTIM_TIMER_A
4317 * @arg @ref LL_HRTIM_TIMER_B
4318 * @arg @ref LL_HRTIM_TIMER_C
4319 * @arg @ref LL_HRTIM_TIMER_D
4320 * @arg @ref LL_HRTIM_TIMER_E
4321 * @param Fault This parameter can be one of the following values:
4322 * @arg @ref LL_HRTIM_FAULT_1
4323 * @arg @ref LL_HRTIM_FAULT_2
4324 * @arg @ref LL_HRTIM_FAULT_3
4325 * @arg @ref LL_HRTIM_FAULT_4
4326 * @arg @ref LL_HRTIM_FAULT_5
4327 * @retval State of FLTxEN bit in HRTIM_FLTxR register (1 or 0).
4328 */
4329 __STATIC_INLINE uint32_t LL_HRTIM_TIM_IsEnabledFault(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Fault)
4330 {
4335 }
4337 /**
4338 * @brief Lock the fault conditioning set-up for a given timer.
4339 * @rmtoll FLTxR FLTLCK LL_HRTIM_TIM_LockFault
4340 * @note Timer fault-related set-up is frozen until the next HRTIM or system reset
4341 * @param HRTIMx High Resolution Timer instance
4342 * @param Timer This parameter can be one of the following values:
4343 * @arg @ref LL_HRTIM_TIMER_A
4344 * @arg @ref LL_HRTIM_TIMER_B
4345 * @arg @ref LL_HRTIM_TIMER_C
4346 * @arg @ref LL_HRTIM_TIMER_D
4347 * @arg @ref LL_HRTIM_TIMER_E
4348 * @retval None
4349 */
4351 {
4356 }
4358 /**
4359 * @brief Define how the timer behaves during a burst mode operation.
4360 * @rmtoll BMCR MTBM LL_HRTIM_TIM_SetBurstModeOption\n
4361 * BMCR TABM LL_HRTIM_TIM_SetBurstModeOption\n
4362 * BMCR TBBM LL_HRTIM_TIM_SetBurstModeOption\n
4363 * BMCR TCBM LL_HRTIM_TIM_SetBurstModeOption\n
4364 * BMCR TDBM LL_HRTIM_TIM_SetBurstModeOption\n
4365 * BMCR TEBM LL_HRTIM_TIM_SetBurstModeOption
4366 * @note This function must not be called when the burst mode is enabled
4367 * @param HRTIMx High Resolution Timer instance
4368 * @param Timer This parameter can be one of the following values:
4369 * @arg @ref LL_HRTIM_TIMER_MASTER
4370 * @arg @ref LL_HRTIM_TIMER_A
4371 * @arg @ref LL_HRTIM_TIMER_B
4372 * @arg @ref LL_HRTIM_TIMER_C
4373 * @arg @ref LL_HRTIM_TIMER_D
4374 * @arg @ref LL_HRTIM_TIMER_E
4375 * @param BurtsModeOption This parameter can be one of the following values:
4376 * @arg @ref LL_HRTIM_BURSTMODE_MAINTAINCLOCK
4377 * @arg @ref LL_HRTIM_BURSTMODE_RESETCOUNTER
4378 * @retval None
4379 */
4380 __STATIC_INLINE void LL_HRTIM_TIM_SetBurstModeOption(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t BurtsModeOption)
4381 {
4384 }
4386 /**
4387 * @brief Retrieve how the timer behaves during a burst mode operation.
4388 * @rmtoll BMCR MCR LL_HRTIM_TIM_GetBurstModeOption\n
4389 * BMCR TABM LL_HRTIM_TIM_GetBurstModeOption\n
4390 * BMCR TBBM LL_HRTIM_TIM_GetBurstModeOption\n
4391 * BMCR TCBM LL_HRTIM_TIM_GetBurstModeOption\n
4392 * BMCR TDBM LL_HRTIM_TIM_GetBurstModeOption\n
4393 * BMCR TEBM LL_HRTIM_TIM_GetBurstModeOption
4394 * @param HRTIMx High Resolution Timer instance
4395 * @param Timer This parameter can be one of the following values:
4396 * @arg @ref LL_HRTIM_TIMER_MASTER
4397 * @arg @ref LL_HRTIM_TIMER_A
4398 * @arg @ref LL_HRTIM_TIMER_B
4399 * @arg @ref LL_HRTIM_TIMER_C
4400 * @arg @ref LL_HRTIM_TIMER_D
4401 * @arg @ref LL_HRTIM_TIMER_E
4402 * @retval BurtsMode This parameter can be one of the following values:
4403 * @arg @ref LL_HRTIM_BURSTMODE_MAINTAINCLOCK
4404 * @arg @ref LL_HRTIM_BURSTMODE_RESETCOUNTER
4405 */
4406 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetBurstModeOption(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
4407 {
4410 }
4412 /**
4413 * @brief Program which registers are to be written by Burst DMA transfers.
4414 * @rmtoll BDMUPDR MTBM LL_HRTIM_TIM_ConfigBurstDMA\n
4415 * BDMUPDR MICR LL_HRTIM_TIM_ConfigBurstDMA\n
4416 * BDMUPDR MDIER LL_HRTIM_TIM_ConfigBurstDMA\n
4417 * BDMUPDR MCNT LL_HRTIM_TIM_ConfigBurstDMA\n
4418 * BDMUPDR MPER LL_HRTIM_TIM_ConfigBurstDMA\n
4419 * BDMUPDR MREP LL_HRTIM_TIM_ConfigBurstDMA\n
4420 * BDMUPDR MCMP1 LL_HRTIM_TIM_ConfigBurstDMA\n
4421 * BDMUPDR MCMP2 LL_HRTIM_TIM_ConfigBurstDMA\n
4422 * BDMUPDR MCMP3 LL_HRTIM_TIM_ConfigBurstDMA\n
4423 * BDMUPDR MCMP4 LL_HRTIM_TIM_ConfigBurstDMA\n
4424 * BDTxUPDR TIMxCR LL_HRTIM_TIM_ConfigBurstDMA\n
4425 * BDTxUPDR TIMxICR LL_HRTIM_TIM_ConfigBurstDMA\n
4426 * BDTxUPDR TIMxDIER LL_HRTIM_TIM_ConfigBurstDMA\n
4427 * BDTxUPDR TIMxCNT LL_HRTIM_TIM_ConfigBurstDMA\n
4428 * BDTxUPDR TIMxPER LL_HRTIM_TIM_ConfigBurstDMA\n
4429 * BDTxUPDR TIMxREP LL_HRTIM_TIM_ConfigBurstDMA\n
4430 * BDTxUPDR TIMxCMP1 LL_HRTIM_TIM_ConfigBurstDMA\n
4431 * BDTxUPDR TIMxCMP2 LL_HRTIM_TIM_ConfigBurstDMA\n
4432 * BDTxUPDR TIMxCMP3 LL_HRTIM_TIM_ConfigBurstDMA\n
4433 * BDTxUPDR TIMxCMP4 LL_HRTIM_TIM_ConfigBurstDMA\n
4434 * BDTxUPDR TIMxDTR LL_HRTIM_TIM_ConfigBurstDMA\n
4435 * BDTxUPDR TIMxSET1R LL_HRTIM_TIM_ConfigBurstDMA\n
4436 * BDTxUPDR TIMxRST1R LL_HRTIM_TIM_ConfigBurstDMA\n
4437 * BDTxUPDR TIMxSET2R LL_HRTIM_TIM_ConfigBurstDMA\n
4438 * BDTxUPDR TIMxRST2R LL_HRTIM_TIM_ConfigBurstDMA\n
4439 * BDTxUPDR TIAEEFR1 LL_HRTIM_TIM_ConfigBurstDMA\n
4440 * BDTxUPDR TIMxEEFR2 LL_HRTIM_TIM_ConfigBurstDMA\n
4441 * BDTxUPDR TIMxRSTR LL_HRTIM_TIM_ConfigBurstDMA\n
4442 * BDTxUPDR TIMxOUTR LL_HRTIM_TIM_ConfigBurstDMA\n
4443 * BDTxUPDR TIMxLTCH LL_HRTIM_TIM_ConfigBurstDMA
4444 * @param HRTIMx High Resolution Timer instance
4445 * @param Timer This parameter can be one of the following values:
4446 * @arg @ref LL_HRTIM_TIMER_MASTER
4447 * @arg @ref LL_HRTIM_TIMER_A
4448 * @arg @ref LL_HRTIM_TIMER_B
4449 * @arg @ref LL_HRTIM_TIMER_C
4450 * @arg @ref LL_HRTIM_TIMER_D
4451 * @arg @ref LL_HRTIM_TIMER_E
4452 * @param Registers Registers to be updated by the DMA request
4453 *
4454 * For Master timer this parameter can be can be a combination of the following values:
4455 * @arg @ref LL_HRTIM_BURSTDMA_NONE
4456 * @arg @ref LL_HRTIM_BURSTDMA_MCR
4457 * @arg @ref LL_HRTIM_BURSTDMA_MICR
4458 * @arg @ref LL_HRTIM_BURSTDMA_MDIER
4459 * @arg @ref LL_HRTIM_BURSTDMA_MCNT
4460 * @arg @ref LL_HRTIM_BURSTDMA_MPER
4461 * @arg @ref LL_HRTIM_BURSTDMA_MREP
4462 * @arg @ref LL_HRTIM_BURSTDMA_MCMP1
4463 * @arg @ref LL_HRTIM_BURSTDMA_MCMP2
4464 * @arg @ref LL_HRTIM_BURSTDMA_MCMP3
4465 * @arg @ref LL_HRTIM_BURSTDMA_MCMP4
4466 *
4467 * For Timers A..E this parameter can be can be a combination of the following values:
4468 * @arg @ref LL_HRTIM_BURSTDMA_NONE
4469 * @arg @ref LL_HRTIM_BURSTDMA_TIMMCR
4470 * @arg @ref LL_HRTIM_BURSTDMA_TIMICR
4471 * @arg @ref LL_HRTIM_BURSTDMA_TIMDIER
4472 * @arg @ref LL_HRTIM_BURSTDMA_TIMCNT
4473 * @arg @ref LL_HRTIM_BURSTDMA_TIMPER
4474 * @arg @ref LL_HRTIM_BURSTDMA_TIMREP
4475 * @arg @ref LL_HRTIM_BURSTDMA_TIMCMP1
4476 * @arg @ref LL_HRTIM_BURSTDMA_TIMCMP2
4477 * @arg @ref LL_HRTIM_BURSTDMA_TIMCMP3
4478 * @arg @ref LL_HRTIM_BURSTDMA_TIMCMP4
4479 * @arg @ref LL_HRTIM_BURSTDMA_TIMDTR
4480 * @arg @ref LL_HRTIM_BURSTDMA_TIMSET1R
4481 * @arg @ref LL_HRTIM_BURSTDMA_TIMRST1R
4482 * @arg @ref LL_HRTIM_BURSTDMA_TIMSET2R
4483 * @arg @ref LL_HRTIM_BURSTDMA_TIMRST2R
4484 * @arg @ref LL_HRTIM_BURSTDMA_TIMEEFR1
4485 * @arg @ref LL_HRTIM_BURSTDMA_TIMEEFR2
4486 * @arg @ref LL_HRTIM_BURSTDMA_TIMRSTR
4487 * @arg @ref LL_HRTIM_BURSTDMA_TIMCHPR
4488 * @arg @ref LL_HRTIM_BURSTDMA_TIMOUTR
4489 * @arg @ref LL_HRTIM_BURSTDMA_TIMFLTR
4490 * @retval None
4491 */
4492 __STATIC_INLINE void LL_HRTIM_TIM_ConfigBurstDMA(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Registers)
4493 {
4495 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sCommonRegs.BDMUPR) + 4 * iTimer));
4497 }
4499 /**
4500 * @brief Indicate on which output the signal is currently applied.
4501 * @rmtoll TIMxISR CPPSTAT LL_HRTIM_TIM_GetCurrentPushPullStatus
4502 * @note Only significant when the timer operates in push-pull mode.
4503 * @param HRTIMx High Resolution Timer instance
4504 * @param Timer This parameter can be one of the following values:
4505 * @arg @ref LL_HRTIM_TIMER_A
4506 * @arg @ref LL_HRTIM_TIMER_B
4507 * @arg @ref LL_HRTIM_TIMER_C
4508 * @arg @ref LL_HRTIM_TIMER_D
4509 * @arg @ref LL_HRTIM_TIMER_E
4510 * @retval CPPSTAT This parameter can be one of the following values:
4511 * @arg @ref LL_HRTIM_CPPSTAT_OUTPUT1
4512 * @arg @ref LL_HRTIM_CPPSTAT_OUTPUT2
4513 */
4514 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetCurrentPushPullStatus(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
4515 {
4520 }
4522 /**
4523 * @brief Indicate on which output the signal was applied, in push-pull mode, balanced fault mode or delayed idle mode, when the protection was triggered.
4524 * @rmtoll TIMxISR IPPSTAT LL_HRTIM_TIM_GetIdlePushPullStatus
4525 * @param HRTIMx High Resolution Timer instance
4526 * @param Timer This parameter can be one of the following values:
4527 * @arg @ref LL_HRTIM_TIMER_A
4528 * @arg @ref LL_HRTIM_TIMER_B
4529 * @arg @ref LL_HRTIM_TIMER_C
4530 * @arg @ref LL_HRTIM_TIMER_D
4531 * @arg @ref LL_HRTIM_TIMER_E
4532 * @retval IPPSTAT This parameter can be one of the following values:
4533 * @arg @ref LL_HRTIM_IPPSTAT_OUTPUT1
4534 * @arg @ref LL_HRTIM_IPPSTAT_OUTPUT2
4535 */
4536 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetIdlePushPullStatus(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
4537 {
4542 }
4544 /**
4545 * @brief Set the event filter for a given timer.
4546 * @rmtoll EEFxR1 EE1LTCH LL_HRTIM_TIM_SetEventFilter\n
4547 * EEFxR1 EE2LTCH LL_HRTIM_TIM_SetEventFilter\n
4548 * EEFxR1 EE3LTCH LL_HRTIM_TIM_SetEventFilter\n
4549 * EEFxR1 EE4LTCH LL_HRTIM_TIM_SetEventFilter\n
4550 * EEFxR1 EE5LTCH LL_HRTIM_TIM_SetEventFilter\n
4551 * EEFxR2 EE6LTCH LL_HRTIM_TIM_SetEventFilter\n
4552 * EEFxR2 EE7LTCH LL_HRTIM_TIM_SetEventFilter\n
4553 * EEFxR2 EE8LTCH LL_HRTIM_TIM_SetEventFilter\n
4554 * EEFxR2 EE9LTCH LL_HRTIM_TIM_SetEventFilter\n
4555 * EEFxR2 EE10LTCH LL_HRTIM_TIM_SetEventFilter
4556 * @note This function must not be called when the timer counter is enabled.
4557 * @param HRTIMx High Resolution Timer instance
4558 * @param Timer This parameter can be one of the following values:
4559 * @arg @ref LL_HRTIM_TIMER_A
4560 * @arg @ref LL_HRTIM_TIMER_B
4561 * @arg @ref LL_HRTIM_TIMER_C
4562 * @arg @ref LL_HRTIM_TIMER_D
4563 * @arg @ref LL_HRTIM_TIMER_E
4564 * @param Event This parameter can be one of the following values:
4565 * @arg @ref LL_HRTIM_EVENT_1
4566 * @arg @ref LL_HRTIM_EVENT_2
4567 * @arg @ref LL_HRTIM_EVENT_3
4568 * @arg @ref LL_HRTIM_EVENT_4
4569 * @arg @ref LL_HRTIM_EVENT_5
4570 * @arg @ref LL_HRTIM_EVENT_6
4571 * @arg @ref LL_HRTIM_EVENT_7
4572 * @arg @ref LL_HRTIM_EVENT_8
4573 * @arg @ref LL_HRTIM_EVENT_9
4574 * @arg @ref LL_HRTIM_EVENT_10
4575 * @param Filter This parameter can be one of the following values:
4576 * @arg @ref LL_HRTIM_EEFLTR_NONE
4577 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP1
4578 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP2
4579 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP3
4580 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP4
4581 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR1
4582 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR2
4583 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR3
4584 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR4
4585 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR5
4586 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR6
4587 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR7
4588 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR8
4589 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGCMP2
4590 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGCMP3
4591 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGTIM
4592 * @retval None
4593 */
4594 __STATIC_INLINE void LL_HRTIM_TIM_SetEventFilter(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Event, uint32_t Filter)
4595 {
4600 MODIFY_REG(*pReg, (HRTIM_EEFR1_EE1FLTR << REG_SHIFT_TAB_EExSRC[iEvent]), (Filter << REG_SHIFT_TAB_EExSRC[iEvent]));
4601 }
4603 /**
4604 * @brief Get actual event filter settings for a given timer.
4605 * @rmtoll EEFxR1 EE1FLTR LL_HRTIM_TIM_GetEventFilter\n
4606 * EEFxR1 EE2FLTR LL_HRTIM_TIM_GetEventFilter\n
4607 * EEFxR1 EE3FLTR LL_HRTIM_TIM_GetEventFilter\n
4608 * EEFxR1 EE4FLTR LL_HRTIM_TIM_GetEventFilter\n
4609 * EEFxR1 EE5FLTR LL_HRTIM_TIM_GetEventFilter\n
4610 * EEFxR2 EE6FLTR LL_HRTIM_TIM_GetEventFilter\n
4611 * EEFxR2 EE7FLTR LL_HRTIM_TIM_GetEventFilter\n
4612 * EEFxR2 EE8FLTR LL_HRTIM_TIM_GetEventFilter\n
4613 * EEFxR2 EE9FLTR LL_HRTIM_TIM_GetEventFilter\n
4614 * EEFxR2 EE10FLTR LL_HRTIM_TIM_GetEventFilter
4615 * @param HRTIMx High Resolution Timer instance
4616 * @param Timer This parameter can be one of the following values:
4617 * @arg @ref LL_HRTIM_TIMER_A
4618 * @arg @ref LL_HRTIM_TIMER_B
4619 * @arg @ref LL_HRTIM_TIMER_C
4620 * @arg @ref LL_HRTIM_TIMER_D
4621 * @arg @ref LL_HRTIM_TIMER_E
4622 * @param Event This parameter can be one of the following values:
4623 * @arg @ref LL_HRTIM_EVENT_1
4624 * @arg @ref LL_HRTIM_EVENT_2
4625 * @arg @ref LL_HRTIM_EVENT_3
4626 * @arg @ref LL_HRTIM_EVENT_4
4627 * @arg @ref LL_HRTIM_EVENT_5
4628 * @arg @ref LL_HRTIM_EVENT_6
4629 * @arg @ref LL_HRTIM_EVENT_7
4630 * @arg @ref LL_HRTIM_EVENT_8
4631 * @arg @ref LL_HRTIM_EVENT_9
4632 * @arg @ref LL_HRTIM_EVENT_10
4633 * @retval Filter This parameter can be one of the following values:
4634 * @arg @ref LL_HRTIM_EEFLTR_NONE
4635 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP1
4636 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP2
4637 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP3
4638 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGCMP4
4639 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR1
4640 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR2
4641 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR3
4642 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR4
4643 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR5
4644 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR6
4645 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR7
4646 * @arg @ref LL_HRTIM_EEFLTR_BLANKINGFLTR8
4647 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGCMP2
4648 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGCMP3
4649 * @arg @ref LL_HRTIM_EEFLTR_WINDOWINGTIM
4650 */
4651 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetEventFilter(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Event)
4652 {
4657 return (READ_BIT(*pReg, HRTIM_EEFR1_EE1FLTR << REG_SHIFT_TAB_EExSRC[iEvent]) >> REG_SHIFT_TAB_EExSRC[iEvent]);
4658 }
4660 /**
4661 * @brief Enable or disable event latch mechanism for a given timer.
4662 * @rmtoll EEFxR1 EE1LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4663 * EEFxR1 EE2LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4664 * EEFxR1 EE3LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4665 * EEFxR1 EE4LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4666 * EEFxR1 EE5LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4667 * EEFxR2 EE6LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4668 * EEFxR2 EE7LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4669 * EEFxR2 EE8LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4670 * EEFxR2 EE9LTCH LL_HRTIM_TIM_SetEventLatchStatus\n
4671 * EEFxR2 EE10LTCH LL_HRTIM_TIM_SetEventLatchStatus
4672 * @note This function must not be called when the timer counter is enabled.
4673 * @param HRTIMx High Resolution Timer instance
4674 * @param Timer This parameter can be one of the following values:
4675 * @arg @ref LL_HRTIM_TIMER_A
4676 * @arg @ref LL_HRTIM_TIMER_B
4677 * @arg @ref LL_HRTIM_TIMER_C
4678 * @arg @ref LL_HRTIM_TIMER_D
4679 * @arg @ref LL_HRTIM_TIMER_E
4680 * @param Event This parameter can be one of the following values:
4681 * @arg @ref LL_HRTIM_EVENT_1
4682 * @arg @ref LL_HRTIM_EVENT_2
4683 * @arg @ref LL_HRTIM_EVENT_3
4684 * @arg @ref LL_HRTIM_EVENT_4
4685 * @arg @ref LL_HRTIM_EVENT_5
4686 * @arg @ref LL_HRTIM_EVENT_6
4687 * @arg @ref LL_HRTIM_EVENT_7
4688 * @arg @ref LL_HRTIM_EVENT_8
4689 * @arg @ref LL_HRTIM_EVENT_9
4690 * @arg @ref LL_HRTIM_EVENT_10
4691 * @param LatchStatus This parameter can be one of the following values:
4692 * @arg @ref LL_HRTIM_EELATCH_DISABLED
4693 * @arg @ref LL_HRTIM_EELATCH_ENABLED
4694 * @retval None
4695 */
4696 __STATIC_INLINE void LL_HRTIM_TIM_SetEventLatchStatus(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Event,
4698 {
4703 MODIFY_REG(*pReg, (HRTIM_EEFR1_EE1LTCH << REG_SHIFT_TAB_EExSRC[iEvent]), (LatchStatus << REG_SHIFT_TAB_EExSRC[iEvent]));
4704 }
4706 /**
4707 * @brief Get actual event latch status for a given timer.
4708 * @rmtoll EEFxR1 EE1LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4709 * EEFxR1 EE2LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4710 * EEFxR1 EE3LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4711 * EEFxR1 EE4LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4712 * EEFxR1 EE5LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4713 * EEFxR2 EE6LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4714 * EEFxR2 EE7LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4715 * EEFxR2 EE8LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4716 * EEFxR2 EE9LTCH LL_HRTIM_TIM_GetEventLatchStatus\n
4717 * EEFxR2 EE10LTCH LL_HRTIM_TIM_GetEventLatchStatus
4718 * @param HRTIMx High Resolution Timer instance
4719 * @param Timer This parameter can be one of the following values:
4720 * @arg @ref LL_HRTIM_TIMER_A
4721 * @arg @ref LL_HRTIM_TIMER_B
4722 * @arg @ref LL_HRTIM_TIMER_C
4723 * @arg @ref LL_HRTIM_TIMER_D
4724 * @arg @ref LL_HRTIM_TIMER_E
4725 * @param Event This parameter can be one of the following values:
4726 * @arg @ref LL_HRTIM_EVENT_1
4727 * @arg @ref LL_HRTIM_EVENT_2
4728 * @arg @ref LL_HRTIM_EVENT_3
4729 * @arg @ref LL_HRTIM_EVENT_4
4730 * @arg @ref LL_HRTIM_EVENT_5
4731 * @arg @ref LL_HRTIM_EVENT_6
4732 * @arg @ref LL_HRTIM_EVENT_7
4733 * @arg @ref LL_HRTIM_EVENT_8
4734 * @arg @ref LL_HRTIM_EVENT_9
4735 * @arg @ref LL_HRTIM_EVENT_10
4736 * @retval LatchStatus This parameter can be one of the following values:
4737 * @arg @ref LL_HRTIM_EELATCH_DISABLED
4738 * @arg @ref LL_HRTIM_EELATCH_ENABLED
4739 */
4740 __STATIC_INLINE uint32_t LL_HRTIM_TIM_GetEventLatchStatus(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Event)
4741 {
4746 return (READ_BIT(*pReg, HRTIM_EEFR1_EE1LTCH << REG_SHIFT_TAB_EExSRC[iEvent]) >> REG_SHIFT_TAB_EExSRC[iEvent]);
4747 }
4749 /**
4750 * @}
4751 */
4753 /** @defgroup HRTIM_EF_Dead_Time_Configuration Dead_Time_Configuration
4754 * @{
4755 */
4757 /**
4758 * @brief Configure the dead time insertion feature for a given timer.
4759 * @rmtoll DTxR DTPRSC LL_HRTIM_DT_Config\n
4760 * DTxR SDTF LL_HRTIM_DT_Config\n
4761 * DTxR SDRT LL_HRTIM_DT_Config
4762 * @param HRTIMx High Resolution Timer instance
4763 * @param Timer This parameter can be one of the following values:
4764 * @arg @ref LL_HRTIM_TIMER_A
4765 * @arg @ref LL_HRTIM_TIMER_B
4766 * @arg @ref LL_HRTIM_TIMER_C
4767 * @arg @ref LL_HRTIM_TIMER_D
4768 * @arg @ref LL_HRTIM_TIMER_E
4769 * @param Configuration This parameter must be a combination of all the following values:
4770 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL8 or ... or @ref LL_HRTIM_DT_PRESCALER_DIV16
4771 * @arg @ref LL_HRTIM_DT_RISING_POSITIVE or @ref LL_HRTIM_DT_RISING_NEGATIVE
4772 * @arg @ref LL_HRTIM_DT_FALLING_POSITIVE or @ref LL_HRTIM_DT_FALLING_NEGATIVE
4773 * @retval None
4774 */
4775 __STATIC_INLINE void LL_HRTIM_DT_Config(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Configuration)
4776 {
4781 }
4783 /**
4784 * @brief Set the deadtime prescaler value.
4785 * @rmtoll DTxR DTPRSC LL_HRTIM_DT_SetPrescaler
4786 * @param HRTIMx High Resolution Timer instance
4787 * @param Timer This parameter can be one of the following values:
4788 * @arg @ref LL_HRTIM_TIMER_A
4789 * @arg @ref LL_HRTIM_TIMER_B
4790 * @arg @ref LL_HRTIM_TIMER_C
4791 * @arg @ref LL_HRTIM_TIMER_D
4792 * @arg @ref LL_HRTIM_TIMER_E
4793 * @param Prescaler This parameter can be one of the following values:
4794 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL8
4795 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL4
4796 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL2
4797 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV1
4798 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV2
4799 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV4
4800 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV8
4801 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV16
4802 * @retval None
4803 */
4804 __STATIC_INLINE void LL_HRTIM_DT_SetPrescaler(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Prescaler)
4805 {
4810 }
4812 /**
4813 * @brief Get actual deadtime prescaler value.
4814 * @rmtoll DTxR DTPRSC LL_HRTIM_DT_GetPrescaler
4815 * @param HRTIMx High Resolution Timer instance
4816 * @param Timer This parameter can be one of the following values:
4817 * @arg @ref LL_HRTIM_TIMER_A
4818 * @arg @ref LL_HRTIM_TIMER_B
4819 * @arg @ref LL_HRTIM_TIMER_C
4820 * @arg @ref LL_HRTIM_TIMER_D
4821 * @arg @ref LL_HRTIM_TIMER_E
4822 * @retval Prescaler This parameter can be one of the following values:
4823 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL8
4824 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL4
4825 * @arg @ref LL_HRTIM_DT_PRESCALER_MUL2
4826 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV1
4827 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV2
4828 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV4
4829 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV8
4830 * @arg @ref LL_HRTIM_DT_PRESCALER_DIV16
4831 */
4833 {
4838 }
4840 /**
4841 * @brief Set the deadtime rising value.
4842 * @rmtoll DTxR DTR LL_HRTIM_DT_SetRisingValue
4843 * @param HRTIMx High Resolution Timer instance
4844 * @param Timer This parameter can be one of the following values:
4845 * @arg @ref LL_HRTIM_TIMER_A
4846 * @arg @ref LL_HRTIM_TIMER_B
4847 * @arg @ref LL_HRTIM_TIMER_C
4848 * @arg @ref LL_HRTIM_TIMER_D
4849 * @arg @ref LL_HRTIM_TIMER_E
4850 * @param RisingValue Value between 0 and 0x1FF
4851 * @retval None
4852 */
4853 __STATIC_INLINE void LL_HRTIM_DT_SetRisingValue(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t RisingValue)
4854 {
4859 }
4861 /**
4862 * @brief Get actual deadtime rising value.
4863 * @rmtoll DTxR DTR LL_HRTIM_DT_GetRisingValue
4864 * @param HRTIMx High Resolution Timer instance
4865 * @param Timer This parameter can be one of the following values:
4866 * @arg @ref LL_HRTIM_TIMER_A
4867 * @arg @ref LL_HRTIM_TIMER_B
4868 * @arg @ref LL_HRTIM_TIMER_C
4869 * @arg @ref LL_HRTIM_TIMER_D
4870 * @arg @ref LL_HRTIM_TIMER_E
4871 * @retval RisingValue Value between 0 and 0x1FF
4872 */
4874 {
4879 }
4881 /**
4882 * @brief Set the deadtime sign on rising edge.
4883 * @rmtoll DTxR SDTR LL_HRTIM_DT_SetRisingSign
4884 * @param HRTIMx High Resolution Timer instance
4885 * @param Timer This parameter can be one of the following values:
4886 * @arg @ref LL_HRTIM_TIMER_A
4887 * @arg @ref LL_HRTIM_TIMER_B
4888 * @arg @ref LL_HRTIM_TIMER_C
4889 * @arg @ref LL_HRTIM_TIMER_D
4890 * @arg @ref LL_HRTIM_TIMER_E
4891 * @param RisingSign This parameter can be one of the following values:
4892 * @arg @ref LL_HRTIM_DT_RISING_POSITIVE
4893 * @arg @ref LL_HRTIM_DT_RISING_NEGATIVE
4894 * @retval None
4895 */
4896 __STATIC_INLINE void LL_HRTIM_DT_SetRisingSign(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t RisingSign)
4897 {
4902 }
4904 /**
4905 * @brief Get actual deadtime sign on rising edge.
4906 * @rmtoll DTxR SDTR LL_HRTIM_DT_GetRisingSign
4907 * @param HRTIMx High Resolution Timer instance
4908 * @param Timer This parameter can be one of the following values:
4909 * @arg @ref LL_HRTIM_TIMER_A
4910 * @arg @ref LL_HRTIM_TIMER_B
4911 * @arg @ref LL_HRTIM_TIMER_C
4912 * @arg @ref LL_HRTIM_TIMER_D
4913 * @arg @ref LL_HRTIM_TIMER_E
4914 * @retval RisingSign This parameter can be one of the following values:
4915 * @arg @ref LL_HRTIM_DT_RISING_POSITIVE
4916 * @arg @ref LL_HRTIM_DT_RISING_NEGATIVE
4917 */
4919 {
4924 }
4926 /**
4927 * @brief Set the deadime falling value.
4928 * @rmtoll DTxR DTF LL_HRTIM_DT_SetFallingValue
4929 * @param HRTIMx High Resolution Timer instance
4930 * @param Timer This parameter can be one of the following values:
4931 * @arg @ref LL_HRTIM_TIMER_A
4932 * @arg @ref LL_HRTIM_TIMER_B
4933 * @arg @ref LL_HRTIM_TIMER_C
4934 * @arg @ref LL_HRTIM_TIMER_D
4935 * @arg @ref LL_HRTIM_TIMER_E
4936 * @param FallingValue Value between 0 and 0x1FF
4937 * @retval None
4938 */
4939 __STATIC_INLINE void LL_HRTIM_DT_SetFallingValue(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t FallingValue)
4940 {
4945 }
4947 /**
4948 * @brief Get actual deadtime falling value
4949 * @rmtoll DTxR DTF LL_HRTIM_DT_GetFallingValue
4950 * @param HRTIMx High Resolution Timer instance
4951 * @param Timer This parameter can be one of the following values:
4952 * @arg @ref LL_HRTIM_TIMER_A
4953 * @arg @ref LL_HRTIM_TIMER_B
4954 * @arg @ref LL_HRTIM_TIMER_C
4955 * @arg @ref LL_HRTIM_TIMER_D
4956 * @arg @ref LL_HRTIM_TIMER_E
4957 * @retval FallingValue Value between 0 and 0x1FF
4958 */
4960 {
4965 }
4967 /**
4968 * @brief Set the deadtime sign on falling edge.
4969 * @rmtoll DTxR SDTF LL_HRTIM_DT_SetFallingSign
4970 * @param HRTIMx High Resolution Timer instance
4971 * @param Timer This parameter can be one of the following values:
4972 * @arg @ref LL_HRTIM_TIMER_A
4973 * @arg @ref LL_HRTIM_TIMER_B
4974 * @arg @ref LL_HRTIM_TIMER_C
4975 * @arg @ref LL_HRTIM_TIMER_D
4976 * @arg @ref LL_HRTIM_TIMER_E
4977 * @param FallingSign This parameter can be one of the following values:
4978 * @arg @ref LL_HRTIM_DT_FALLING_POSITIVE
4979 * @arg @ref LL_HRTIM_DT_FALLING_NEGATIVE
4980 * @retval None
4981 */
4982 __STATIC_INLINE void LL_HRTIM_DT_SetFallingSign(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t FallingSign)
4983 {
4988 }
4990 /**
4991 * @brief Get actual deadtime sign on falling edge.
4992 * @rmtoll DTxR SDTF LL_HRTIM_DT_GetFallingSign
4993 * @param HRTIMx High Resolution Timer instance
4994 * @param Timer This parameter can be one of the following values:
4995 * @arg @ref LL_HRTIM_TIMER_A
4996 * @arg @ref LL_HRTIM_TIMER_B
4997 * @arg @ref LL_HRTIM_TIMER_C
4998 * @arg @ref LL_HRTIM_TIMER_D
4999 * @arg @ref LL_HRTIM_TIMER_E
5000 * @retval FallingSign This parameter can be one of the following values:
5001 * @arg @ref LL_HRTIM_DT_FALLING_POSITIVE
5002 * @arg @ref LL_HRTIM_DT_FALLING_NEGATIVE
5003 */
5005 {
5010 }
5012 /**
5013 * @brief Lock the deadtime value and sign on rising edge.
5014 * @rmtoll DTxR DTRLK LL_HRTIM_DT_LockRising
5015 * @param HRTIMx High Resolution Timer instance
5016 * @param Timer This parameter can be one of the following values:
5017 * @arg @ref LL_HRTIM_TIMER_A
5018 * @arg @ref LL_HRTIM_TIMER_B
5019 * @arg @ref LL_HRTIM_TIMER_C
5020 * @arg @ref LL_HRTIM_TIMER_D
5021 * @arg @ref LL_HRTIM_TIMER_E
5022 * @retval None
5023 */
5025 {
5030 }
5032 /**
5033 * @brief Lock the deadtime sign on rising edge.
5034 * @rmtoll DTxR DTRSLK LL_HRTIM_DT_LockRisingSign
5035 * @param HRTIMx High Resolution Timer instance
5036 * @param Timer This parameter can be one of the following values:
5037 * @arg @ref LL_HRTIM_TIMER_A
5038 * @arg @ref LL_HRTIM_TIMER_B
5039 * @arg @ref LL_HRTIM_TIMER_C
5040 * @arg @ref LL_HRTIM_TIMER_D
5041 * @arg @ref LL_HRTIM_TIMER_E
5042 * @retval None
5043 */
5045 {
5050 }
5052 /**
5053 * @brief Lock the deadtime value and sign on falling edge.
5054 * @rmtoll DTxR DTFLK LL_HRTIM_DT_LockFalling
5055 * @param HRTIMx High Resolution Timer instance
5056 * @param Timer This parameter can be one of the following values:
5057 * @arg @ref LL_HRTIM_TIMER_A
5058 * @arg @ref LL_HRTIM_TIMER_B
5059 * @arg @ref LL_HRTIM_TIMER_C
5060 * @arg @ref LL_HRTIM_TIMER_D
5061 * @arg @ref LL_HRTIM_TIMER_E
5062 * @retval None
5063 */
5065 {
5070 }
5072 /**
5073 * @brief Lock the deadtime sign on falling edge.
5074 * @rmtoll DTxR DTFSLK LL_HRTIM_DT_LockFallingSign
5075 * @param HRTIMx High Resolution Timer instance
5076 * @param Timer This parameter can be one of the following values:
5077 * @arg @ref LL_HRTIM_TIMER_A
5078 * @arg @ref LL_HRTIM_TIMER_B
5079 * @arg @ref LL_HRTIM_TIMER_C
5080 * @arg @ref LL_HRTIM_TIMER_D
5081 * @arg @ref LL_HRTIM_TIMER_E
5082 * @retval None
5083 */
5085 {
5090 }
5092 /**
5093 * @}
5094 */
5096 /** @defgroup HRTIM_EF_Chopper_Mode_Configuration Chopper_Mode_Configuration
5097 * @{
5098 */
5100 /**
5101 * @brief Configure the chopper stage for a given timer.
5102 * @rmtoll CHPxR CARFRQ LL_HRTIM_CHP_Config\n
5103 * CHPxR CARDTY LL_HRTIM_CHP_Config\n
5104 * CHPxR STRTPW LL_HRTIM_CHP_Config
5105 * @note This function must not be called if the chopper mode is already
5106 * enabled for one of the timer outputs.
5107 * @param HRTIMx High Resolution Timer instance
5108 * @param Timer This parameter can be one of the following values:
5109 * @arg @ref LL_HRTIM_TIMER_A
5110 * @arg @ref LL_HRTIM_TIMER_B
5111 * @arg @ref LL_HRTIM_TIMER_C
5112 * @arg @ref LL_HRTIM_TIMER_D
5113 * @arg @ref LL_HRTIM_TIMER_E
5114 * @param Configuration This parameter must be a combination of all the following values:
5115 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV16 or ... or @ref LL_HRTIM_CHP_PRESCALER_DIV256
5116 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_0 or ... or @ref LL_HRTIM_CHP_DUTYCYCLE_875
5117 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_16 or ... or @ref LL_HRTIM_CHP_PULSEWIDTH_256
5118 * @retval None
5119 */
5120 __STATIC_INLINE void LL_HRTIM_CHP_Config(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Configuration)
5121 {
5126 }
5128 /**
5129 * @brief Set prescaler determining the carrier frequency to be added on top
5130 * of the timer output signals when chopper mode is enabled.
5131 * @rmtoll CHPxR CARFRQ LL_HRTIM_CHP_SetPrescaler
5132 * @note This function must not be called if the chopper mode is already
5133 * enabled for one of the timer outputs.
5134 * @param HRTIMx High Resolution Timer instance
5135 * @param Timer This parameter can be one of the following values:
5136 * @arg @ref LL_HRTIM_TIMER_A
5137 * @arg @ref LL_HRTIM_TIMER_B
5138 * @arg @ref LL_HRTIM_TIMER_C
5139 * @arg @ref LL_HRTIM_TIMER_D
5140 * @arg @ref LL_HRTIM_TIMER_E
5141 * @param Prescaler This parameter can be one of the following values:
5142 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV16
5143 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV32
5144 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV48
5145 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV64
5146 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV80
5147 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV96
5148 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV112
5149 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV128
5150 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV144
5151 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV160
5152 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV176
5153 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV192
5154 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV208
5155 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV224
5156 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV240
5157 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV256
5158 * @retval None
5159 */
5160 __STATIC_INLINE void LL_HRTIM_CHP_SetPrescaler(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t Prescaler)
5161 {
5166 }
5168 /**
5169 * @brief Get actual chopper stage prescaler value.
5170 * @rmtoll CHPxR CARFRQ LL_HRTIM_CHP_GetPrescaler
5171 * @param HRTIMx High Resolution Timer instance
5172 * @param Timer This parameter can be one of the following values:
5173 * @arg @ref LL_HRTIM_TIMER_A
5174 * @arg @ref LL_HRTIM_TIMER_B
5175 * @arg @ref LL_HRTIM_TIMER_C
5176 * @arg @ref LL_HRTIM_TIMER_D
5177 * @arg @ref LL_HRTIM_TIMER_E
5178 * @retval Prescaler This parameter can be one of the following values:
5179 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV16
5180 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV32
5181 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV48
5182 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV64
5183 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV80
5184 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV96
5185 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV112
5186 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV128
5187 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV144
5188 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV160
5189 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV176
5190 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV192
5191 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV208
5192 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV224
5193 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV240
5194 * @arg @ref LL_HRTIM_CHP_PRESCALER_DIV256
5195 */
5197 {
5202 }
5204 /**
5205 * @brief Set the chopper duty cycle.
5206 * @rmtoll CHPxR CARDTY LL_HRTIM_CHP_SetDutyCycle
5207 * @note Duty cycle can be adjusted by 1/8 step (from 0/8 up to 7/8)
5208 * @note This function must not be called if the chopper mode is already
5209 * enabled for one of the timer outputs.
5210 * @param HRTIMx High Resolution Timer instance
5211 * @param Timer This parameter can be one of the following values:
5212 * @arg @ref LL_HRTIM_TIMER_A
5213 * @arg @ref LL_HRTIM_TIMER_B
5214 * @arg @ref LL_HRTIM_TIMER_C
5215 * @arg @ref LL_HRTIM_TIMER_D
5216 * @arg @ref LL_HRTIM_TIMER_E
5217 * @param DutyCycle This parameter can be one of the following values:
5218 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_0
5219 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_125
5220 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_250
5221 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_375
5222 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_500
5223 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_625
5224 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_750
5225 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_875
5226 * @retval None
5227 */
5228 __STATIC_INLINE void LL_HRTIM_CHP_SetDutyCycle(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t DutyCycle)
5229 {
5234 }
5236 /**
5237 * @brief Get actual chopper duty cycle.
5238 * @rmtoll CHPxR CARDTY LL_HRTIM_CHP_GetDutyCycle
5239 * @param HRTIMx High Resolution Timer instance
5240 * @param Timer This parameter can be one of the following values:
5241 * @arg @ref LL_HRTIM_TIMER_A
5242 * @arg @ref LL_HRTIM_TIMER_B
5243 * @arg @ref LL_HRTIM_TIMER_C
5244 * @arg @ref LL_HRTIM_TIMER_D
5245 * @arg @ref LL_HRTIM_TIMER_E
5246 * @retval DutyCycle This parameter can be one of the following values:
5247 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_0
5248 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_125
5249 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_250
5250 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_375
5251 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_500
5252 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_625
5253 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_750
5254 * @arg @ref LL_HRTIM_CHP_DUTYCYCLE_875
5255 */
5257 {
5262 }
5264 /**
5265 * @brief Set the start pulse width.
5266 * @rmtoll CHPxR STRPW LL_HRTIM_CHP_SetPulseWidth
5267 * @note This function must not be called if the chopper mode is already
5268 * enabled for one of the timer outputs.
5269 * @param HRTIMx High Resolution Timer instance
5270 * @param Timer This parameter can be one of the following values:
5271 * @arg @ref LL_HRTIM_TIMER_A
5272 * @arg @ref LL_HRTIM_TIMER_B
5273 * @arg @ref LL_HRTIM_TIMER_C
5274 * @arg @ref LL_HRTIM_TIMER_D
5275 * @arg @ref LL_HRTIM_TIMER_E
5276 * @param PulseWidth This parameter can be one of the following values:
5277 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_16
5278 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_32
5279 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_48
5280 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_64
5281 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_80
5282 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_96
5283 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_112
5284 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_128
5285 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_144
5286 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_160
5287 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_176
5288 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_192
5289 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_208
5290 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_224
5291 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_240
5292 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_256
5293 * @retval None
5294 */
5295 __STATIC_INLINE void LL_HRTIM_CHP_SetPulseWidth(HRTIM_TypeDef *HRTIMx, uint32_t Timer, uint32_t PulseWidth)
5296 {
5301 }
5303 /**
5304 * @brief Get actual start pulse width.
5305 * @rmtoll CHPxR STRPW LL_HRTIM_CHP_GetPulseWidth
5306 * @param HRTIMx High Resolution Timer instance
5307 * @param Timer This parameter can be one of the following values:
5308 * @arg @ref LL_HRTIM_TIMER_A
5309 * @arg @ref LL_HRTIM_TIMER_B
5310 * @arg @ref LL_HRTIM_TIMER_C
5311 * @arg @ref LL_HRTIM_TIMER_D
5312 * @arg @ref LL_HRTIM_TIMER_E
5313 * @retval PulseWidth This parameter can be one of the following values:
5314 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_16
5315 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_32
5316 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_48
5317 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_64
5318 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_80
5319 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_96
5320 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_112
5321 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_128
5322 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_144
5323 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_160
5324 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_176
5325 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_192
5326 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_208
5327 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_224
5328 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_240
5329 * @arg @ref LL_HRTIM_CHP_PULSEWIDTH_256
5330 */
5332 {
5337 }
5339 /**
5340 * @}
5341 */
5343 /** @defgroup HRTIM_EF_Output_Management Output_Management
5344 * @{
5345 */
5347 /**
5348 * @brief Set the timer output set source.
5349 * @rmtoll SETx1R SST LL_HRTIM_OUT_SetOutputSetSrc\n
5350 * SETx1R RESYNC LL_HRTIM_OUT_SetOutputSetSrc\n
5351 * SETx1R PER LL_HRTIM_OUT_SetOutputSetSrc\n
5352 * SETx1R CMP1 LL_HRTIM_OUT_SetOutputSetSrc\n
5353 * SETx1R CMP2 LL_HRTIM_OUT_SetOutputSetSrc\n
5354 * SETx1R CMP3 LL_HRTIM_OUT_SetOutputSetSrc\n
5355 * SETx1R CMP4 LL_HRTIM_OUT_SetOutputSetSrc\n
5356 * SETx1R MSTPER LL_HRTIM_OUT_SetOutputSetSrc\n
5357 * SETx1R MSTCMP1 LL_HRTIM_OUT_SetOutputSetSrc\n
5358 * SETx1R MSTCMP2 LL_HRTIM_OUT_SetOutputSetSrc\n
5359 * SETx1R MSTCMP3 LL_HRTIM_OUT_SetOutputSetSrc\n
5360 * SETx1R MSTCMP4 LL_HRTIM_OUT_SetOutputSetSrc\n
5361 * SETx1R TIMEVNT1 LL_HRTIM_OUT_SetOutputSetSrc\n
5362 * SETx1R TIMEVNT2 LL_HRTIM_OUT_SetOutputSetSrc\n
5363 * SETx1R TIMEVNT3 LL_HRTIM_OUT_SetOutputSetSrc\n
5364 * SETx1R TIMEVNT4 LL_HRTIM_OUT_SetOutputSetSrc\n
5365 * SETx1R TIMEVNT5 LL_HRTIM_OUT_SetOutputSetSrc\n
5366 * SETx1R TIMEVNT6 LL_HRTIM_OUT_SetOutputSetSrc\n
5367 * SETx1R TIMEVNT7 LL_HRTIM_OUT_SetOutputSetSrc\n
5368 * SETx1R TIMEVNT8 LL_HRTIM_OUT_SetOutputSetSrc\n
5369 * SETx1R TIMEVNT9 LL_HRTIM_OUT_SetOutputSetSrc\n
5370 * SETx1R EXEVNT1 LL_HRTIM_OUT_SetOutputSetSrc\n
5371 * SETx1R EXEVNT2 LL_HRTIM_OUT_SetOutputSetSrc\n
5372 * SETx1R EXEVNT3 LL_HRTIM_OUT_SetOutputSetSrc\n
5373 * SETx1R EXEVNT4 LL_HRTIM_OUT_SetOutputSetSrc\n
5374 * SETx1R EXEVNT5 LL_HRTIM_OUT_SetOutputSetSrc\n
5375 * SETx1R EXEVNT6 LL_HRTIM_OUT_SetOutputSetSrc\n
5376 * SETx1R EXEVNT7 LL_HRTIM_OUT_SetOutputSetSrc\n
5377 * SETx1R EXEVNT8 LL_HRTIM_OUT_SetOutputSetSrc\n
5378 * SETx1R EXEVNT9 LL_HRTIM_OUT_SetOutputSetSrc\n
5379 * SETx1R EXEVNT10 LL_HRTIM_OUT_SetOutputSetSrc\n
5380 * SETx1R UPDATE LL_HRTIM_OUT_SetOutputSetSrc\n
5381 * SETx1R SST LL_HRTIM_OUT_SetOutputSetSrc\n
5382 * SETx1R RESYNC LL_HRTIM_OUT_SetOutputSetSrc\n
5383 * SETx1R PER LL_HRTIM_OUT_SetOutputSetSrc\n
5384 * SETx1R CMP1 LL_HRTIM_OUT_SetOutputSetSrc\n
5385 * SETx1R CMP2 LL_HRTIM_OUT_SetOutputSetSrc\n
5386 * SETx1R CMP3 LL_HRTIM_OUT_SetOutputSetSrc\n
5387 * SETx1R CMP4 LL_HRTIM_OUT_SetOutputSetSrc\n
5388 * SETx1R MSTPER LL_HRTIM_OUT_SetOutputSetSrc\n
5389 * SETx1R MSTCMP1 LL_HRTIM_OUT_SetOutputSetSrc\n
5390 * SETx1R MSTCMP2 LL_HRTIM_OUT_SetOutputSetSrc\n
5391 * SETx1R MSTCMP3 LL_HRTIM_OUT_SetOutputSetSrc\n
5392 * SETx1R MSTCMP4 LL_HRTIM_OUT_SetOutputSetSrc\n
5393 * SETx1R TIMEVNT1 LL_HRTIM_OUT_SetOutputSetSrc\n
5394 * SETx1R TIMEVNT2 LL_HRTIM_OUT_SetOutputSetSrc\n
5395 * SETx1R TIMEVNT3 LL_HRTIM_OUT_SetOutputSetSrc\n
5396 * SETx1R TIMEVNT4 LL_HRTIM_OUT_SetOutputSetSrc\n
5397 * SETx1R TIMEVNT5 LL_HRTIM_OUT_SetOutputSetSrc\n
5398 * SETx1R TIMEVNT6 LL_HRTIM_OUT_SetOutputSetSrc\n
5399 * SETx1R TIMEVNT7 LL_HRTIM_OUT_SetOutputSetSrc\n
5400 * SETx1R TIMEVNT8 LL_HRTIM_OUT_SetOutputSetSrc\n
5401 * SETx1R TIMEVNT9 LL_HRTIM_OUT_SetOutputSetSrc\n
5402 * SETx1R EXEVNT1 LL_HRTIM_OUT_SetOutputSetSrc\n
5403 * SETx1R EXEVNT2 LL_HRTIM_OUT_SetOutputSetSrc\n
5404 * SETx1R EXEVNT3 LL_HRTIM_OUT_SetOutputSetSrc\n
5405 * SETx1R EXEVNT4 LL_HRTIM_OUT_SetOutputSetSrc\n
5406 * SETx1R EXEVNT5 LL_HRTIM_OUT_SetOutputSetSrc\n
5407 * SETx1R EXEVNT6 LL_HRTIM_OUT_SetOutputSetSrc\n
5408 * SETx1R EXEVNT7 LL_HRTIM_OUT_SetOutputSetSrc\n
5409 * SETx1R EXEVNT8 LL_HRTIM_OUT_SetOutputSetSrc\n
5410 * SETx1R EXEVNT9 LL_HRTIM_OUT_SetOutputSetSrc\n
5411 * SETx1R EXEVNT10 LL_HRTIM_OUT_SetOutputSetSrc\n
5412 * SETx1R UPDATE LL_HRTIM_OUT_SetOutputSetSrc
5413 * @param HRTIMx High Resolution Timer instance
5414 * @param Output This parameter can be one of the following values:
5415 * @arg @ref LL_HRTIM_OUTPUT_TA1
5416 * @arg @ref LL_HRTIM_OUTPUT_TA2
5417 * @arg @ref LL_HRTIM_OUTPUT_TB1
5418 * @arg @ref LL_HRTIM_OUTPUT_TB2
5419 * @arg @ref LL_HRTIM_OUTPUT_TC1
5420 * @arg @ref LL_HRTIM_OUTPUT_TC2
5421 * @arg @ref LL_HRTIM_OUTPUT_TD1
5422 * @arg @ref LL_HRTIM_OUTPUT_TD2
5423 * @arg @ref LL_HRTIM_OUTPUT_TE1
5424 * @arg @ref LL_HRTIM_OUTPUT_TE2
5425 * @param SetSrc This parameter can be a combination of the following values:
5426 * @arg @ref LL_HRTIM_CROSSBAR_NONE
5427 * @arg @ref LL_HRTIM_CROSSBAR_RESYNC
5428 * @arg @ref LL_HRTIM_CROSSBAR_TIMPER
5429 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP1
5430 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP2
5431 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP3
5432 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP4
5433 * @arg @ref LL_HRTIM_CROSSBAR_MASTERPER
5434 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP1
5435 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP2
5436 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP3
5437 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP4
5438 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_1
5439 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_2
5440 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_3
5441 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_4
5442 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_5
5443 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_6
5444 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_7
5445 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_8
5446 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_9
5447 * @arg @ref LL_HRTIM_CROSSBAR_EEV_1
5448 * @arg @ref LL_HRTIM_CROSSBAR_EEV_2
5449 * @arg @ref LL_HRTIM_CROSSBAR_EEV_3
5450 * @arg @ref LL_HRTIM_CROSSBAR_EEV_4
5451 * @arg @ref LL_HRTIM_CROSSBAR_EEV_5
5452 * @arg @ref LL_HRTIM_CROSSBAR_EEV_6
5453 * @arg @ref LL_HRTIM_CROSSBAR_EEV_7
5454 * @arg @ref LL_HRTIM_CROSSBAR_EEV_8
5455 * @arg @ref LL_HRTIM_CROSSBAR_EEV_9
5456 * @arg @ref LL_HRTIM_CROSSBAR_EEV_10
5457 * @arg @ref LL_HRTIM_CROSSBAR_UPDATE
5458 * @retval None
5459 */
5460 __STATIC_INLINE void LL_HRTIM_OUT_SetOutputSetSrc(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t SetSrc)
5461 {
5462 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
5466 }
5468 /**
5469 * @brief Get the timer output set source.
5470 * @rmtoll SETx1R SST LL_HRTIM_OUT_GetOutputSetSrc\n
5471 * SETx1R RESYNC LL_HRTIM_OUT_GetOutputSetSrc\n
5472 * SETx1R PER LL_HRTIM_OUT_GetOutputSetSrc\n
5473 * SETx1R CMP1 LL_HRTIM_OUT_GetOutputSetSrc\n
5474 * SETx1R CMP2 LL_HRTIM_OUT_GetOutputSetSrc\n
5475 * SETx1R CMP3 LL_HRTIM_OUT_GetOutputSetSrc\n
5476 * SETx1R CMP4 LL_HRTIM_OUT_GetOutputSetSrc\n
5477 * SETx1R MSTPER LL_HRTIM_OUT_GetOutputSetSrc\n
5478 * SETx1R MSTCMP1 LL_HRTIM_OUT_GetOutputSetSrc\n
5479 * SETx1R MSTCMP2 LL_HRTIM_OUT_GetOutputSetSrc\n
5480 * SETx1R MSTCMP3 LL_HRTIM_OUT_GetOutputSetSrc\n
5481 * SETx1R MSTCMP4 LL_HRTIM_OUT_GetOutputSetSrc\n
5482 * SETx1R TIMEVNT1 LL_HRTIM_OUT_GetOutputSetSrc\n
5483 * SETx1R TIMEVNT2 LL_HRTIM_OUT_GetOutputSetSrc\n
5484 * SETx1R TIMEVNT3 LL_HRTIM_OUT_GetOutputSetSrc\n
5485 * SETx1R TIMEVNT4 LL_HRTIM_OUT_GetOutputSetSrc\n
5486 * SETx1R TIMEVNT5 LL_HRTIM_OUT_GetOutputSetSrc\n
5487 * SETx1R TIMEVNT6 LL_HRTIM_OUT_GetOutputSetSrc\n
5488 * SETx1R TIMEVNT7 LL_HRTIM_OUT_GetOutputSetSrc\n
5489 * SETx1R TIMEVNT8 LL_HRTIM_OUT_GetOutputSetSrc\n
5490 * SETx1R TIMEVNT9 LL_HRTIM_OUT_GetOutputSetSrc\n
5491 * SETx1R EXEVNT1 LL_HRTIM_OUT_GetOutputSetSrc\n
5492 * SETx1R EXEVNT2 LL_HRTIM_OUT_GetOutputSetSrc\n
5493 * SETx1R EXEVNT3 LL_HRTIM_OUT_GetOutputSetSrc\n
5494 * SETx1R EXEVNT4 LL_HRTIM_OUT_GetOutputSetSrc\n
5495 * SETx1R EXEVNT5 LL_HRTIM_OUT_GetOutputSetSrc\n
5496 * SETx1R EXEVNT6 LL_HRTIM_OUT_GetOutputSetSrc\n
5497 * SETx1R EXEVNT7 LL_HRTIM_OUT_GetOutputSetSrc\n
5498 * SETx1R EXEVNT8 LL_HRTIM_OUT_GetOutputSetSrc\n
5499 * SETx1R EXEVNT9 LL_HRTIM_OUT_GetOutputSetSrc\n
5500 * SETx1R EXEVNT10 LL_HRTIM_OUT_GetOutputSetSrc\n
5501 * SETx1R UPDATE LL_HRTIM_OUT_GetOutputSetSrc\n
5502 * SETx1R SST LL_HRTIM_OUT_GetOutputSetSrc\n
5503 * SETx1R RESYNC LL_HRTIM_OUT_GetOutputSetSrc\n
5504 * SETx1R PER LL_HRTIM_OUT_GetOutputSetSrc\n
5505 * SETx1R CMP1 LL_HRTIM_OUT_GetOutputSetSrc\n
5506 * SETx1R CMP2 LL_HRTIM_OUT_GetOutputSetSrc\n
5507 * SETx1R CMP3 LL_HRTIM_OUT_GetOutputSetSrc\n
5508 * SETx1R CMP4 LL_HRTIM_OUT_GetOutputSetSrc\n
5509 * SETx1R MSTPER LL_HRTIM_OUT_GetOutputSetSrc\n
5510 * SETx1R MSTCMP1 LL_HRTIM_OUT_GetOutputSetSrc\n
5511 * SETx1R MSTCMP2 LL_HRTIM_OUT_GetOutputSetSrc\n
5512 * SETx1R MSTCMP3 LL_HRTIM_OUT_GetOutputSetSrc\n
5513 * SETx1R MSTCMP4 LL_HRTIM_OUT_GetOutputSetSrc\n
5514 * SETx1R TIMEVNT1 LL_HRTIM_OUT_GetOutputSetSrc\n
5515 * SETx1R TIMEVNT2 LL_HRTIM_OUT_GetOutputSetSrc\n
5516 * SETx1R TIMEVNT3 LL_HRTIM_OUT_GetOutputSetSrc\n
5517 * SETx1R TIMEVNT4 LL_HRTIM_OUT_GetOutputSetSrc\n
5518 * SETx1R TIMEVNT5 LL_HRTIM_OUT_GetOutputSetSrc\n
5519 * SETx1R TIMEVNT6 LL_HRTIM_OUT_GetOutputSetSrc\n
5520 * SETx1R TIMEVNT7 LL_HRTIM_OUT_GetOutputSetSrc\n
5521 * SETx1R TIMEVNT8 LL_HRTIM_OUT_GetOutputSetSrc\n
5522 * SETx1R TIMEVNT9 LL_HRTIM_OUT_GetOutputSetSrc\n
5523 * SETx1R EXEVNT1 LL_HRTIM_OUT_GetOutputSetSrc\n
5524 * SETx1R EXEVNT2 LL_HRTIM_OUT_GetOutputSetSrc\n
5525 * SETx1R EXEVNT3 LL_HRTIM_OUT_GetOutputSetSrc\n
5526 * SETx1R EXEVNT4 LL_HRTIM_OUT_GetOutputSetSrc\n
5527 * SETx1R EXEVNT5 LL_HRTIM_OUT_GetOutputSetSrc\n
5528 * SETx1R EXEVNT6 LL_HRTIM_OUT_GetOutputSetSrc\n
5529 * SETx1R EXEVNT7 LL_HRTIM_OUT_GetOutputSetSrc\n
5530 * SETx1R EXEVNT8 LL_HRTIM_OUT_GetOutputSetSrc\n
5531 * SETx1R EXEVNT9 LL_HRTIM_OUT_GetOutputSetSrc\n
5532 * SETx1R EXEVNT10 LL_HRTIM_OUT_GetOutputSetSrc\n
5533 * SETx1R UPDATE LL_HRTIM_OUT_GetOutputSetSrc
5534 * @param HRTIMx High Resolution Timer instance
5535 * @param Output This parameter can be one of the following values:
5536 * @arg @ref LL_HRTIM_OUTPUT_TA1
5537 * @arg @ref LL_HRTIM_OUTPUT_TA2
5538 * @arg @ref LL_HRTIM_OUTPUT_TB1
5539 * @arg @ref LL_HRTIM_OUTPUT_TB2
5540 * @arg @ref LL_HRTIM_OUTPUT_TC1
5541 * @arg @ref LL_HRTIM_OUTPUT_TC2
5542 * @arg @ref LL_HRTIM_OUTPUT_TD1
5543 * @arg @ref LL_HRTIM_OUTPUT_TD2
5544 * @arg @ref LL_HRTIM_OUTPUT_TE1
5545 * @arg @ref LL_HRTIM_OUTPUT_TE2
5546 * @retval SetSrc This parameter can be a combination of the following values:
5547 * @arg @ref LL_HRTIM_CROSSBAR_NONE
5548 * @arg @ref LL_HRTIM_CROSSBAR_RESYNC
5549 * @arg @ref LL_HRTIM_CROSSBAR_TIMPER
5550 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP1
5551 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP2
5552 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP3
5553 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP4
5554 * @arg @ref LL_HRTIM_CROSSBAR_MASTERPER
5555 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP1
5556 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP2
5557 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP3
5558 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP4
5559 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_1
5560 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_2
5561 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_3
5562 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_4
5563 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_5
5564 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_6
5565 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_7
5566 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_8
5567 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_9
5568 * @arg @ref LL_HRTIM_CROSSBAR_EEV_1
5569 * @arg @ref LL_HRTIM_CROSSBAR_EEV_2
5570 * @arg @ref LL_HRTIM_CROSSBAR_EEV_3
5571 * @arg @ref LL_HRTIM_CROSSBAR_EEV_4
5572 * @arg @ref LL_HRTIM_CROSSBAR_EEV_5
5573 * @arg @ref LL_HRTIM_CROSSBAR_EEV_6
5574 * @arg @ref LL_HRTIM_CROSSBAR_EEV_7
5575 * @arg @ref LL_HRTIM_CROSSBAR_EEV_8
5576 * @arg @ref LL_HRTIM_CROSSBAR_EEV_9
5577 * @arg @ref LL_HRTIM_CROSSBAR_EEV_10
5578 * @arg @ref LL_HRTIM_CROSSBAR_UPDATE
5579 */
5581 {
5582 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
5586 }
5588 /**
5589 * @brief Set the timer output reset source.
5590 * @rmtoll RSTx1R RST LL_HRTIM_OUT_SetOutputResetSrc\n
5591 * RSTx1R RESYNC LL_HRTIM_OUT_SetOutputResetSrc\n
5592 * RSTx1R PER LL_HRTIM_OUT_SetOutputResetSrc\n
5593 * RSTx1R CMP1 LL_HRTIM_OUT_SetOutputResetSrc\n
5594 * RSTx1R CMP2 LL_HRTIM_OUT_SetOutputResetSrc\n
5595 * RSTx1R CMP3 LL_HRTIM_OUT_SetOutputResetSrc\n
5596 * RSTx1R CMP4 LL_HRTIM_OUT_SetOutputResetSrc\n
5597 * RSTx1R MSTPER LL_HRTIM_OUT_SetOutputResetSrc\n
5598 * RSTx1R MSTCMP1 LL_HRTIM_OUT_SetOutputResetSrc\n
5599 * RSTx1R MSTCMP2 LL_HRTIM_OUT_SetOutputResetSrc\n
5600 * RSTx1R MSTCMP3 LL_HRTIM_OUT_SetOutputResetSrc\n
5601 * RSTx1R MSTCMP4 LL_HRTIM_OUT_SetOutputResetSrc\n
5602 * RSTx1R TIMEVNT1 LL_HRTIM_OUT_SetOutputResetSrc\n
5603 * RSTx1R TIMEVNT2 LL_HRTIM_OUT_SetOutputResetSrc\n
5604 * RSTx1R TIMEVNT3 LL_HRTIM_OUT_SetOutputResetSrc\n
5605 * RSTx1R TIMEVNT4 LL_HRTIM_OUT_SetOutputResetSrc\n
5606 * RSTx1R TIMEVNT5 LL_HRTIM_OUT_SetOutputResetSrc\n
5607 * RSTx1R TIMEVNT6 LL_HRTIM_OUT_SetOutputResetSrc\n
5608 * RSTx1R TIMEVNT7 LL_HRTIM_OUT_SetOutputResetSrc\n
5609 * RSTx1R TIMEVNT8 LL_HRTIM_OUT_SetOutputResetSrc\n
5610 * RSTx1R TIMEVNT9 LL_HRTIM_OUT_SetOutputResetSrc\n
5611 * RSTx1R EXEVNT1 LL_HRTIM_OUT_SetOutputResetSrc\n
5612 * RSTx1R EXEVNT2 LL_HRTIM_OUT_SetOutputResetSrc\n
5613 * RSTx1R EXEVNT3 LL_HRTIM_OUT_SetOutputResetSrc\n
5614 * RSTx1R EXEVNT4 LL_HRTIM_OUT_SetOutputResetSrc\n
5615 * RSTx1R EXEVNT5 LL_HRTIM_OUT_SetOutputResetSrc\n
5616 * RSTx1R EXEVNT6 LL_HRTIM_OUT_SetOutputResetSrc\n
5617 * RSTx1R EXEVNT7 LL_HRTIM_OUT_SetOutputResetSrc\n
5618 * RSTx1R EXEVNT8 LL_HRTIM_OUT_SetOutputResetSrc\n
5619 * RSTx1R EXEVNT9 LL_HRTIM_OUT_SetOutputResetSrc\n
5620 * RSTx1R EXEVNT10 LL_HRTIM_OUT_SetOutputResetSrc\n
5621 * RSTx1R UPDATE LL_HRTIM_OUT_SetOutputResetSrc\n
5622 * RSTx1R RST LL_HRTIM_OUT_SetOutputResetSrc\n
5623 * RSTx1R RESYNC LL_HRTIM_OUT_SetOutputResetSrc\n
5624 * RSTx1R PER LL_HRTIM_OUT_SetOutputResetSrc\n
5625 * RSTx1R CMP1 LL_HRTIM_OUT_SetOutputResetSrc\n
5626 * RSTx1R CMP2 LL_HRTIM_OUT_SetOutputResetSrc\n
5627 * RSTx1R CMP3 LL_HRTIM_OUT_SetOutputResetSrc\n
5628 * RSTx1R CMP4 LL_HRTIM_OUT_SetOutputResetSrc\n
5629 * RSTx1R MSTPER LL_HRTIM_OUT_SetOutputResetSrc\n
5630 * RSTx1R MSTCMP1 LL_HRTIM_OUT_SetOutputResetSrc\n
5631 * RSTx1R MSTCMP2 LL_HRTIM_OUT_SetOutputResetSrc\n
5632 * RSTx1R MSTCMP3 LL_HRTIM_OUT_SetOutputResetSrc\n
5633 * RSTx1R MSTCMP4 LL_HRTIM_OUT_SetOutputResetSrc\n
5634 * RSTx1R TIMEVNT1 LL_HRTIM_OUT_SetOutputResetSrc\n
5635 * RSTx1R TIMEVNT2 LL_HRTIM_OUT_SetOutputResetSrc\n
5636 * RSTx1R TIMEVNT3 LL_HRTIM_OUT_SetOutputResetSrc\n
5637 * RSTx1R TIMEVNT4 LL_HRTIM_OUT_SetOutputResetSrc\n
5638 * RSTx1R TIMEVNT5 LL_HRTIM_OUT_SetOutputResetSrc\n
5639 * RSTx1R TIMEVNT6 LL_HRTIM_OUT_SetOutputResetSrc\n
5640 * RSTx1R TIMEVNT7 LL_HRTIM_OUT_SetOutputResetSrc\n
5641 * RSTx1R TIMEVNT8 LL_HRTIM_OUT_SetOutputResetSrc\n
5642 * RSTx1R TIMEVNT9 LL_HRTIM_OUT_SetOutputResetSrc\n
5643 * RSTx1R EXEVNT1 LL_HRTIM_OUT_SetOutputResetSrc\n
5644 * RSTx1R EXEVNT2 LL_HRTIM_OUT_SetOutputResetSrc\n
5645 * RSTx1R EXEVNT3 LL_HRTIM_OUT_SetOutputResetSrc\n
5646 * RSTx1R EXEVNT4 LL_HRTIM_OUT_SetOutputResetSrc\n
5647 * RSTx1R EXEVNT5 LL_HRTIM_OUT_SetOutputResetSrc\n
5648 * RSTx1R EXEVNT6 LL_HRTIM_OUT_SetOutputResetSrc\n
5649 * RSTx1R EXEVNT7 LL_HRTIM_OUT_SetOutputResetSrc\n
5650 * RSTx1R EXEVNT8 LL_HRTIM_OUT_SetOutputResetSrc\n
5651 * RSTx1R EXEVNT9 LL_HRTIM_OUT_SetOutputResetSrc\n
5652 * RSTx1R EXEVNT10 LL_HRTIM_OUT_SetOutputResetSrc\n
5653 * RSTx1R UPDATE LL_HRTIM_OUT_SetOutputResetSrc
5654 * @param HRTIMx High Resolution Timer instance
5655 * @param Output This parameter can be one of the following values:
5656 * @arg @ref LL_HRTIM_OUTPUT_TA1
5657 * @arg @ref LL_HRTIM_OUTPUT_TA2
5658 * @arg @ref LL_HRTIM_OUTPUT_TB1
5659 * @arg @ref LL_HRTIM_OUTPUT_TB2
5660 * @arg @ref LL_HRTIM_OUTPUT_TC1
5661 * @arg @ref LL_HRTIM_OUTPUT_TC2
5662 * @arg @ref LL_HRTIM_OUTPUT_TD1
5663 * @arg @ref LL_HRTIM_OUTPUT_TD2
5664 * @arg @ref LL_HRTIM_OUTPUT_TE1
5665 * @arg @ref LL_HRTIM_OUTPUT_TE2
5666 * @param ResetSrc This parameter can be a combination of the following values:
5667 * @arg @ref LL_HRTIM_CROSSBAR_NONE
5668 * @arg @ref LL_HRTIM_CROSSBAR_RESYNC
5669 * @arg @ref LL_HRTIM_CROSSBAR_TIMPER
5670 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP1
5671 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP2
5672 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP3
5673 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP4
5674 * @arg @ref LL_HRTIM_CROSSBAR_MASTERPER
5675 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP1
5676 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP2
5677 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP3
5678 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP4
5679 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_1
5680 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_2
5681 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_3
5682 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_4
5683 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_5
5684 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_6
5685 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_7
5686 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_8
5687 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_9
5688 * @arg @ref LL_HRTIM_CROSSBAR_EEV_1
5689 * @arg @ref LL_HRTIM_CROSSBAR_EEV_2
5690 * @arg @ref LL_HRTIM_CROSSBAR_EEV_3
5691 * @arg @ref LL_HRTIM_CROSSBAR_EEV_4
5692 * @arg @ref LL_HRTIM_CROSSBAR_EEV_5
5693 * @arg @ref LL_HRTIM_CROSSBAR_EEV_6
5694 * @arg @ref LL_HRTIM_CROSSBAR_EEV_7
5695 * @arg @ref LL_HRTIM_CROSSBAR_EEV_8
5696 * @arg @ref LL_HRTIM_CROSSBAR_EEV_9
5697 * @arg @ref LL_HRTIM_CROSSBAR_EEV_10
5698 * @arg @ref LL_HRTIM_CROSSBAR_UPDATE
5699 * @retval None
5700 */
5701 __STATIC_INLINE void LL_HRTIM_OUT_SetOutputResetSrc(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t ResetSrc)
5702 {
5703 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
5707 }
5709 /**
5710 * @brief Get the timer output set source.
5711 * @rmtoll RSTx1R RST LL_HRTIM_OUT_GetOutputResetSrc\n
5712 * RSTx1R RESYNC LL_HRTIM_OUT_GetOutputResetSrc\n
5713 * RSTx1R PER LL_HRTIM_OUT_GetOutputResetSrc\n
5714 * RSTx1R CMP1 LL_HRTIM_OUT_GetOutputResetSrc\n
5715 * RSTx1R CMP2 LL_HRTIM_OUT_GetOutputResetSrc\n
5716 * RSTx1R CMP3 LL_HRTIM_OUT_GetOutputResetSrc\n
5717 * RSTx1R CMP4 LL_HRTIM_OUT_GetOutputResetSrc\n
5718 * RSTx1R MSTPER LL_HRTIM_OUT_GetOutputResetSrc\n
5719 * RSTx1R MSTCMP1 LL_HRTIM_OUT_GetOutputResetSrc\n
5720 * RSTx1R MSTCMP2 LL_HRTIM_OUT_GetOutputResetSrc\n
5721 * RSTx1R MSTCMP3 LL_HRTIM_OUT_GetOutputResetSrc\n
5722 * RSTx1R MSTCMP4 LL_HRTIM_OUT_GetOutputResetSrc\n
5723 * RSTx1R TIMEVNT1 LL_HRTIM_OUT_GetOutputResetSrc\n
5724 * RSTx1R TIMEVNT2 LL_HRTIM_OUT_GetOutputResetSrc\n
5725 * RSTx1R TIMEVNT3 LL_HRTIM_OUT_GetOutputResetSrc\n
5726 * RSTx1R TIMEVNT4 LL_HRTIM_OUT_GetOutputResetSrc\n
5727 * RSTx1R TIMEVNT5 LL_HRTIM_OUT_GetOutputResetSrc\n
5728 * RSTx1R TIMEVNT6 LL_HRTIM_OUT_GetOutputResetSrc\n
5729 * RSTx1R TIMEVNT7 LL_HRTIM_OUT_GetOutputResetSrc\n
5730 * RSTx1R TIMEVNT8 LL_HRTIM_OUT_GetOutputResetSrc\n
5731 * RSTx1R TIMEVNT9 LL_HRTIM_OUT_GetOutputResetSrc\n
5732 * RSTx1R EXEVNT1 LL_HRTIM_OUT_GetOutputResetSrc\n
5733 * RSTx1R EXEVNT2 LL_HRTIM_OUT_GetOutputResetSrc\n
5734 * RSTx1R EXEVNT3 LL_HRTIM_OUT_GetOutputResetSrc\n
5735 * RSTx1R EXEVNT4 LL_HRTIM_OUT_GetOutputResetSrc\n
5736 * RSTx1R EXEVNT5 LL_HRTIM_OUT_GetOutputResetSrc\n
5737 * RSTx1R EXEVNT6 LL_HRTIM_OUT_GetOutputResetSrc\n
5738 * RSTx1R EXEVNT7 LL_HRTIM_OUT_GetOutputResetSrc\n
5739 * RSTx1R EXEVNT8 LL_HRTIM_OUT_GetOutputResetSrc\n
5740 * RSTx1R EXEVNT9 LL_HRTIM_OUT_GetOutputResetSrc\n
5741 * RSTx1R EXEVNT10 LL_HRTIM_OUT_GetOutputResetSrc\n
5742 * RSTx1R UPDATE LL_HRTIM_OUT_GetOutputResetSrc\n
5743 * RSTx1R RST LL_HRTIM_OUT_GetOutputResetSrc\n
5744 * RSTx1R RESYNC LL_HRTIM_OUT_GetOutputResetSrc\n
5745 * RSTx1R PER LL_HRTIM_OUT_GetOutputResetSrc\n
5746 * RSTx1R CMP1 LL_HRTIM_OUT_GetOutputResetSrc\n
5747 * RSTx1R CMP2 LL_HRTIM_OUT_GetOutputResetSrc\n
5748 * RSTx1R CMP3 LL_HRTIM_OUT_GetOutputResetSrc\n
5749 * RSTx1R CMP4 LL_HRTIM_OUT_GetOutputResetSrc\n
5750 * RSTx1R MSTPER LL_HRTIM_OUT_GetOutputResetSrc\n
5751 * RSTx1R MSTCMP1 LL_HRTIM_OUT_GetOutputResetSrc\n
5752 * RSTx1R MSTCMP2 LL_HRTIM_OUT_GetOutputResetSrc\n
5753 * RSTx1R MSTCMP3 LL_HRTIM_OUT_GetOutputResetSrc\n
5754 * RSTx1R MSTCMP4 LL_HRTIM_OUT_GetOutputResetSrc\n
5755 * RSTx1R TIMEVNT1 LL_HRTIM_OUT_GetOutputResetSrc\n
5756 * RSTx1R TIMEVNT2 LL_HRTIM_OUT_GetOutputResetSrc\n
5757 * RSTx1R TIMEVNT3 LL_HRTIM_OUT_GetOutputResetSrc\n
5758 * RSTx1R TIMEVNT4 LL_HRTIM_OUT_GetOutputResetSrc\n
5759 * RSTx1R TIMEVNT5 LL_HRTIM_OUT_GetOutputResetSrc\n
5760 * RSTx1R TIMEVNT6 LL_HRTIM_OUT_GetOutputResetSrc\n
5761 * RSTx1R TIMEVNT7 LL_HRTIM_OUT_GetOutputResetSrc\n
5762 * RSTx1R TIMEVNT8 LL_HRTIM_OUT_GetOutputResetSrc\n
5763 * RSTx1R TIMEVNT9 LL_HRTIM_OUT_GetOutputResetSrc\n
5764 * RSTx1R EXEVNT1 LL_HRTIM_OUT_GetOutputResetSrc\n
5765 * RSTx1R EXEVNT2 LL_HRTIM_OUT_GetOutputResetSrc\n
5766 * RSTx1R EXEVNT3 LL_HRTIM_OUT_GetOutputResetSrc\n
5767 * RSTx1R EXEVNT4 LL_HRTIM_OUT_GetOutputResetSrc\n
5768 * RSTx1R EXEVNT5 LL_HRTIM_OUT_GetOutputResetSrc\n
5769 * RSTx1R EXEVNT6 LL_HRTIM_OUT_GetOutputResetSrc\n
5770 * RSTx1R EXEVNT7 LL_HRTIM_OUT_GetOutputResetSrc\n
5771 * RSTx1R EXEVNT8 LL_HRTIM_OUT_GetOutputResetSrc\n
5772 * RSTx1R EXEVNT9 LL_HRTIM_OUT_GetOutputResetSrc\n
5773 * RSTx1R EXEVNT10 LL_HRTIM_OUT_GetOutputResetSrc\n
5774 * RSTx1R UPDATE LL_HRTIM_OUT_GetOutputResetSrc
5775 * @param HRTIMx High Resolution Timer instance
5776 * @param Output This parameter can be one of the following values:
5777 * @arg @ref LL_HRTIM_OUTPUT_TA1
5778 * @arg @ref LL_HRTIM_OUTPUT_TA2
5779 * @arg @ref LL_HRTIM_OUTPUT_TB1
5780 * @arg @ref LL_HRTIM_OUTPUT_TB2
5781 * @arg @ref LL_HRTIM_OUTPUT_TC1
5782 * @arg @ref LL_HRTIM_OUTPUT_TC2
5783 * @arg @ref LL_HRTIM_OUTPUT_TD1
5784 * @arg @ref LL_HRTIM_OUTPUT_TD2
5785 * @arg @ref LL_HRTIM_OUTPUT_TE1
5786 * @arg @ref LL_HRTIM_OUTPUT_TE2
5787 * @retval ResetSrc This parameter can be a combination of the following values:
5788 * @arg @ref LL_HRTIM_CROSSBAR_NONE
5789 * @arg @ref LL_HRTIM_CROSSBAR_RESYNC
5790 * @arg @ref LL_HRTIM_CROSSBAR_TIMPER
5791 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP1
5792 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP2
5793 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP3
5794 * @arg @ref LL_HRTIM_CROSSBAR_TIMCMP4
5795 * @arg @ref LL_HRTIM_CROSSBAR_MASTERPER
5796 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP1
5797 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP2
5798 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP3
5799 * @arg @ref LL_HRTIM_CROSSBAR_MASTERCMP4
5800 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_1
5801 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_2
5802 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_3
5803 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_4
5804 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_5
5805 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_6
5806 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_7
5807 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_8
5808 * @arg @ref LL_HRTIM_CROSSBAR_TIMEV_9
5809 * @arg @ref LL_HRTIM_CROSSBAR_EEV_1
5810 * @arg @ref LL_HRTIM_CROSSBAR_EEV_2
5811 * @arg @ref LL_HRTIM_CROSSBAR_EEV_3
5812 * @arg @ref LL_HRTIM_CROSSBAR_EEV_4
5813 * @arg @ref LL_HRTIM_CROSSBAR_EEV_5
5814 * @arg @ref LL_HRTIM_CROSSBAR_EEV_6
5815 * @arg @ref LL_HRTIM_CROSSBAR_EEV_7
5816 * @arg @ref LL_HRTIM_CROSSBAR_EEV_8
5817 * @arg @ref LL_HRTIM_CROSSBAR_EEV_9
5818 * @arg @ref LL_HRTIM_CROSSBAR_EEV_10
5819 * @arg @ref LL_HRTIM_CROSSBAR_UPDATE
5820 */
5821 __STATIC_INLINE uint32_t LL_HRTIM_OUT_GetOutputResetSrc(HRTIM_TypeDef *HRTIMx, uint32_t Output)
5822 {
5823 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
5827 }
5829 /**
5830 * @brief Configure a timer output.
5831 * @rmtoll OUTxR POL1 LL_HRTIM_OUT_Config\n
5832 * OUTxR IDLEM1 LL_HRTIM_OUT_Config\n
5833 * OUTxR IDLES1 LL_HRTIM_OUT_Config\n
5834 * OUTxR FAULT1 LL_HRTIM_OUT_Config\n
5835 * OUTxR CHP1 LL_HRTIM_OUT_Config\n
5836 * OUTxR DIDL1 LL_HRTIM_OUT_Config\n
5837 * OUTxR POL2 LL_HRTIM_OUT_Config\n
5838 * OUTxR IDLEM2 LL_HRTIM_OUT_Config\n
5839 * OUTxR IDLES2 LL_HRTIM_OUT_Config\n
5840 * OUTxR FAULT2 LL_HRTIM_OUT_Config\n
5841 * OUTxR CHP2 LL_HRTIM_OUT_Config\n
5842 * OUTxR DIDL2 LL_HRTIM_OUT_Config
5843 * @param HRTIMx High Resolution Timer instance
5844 * @param Output This parameter can be one of the following values:
5845 * @arg @ref LL_HRTIM_OUTPUT_TA1
5846 * @arg @ref LL_HRTIM_OUTPUT_TA2
5847 * @arg @ref LL_HRTIM_OUTPUT_TB1
5848 * @arg @ref LL_HRTIM_OUTPUT_TB2
5849 * @arg @ref LL_HRTIM_OUTPUT_TC1
5850 * @arg @ref LL_HRTIM_OUTPUT_TC2
5851 * @arg @ref LL_HRTIM_OUTPUT_TD1
5852 * @arg @ref LL_HRTIM_OUTPUT_TD2
5853 * @arg @ref LL_HRTIM_OUTPUT_TE1
5854 * @arg @ref LL_HRTIM_OUTPUT_TE2
5855 * @param Configuration This parameter must be a combination of all the following values:
5856 * @arg @ref LL_HRTIM_OUT_POSITIVE_POLARITY or @ref LL_HRTIM_OUT_NEGATIVE_POLARITY
5857 * @arg @ref LL_HRTIM_OUT_NO_IDLE or @ref LL_HRTIM_OUT_IDLE_WHEN_BURST
5858 * @arg @ref LL_HRTIM_OUT_IDLELEVEL_INACTIVE or @ref LL_HRTIM_OUT_IDLELEVEL_ACTIVE
5859 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_NO_ACTION or @ref LL_HRTIM_OUT_FAULTSTATE_ACTIVE or @ref LL_HRTIM_OUT_FAULTSTATE_INACTIVE or @ref LL_HRTIM_OUT_FAULTSTATE_HIGHZ
5860 * @arg @ref LL_HRTIM_OUT_CHOPPERMODE_DISABLED or @ref LL_HRTIM_OUT_CHOPPERMODE_ENABLED
5861 * @arg @ref LL_HRTIM_OUT_BM_ENTRYMODE_REGULAR or @ref LL_HRTIM_OUT_BM_ENTRYMODE_DELAYED
5862 * @retval None
5863 */
5864 __STATIC_INLINE void LL_HRTIM_OUT_Config(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t Configuration)
5865 {
5866 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
5871 }
5873 /**
5874 * @brief Set the polarity of a timer output.
5875 * @rmtoll OUTxR POL1 LL_HRTIM_OUT_SetPolarity\n
5876 * OUTxR POL2 LL_HRTIM_OUT_SetPolarity
5877 * @param HRTIMx High Resolution Timer instance
5878 * @param Output This parameter can be one of the following values:
5879 * @arg @ref LL_HRTIM_OUTPUT_TA1
5880 * @arg @ref LL_HRTIM_OUTPUT_TA2
5881 * @arg @ref LL_HRTIM_OUTPUT_TB1
5882 * @arg @ref LL_HRTIM_OUTPUT_TB2
5883 * @arg @ref LL_HRTIM_OUTPUT_TC1
5884 * @arg @ref LL_HRTIM_OUTPUT_TC2
5885 * @arg @ref LL_HRTIM_OUTPUT_TD1
5886 * @arg @ref LL_HRTIM_OUTPUT_TD2
5887 * @arg @ref LL_HRTIM_OUTPUT_TE1
5888 * @arg @ref LL_HRTIM_OUTPUT_TE2
5889 * @param Polarity This parameter can be one of the following values:
5890 * @arg @ref LL_HRTIM_OUT_POSITIVE_POLARITY
5891 * @arg @ref LL_HRTIM_OUT_NEGATIVE_POLARITY
5892 * @retval None
5893 */
5894 __STATIC_INLINE void LL_HRTIM_OUT_SetPolarity(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t Polarity)
5895 {
5896 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
5899 MODIFY_REG(*pReg, (HRTIM_OUTR_POL1 << REG_SHIFT_TAB_OUTxR[iOutput]), (Polarity << REG_SHIFT_TAB_OUTxR[iOutput]));
5900 }
5902 /**
5903 * @brief Get actual polarity of the timer output.
5904 * @rmtoll OUTxR POL1 LL_HRTIM_OUT_GetPolarity\n
5905 * OUTxR POL2 LL_HRTIM_OUT_GetPolarity
5906 * @param HRTIMx High Resolution Timer instance
5907 * @param Output This parameter can be one of the following values:
5908 * @arg @ref LL_HRTIM_OUTPUT_TA1
5909 * @arg @ref LL_HRTIM_OUTPUT_TA2
5910 * @arg @ref LL_HRTIM_OUTPUT_TB1
5911 * @arg @ref LL_HRTIM_OUTPUT_TB2
5912 * @arg @ref LL_HRTIM_OUTPUT_TC1
5913 * @arg @ref LL_HRTIM_OUTPUT_TC2
5914 * @arg @ref LL_HRTIM_OUTPUT_TD1
5915 * @arg @ref LL_HRTIM_OUTPUT_TD2
5916 * @arg @ref LL_HRTIM_OUTPUT_TE1
5917 * @arg @ref LL_HRTIM_OUTPUT_TE2
5918 * @retval Polarity This parameter can be one of the following values:
5919 * @arg @ref LL_HRTIM_OUT_POSITIVE_POLARITY
5920 * @arg @ref LL_HRTIM_OUT_NEGATIVE_POLARITY
5921 */
5923 {
5924 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
5927 return (READ_BIT(*pReg, (HRTIM_OUTR_POL1 << REG_SHIFT_TAB_OUTxR[iOutput])) >> REG_SHIFT_TAB_OUTxR[iOutput]);
5928 }
5930 /**
5931 * @brief Set the output IDLE mode.
5932 * @rmtoll OUTxR IDLEM1 LL_HRTIM_OUT_SetIdleMode\n
5933 * OUTxR IDLEM2 LL_HRTIM_OUT_SetIdleMode
5934 * @note This function must not be called when the burst mode is active
5935 * @param HRTIMx High Resolution Timer instance
5936 * @param Output This parameter can be one of the following values:
5937 * @arg @ref LL_HRTIM_OUTPUT_TA1
5938 * @arg @ref LL_HRTIM_OUTPUT_TA2
5939 * @arg @ref LL_HRTIM_OUTPUT_TB1
5940 * @arg @ref LL_HRTIM_OUTPUT_TB2
5941 * @arg @ref LL_HRTIM_OUTPUT_TC1
5942 * @arg @ref LL_HRTIM_OUTPUT_TC2
5943 * @arg @ref LL_HRTIM_OUTPUT_TD1
5944 * @arg @ref LL_HRTIM_OUTPUT_TD2
5945 * @arg @ref LL_HRTIM_OUTPUT_TE1
5946 * @arg @ref LL_HRTIM_OUTPUT_TE2
5947 * @param IdleMode This parameter can be one of the following values:
5948 * @arg @ref LL_HRTIM_OUT_NO_IDLE
5949 * @arg @ref LL_HRTIM_OUT_IDLE_WHEN_BURST
5950 * @retval None
5951 */
5952 __STATIC_INLINE void LL_HRTIM_OUT_SetIdleMode(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t IdleMode)
5953 {
5954 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
5957 MODIFY_REG(*pReg, (HRTIM_OUTR_IDLM1 << REG_SHIFT_TAB_OUTxR[iOutput]), (IdleMode << REG_SHIFT_TAB_OUTxR[iOutput]));
5958 }
5960 /**
5961 * @brief Get actual output IDLE mode.
5962 * @rmtoll OUTxR IDLEM1 LL_HRTIM_OUT_GetIdleMode\n
5963 * OUTxR IDLEM2 LL_HRTIM_OUT_GetIdleMode
5964 * @param HRTIMx High Resolution Timer instance
5965 * @param Output This parameter can be one of the following values:
5966 * @arg @ref LL_HRTIM_OUTPUT_TA1
5967 * @arg @ref LL_HRTIM_OUTPUT_TA2
5968 * @arg @ref LL_HRTIM_OUTPUT_TB1
5969 * @arg @ref LL_HRTIM_OUTPUT_TB2
5970 * @arg @ref LL_HRTIM_OUTPUT_TC1
5971 * @arg @ref LL_HRTIM_OUTPUT_TC2
5972 * @arg @ref LL_HRTIM_OUTPUT_TD1
5973 * @arg @ref LL_HRTIM_OUTPUT_TD2
5974 * @arg @ref LL_HRTIM_OUTPUT_TE1
5975 * @arg @ref LL_HRTIM_OUTPUT_TE2
5976 * @retval IdleMode This parameter can be one of the following values:
5977 * @arg @ref LL_HRTIM_OUT_NO_IDLE
5978 * @arg @ref LL_HRTIM_OUT_IDLE_WHEN_BURST
5979 */
5981 {
5982 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
5985 return (READ_BIT(*pReg, (HRTIM_OUTR_IDLM1 << REG_SHIFT_TAB_OUTxR[iOutput])) >> REG_SHIFT_TAB_OUTxR[iOutput]);
5986 }
5988 /**
5989 * @brief Set the output IDLE level.
5990 * @rmtoll OUTxR IDLES1 LL_HRTIM_OUT_SetIdleLevel\n
5991 * OUTxR IDLES2 LL_HRTIM_OUT_SetIdleLevel
5992 * @note This function must be called prior enabling the timer.
5993 * @note Idle level isn't relevant when the output idle mode is set to LL_HRTIM_OUT_NO_IDLE.
5994 * @param HRTIMx High Resolution Timer instance
5995 * @param Output This parameter can be one of the following values:
5996 * @arg @ref LL_HRTIM_OUTPUT_TA1
5997 * @arg @ref LL_HRTIM_OUTPUT_TA2
5998 * @arg @ref LL_HRTIM_OUTPUT_TB1
5999 * @arg @ref LL_HRTIM_OUTPUT_TB2
6000 * @arg @ref LL_HRTIM_OUTPUT_TC1
6001 * @arg @ref LL_HRTIM_OUTPUT_TC2
6002 * @arg @ref LL_HRTIM_OUTPUT_TD1
6003 * @arg @ref LL_HRTIM_OUTPUT_TD2
6004 * @arg @ref LL_HRTIM_OUTPUT_TE1
6005 * @arg @ref LL_HRTIM_OUTPUT_TE2
6006 * @param IdleLevel This parameter can be one of the following values:
6007 * @arg @ref LL_HRTIM_OUT_IDLELEVEL_INACTIVE
6008 * @arg @ref LL_HRTIM_OUT_IDLELEVEL_ACTIVE
6009 * @retval None
6010 */
6011 __STATIC_INLINE void LL_HRTIM_OUT_SetIdleLevel(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t IdleLevel)
6012 {
6013 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
6016 MODIFY_REG(*pReg, (HRTIM_OUTR_IDLES1 << REG_SHIFT_TAB_OUTxR[iOutput]), (IdleLevel << REG_SHIFT_TAB_OUTxR[iOutput]));
6017 }
6019 /**
6020 * @brief Get actual output IDLE level.
6021 * @rmtoll OUTxR IDLES1 LL_HRTIM_OUT_GetIdleLevel\n
6022 * OUTxR IDLES2 LL_HRTIM_OUT_GetIdleLevel
6023 * @param HRTIMx High Resolution Timer instance
6024 * @param Output This parameter can be one of the following values:
6025 * @arg @ref LL_HRTIM_OUTPUT_TA1
6026 * @arg @ref LL_HRTIM_OUTPUT_TA2
6027 * @arg @ref LL_HRTIM_OUTPUT_TB1
6028 * @arg @ref LL_HRTIM_OUTPUT_TB2
6029 * @arg @ref LL_HRTIM_OUTPUT_TC1
6030 * @arg @ref LL_HRTIM_OUTPUT_TC2
6031 * @arg @ref LL_HRTIM_OUTPUT_TD1
6032 * @arg @ref LL_HRTIM_OUTPUT_TD2
6033 * @arg @ref LL_HRTIM_OUTPUT_TE1
6034 * @arg @ref LL_HRTIM_OUTPUT_TE2
6035 * @retval IdleLevel This parameter can be one of the following values:
6036 * @arg @ref LL_HRTIM_OUT_IDLELEVEL_INACTIVE
6037 * @arg @ref LL_HRTIM_OUT_IDLELEVEL_ACTIVE
6038 */
6040 {
6041 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
6044 return (READ_BIT(*pReg, (HRTIM_OUTR_IDLES1 << REG_SHIFT_TAB_OUTxR[iOutput])) >> REG_SHIFT_TAB_OUTxR[iOutput]);
6045 }
6047 /**
6048 * @brief Set the output FAULT state.
6049 * @rmtoll OUTxR FAULT1 LL_HRTIM_OUT_SetFaultState\n
6050 * OUTxR FAULT2 LL_HRTIM_OUT_SetFaultState
6051 * @note This function must not called when the timer is enabled and a fault
6052 * channel is enabled at timer level.
6053 * @param HRTIMx High Resolution Timer instance
6054 * @param Output This parameter can be one of the following values:
6055 * @arg @ref LL_HRTIM_OUTPUT_TA1
6056 * @arg @ref LL_HRTIM_OUTPUT_TA2
6057 * @arg @ref LL_HRTIM_OUTPUT_TB1
6058 * @arg @ref LL_HRTIM_OUTPUT_TB2
6059 * @arg @ref LL_HRTIM_OUTPUT_TC1
6060 * @arg @ref LL_HRTIM_OUTPUT_TC2
6061 * @arg @ref LL_HRTIM_OUTPUT_TD1
6062 * @arg @ref LL_HRTIM_OUTPUT_TD2
6063 * @arg @ref LL_HRTIM_OUTPUT_TE1
6064 * @arg @ref LL_HRTIM_OUTPUT_TE2
6065 * @param FaultState This parameter can be one of the following values:
6066 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_NO_ACTION
6067 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_ACTIVE
6068 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_INACTIVE
6069 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_HIGHZ
6070 * @retval None
6071 */
6072 __STATIC_INLINE void LL_HRTIM_OUT_SetFaultState(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t FaultState)
6073 {
6074 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
6077 MODIFY_REG(*pReg, (HRTIM_OUTR_FAULT1 << REG_SHIFT_TAB_OUTxR[iOutput]), (FaultState << REG_SHIFT_TAB_OUTxR[iOutput]));
6078 }
6080 /**
6081 * @brief Get actual FAULT state.
6082 * @rmtoll OUTxR FAULT1 LL_HRTIM_OUT_GetFaultState\n
6083 * OUTxR FAULT2 LL_HRTIM_OUT_GetFaultState
6084 * @param HRTIMx High Resolution Timer instance
6085 * @param Output This parameter can be one of the following values:
6086 * @arg @ref LL_HRTIM_OUTPUT_TA1
6087 * @arg @ref LL_HRTIM_OUTPUT_TA2
6088 * @arg @ref LL_HRTIM_OUTPUT_TB1
6089 * @arg @ref LL_HRTIM_OUTPUT_TB2
6090 * @arg @ref LL_HRTIM_OUTPUT_TC1
6091 * @arg @ref LL_HRTIM_OUTPUT_TC2
6092 * @arg @ref LL_HRTIM_OUTPUT_TD1
6093 * @arg @ref LL_HRTIM_OUTPUT_TD2
6094 * @arg @ref LL_HRTIM_OUTPUT_TE1
6095 * @arg @ref LL_HRTIM_OUTPUT_TE2
6096 * @retval FaultState This parameter can be one of the following values:
6097 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_NO_ACTION
6098 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_ACTIVE
6099 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_INACTIVE
6100 * @arg @ref LL_HRTIM_OUT_FAULTSTATE_HIGHZ
6101 */
6103 {
6104 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
6107 return (READ_BIT(*pReg, (HRTIM_OUTR_FAULT1 << REG_SHIFT_TAB_OUTxR[iOutput])) >> REG_SHIFT_TAB_OUTxR[iOutput]);
6108 }
6110 /**
6111 * @brief Set the output chopper mode.
6112 * @rmtoll OUTxR CHP1 LL_HRTIM_OUT_SetChopperMode\n
6113 * OUTxR CHP2 LL_HRTIM_OUT_SetChopperMode
6114 * @note This function must not called when the timer is enabled.
6115 * @param HRTIMx High Resolution Timer instance
6116 * @param Output This parameter can be one of the following values:
6117 * @arg @ref LL_HRTIM_OUTPUT_TA1
6118 * @arg @ref LL_HRTIM_OUTPUT_TA2
6119 * @arg @ref LL_HRTIM_OUTPUT_TB1
6120 * @arg @ref LL_HRTIM_OUTPUT_TB2
6121 * @arg @ref LL_HRTIM_OUTPUT_TC1
6122 * @arg @ref LL_HRTIM_OUTPUT_TC2
6123 * @arg @ref LL_HRTIM_OUTPUT_TD1
6124 * @arg @ref LL_HRTIM_OUTPUT_TD2
6125 * @arg @ref LL_HRTIM_OUTPUT_TE1
6126 * @arg @ref LL_HRTIM_OUTPUT_TE2
6127 * @param ChopperMode This parameter can be one of the following values:
6128 * @arg @ref LL_HRTIM_OUT_CHOPPERMODE_DISABLED
6129 * @arg @ref LL_HRTIM_OUT_CHOPPERMODE_ENABLED
6130 * @retval None
6131 */
6132 __STATIC_INLINE void LL_HRTIM_OUT_SetChopperMode(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t ChopperMode)
6133 {
6134 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
6137 MODIFY_REG(*pReg, (HRTIM_OUTR_CHP1 << REG_SHIFT_TAB_OUTxR[iOutput]), (ChopperMode << REG_SHIFT_TAB_OUTxR[iOutput]));
6138 }
6140 /**
6141 * @brief Get actual output chopper mode
6142 * @rmtoll OUTxR CHP1 LL_HRTIM_OUT_GetChopperMode\n
6143 * OUTxR CHP2 LL_HRTIM_OUT_GetChopperMode
6144 * @param HRTIMx High Resolution Timer instance
6145 * @param Output This parameter can be one of the following values:
6146 * @arg @ref LL_HRTIM_OUTPUT_TA1
6147 * @arg @ref LL_HRTIM_OUTPUT_TA2
6148 * @arg @ref LL_HRTIM_OUTPUT_TB1
6149 * @arg @ref LL_HRTIM_OUTPUT_TB2
6150 * @arg @ref LL_HRTIM_OUTPUT_TC1
6151 * @arg @ref LL_HRTIM_OUTPUT_TC2
6152 * @arg @ref LL_HRTIM_OUTPUT_TD1
6153 * @arg @ref LL_HRTIM_OUTPUT_TD2
6154 * @arg @ref LL_HRTIM_OUTPUT_TE1
6155 * @arg @ref LL_HRTIM_OUTPUT_TE2
6156 * @retval ChopperMode This parameter can be one of the following values:
6157 * @arg @ref LL_HRTIM_OUT_CHOPPERMODE_DISABLED
6158 * @arg @ref LL_HRTIM_OUT_CHOPPERMODE_ENABLED
6159 */
6161 {
6162 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
6165 return (READ_BIT(*pReg, (HRTIM_OUTR_CHP1 << REG_SHIFT_TAB_OUTxR[iOutput])) >> REG_SHIFT_TAB_OUTxR[iOutput]);
6166 }
6168 /**
6169 * @brief Set the output burst mode entry mode.
6170 * @rmtoll OUTxR DIDL1 LL_HRTIM_OUT_SetBMEntryMode\n
6171 * OUTxR DIDL2 LL_HRTIM_OUT_SetBMEntryMode
6172 * @note This function must not called when the timer is enabled.
6173 * @param HRTIMx High Resolution Timer instance
6174 * @param Output This parameter can be one of the following values:
6175 * @arg @ref LL_HRTIM_OUTPUT_TA1
6176 * @arg @ref LL_HRTIM_OUTPUT_TA2
6177 * @arg @ref LL_HRTIM_OUTPUT_TB1
6178 * @arg @ref LL_HRTIM_OUTPUT_TB2
6179 * @arg @ref LL_HRTIM_OUTPUT_TC1
6180 * @arg @ref LL_HRTIM_OUTPUT_TC2
6181 * @arg @ref LL_HRTIM_OUTPUT_TD1
6182 * @arg @ref LL_HRTIM_OUTPUT_TD2
6183 * @arg @ref LL_HRTIM_OUTPUT_TE1
6184 * @arg @ref LL_HRTIM_OUTPUT_TE2
6185 * @param BMEntryMode This parameter can be one of the following values:
6186 * @arg @ref LL_HRTIM_OUT_BM_ENTRYMODE_REGULAR
6187 * @arg @ref LL_HRTIM_OUT_BM_ENTRYMODE_DELAYED
6188 * @retval None
6189 */
6190 __STATIC_INLINE void LL_HRTIM_OUT_SetBMEntryMode(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t BMEntryMode)
6191 {
6192 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
6195 MODIFY_REG(*pReg, (HRTIM_OUTR_DIDL1 << REG_SHIFT_TAB_OUTxR[iOutput]), (BMEntryMode << REG_SHIFT_TAB_OUTxR[iOutput]));
6196 }
6198 /**
6199 * @brief Get actual output burst mode entry mode.
6200 * @rmtoll OUTxR DIDL1 LL_HRTIM_OUT_GetBMEntryMode\n
6201 * OUTxR DIDL2 LL_HRTIM_OUT_GetBMEntryMode
6202 * @param HRTIMx High Resolution Timer instance
6203 * @param Output This parameter can be one of the following values:
6204 * @arg @ref LL_HRTIM_OUTPUT_TA1
6205 * @arg @ref LL_HRTIM_OUTPUT_TA2
6206 * @arg @ref LL_HRTIM_OUTPUT_TB1
6207 * @arg @ref LL_HRTIM_OUTPUT_TB2
6208 * @arg @ref LL_HRTIM_OUTPUT_TC1
6209 * @arg @ref LL_HRTIM_OUTPUT_TC2
6210 * @arg @ref LL_HRTIM_OUTPUT_TD1
6211 * @arg @ref LL_HRTIM_OUTPUT_TD2
6212 * @arg @ref LL_HRTIM_OUTPUT_TE1
6213 * @arg @ref LL_HRTIM_OUTPUT_TE2
6214 * @retval BMEntryMode This parameter can be one of the following values:
6215 * @arg @ref LL_HRTIM_OUT_BM_ENTRYMODE_REGULAR
6216 * @arg @ref LL_HRTIM_OUT_BM_ENTRYMODE_DELAYED
6217 */
6219 {
6220 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
6223 return (READ_BIT(*pReg, (HRTIM_OUTR_DIDL1 << REG_SHIFT_TAB_OUTxR[iOutput])) >> REG_SHIFT_TAB_OUTxR[iOutput]);
6224 }
6226 /**
6227 * @brief Get the level (active or inactive) of the designated output when the
6228 * delayed protection was triggered.
6229 * @rmtoll TIMxISR O1SRSR LL_HRTIM_OUT_GetDLYPRTOutStatus\n
6230 * TIMxISR O2SRSR LL_HRTIM_OUT_GetDLYPRTOutStatus
6231 * @param HRTIMx High Resolution Timer instance
6232 * @param Output This parameter can be one of the following values:
6233 * @arg @ref LL_HRTIM_OUTPUT_TA1
6234 * @arg @ref LL_HRTIM_OUTPUT_TA2
6235 * @arg @ref LL_HRTIM_OUTPUT_TB1
6236 * @arg @ref LL_HRTIM_OUTPUT_TB2
6237 * @arg @ref LL_HRTIM_OUTPUT_TC1
6238 * @arg @ref LL_HRTIM_OUTPUT_TC2
6239 * @arg @ref LL_HRTIM_OUTPUT_TD1
6240 * @arg @ref LL_HRTIM_OUTPUT_TD2
6241 * @arg @ref LL_HRTIM_OUTPUT_TE1
6242 * @arg @ref LL_HRTIM_OUTPUT_TE2
6243 * @retval OutputLevel This parameter can be one of the following values:
6244 * @arg @ref LL_HRTIM_OUT_LEVEL_INACTIVE
6245 * @arg @ref LL_HRTIM_OUT_LEVEL_ACTIVE
6246 */
6247 __STATIC_INLINE uint32_t LL_HRTIM_OUT_GetDLYPRTOutStatus(HRTIM_TypeDef *HRTIMx, uint32_t Output)
6248 {
6249 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
6250 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].TIMxISR) +
6252 return ((READ_BIT(*pReg, (HRTIM_TIMISR_O1STAT << REG_SHIFT_TAB_OxSTAT[iOutput])) >> REG_SHIFT_TAB_OxSTAT[iOutput]) >>
6253 HRTIM_TIMISR_O1STAT_Pos);
6254 }
6256 /**
6257 * @brief Force the timer output to its active or inactive level.
6258 * @rmtoll SETx1R SST LL_HRTIM_OUT_ForceLevel\n
6259 * RSTx1R SRT LL_HRTIM_OUT_ForceLevel\n
6260 * SETx2R SST LL_HRTIM_OUT_ForceLevel\n
6261 * RSTx2R SRT LL_HRTIM_OUT_ForceLevel
6262 * @param HRTIMx High Resolution Timer instance
6263 * @param Output This parameter can be one of the following values:
6264 * @arg @ref LL_HRTIM_OUTPUT_TA1
6265 * @arg @ref LL_HRTIM_OUTPUT_TA2
6266 * @arg @ref LL_HRTIM_OUTPUT_TB1
6267 * @arg @ref LL_HRTIM_OUTPUT_TB2
6268 * @arg @ref LL_HRTIM_OUTPUT_TC1
6269 * @arg @ref LL_HRTIM_OUTPUT_TC2
6270 * @arg @ref LL_HRTIM_OUTPUT_TD1
6271 * @arg @ref LL_HRTIM_OUTPUT_TD2
6272 * @arg @ref LL_HRTIM_OUTPUT_TE1
6273 * @arg @ref LL_HRTIM_OUTPUT_TE2
6274 * @param OutputLevel This parameter can be one of the following values:
6275 * @arg @ref LL_HRTIM_OUT_LEVEL_INACTIVE
6276 * @arg @ref LL_HRTIM_OUT_LEVEL_ACTIVE
6277 * @retval None
6278 */
6279 __STATIC_INLINE void LL_HRTIM_OUT_ForceLevel(HRTIM_TypeDef *HRTIMx, uint32_t Output, uint32_t OutputLevel)
6280 {
6281 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
6285 }
6287 /**
6288 * @brief Get actual output level, before the output stage (chopper, polarity).
6289 * @rmtoll TIMxISR O1CPY LL_HRTIM_OUT_GetLevel\n
6290 * TIMxISR O2CPY LL_HRTIM_OUT_GetLevel
6291 * @param HRTIMx High Resolution Timer instance
6292 * @param Output This parameter can be one of the following values:
6293 * @arg @ref LL_HRTIM_OUTPUT_TA1
6294 * @arg @ref LL_HRTIM_OUTPUT_TA2
6295 * @arg @ref LL_HRTIM_OUTPUT_TB1
6296 * @arg @ref LL_HRTIM_OUTPUT_TB2
6297 * @arg @ref LL_HRTIM_OUTPUT_TC1
6298 * @arg @ref LL_HRTIM_OUTPUT_TC2
6299 * @arg @ref LL_HRTIM_OUTPUT_TD1
6300 * @arg @ref LL_HRTIM_OUTPUT_TD2
6301 * @arg @ref LL_HRTIM_OUTPUT_TE1
6302 * @arg @ref LL_HRTIM_OUTPUT_TE2
6303 * @retval OutputLevel This parameter can be one of the following values:
6304 * @arg @ref LL_HRTIM_OUT_LEVEL_INACTIVE
6305 * @arg @ref LL_HRTIM_OUT_LEVEL_ACTIVE
6306 */
6308 {
6309 register uint32_t iOutput = (uint8_t)(POSITION_VAL(Output) - POSITION_VAL(LL_HRTIM_OUTPUT_TA1));
6310 register uint32_t *pReg = (uint32_t *)((uint32_t)((uint32_t)(&HRTIMx->sTimerxRegs[0].TIMxISR) +
6312 return ((READ_BIT(*pReg, (HRTIM_TIMISR_O1CPY << REG_SHIFT_TAB_OxSTAT[iOutput])) >> REG_SHIFT_TAB_OxSTAT[iOutput]) >>
6313 HRTIM_TIMISR_O1CPY_Pos);
6314 }
6316 /**
6317 * @}
6318 */
6320 /** @defgroup HRTIM_EF_External_Event_management External_Event_management
6321 * @{
6322 */
6324 /**
6325 * @brief Configure external event conditioning.
6326 * @rmtoll EECR1 EE1SRC LL_HRTIM_EE_Config\n
6327 * EECR1 EE1POL LL_HRTIM_EE_Config\n
6328 * EECR1 EE1SNS LL_HRTIM_EE_Config\n
6329 * EECR1 EE1FAST LL_HRTIM_EE_Config\n
6330 * EECR1 EE2SRC LL_HRTIM_EE_Config\n
6331 * EECR1 EE2POL LL_HRTIM_EE_Config\n
6332 * EECR1 EE2SNS LL_HRTIM_EE_Config\n
6333 * EECR1 EE2FAST LL_HRTIM_EE_Config\n
6334 * EECR1 EE3SRC LL_HRTIM_EE_Config\n
6335 * EECR1 EE3POL LL_HRTIM_EE_Config\n
6336 * EECR1 EE3SNS LL_HRTIM_EE_Config\n
6337 * EECR1 EE3FAST LL_HRTIM_EE_Config\n
6338 * EECR1 EE4SRC LL_HRTIM_EE_Config\n
6339 * EECR1 EE4POL LL_HRTIM_EE_Config\n
6340 * EECR1 EE4SNS LL_HRTIM_EE_Config\n
6341 * EECR1 EE4FAST LL_HRTIM_EE_Config\n
6342 * EECR1 EE5SRC LL_HRTIM_EE_Config\n
6343 * EECR1 EE5POL LL_HRTIM_EE_Config\n
6344 * EECR1 EE5SNS LL_HRTIM_EE_Config\n
6345 * EECR1 EE5FAST LL_HRTIM_EE_Config\n
6346 * EECR2 EE6SRC LL_HRTIM_EE_Config\n
6347 * EECR2 EE6POL LL_HRTIM_EE_Config\n
6348 * EECR2 EE6SNS LL_HRTIM_EE_Config\n
6349 * EECR2 EE6FAST LL_HRTIM_EE_Config\n
6350 * EECR2 EE7SRC LL_HRTIM_EE_Config\n
6351 * EECR2 EE7POL LL_HRTIM_EE_Config\n
6352 * EECR2 EE7SNS LL_HRTIM_EE_Config\n
6353 * EECR2 EE7FAST LL_HRTIM_EE_Config\n
6354 * EECR2 EE8SRC LL_HRTIM_EE_Config\n
6355 * EECR2 EE8POL LL_HRTIM_EE_Config\n
6356 * EECR2 EE8SNS LL_HRTIM_EE_Config\n
6357 * EECR2 EE8FAST LL_HRTIM_EE_Config\n
6358 * EECR2 EE9SRC LL_HRTIM_EE_Config\n
6359 * EECR2 EE9POL LL_HRTIM_EE_Config\n
6360 * EECR2 EE9SNS LL_HRTIM_EE_Config\n
6361 * EECR2 EE9FAST LL_HRTIM_EE_Config\n
6362 * EECR2 EE10SRC LL_HRTIM_EE_Config\n
6363 * EECR2 EE10POL LL_HRTIM_EE_Config\n
6364 * EECR2 EE10SNS LL_HRTIM_EE_Config\n
6365 * EECR2 EE10FAST LL_HRTIM_EE_Config
6366 * @note This function must not be called when the timer counter is enabled.
6367 * @note Event source (EExSrc1..EExSRC4) mapping depends on configured event channel.
6368 * @note Fast mode is available only for LL_HRTIM_EVENT_1..5.
6369 * @param HRTIMx High Resolution Timer instance
6370 * @param Event This parameter can be one of the following values:
6371 * @arg @ref LL_HRTIM_EVENT_1
6372 * @arg @ref LL_HRTIM_EVENT_2
6373 * @arg @ref LL_HRTIM_EVENT_3
6374 * @arg @ref LL_HRTIM_EVENT_4
6375 * @arg @ref LL_HRTIM_EVENT_5
6376 * @arg @ref LL_HRTIM_EVENT_6
6377 * @arg @ref LL_HRTIM_EVENT_7
6378 * @arg @ref LL_HRTIM_EVENT_8
6379 * @arg @ref LL_HRTIM_EVENT_9
6380 * @arg @ref LL_HRTIM_EVENT_10
6381 * @param Configuration This parameter must be a combination of all the following values:
6382 * @arg @ref LL_HRTIM_EE_SRC_1 or @ref LL_HRTIM_EE_SRC_2 or @ref LL_HRTIM_EE_SRC_3 or @ref LL_HRTIM_EE_SRC_4
6383 * @arg @ref LL_HRTIM_EE_POLARITY_HIGH or @ref LL_HRTIM_EE_POLARITY_LOW
6384 * @arg @ref LL_HRTIM_EE_SENSITIVITY_LEVEL or @ref LL_HRTIM_EE_SENSITIVITY_RISINGEDGE or @ref LL_HRTIM_EE_SENSITIVITY_FALLINGEDGE or @ref LL_HRTIM_EE_SENSITIVITY_BOTHEDGES
6385 * @arg @ref LL_HRTIM_EE_FASTMODE_DISABLE or @ref LL_HRTIM_EE_FASTMODE_ENABLE
6386 * @retval None
6387 */
6388 __STATIC_INLINE void LL_HRTIM_EE_Config(HRTIM_TypeDef *HRTIMx, uint32_t Event, uint32_t Configuration)
6389 {
6395 }
6397 /**
6398 * @brief Set the external event source.
6399 * @rmtoll EECR1 EE1SRC LL_HRTIM_EE_SetSrc\n
6400 * EECR1 EE2SRC LL_HRTIM_EE_SetSrc\n
6401 * EECR1 EE3SRC LL_HRTIM_EE_SetSrc\n
6402 * EECR1 EE4SRC LL_HRTIM_EE_SetSrc\n
6403 * EECR1 EE5SRC LL_HRTIM_EE_SetSrc\n
6404 * EECR2 EE6SRC LL_HRTIM_EE_SetSrc\n
6405 * EECR2 EE7SRC LL_HRTIM_EE_SetSrc\n
6406 * EECR2 EE8SRC LL_HRTIM_EE_SetSrc\n
6407 * EECR2 EE9SRC LL_HRTIM_EE_SetSrc\n
6408 * EECR2 EE10SRC LL_HRTIM_EE_SetSrc
6409 * @param HRTIMx High Resolution Timer instance
6410 * @param Event This parameter can be one of the following values:
6411 * @arg @ref LL_HRTIM_EVENT_1
6412 * @arg @ref LL_HRTIM_EVENT_2
6413 * @arg @ref LL_HRTIM_EVENT_3
6414 * @arg @ref LL_HRTIM_EVENT_4
6415 * @arg @ref LL_HRTIM_EVENT_5
6416 * @arg @ref LL_HRTIM_EVENT_6
6417 * @arg @ref LL_HRTIM_EVENT_7
6418 * @arg @ref LL_HRTIM_EVENT_8
6419 * @arg @ref LL_HRTIM_EVENT_9
6420 * @arg @ref LL_HRTIM_EVENT_10
6421 * @param Src This parameter can be one of the following values:
6422 * @arg @ref LL_HRTIM_EE_SRC_1
6423 * @arg @ref LL_HRTIM_EE_SRC_2
6424 * @arg @ref LL_HRTIM_EE_SRC_3
6425 * @arg @ref LL_HRTIM_EE_SRC_4
6426 * @retval None
6427 */
6429 {
6433 MODIFY_REG(*pReg, (HRTIM_EECR1_EE1SRC << REG_SHIFT_TAB_EExSRC[iEvent]), (Src << REG_SHIFT_TAB_EExSRC[iEvent]));
6434 }
6436 /**
6437 * @brief Get actual external event source.
6438 * @rmtoll EECR1 EE1SRC LL_HRTIM_EE_GetSrc\n
6439 * EECR1 EE2SRC LL_HRTIM_EE_GetSrc\n
6440 * EECR1 EE3SRC LL_HRTIM_EE_GetSrc\n
6441 * EECR1 EE4SRC LL_HRTIM_EE_GetSrc\n
6442 * EECR1 EE5SRC LL_HRTIM_EE_GetSrc\n
6443 * EECR2 EE6SRC LL_HRTIM_EE_GetSrc\n
6444 * EECR2 EE7SRC LL_HRTIM_EE_GetSrc\n
6445 * EECR2 EE8SRC LL_HRTIM_EE_GetSrc\n
6446 * EECR2 EE9SRC LL_HRTIM_EE_GetSrc\n
6447 * EECR2 EE10SRC LL_HRTIM_EE_GetSrc
6448 * @param HRTIMx High Resolution Timer instance
6449 * @param Event This parameter can be one of the following values:
6450 * @arg @ref LL_HRTIM_EVENT_1
6451 * @arg @ref LL_HRTIM_EVENT_2
6452 * @arg @ref LL_HRTIM_EVENT_3
6453 * @arg @ref LL_HRTIM_EVENT_4
6454 * @arg @ref LL_HRTIM_EVENT_5
6455 * @arg @ref LL_HRTIM_EVENT_6
6456 * @arg @ref LL_HRTIM_EVENT_7
6457 * @arg @ref LL_HRTIM_EVENT_8
6458 * @arg @ref LL_HRTIM_EVENT_9
6459 * @arg @ref LL_HRTIM_EVENT_10
6460 * @retval EventSrc This parameter can be one of the following values:
6461 * @arg @ref LL_HRTIM_EE_SRC_1
6462 * @arg @ref LL_HRTIM_EE_SRC_2
6463 * @arg @ref LL_HRTIM_EE_SRC_3
6464 * @arg @ref LL_HRTIM_EE_SRC_4
6465 */
6467 {
6471 return (READ_BIT(*pReg, HRTIM_EECR1_EE1SRC << REG_SHIFT_TAB_EExSRC[iEvent]) >> REG_SHIFT_TAB_EExSRC[iEvent]);
6472 }
6474 /**
6475 * @brief Set the polarity of an external event.
6476 * @rmtoll EECR1 EE1POL LL_HRTIM_EE_SetPolarity\n
6477 * EECR1 EE2POL LL_HRTIM_EE_SetPolarity\n
6478 * EECR1 EE3POL LL_HRTIM_EE_SetPolarity\n
6479 * EECR1 EE4POL LL_HRTIM_EE_SetPolarity\n
6480 * EECR1 EE5POL LL_HRTIM_EE_SetPolarity\n
6481 * EECR2 EE6POL LL_HRTIM_EE_SetPolarity\n
6482 * EECR2 EE7POL LL_HRTIM_EE_SetPolarity\n
6483 * EECR2 EE8POL LL_HRTIM_EE_SetPolarity\n
6484 * EECR2 EE9POL LL_HRTIM_EE_SetPolarity\n
6485 * EECR2 EE10POL LL_HRTIM_EE_SetPolarity
6486 * @note This function must not be called when the timer counter is enabled.
6487 * @note Event polarity is only significant when event detection is level-sensitive.
6488 * @param HRTIMx High Resolution Timer instance
6489 * @param Event This parameter can be one of the following values:
6490 * @arg @ref LL_HRTIM_EVENT_1
6491 * @arg @ref LL_HRTIM_EVENT_2
6492 * @arg @ref LL_HRTIM_EVENT_3
6493 * @arg @ref LL_HRTIM_EVENT_4
6494 * @arg @ref LL_HRTIM_EVENT_5
6495 * @arg @ref LL_HRTIM_EVENT_6
6496 * @arg @ref LL_HRTIM_EVENT_7
6497 * @arg @ref LL_HRTIM_EVENT_8
6498 * @arg @ref LL_HRTIM_EVENT_9
6499 * @arg @ref LL_HRTIM_EVENT_10
6500 * @param Polarity This parameter can be one of the following values:
6501 * @arg @ref LL_HRTIM_EE_POLARITY_HIGH
6502 * @arg @ref LL_HRTIM_EE_POLARITY_LOW
6503 * @retval None
6504 */
6505 __STATIC_INLINE void LL_HRTIM_EE_SetPolarity(HRTIM_TypeDef *HRTIMx, uint32_t Event, uint32_t Polarity)
6506 {
6510 MODIFY_REG(*pReg, (HRTIM_EECR1_EE1POL << REG_SHIFT_TAB_EExSRC[iEvent]), (Polarity << REG_SHIFT_TAB_EExSRC[iEvent]));
6511 }
6513 /**
6514 * @brief Get actual polarity setting of an external event.
6515 * @rmtoll EECR1 EE1POL LL_HRTIM_EE_GetPolarity\n
6516 * EECR1 EE2POL LL_HRTIM_EE_GetPolarity\n
6517 * EECR1 EE3POL LL_HRTIM_EE_GetPolarity\n
6518 * EECR1 EE4POL LL_HRTIM_EE_GetPolarity\n
6519 * EECR1 EE5POL LL_HRTIM_EE_GetPolarity\n
6520 * EECR2 EE6POL LL_HRTIM_EE_GetPolarity\n
6521 * EECR2 EE7POL LL_HRTIM_EE_GetPolarity\n
6522 * EECR2 EE8POL LL_HRTIM_EE_GetPolarity\n
6523 * EECR2 EE9POL LL_HRTIM_EE_GetPolarity\n
6524 * EECR2 EE10POL LL_HRTIM_EE_GetPolarity
6525 * @param HRTIMx High Resolution Timer instance
6526 * @param Event This parameter can be one of the following values:
6527 * @arg @ref LL_HRTIM_EVENT_1
6528 * @arg @ref LL_HRTIM_EVENT_2
6529 * @arg @ref LL_HRTIM_EVENT_3
6530 * @arg @ref LL_HRTIM_EVENT_4
6531 * @arg @ref LL_HRTIM_EVENT_5
6532 * @arg @ref LL_HRTIM_EVENT_6
6533 * @arg @ref LL_HRTIM_EVENT_7
6534 * @arg @ref LL_HRTIM_EVENT_8
6535 * @arg @ref LL_HRTIM_EVENT_9
6536 * @arg @ref LL_HRTIM_EVENT_10
6537 * @retval Polarity This parameter can be one of the following values:
6538 * @arg @ref LL_HRTIM_EE_POLARITY_HIGH
6539 * @arg @ref LL_HRTIM_EE_POLARITY_LOW
6540 */
6542 {
6546 return (READ_BIT(*pReg, HRTIM_EECR1_EE1POL << REG_SHIFT_TAB_EExSRC[iEvent]) >> REG_SHIFT_TAB_EExSRC[iEvent]);
6547 }
6549 /**
6550 * @brief Set the sensitivity of an external event.
6551 * @rmtoll EECR1 EE1SNS LL_HRTIM_EE_SetSensitivity\n
6552 * EECR1 EE2SNS LL_HRTIM_EE_SetSensitivity\n
6553 * EECR1 EE3SNS LL_HRTIM_EE_SetSensitivity\n
6554 * EECR1 EE4SNS LL_HRTIM_EE_SetSensitivity\n
6555 * EECR1 EE5SNS LL_HRTIM_EE_SetSensitivity\n
6556 * EECR2 EE6SNS LL_HRTIM_EE_SetSensitivity\n
6557 * EECR2 EE7SNS LL_HRTIM_EE_SetSensitivity\n
6558 * EECR2 EE8SNS LL_HRTIM_EE_SetSensitivity\n
6559 * EECR2 EE9SNS LL_HRTIM_EE_SetSensitivity\n
6560 * EECR2 EE10SNS LL_HRTIM_EE_SetSensitivity
6561 * @param HRTIMx High Resolution Timer instance
6562 * @param Event This parameter can be one of the following values:
6563 * @arg @ref LL_HRTIM_EVENT_1
6564 * @arg @ref LL_HRTIM_EVENT_2
6565 * @arg @ref LL_HRTIM_EVENT_3
6566 * @arg @ref LL_HRTIM_EVENT_4
6567 * @arg @ref LL_HRTIM_EVENT_5
6568 * @arg @ref LL_HRTIM_EVENT_6
6569 * @arg @ref LL_HRTIM_EVENT_7
6570 * @arg @ref LL_HRTIM_EVENT_8
6571 * @arg @ref LL_HRTIM_EVENT_9
6572 * @arg @ref LL_HRTIM_EVENT_10
6573 * @param Sensitivity This parameter can be one of the following values:
6574 * @arg @ref LL_HRTIM_EE_SENSITIVITY_LEVEL
6575 * @arg @ref LL_HRTIM_EE_SENSITIVITY_RISINGEDGE
6576 * @arg @ref LL_HRTIM_EE_SENSITIVITY_FALLINGEDGE
6577 * @arg @ref LL_HRTIM_EE_SENSITIVITY_BOTHEDGES
6578 * @retval None
6579 */
6581 __STATIC_INLINE void LL_HRTIM_EE_SetSensitivity(HRTIM_TypeDef *HRTIMx, uint32_t Event, uint32_t Sensitivity)
6582 {
6586 MODIFY_REG(*pReg, (HRTIM_EECR1_EE1SNS << REG_SHIFT_TAB_EExSRC[iEvent]), (Sensitivity << REG_SHIFT_TAB_EExSRC[iEvent]));
6587 }
6589 /**
6590 * @brief Get actual sensitivity setting of an external event.
6591 * @rmtoll EECR1 EE1SNS LL_HRTIM_EE_GetSensitivity\n
6592 * EECR1 EE2SNS LL_HRTIM_EE_GetSensitivity\n
6593 * EECR1 EE3SNS LL_HRTIM_EE_GetSensitivity\n
6594 * EECR1 EE4SNS LL_HRTIM_EE_GetSensitivity\n
6595 * EECR1 EE5SNS LL_HRTIM_EE_GetSensitivity\n
6596 * EECR2 EE6SNS LL_HRTIM_EE_GetSensitivity\n
6597 * EECR2 EE7SNS LL_HRTIM_EE_GetSensitivity\n
6598 * EECR2 EE8SNS LL_HRTIM_EE_GetSensitivity\n
6599 * EECR2 EE9SNS LL_HRTIM_EE_GetSensitivity\n
6600 * EECR2 EE10SNS LL_HRTIM_EE_GetSensitivity
6601 * @param HRTIMx High Resolution Timer instance
6602 * @param Event This parameter can be one of the following values:
6603 * @arg @ref LL_HRTIM_EVENT_1
6604 * @arg @ref LL_HRTIM_EVENT_2
6605 * @arg @ref LL_HRTIM_EVENT_3
6606 * @arg @ref LL_HRTIM_EVENT_4
6607 * @arg @ref LL_HRTIM_EVENT_5
6608 * @arg @ref LL_HRTIM_EVENT_6
6609 * @arg @ref LL_HRTIM_EVENT_7
6610 * @arg @ref LL_HRTIM_EVENT_8
6611 * @arg @ref LL_HRTIM_EVENT_9
6612 * @arg @ref LL_HRTIM_EVENT_10
6613 * @retval Polarity This parameter can be one of the following values:
6614 * @arg @ref LL_HRTIM_EE_SENSITIVITY_LEVEL
6615 * @arg @ref LL_HRTIM_EE_SENSITIVITY_RISINGEDGE
6616 * @arg @ref LL_HRTIM_EE_SENSITIVITY_FALLINGEDGE
6617 * @arg @ref LL_HRTIM_EE_SENSITIVITY_BOTHEDGES
6618 */
6620 {
6624 return (READ_BIT(*pReg, HRTIM_EECR1_EE1SNS << REG_SHIFT_TAB_EExSRC[iEvent]) >> REG_SHIFT_TAB_EExSRC[iEvent]);
6625 }
6627 /**
6628 * @brief Set the fast mode of an external event.
6629 * @rmtoll EECR1 EE1FAST LL_HRTIM_EE_SetFastMode\n
6630 * EECR1 EE2FAST LL_HRTIM_EE_SetFastMode\n
6631 * EECR1 EE3FAST LL_HRTIM_EE_SetFastMode\n
6632 * EECR1 EE4FAST LL_HRTIM_EE_SetFastMode\n
6633 * EECR1 EE5FAST LL_HRTIM_EE_SetFastMode\n
6634 * EECR2 EE6FAST LL_HRTIM_EE_SetFastMode\n
6635 * EECR2 EE7FAST LL_HRTIM_EE_SetFastMode\n
6636 * EECR2 EE8FAST LL_HRTIM_EE_SetFastMode\n
6637 * EECR2 EE9FAST LL_HRTIM_EE_SetFastMode\n
6638 * EECR2 EE10FAST LL_HRTIM_EE_SetFastMode
6639 * @note This function must not be called when the timer counter is enabled.
6640 * @param HRTIMx High Resolution Timer instance
6641 * @param Event This parameter can be one of the following values:
6642 * @arg @ref LL_HRTIM_EVENT_1
6643 * @arg @ref LL_HRTIM_EVENT_2
6644 * @arg @ref LL_HRTIM_EVENT_3
6645 * @arg @ref LL_HRTIM_EVENT_4
6646 * @arg @ref LL_HRTIM_EVENT_5
6647 * @param FastMode This parameter can be one of the following values:
6648 * @arg @ref LL_HRTIM_EE_FASTMODE_DISABLE
6649 * @arg @ref LL_HRTIM_EE_FASTMODE_ENABLE
6650 * @retval None
6651 */
6652 __STATIC_INLINE void LL_HRTIM_EE_SetFastMode(HRTIM_TypeDef *HRTIMx, uint32_t Event, uint32_t FastMode)
6653 {
6657 MODIFY_REG(*pReg, (HRTIM_EECR1_EE1FAST << REG_SHIFT_TAB_EExSRC[iEvent]), (FastMode << REG_SHIFT_TAB_EExSRC[iEvent]));
6658 }
6660 /**
6661 * @brief Get actual fast mode setting of an external event.
6662 * @rmtoll EECR1 EE1FAST LL_HRTIM_EE_GetFastMode\n
6663 * EECR1 EE2FAST LL_HRTIM_EE_GetFastMode\n
6664 * EECR1 EE3FAST LL_HRTIM_EE_GetFastMode\n
6665 * EECR1 EE4FAST LL_HRTIM_EE_GetFastMode\n
6666 * EECR1 EE5FAST LL_HRTIM_EE_GetFastMode\n
6667 * EECR2 EE6FAST LL_HRTIM_EE_GetFastMode\n
6668 * EECR2 EE7FAST LL_HRTIM_EE_GetFastMode\n
6669 * EECR2 EE8FAST LL_HRTIM_EE_GetFastMode\n
6670 * EECR2 EE9FAST LL_HRTIM_EE_GetFastMode\n
6671 * EECR2 EE10FAST LL_HRTIM_EE_GetFastMode
6672 * @param HRTIMx High Resolution Timer instance
6673 * @param Event This parameter can be one of the following values:
6674 * @arg @ref LL_HRTIM_EVENT_1
6675 * @arg @ref LL_HRTIM_EVENT_2
6676 * @arg @ref LL_HRTIM_EVENT_3
6677 * @arg @ref LL_HRTIM_EVENT_4
6678 * @arg @ref LL_HRTIM_EVENT_5
6679 * @retval FastMode This parameter can be one of the following values:
6680 * @arg @ref LL_HRTIM_EE_FASTMODE_DISABLE
6681 * @arg @ref LL_HRTIM_EE_FASTMODE_ENABLE
6682 */
6684 {
6688 return (READ_BIT(*pReg, HRTIM_EECR1_EE1FAST << REG_SHIFT_TAB_EExSRC[iEvent]) >> REG_SHIFT_TAB_EExSRC[iEvent]);
6689 }
6691 /**
6692 * @brief Set the digital noise filter of a external event.
6693 * @rmtoll EECR3 EE6F LL_HRTIM_EE_SetFilter\n
6694 * EECR3 EE7F LL_HRTIM_EE_SetFilter\n
6695 * EECR3 EE8F LL_HRTIM_EE_SetFilter\n
6696 * EECR3 EE9F LL_HRTIM_EE_SetFilter\n
6697 * EECR3 EE10F LL_HRTIM_EE_SetFilter
6698 * @param HRTIMx High Resolution Timer instance
6699 * @param Event This parameter can be one of the following values:
6700 * @arg @ref LL_HRTIM_EVENT_6
6701 * @arg @ref LL_HRTIM_EVENT_7
6702 * @arg @ref LL_HRTIM_EVENT_8
6703 * @arg @ref LL_HRTIM_EVENT_9
6704 * @arg @ref LL_HRTIM_EVENT_10
6705 * @param Filter This parameter can be one of the following values:
6706 * @arg @ref LL_HRTIM_EE_FILTER_NONE
6707 * @arg @ref LL_HRTIM_EE_FILTER_1
6708 * @arg @ref LL_HRTIM_EE_FILTER_2
6709 * @arg @ref LL_HRTIM_EE_FILTER_3
6710 * @arg @ref LL_HRTIM_EE_FILTER_4
6711 * @arg @ref LL_HRTIM_EE_FILTER_5
6712 * @arg @ref LL_HRTIM_EE_FILTER_6
6713 * @arg @ref LL_HRTIM_EE_FILTER_7
6714 * @arg @ref LL_HRTIM_EE_FILTER_8
6715 * @arg @ref LL_HRTIM_EE_FILTER_9
6716 * @arg @ref LL_HRTIM_EE_FILTER_10
6717 * @arg @ref LL_HRTIM_EE_FILTER_11
6718 * @arg @ref LL_HRTIM_EE_FILTER_12
6719 * @arg @ref LL_HRTIM_EE_FILTER_13
6720 * @arg @ref LL_HRTIM_EE_FILTER_14
6721 * @arg @ref LL_HRTIM_EE_FILTER_15
6722 * @retval None
6723 */
6724 __STATIC_INLINE void LL_HRTIM_EE_SetFilter(HRTIM_TypeDef *HRTIMx, uint32_t Event, uint32_t Filter)
6725 {
6729 }
6731 /**
6732 * @brief Get actual digital noise filter setting of a external event.
6733 * @rmtoll EECR3 EE6F LL_HRTIM_EE_GetFilter\n
6734 * EECR3 EE7F LL_HRTIM_EE_GetFilter\n
6735 * EECR3 EE8F LL_HRTIM_EE_GetFilter\n
6736 * EECR3 EE9F LL_HRTIM_EE_GetFilter\n
6737 * EECR3 EE10F LL_HRTIM_EE_GetFilter
6738 * @param HRTIMx High Resolution Timer instance
6739 * @param Event This parameter can be one of the following values:
6740 * @arg @ref LL_HRTIM_EVENT_6
6741 * @arg @ref LL_HRTIM_EVENT_7
6742 * @arg @ref LL_HRTIM_EVENT_8
6743 * @arg @ref LL_HRTIM_EVENT_9
6744 * @arg @ref LL_HRTIM_EVENT_10
6745 * @retval Filter This parameter can be one of the following values:
6746 * @arg @ref LL_HRTIM_EE_FILTER_NONE
6747 * @arg @ref LL_HRTIM_EE_FILTER_1
6748 * @arg @ref LL_HRTIM_EE_FILTER_2
6749 * @arg @ref LL_HRTIM_EE_FILTER_3
6750 * @arg @ref LL_HRTIM_EE_FILTER_4
6751 * @arg @ref LL_HRTIM_EE_FILTER_5
6752 * @arg @ref LL_HRTIM_EE_FILTER_6
6753 * @arg @ref LL_HRTIM_EE_FILTER_7
6754 * @arg @ref LL_HRTIM_EE_FILTER_8
6755 * @arg @ref LL_HRTIM_EE_FILTER_9
6756 * @arg @ref LL_HRTIM_EE_FILTER_10
6757 * @arg @ref LL_HRTIM_EE_FILTER_11
6758 * @arg @ref LL_HRTIM_EE_FILTER_12
6759 * @arg @ref LL_HRTIM_EE_FILTER_13
6760 * @arg @ref LL_HRTIM_EE_FILTER_14
6761 * @arg @ref LL_HRTIM_EE_FILTER_15
6762 */
6764 {
6768 }
6770 /**
6771 * @brief Set the external event prescaler.
6772 * @rmtoll EECR3 EEVSD LL_HRTIM_EE_SetPrescaler
6773 * @param HRTIMx High Resolution Timer instance
6774 * @param Prescaler This parameter can be one of the following values:
6775 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV1
6776 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV2
6777 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV4
6778 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV8
6779 * @retval None
6780 */
6783 {
6785 }
6787 /**
6788 * @brief Get actual external event prescaler setting.
6789 * @rmtoll EECR3 EEVSD LL_HRTIM_EE_GetPrescaler
6790 * @param HRTIMx High Resolution Timer instance
6791 * @retval Prescaler This parameter can be one of the following values:
6792 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV1
6793 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV2
6794 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV4
6795 * @arg @ref LL_HRTIM_EE_PRESCALER_DIV8
6796 */
6799 {
6801 }
6803 /**
6804 * @}
6805 */
6807 /** @defgroup HRTIM_EF_Fault_management Fault_management
6808 * @{
6809 */
6811 /**
6812 * @brief Configure fault signal conditioning.
6813 * @rmtoll FLTINR1 FLT1P LL_HRTIM_FLT_Config\n
6814 * FLTINR1 FLT1SRC LL_HRTIM_FLT_Config\n
6815 * FLTINR1 FLT2P LL_HRTIM_FLT_Config\n
6816 * FLTINR1 FLT2SRC LL_HRTIM_FLT_Config\n
6817 * FLTINR1 FLT3P LL_HRTIM_FLT_Config\n
6818 * FLTINR1 FLT3SRC LL_HRTIM_FLT_Config\n
6819 * FLTINR1 FLT4P LL_HRTIM_FLT_Config\n
6820 * FLTINR1 FLT4SRC LL_HRTIM_FLT_Config\n
6821 * FLTINR2 FLT5P LL_HRTIM_FLT_Config\n
6822 * FLTINR2 FLT5SRC LL_HRTIM_FLT_Config
6823 * @note This function must not be called when the fault channel is enabled.
6824 * @param HRTIMx High Resolution Timer instance
6825 * @param Fault This parameter can be one of the following values:
6826 * @arg @ref LL_HRTIM_FAULT_1
6827 * @arg @ref LL_HRTIM_FAULT_2
6828 * @arg @ref LL_HRTIM_FAULT_3
6829 * @arg @ref LL_HRTIM_FAULT_4
6830 * @arg @ref LL_HRTIM_FAULT_5
6831 * @param Configuration This parameter must be a combination of all the following values:
6832 * @arg @ref LL_HRTIM_FLT_SRC_DIGITALINPUT or @ref LL_HRTIM_FLT_SRC_INTERNAL
6833 * @arg @ref LL_HRTIM_FLT_POLARITY_LOW or @ref LL_HRTIM_FLT_POLARITY_HIGH
6834 * @retval None
6835 */
6836 __STATIC_INLINE void LL_HRTIM_FLT_Config(HRTIM_TypeDef *HRTIMx, uint32_t Fault, uint32_t Configuration)
6837 {
6843 }
6845 /**
6846 * @brief Set the source of a fault signal.
6847 * @rmtoll FLTINR1 FLT1SRC LL_HRTIM_FLT_SetSrc\n
6848 * FLTINR1 FLT2SRC LL_HRTIM_FLT_SetSrc\n
6849 * FLTINR1 FLT3SRC LL_HRTIM_FLT_SetSrc\n
6850 * FLTINR1 FLT4SRC LL_HRTIM_FLT_SetSrc\n
6851 * FLTINR2 FLT5SRC LL_HRTIM_FLT_SetSrc
6852 * @note This function must not be called when the fault channel is enabled.
6853 * @param HRTIMx High Resolution Timer instance
6854 * @param Fault This parameter can be one of the following values:
6855 * @arg @ref LL_HRTIM_FAULT_1
6856 * @arg @ref LL_HRTIM_FAULT_2
6857 * @arg @ref LL_HRTIM_FAULT_3
6858 * @arg @ref LL_HRTIM_FAULT_4
6859 * @arg @ref LL_HRTIM_FAULT_5
6860 * @param Src This parameter can be one of the following values:
6861 * @arg @ref LL_HRTIM_FLT_SRC_DIGITALINPUT
6862 * @arg @ref LL_HRTIM_FLT_SRC_INTERNAL
6863 * @retval None
6864 */
6866 {
6870 MODIFY_REG(*pReg, (HRTIM_FLTINR1_FLT1SRC << REG_SHIFT_TAB_FLTxE[iFault]), (Src << REG_SHIFT_TAB_FLTxE[iFault]));
6871 }
6873 /**
6874 * @brief Get actual source of a fault signal.
6875 * @rmtoll FLTINR1 FLT1SRC LL_HRTIM_FLT_GetSrc\n
6876 * FLTINR1 FLT2SRC LL_HRTIM_FLT_GetSrc\n
6877 * FLTINR1 FLT3SRC LL_HRTIM_FLT_GetSrc\n
6878 * FLTINR1 FLT4SRC LL_HRTIM_FLT_GetSrc\n
6879 * FLTINR2 FLT5SRC LL_HRTIM_FLT_GetSrc
6880 * @param HRTIMx High Resolution Timer instance
6881 * @param Fault This parameter can be one of the following values:
6882 * @arg @ref LL_HRTIM_FAULT_1
6883 * @arg @ref LL_HRTIM_FAULT_2
6884 * @arg @ref LL_HRTIM_FAULT_3
6885 * @arg @ref LL_HRTIM_FAULT_4
6886 * @arg @ref LL_HRTIM_FAULT_5
6887 * @retval Src This parameter can be one of the following values:
6888 * @arg @ref LL_HRTIM_FLT_SRC_DIGITALINPUT
6889 * @arg @ref LL_HRTIM_FLT_SRC_INTERNAL
6890 */
6892 {
6896 return (READ_BIT(*pReg, (HRTIM_FLTINR1_FLT1SRC << REG_SHIFT_TAB_FLTxE[iFault])) >> REG_SHIFT_TAB_FLTxE[iFault]);
6897 }
6899 /**
6900 * @brief Set the polarity of a fault signal.
6901 * @rmtoll FLTINR1 FLT1P LL_HRTIM_FLT_SetPolarity\n
6902 * FLTINR1 FLT2P LL_HRTIM_FLT_SetPolarity\n
6903 * FLTINR1 FLT3P LL_HRTIM_FLT_SetPolarity\n
6904 * FLTINR1 FLT4P LL_HRTIM_FLT_SetPolarity\n
6905 * FLTINR2 FLT5P LL_HRTIM_FLT_SetPolarity
6906 * @note This function must not be called when the fault channel is enabled.
6907 * @param HRTIMx High Resolution Timer instance
6908 * @param Fault This parameter can be one of the following values:
6909 * @arg @ref LL_HRTIM_FAULT_1
6910 * @arg @ref LL_HRTIM_FAULT_2
6911 * @arg @ref LL_HRTIM_FAULT_3
6912 * @arg @ref LL_HRTIM_FAULT_4
6913 * @arg @ref LL_HRTIM_FAULT_5
6914 * @param Polarity This parameter can be one of the following values:
6915 * @arg @ref LL_HRTIM_FLT_POLARITY_LOW
6916 * @arg @ref LL_HRTIM_FLT_POLARITY_HIGH
6917 * @retval None
6918 */
6919 __STATIC_INLINE void LL_HRTIM_FLT_SetPolarity(HRTIM_TypeDef *HRTIMx, uint32_t Fault, uint32_t Polarity)
6920 {
6924 MODIFY_REG(*pReg, (HRTIM_FLTINR1_FLT1P << REG_SHIFT_TAB_FLTxE[iFault]), (Polarity << REG_SHIFT_TAB_FLTxE[iFault]));
6925 }
6927 /**
6928 * @brief Get actual polarity of a fault signal.
6929 * @rmtoll FLTINR1 FLT1P LL_HRTIM_FLT_GetPolarity\n
6930 * FLTINR1 FLT2P LL_HRTIM_FLT_GetPolarity\n
6931 * FLTINR1 FLT3P LL_HRTIM_FLT_GetPolarity\n
6932 * FLTINR1 FLT4P LL_HRTIM_FLT_GetPolarity\n
6933 * FLTINR2 FLT5P LL_HRTIM_FLT_GetPolarity
6934 * @param HRTIMx High Resolution Timer instance
6935 * @param Fault This parameter can be one of the following values:
6936 * @arg @ref LL_HRTIM_FAULT_1
6937 * @arg @ref LL_HRTIM_FAULT_2
6938 * @arg @ref LL_HRTIM_FAULT_3
6939 * @arg @ref LL_HRTIM_FAULT_4
6940 * @arg @ref LL_HRTIM_FAULT_5
6941 * @retval Polarity This parameter can be one of the following values:
6942 * @arg @ref LL_HRTIM_FLT_POLARITY_LOW
6943 * @arg @ref LL_HRTIM_FLT_POLARITY_HIGH
6944 */
6946 {
6950 return (READ_BIT(*pReg, (HRTIM_FLTINR1_FLT1P << REG_SHIFT_TAB_FLTxE[iFault])) >> REG_SHIFT_TAB_FLTxE[iFault]);
6951 }
6953 /**
6954 * @brief Set the digital noise filter of a fault signal.
6955 * @rmtoll FLTINR1 FLT1F LL_HRTIM_FLT_SetFilter\n
6956 * FLTINR1 FLT2F LL_HRTIM_FLT_SetFilter\n
6957 * FLTINR1 FLT3F LL_HRTIM_FLT_SetFilter\n
6958 * FLTINR1 FLT4F LL_HRTIM_FLT_SetFilter\n
6959 * FLTINR2 FLT5F LL_HRTIM_FLT_SetFilter
6960 * @note This function must not be called when the fault channel is enabled.
6961 * @param HRTIMx High Resolution Timer instance
6962 * @param Fault This parameter can be one of the following values:
6963 * @arg @ref LL_HRTIM_FAULT_1
6964 * @arg @ref LL_HRTIM_FAULT_2
6965 * @arg @ref LL_HRTIM_FAULT_3
6966 * @arg @ref LL_HRTIM_FAULT_4
6967 * @arg @ref LL_HRTIM_FAULT_5
6968 * @param Filter This parameter can be one of the following values:
6969 * @arg @ref LL_HRTIM_FLT_FILTER_NONE
6970 * @arg @ref LL_HRTIM_FLT_FILTER_1
6971 * @arg @ref LL_HRTIM_FLT_FILTER_2
6972 * @arg @ref LL_HRTIM_FLT_FILTER_3
6973 * @arg @ref LL_HRTIM_FLT_FILTER_4
6974 * @arg @ref LL_HRTIM_FLT_FILTER_5
6975 * @arg @ref LL_HRTIM_FLT_FILTER_6
6976 * @arg @ref LL_HRTIM_FLT_FILTER_7
6977 * @arg @ref LL_HRTIM_FLT_FILTER_8
6978 * @arg @ref LL_HRTIM_FLT_FILTER_9
6979 * @arg @ref LL_HRTIM_FLT_FILTER_10
6980 * @arg @ref LL_HRTIM_FLT_FILTER_11
6981 * @arg @ref LL_HRTIM_FLT_FILTER_12
6982 * @arg @ref LL_HRTIM_FLT_FILTER_13
6983 * @arg @ref LL_HRTIM_FLT_FILTER_14
6984 * @arg @ref LL_HRTIM_FLT_FILTER_15
6985 * @retval None
6986 */
6987 __STATIC_INLINE void LL_HRTIM_FLT_SetFilter(HRTIM_TypeDef *HRTIMx, uint32_t Fault, uint32_t Filter)
6988 {
6992 MODIFY_REG(*pReg, (HRTIM_FLTINR1_FLT1F << REG_SHIFT_TAB_FLTxE[iFault]), (Filter << REG_SHIFT_TAB_FLTxE[iFault]));
6993 }
6995 /**
6996 * @brief Get actual digital noise filter setting of a fault signal.
6997 * @rmtoll FLTINR1 FLT1F LL_HRTIM_FLT_GetFilter\n
6998 * FLTINR1 FLT2F LL_HRTIM_FLT_GetFilter\n
6999 * FLTINR1 FLT3F LL_HRTIM_FLT_GetFilter\n
7000 * FLTINR1 FLT4F LL_HRTIM_FLT_GetFilter\n
7001 * FLTINR2 FLT5F LL_HRTIM_FLT_GetFilter
7002 * @param HRTIMx High Resolution Timer instance
7003 * @param Fault This parameter can be one of the following values:
7004 * @arg @ref LL_HRTIM_FAULT_1
7005 * @arg @ref LL_HRTIM_FAULT_2
7006 * @arg @ref LL_HRTIM_FAULT_3
7007 * @arg @ref LL_HRTIM_FAULT_4
7008 * @arg @ref LL_HRTIM_FAULT_5
7009 * @retval Filter This parameter can be one of the following values:
7010 * @arg @ref LL_HRTIM_FLT_FILTER_NONE
7011 * @arg @ref LL_HRTIM_FLT_FILTER_1
7012 * @arg @ref LL_HRTIM_FLT_FILTER_2
7013 * @arg @ref LL_HRTIM_FLT_FILTER_3
7014 * @arg @ref LL_HRTIM_FLT_FILTER_4
7015 * @arg @ref LL_HRTIM_FLT_FILTER_5
7016 * @arg @ref LL_HRTIM_FLT_FILTER_6
7017 * @arg @ref LL_HRTIM_FLT_FILTER_7
7018 * @arg @ref LL_HRTIM_FLT_FILTER_8
7019 * @arg @ref LL_HRTIM_FLT_FILTER_9
7020 * @arg @ref LL_HRTIM_FLT_FILTER_10
7021 * @arg @ref LL_HRTIM_FLT_FILTER_11
7022 * @arg @ref LL_HRTIM_FLT_FILTER_12
7023 * @arg @ref LL_HRTIM_FLT_FILTER_13
7024 * @arg @ref LL_HRTIM_FLT_FILTER_14
7025 * @arg @ref LL_HRTIM_FLT_FILTER_15
7026 */
7028 {
7032 return (READ_BIT(*pReg, (HRTIM_FLTINR1_FLT1F << REG_SHIFT_TAB_FLTxE[iFault])) >> REG_SHIFT_TAB_FLTxE[iFault]);
7033 }
7035 /**
7036 * @brief Set the fault circuitry prescaler.
7037 * @rmtoll FLTINR2 FLTSD LL_HRTIM_FLT_SetPrescaler
7038 * @param HRTIMx High Resolution Timer instance
7039 * @param Prescaler This parameter can be one of the following values:
7040 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV1
7041 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV2
7042 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV4
7043 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV8
7044 * @retval None
7045 */
7047 {
7049 }
7051 /**
7052 * @brief Get actual fault circuitry prescaler setting.
7053 * @rmtoll FLTINR2 FLTSD LL_HRTIM_FLT_GetPrescaler
7054 * @param HRTIMx High Resolution Timer instance
7055 * @retval Prescaler This parameter can be one of the following values:
7056 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV1
7057 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV2
7058 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV4
7059 * @arg @ref LL_HRTIM_FLT_PRESCALER_DIV8
7060 */
7062 {
7065 }
7067 /**
7068 * @brief Lock the fault signal conditioning settings.
7069 * @rmtoll FLTINR1 FLT1LCK LL_HRTIM_FLT_Lock\n
7070 * FLTINR1 FLT2LCK LL_HRTIM_FLT_Lock\n
7071 * FLTINR1 FLT3LCK LL_HRTIM_FLT_Lock\n
7072 * FLTINR1 FLT4LCK LL_HRTIM_FLT_Lock\n
7073 * FLTINR2 FLT5LCK LL_HRTIM_FLT_Lock
7074 * @param HRTIMx High Resolution Timer instance
7075 * @param Fault This parameter can be one of the following values:
7076 * @arg @ref LL_HRTIM_FAULT_1
7077 * @arg @ref LL_HRTIM_FAULT_2
7078 * @arg @ref LL_HRTIM_FAULT_3
7079 * @arg @ref LL_HRTIM_FAULT_4
7080 * @arg @ref LL_HRTIM_FAULT_5
7081 * @retval None
7082 */
7084 {
7089 }
7091 /**
7092 * @brief Enable the fault circuitry for the designated fault input.
7093 * @rmtoll FLTINR1 FLT1E LL_HRTIM_FLT_Enable\n
7094 * FLTINR1 FLT2E LL_HRTIM_FLT_Enable\n
7095 * FLTINR1 FLT3E LL_HRTIM_FLT_Enable\n
7096 * FLTINR1 FLT4E LL_HRTIM_FLT_Enable\n
7097 * FLTINR2 FLT5E LL_HRTIM_FLT_Enable
7098 * @param HRTIMx High Resolution Timer instance
7099 * @param Fault This parameter can be one of the following values:
7100 * @arg @ref LL_HRTIM_FAULT_1
7101 * @arg @ref LL_HRTIM_FAULT_2
7102 * @arg @ref LL_HRTIM_FAULT_3
7103 * @arg @ref LL_HRTIM_FAULT_4
7104 * @arg @ref LL_HRTIM_FAULT_5
7105 * @retval None
7106 */
7108 {
7113 }
7115 /**
7116 * @brief Disable the fault circuitry for for the designated fault input.
7117 * @rmtoll FLTINR1 FLT1E LL_HRTIM_FLT_Disable\n
7118 * FLTINR1 FLT2E LL_HRTIM_FLT_Disable\n
7119 * FLTINR1 FLT3E LL_HRTIM_FLT_Disable\n
7120 * FLTINR1 FLT4E LL_HRTIM_FLT_Disable\n
7121 * FLTINR2 FLT5E LL_HRTIM_FLT_Disable
7122 * @param HRTIMx High Resolution Timer instance
7123 * @param Fault This parameter can be one of the following values:
7124 * @arg @ref LL_HRTIM_FAULT_1
7125 * @arg @ref LL_HRTIM_FAULT_2
7126 * @arg @ref LL_HRTIM_FAULT_3
7127 * @arg @ref LL_HRTIM_FAULT_4
7128 * @arg @ref LL_HRTIM_FAULT_5
7129 * @retval None
7130 */
7132 {
7137 }
7139 /**
7140 * @brief Indicate whether the fault circuitry is enabled for a given fault input.
7141 * @rmtoll FLTINR1 FLT1E LL_HRTIM_FLT_IsEnabled\n
7142 * FLTINR1 FLT2E LL_HRTIM_FLT_IsEnabled\n
7143 * FLTINR1 FLT3E LL_HRTIM_FLT_IsEnabled\n
7144 * FLTINR1 FLT4E LL_HRTIM_FLT_IsEnabled\n
7145 * FLTINR2 FLT5E LL_HRTIM_FLT_IsEnabled
7146 * @param HRTIMx High Resolution Timer instance * @param HRTIMx High Resolution Timer instance
7147 * @param Fault This parameter can be one of the following values:
7148 * @arg @ref LL_HRTIM_FAULT_1
7149 * @arg @ref LL_HRTIM_FAULT_2
7150 * @arg @ref LL_HRTIM_FAULT_3
7151 * @arg @ref LL_HRTIM_FAULT_4
7152 * @arg @ref LL_HRTIM_FAULT_5
7153 * @retval State of FLTxEN bit in HRTIM_FLTINRx register (1 or 0).
7154 */
7156 {
7160 return ((READ_BIT(*pReg, (HRTIM_FLTINR1_FLT1E << REG_SHIFT_TAB_FLTxE[iFault])) >> REG_SHIFT_TAB_FLTxE[iFault]) ==
7162 }
7164 /**
7165 * @}
7166 */
7168 /** @defgroup HRTIM_EF_Burst_Mode_management Burst_Mode_management
7169 * @{
7170 */
7172 /**
7173 * @brief Configure the burst mode controller.
7174 * @rmtoll BMCR BMOM LL_HRTIM_BM_Config\n
7175 * BMCR BMCLK LL_HRTIM_BM_Config\n
7176 * BMCR BMPRSC LL_HRTIM_BM_Config
7177 * @param HRTIMx High Resolution Timer instance
7178 * @param Configuration This parameter must be a combination of all the following values:
7179 * @arg @ref LL_HRTIM_BM_MODE_SINGLESHOT or @ref LL_HRTIM_BM_MODE_CONTINOUS
7180 * @arg @ref LL_HRTIM_BM_CLKSRC_MASTER or ... or @ref LL_HRTIM_BM_CLKSRC_FHRTIM
7181 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV1 or ... @ref LL_HRTIM_BM_PRESCALER_DIV32768
7182 * @retval None
7183 */
7185 {
7187 }
7189 /**
7190 * @brief Set the burst mode controller operating mode.
7191 * @rmtoll BMCR BMOM LL_HRTIM_BM_SetMode
7192 * @param HRTIMx High Resolution Timer instance
7193 * @param Mode This parameter can be one of the following values:
7194 * @arg @ref LL_HRTIM_BM_MODE_SINGLESHOT
7195 * @arg @ref LL_HRTIM_BM_MODE_CONTINOUS
7196 * @retval None
7197 */
7199 {
7201 }
7203 /**
7204 * @brief Get actual burst mode controller operating mode.
7205 * @rmtoll BMCR BMOM LL_HRTIM_BM_GetMode
7206 * @param HRTIMx High Resolution Timer instance
7207 * @retval Mode This parameter can be one of the following values:
7208 * @arg @ref LL_HRTIM_BM_MODE_SINGLESHOT
7209 * @arg @ref LL_HRTIM_BM_MODE_CONTINOUS
7210 */
7212 {
7214 }
7216 /**
7217 * @brief Set the burst mode controller clock source.
7218 * @rmtoll BMCR BMCLK LL_HRTIM_BM_SetClockSrc
7219 * @param HRTIMx High Resolution Timer instance
7220 * @param ClockSrc This parameter can be one of the following values:
7221 * @arg @ref LL_HRTIM_BM_CLKSRC_MASTER
7222 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_A
7223 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_B
7224 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_C
7225 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_D
7226 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_E
7227 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM16_OC
7228 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM17_OC
7229 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM7_TRGO
7230 * @arg @ref LL_HRTIM_BM_CLKSRC_FHRTIM
7231 * @retval None
7232 */
7234 {
7236 }
7238 /**
7239 * @brief Get actual burst mode controller clock source.
7240 * @rmtoll BMCR BMCLK LL_HRTIM_BM_GetClockSrc
7241 * @param HRTIMx High Resolution Timer instance
7242 * @retval ClockSrc This parameter can be one of the following values:
7243 * @arg @ref LL_HRTIM_BM_CLKSRC_MASTER
7244 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_A
7245 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_B
7246 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_C
7247 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_D
7248 * @arg @ref LL_HRTIM_BM_CLKSRC_TIMER_E
7249 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM16_OC
7250 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM17_OC
7251 * @arg @ref LL_HRTIM_BM_CLKSRC_TIM7_TRGO
7252 * @arg @ref LL_HRTIM_BM_CLKSRC_FHRTIM
7253 */
7255 {
7257 }
7259 /**
7260 * @brief Set the burst mode controller prescaler.
7261 * @rmtoll BMCR BMPRSC LL_HRTIM_BM_SetPrescaler
7262 * @param HRTIMx High Resolution Timer instance
7263 * @param Prescaler This parameter can be one of the following values:
7264 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV1
7265 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV2
7266 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV4
7267 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV8
7268 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV16
7269 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV32
7270 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV64
7271 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV128
7272 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV256
7273 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV512
7274 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV1024
7275 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV2048
7276 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV4096
7277 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV8192
7278 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV16384
7279 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV32768
7280 * @retval None
7281 */
7283 {
7285 }
7287 /**
7288 * @brief Get actual burst mode controller prescaler setting.
7289 * @rmtoll BMCR BMPRSC LL_HRTIM_BM_GetPrescaler
7290 * @param HRTIMx High Resolution Timer instance
7291 * @retval Prescaler This parameter can be one of the following values:
7292 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV1
7293 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV2
7294 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV4
7295 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV8
7296 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV16
7297 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV32
7298 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV64
7299 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV128
7300 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV256
7301 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV512
7302 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV1024
7303 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV2048
7304 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV4096
7305 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV8192
7306 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV16384
7307 * @arg @ref LL_HRTIM_BM_PRESCALER_DIV32768
7308 */
7310 {
7312 }
7314 /**
7315 * @brief Enable burst mode compare and period registers preload.
7316 * @rmtoll BMCR BMPREN LL_HRTIM_BM_EnablePreload
7317 * @param HRTIMx High Resolution Timer instance
7318 * @retval None
7319 */
7321 {
7323 }
7325 /**
7326 * @brief Disable burst mode compare and period registers preload.
7327 * @rmtoll BMCR BMPREN LL_HRTIM_BM_DisablePreload
7328 * @param HRTIMx High Resolution Timer instance
7329 * @retval None
7330 */
7332 {
7334 }
7336 /**
7337 * @brief Indicate whether burst mode compare and period registers are preloaded.
7338 * @rmtoll BMCR BMPREN LL_HRTIM_BM_IsEnabledPreload
7339 * @param HRTIMx High Resolution Timer instance
7340 * @retval State of BMPREN bit in HRTIM_BMCR register (1 or 0).
7341 */
7343 {
7345 }
7347 /**
7348 * @brief Set the burst mode controller trigger
7349 * @rmtoll BMTRGR SW LL_HRTIM_BM_SetTrig\n
7350 * BMTRGR MSTRST LL_HRTIM_BM_SetTrig\n
7351 * BMTRGR MSTREP LL_HRTIM_BM_SetTrig\n
7352 * BMTRGR MSTCMP1 LL_HRTIM_BM_SetTrig\n
7353 * BMTRGR MSTCMP2 LL_HRTIM_BM_SetTrig\n
7354 * BMTRGR MSTCMP3 LL_HRTIM_BM_SetTrig\n
7355 * BMTRGR MSTCMP4 LL_HRTIM_BM_SetTrig\n
7356 * BMTRGR TARST LL_HRTIM_BM_SetTrig\n
7357 * BMTRGR TAREP LL_HRTIM_BM_SetTrig\n
7358 * BMTRGR TACMP1 LL_HRTIM_BM_SetTrig\n
7359 * BMTRGR TACMP2 LL_HRTIM_BM_SetTrig\n
7360 * BMTRGR TBRST LL_HRTIM_BM_SetTrig\n
7361 * BMTRGR TBREP LL_HRTIM_BM_SetTrig\n
7362 * BMTRGR TBCMP1 LL_HRTIM_BM_SetTrig\n
7363 * BMTRGR TBCMP2 LL_HRTIM_BM_SetTrig\n
7364 * BMTRGR TCRST LL_HRTIM_BM_SetTrig\n
7365 * BMTRGR TCREP LL_HRTIM_BM_SetTrig\n
7366 * BMTRGR TCCMP1 LL_HRTIM_BM_SetTrig\n
7367 * BMTRGR TCCMP2 LL_HRTIM_BM_SetTrig\n
7368 * BMTRGR TDRST LL_HRTIM_BM_SetTrig\n
7369 * BMTRGR TDREP LL_HRTIM_BM_SetTrig\n
7370 * BMTRGR TDCMP1 LL_HRTIM_BM_SetTrig\n
7371 * BMTRGR TDCMP2 LL_HRTIM_BM_SetTrig\n
7372 * BMTRGR TERST LL_HRTIM_BM_SetTrig\n
7373 * BMTRGR TEREP LL_HRTIM_BM_SetTrig\n
7374 * BMTRGR TECMP1 LL_HRTIM_BM_SetTrig\n
7375 * BMTRGR TECMP2 LL_HRTIM_BM_SetTrig\n
7376 * BMTRGR TAEEV7 LL_HRTIM_BM_SetTrig\n
7377 * BMTRGR TAEEV8 LL_HRTIM_BM_SetTrig\n
7378 * BMTRGR EEV7 LL_HRTIM_BM_SetTrig\n
7379 * BMTRGR EEV8 LL_HRTIM_BM_SetTrig\n
7380 * BMTRGR OCHIPEV LL_HRTIM_BM_SetTrig
7381 * @param HRTIMx High Resolution Timer instance
7382 * @param Trig This parameter can be a combination of the following values:
7383 * @arg @ref LL_HRTIM_BM_TRIG_NONE
7384 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_RESET
7385 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_REPETITION
7386 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP1
7387 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP2
7388 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP3
7389 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP4
7390 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_RESET
7391 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_REPETITION
7392 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_CMP1
7393 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_CMP2
7394 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_RESET
7395 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_REPETITION
7396 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_CMP1
7397 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_CMP2
7398 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_RESET
7399 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_REPETITION
7400 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_CMP1
7401 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_CMP2
7402 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_RESET
7403 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_REPETITION
7404 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_CMP1
7405 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_CMP2
7406 * @arg @ref LL_HRTIM_BM_TRIG_TIME_RESET
7407 * @arg @ref LL_HRTIM_BM_TRIG_TIME_REPETITION
7408 * @arg @ref LL_HRTIM_BM_TRIG_TIME_CMP1
7409 * @arg @ref LL_HRTIM_BM_TRIG_TIME_CMP2
7410 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_EVENT7
7411 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_EVENT8
7412 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_7
7413 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_8
7414 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_ONCHIP
7415 * @retval None
7416 */
7418 {
7420 }
7422 /**
7423 * @brief Get actual burst mode controller trigger.
7424 * @rmtoll BMTRGR SW LL_HRTIM_BM_GetTrig\n
7425 * BMTRGR MSTRST LL_HRTIM_BM_GetTrig\n
7426 * BMTRGR MSTREP LL_HRTIM_BM_GetTrig\n
7427 * BMTRGR MSTCMP1 LL_HRTIM_BM_GetTrig\n
7428 * BMTRGR MSTCMP2 LL_HRTIM_BM_GetTrig\n
7429 * BMTRGR MSTCMP3 LL_HRTIM_BM_GetTrig\n
7430 * BMTRGR MSTCMP4 LL_HRTIM_BM_GetTrig\n
7431 * BMTRGR TARST LL_HRTIM_BM_GetTrig\n
7432 * BMTRGR TAREP LL_HRTIM_BM_GetTrig\n
7433 * BMTRGR TACMP1 LL_HRTIM_BM_GetTrig\n
7434 * BMTRGR TACMP2 LL_HRTIM_BM_GetTrig\n
7435 * BMTRGR TBRST LL_HRTIM_BM_GetTrig\n
7436 * BMTRGR TBREP LL_HRTIM_BM_GetTrig\n
7437 * BMTRGR TBCMP1 LL_HRTIM_BM_GetTrig\n
7438 * BMTRGR TBCMP2 LL_HRTIM_BM_GetTrig\n
7439 * BMTRGR TCRST LL_HRTIM_BM_GetTrig\n
7440 * BMTRGR TCREP LL_HRTIM_BM_GetTrig\n
7441 * BMTRGR TCCMP1 LL_HRTIM_BM_GetTrig\n
7442 * BMTRGR TCCMP2 LL_HRTIM_BM_GetTrig\n
7443 * BMTRGR TDRST LL_HRTIM_BM_GetTrig\n
7444 * BMTRGR TDREP LL_HRTIM_BM_GetTrig\n
7445 * BMTRGR TDCMP1 LL_HRTIM_BM_GetTrig\n
7446 * BMTRGR TDCMP2 LL_HRTIM_BM_GetTrig\n
7447 * BMTRGR TERST LL_HRTIM_BM_GetTrig\n
7448 * BMTRGR TEREP LL_HRTIM_BM_GetTrig\n
7449 * BMTRGR TECMP1 LL_HRTIM_BM_GetTrig\n
7450 * BMTRGR TECMP2 LL_HRTIM_BM_GetTrig\n
7451 * BMTRGR TAEEV7 LL_HRTIM_BM_GetTrig\n
7452 * BMTRGR TAEEV8 LL_HRTIM_BM_GetTrig\n
7453 * BMTRGR EEV7 LL_HRTIM_BM_GetTrig\n
7454 * BMTRGR EEV8 LL_HRTIM_BM_GetTrig\n
7455 * BMTRGR OCHIPEV LL_HRTIM_BM_GetTrig
7456 * @param HRTIMx High Resolution Timer instance
7457 * @retval Trig This parameter can be a combination of the following values:
7458 * @arg @ref LL_HRTIM_BM_TRIG_NONE
7459 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_RESET
7460 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_REPETITION
7461 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP1
7462 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP2
7463 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP3
7464 * @arg @ref LL_HRTIM_BM_TRIG_MASTER_CMP4
7465 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_RESET
7466 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_REPETITION
7467 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_CMP1
7468 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_CMP2
7469 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_RESET
7470 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_REPETITION
7471 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_CMP1
7472 * @arg @ref LL_HRTIM_BM_TRIG_TIMB_CMP2
7473 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_RESET
7474 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_REPETITION
7475 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_CMP1
7476 * @arg @ref LL_HRTIM_BM_TRIG_TIMC_CMP2
7477 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_RESET
7478 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_REPETITION
7479 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_CMP1
7480 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_CMP2
7481 * @arg @ref LL_HRTIM_BM_TRIG_TIME_RESET
7482 * @arg @ref LL_HRTIM_BM_TRIG_TIME_REPETITION
7483 * @arg @ref LL_HRTIM_BM_TRIG_TIME_CMP1
7484 * @arg @ref LL_HRTIM_BM_TRIG_TIME_CMP2
7485 * @arg @ref LL_HRTIM_BM_TRIG_TIMA_EVENT7
7486 * @arg @ref LL_HRTIM_BM_TRIG_TIMD_EVENT8
7487 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_7
7488 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_8
7489 * @arg @ref LL_HRTIM_BM_TRIG_EVENT_ONCHIP
7490 */
7492 {
7494 }
7496 /**
7497 * @brief Set the burst mode controller compare value.
7498 * @rmtoll BMCMPR BMCMP LL_HRTIM_BM_SetCompare
7499 * @param HRTIMx High Resolution Timer instance
7500 * @param CompareValue Compare value must be above or equal to 3
7501 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
7502 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
7503 * @retval None
7504 */
7506 {
7508 }
7510 /**
7511 * @brief Get actual burst mode controller compare value.
7512 * @rmtoll BMCMPR BMCMP LL_HRTIM_BM_GetCompare
7513 * @param HRTIMx High Resolution Timer instance
7514 * @retval CompareValue Compare value must be above or equal to 3
7515 * periods of the fHRTIM clock, that is 0x60 if CKPSC[2:0] = 0,
7516 * 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
7517 */
7519 {
7521 }
7523 /**
7524 * @brief Set the burst mode controller period.
7525 * @rmtoll BMPER BMPER LL_HRTIM_BM_SetPeriod
7526 * @param HRTIMx High Resolution Timer instance
7527 * @param Period The period value must be above or equal to 3 periods of the fHRTIM clock,
7528 * that is 0x60 if CKPSC[2:0] = 0, 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
7529 * The maximum value is 0x0000 FFDF.
7530 * @retval None
7531 */
7533 {
7535 }
7537 /**
7538 * @brief Get actual burst mode controller period.
7539 * @rmtoll BMPER BMPER LL_HRTIM_BM_GetPeriod
7540 * @param HRTIMx High Resolution Timer instance
7541 * @retval The period value must be above or equal to 3 periods of the fHRTIM clock,
7542 * that is 0x60 if CKPSC[2:0] = 0, 0x30 if CKPSC[2:0] = 1, 0x18 if CKPSC[2:0] = 2,...
7543 * The maximum value is 0x0000 FFDF.
7544 */
7546 {
7548 }
7550 /**
7551 * @brief Enable the burst mode controller
7552 * @rmtoll BMCR BME LL_HRTIM_BM_Enable
7553 * @param HRTIMx High Resolution Timer instance
7554 * @retval None
7555 */
7557 {
7559 }
7561 /**
7562 * @brief Disable the burst mode controller
7563 * @rmtoll BMCR BME LL_HRTIM_BM_Disable
7564 * @param HRTIMx High Resolution Timer instance
7565 * @retval None
7566 */
7568 {
7570 }
7572 /**
7573 * @brief Indicate whether the burst mode controller is enabled.
7574 * @rmtoll BMCR BME LL_HRTIM_BM_IsEnabled
7575 * @param HRTIMx High Resolution Timer instance
7576 * @retval State of BME bit in HRTIM_BMCR register (1 or 0).
7577 */
7579 {
7581 }
7583 /**
7584 * @brief Trigger the burst operation (software trigger)
7585 * @rmtoll BMTRGR SW LL_HRTIM_BM_Start
7586 * @param HRTIMx High Resolution Timer instance
7587 * @retval None
7588 */
7590 {
7592 }
7594 /**
7595 * @brief Stop the burst mode operation.
7596 * @rmtoll BMCR BMSTAT LL_HRTIM_BM_Stop
7597 * @note Causes a burst mode early termination.
7598 * @param HRTIMx High Resolution Timer instance
7599 * @retval None
7600 */
7602 {
7604 }
7606 /**
7607 * @brief Get actual burst mode status
7608 * @rmtoll BMCR BMSTAT LL_HRTIM_BM_GetStatus
7609 * @param HRTIMx High Resolution Timer instance
7610 * @retval Status This parameter can be one of the following values:
7611 * @arg @ref LL_HRTIM_BM_STATUS_NORMAL
7612 * @arg @ref LL_HRTIM_BM_STATUS_BURST_ONGOING
7613 */
7615 {
7617 }
7619 /**
7620 * @}
7621 */
7623 /** @defgroup HRTIM_EF_FLAG_Management FLAG_Management
7624 * @{
7625 */
7627 /**
7628 * @brief Clear the Fault 1 interrupt flag.
7629 * @rmtoll ICR FLT1C LL_HRTIM_ClearFlag_FLT1
7630 * @param HRTIMx High Resolution Timer instance
7631 * @retval None
7632 */
7634 {
7636 }
7638 /**
7639 * @brief Indicate whether Fault 1 interrupt occurred.
7640 * @rmtoll ICR FLT1 LL_HRTIM_IsActiveFlag_FLT1
7641 * @param HRTIMx High Resolution Timer instance
7642 * @retval State of FLT1 bit in HRTIM_ISR register (1 or 0).
7643 */
7645 {
7647 }
7649 /**
7650 * @brief Clear the Fault 2 interrupt flag.
7651 * @rmtoll ICR FLT2C LL_HRTIM_ClearFlag_FLT2
7652 * @param HRTIMx High Resolution Timer instance
7653 * @retval None
7654 */
7656 {
7658 }
7660 /**
7661 * @brief Indicate whether Fault 2 interrupt occurred.
7662 * @rmtoll ICR FLT2 LL_HRTIM_IsActiveFlag_FLT2
7663 * @param HRTIMx High Resolution Timer instance
7664 * @retval State of FLT2 bit in HRTIM_ISR register (1 or 0).
7665 */
7667 {
7669 }
7671 /**
7672 * @brief Clear the Fault 3 interrupt flag.
7673 * @rmtoll ICR FLT3C LL_HRTIM_ClearFlag_FLT3
7674 * @param HRTIMx High Resolution Timer instance
7675 * @retval None
7676 */
7678 {
7680 }
7682 /**
7683 * @brief Indicate whether Fault 3 interrupt occurred.
7684 * @rmtoll ICR FLT3 LL_HRTIM_IsActiveFlag_FLT3
7685 * @param HRTIMx High Resolution Timer instance
7686 * @retval State of FLT3 bit in HRTIM_ISR register (1 or 0).
7687 */
7689 {
7691 }
7693 /**
7694 * @brief Clear the Fault 4 interrupt flag.
7695 * @rmtoll ICR FLT4C LL_HRTIM_ClearFlag_FLT4
7696 * @param HRTIMx High Resolution Timer instance
7697 * @retval None
7698 */
7700 {
7702 }
7704 /**
7705 * @brief Indicate whether Fault 4 interrupt occurred.
7706 * @rmtoll ICR FLT4 LL_HRTIM_IsActiveFlag_FLT4
7707 * @param HRTIMx High Resolution Timer instance
7708 * @retval State of FLT4 bit in HRTIM_ISR register (1 or 0).
7709 */
7711 {
7713 }
7715 /**
7716 * @brief Clear the Fault 5 interrupt flag.
7717 * @rmtoll ICR FLT5C LL_HRTIM_ClearFlag_FLT5
7718 * @param HRTIMx High Resolution Timer instance
7719 * @retval None
7720 */
7722 {
7724 }
7726 /**
7727 * @brief Indicate whether Fault 5 interrupt occurred.
7728 * @rmtoll ICR FLT5 LL_HRTIM_IsActiveFlag_FLT5
7729 * @param HRTIMx High Resolution Timer instance
7730 * @retval State of FLT5 bit in HRTIM_ISR register (1 or 0).
7731 */
7733 {
7735 }
7737 /**
7738 * @brief Clear the System Fault interrupt flag.
7739 * @rmtoll ICR SYSFLTC LL_HRTIM_ClearFlag_SYSFLT
7740 * @param HRTIMx High Resolution Timer instance
7741 * @retval None
7742 */
7744 {
7746 }
7748 /**
7749 * @brief Indicate whether System Fault interrupt occurred.
7750 * @rmtoll ISR SYSFLT LL_HRTIM_IsActiveFlag_SYSFLT
7751 * @param HRTIMx High Resolution Timer instance
7752 * @retval State of SYSFLT bit in HRTIM_ISR register (1 or 0).
7753 */
7755 {
7757 }
7759 /**
7760 * @brief Clear the DLL ready interrupt flag.
7761 * @rmtoll ICR DLLRDYC LL_HRTIM_ClearFlag_DLLRDY
7762 * @param HRTIMx High Resolution Timer instance
7763 * @retval None
7764 */
7766 {
7768 }
7770 /**
7771 * @brief Indicate whether DLL ready interrupt occurred.
7772 * @rmtoll ISR DLLRDY LL_HRTIM_IsActiveFlag_DLLRDY
7773 * @param HRTIMx High Resolution Timer instance
7774 * @retval State of DLLRDY bit in HRTIM_ISR register (1 or 0).
7775 */
7777 {
7779 }
7781 /**
7782 * @brief Clear the Burst Mode period interrupt flag.
7783 * @rmtoll ICR BMPERC LL_HRTIM_ClearFlag_BMPER
7784 * @param HRTIMx High Resolution Timer instance
7785 * @retval None
7786 */
7788 {
7790 }
7792 /**
7793 * @brief Indicate whether Burst Mode period interrupt occurred.
7794 * @rmtoll ISR BMPER LL_HRTIM_IsActiveFlag_BMPER
7795 * @param HRTIMx High Resolution Timer instance
7796 * @retval State of BMPER bit in HRTIM_ISR register (1 or 0).
7797 */
7799 {
7801 }
7803 /**
7804 * @brief Clear the Synchronization Input interrupt flag.
7805 * @rmtoll MICR SYNCC LL_HRTIM_ClearFlag_SYNC
7806 * @param HRTIMx High Resolution Timer instance
7807 * @retval None
7808 */
7810 {
7812 }
7814 /**
7815 * @brief Indicate whether the Synchronization Input interrupt occurred.
7816 * @rmtoll MISR SYNC LL_HRTIM_IsActiveFlag_SYNC
7817 * @param HRTIMx High Resolution Timer instance
7818 * @retval State of SYNC bit in HRTIM_MISR register (1 or 0).
7819 */
7821 {
7823 }
7825 /**
7826 * @brief Clear the update interrupt flag for a given timer (including the master timer) .
7827 * @rmtoll MICR MUPDC LL_HRTIM_ClearFlag_UPDATE\n
7828 * TIMxICR UPDC LL_HRTIM_ClearFlag_UPDATE
7829 * @param HRTIMx High Resolution Timer instance
7830 * @param Timer This parameter can be one of the following values:
7831 * @arg @ref LL_HRTIM_TIMER_MASTER
7832 * @arg @ref LL_HRTIM_TIMER_A
7833 * @arg @ref LL_HRTIM_TIMER_B
7834 * @arg @ref LL_HRTIM_TIMER_C
7835 * @arg @ref LL_HRTIM_TIMER_D
7836 * @arg @ref LL_HRTIM_TIMER_E
7837 * @retval None
7838 */
7840 {
7845 }
7847 /**
7848 * @brief Indicate whether the update interrupt has occurred for a given timer (including the master timer) .
7849 * @rmtoll MISR MUPD LL_HRTIM_IsActiveFlag_UPDATE\n
7850 * TIMxISR UPD LL_HRTIM_IsActiveFlag_UPDATE
7851 * @param HRTIMx High Resolution Timer instance
7852 * @param Timer This parameter can be one of the following values:
7853 * @arg @ref LL_HRTIM_TIMER_MASTER
7854 * @arg @ref LL_HRTIM_TIMER_A
7855 * @arg @ref LL_HRTIM_TIMER_B
7856 * @arg @ref LL_HRTIM_TIMER_C
7857 * @arg @ref LL_HRTIM_TIMER_D
7858 * @arg @ref LL_HRTIM_TIMER_E
7859 * @retval State of MUPD/UPD bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
7860 */
7862 {
7867 }
7869 /**
7870 * @brief Clear the repetition interrupt flag for a given timer (including the master timer) .
7871 * @rmtoll MICR MREPC LL_HRTIM_ClearFlag_REP\n
7872 * TIMxICR REPC LL_HRTIM_ClearFlag_REP
7873 * @param HRTIMx High Resolution Timer instance
7874 * @param Timer This parameter can be one of the following values:
7875 * @arg @ref LL_HRTIM_TIMER_MASTER
7876 * @arg @ref LL_HRTIM_TIMER_A
7877 * @arg @ref LL_HRTIM_TIMER_B
7878 * @arg @ref LL_HRTIM_TIMER_C
7879 * @arg @ref LL_HRTIM_TIMER_D
7880 * @arg @ref LL_HRTIM_TIMER_E
7881 * @retval None
7882 */
7884 {
7890 }
7892 /**
7893 * @brief Indicate whether the repetition interrupt has occurred for a given timer (including the master timer) .
7894 * @rmtoll MISR MREP LL_HRTIM_IsActiveFlag_REP\n
7895 * TIMxISR REP LL_HRTIM_IsActiveFlag_REP
7896 * @param HRTIMx High Resolution Timer instance
7897 * @param Timer This parameter can be one of the following values:
7898 * @arg @ref LL_HRTIM_TIMER_MASTER
7899 * @arg @ref LL_HRTIM_TIMER_A
7900 * @arg @ref LL_HRTIM_TIMER_B
7901 * @arg @ref LL_HRTIM_TIMER_C
7902 * @arg @ref LL_HRTIM_TIMER_D
7903 * @arg @ref LL_HRTIM_TIMER_E
7904 * @retval State of MREP/REP bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
7905 */
7907 {
7912 }
7914 /**
7915 * @brief Clear the compare 1 match interrupt for a given timer (including the master timer).
7916 * @rmtoll MICR MCMP1C LL_HRTIM_ClearFlag_CMP1\n
7917 * TIMxICR CMP1C LL_HRTIM_ClearFlag_CMP1
7918 * @param HRTIMx High Resolution Timer instance
7919 * @param Timer This parameter can be one of the following values:
7920 * @arg @ref LL_HRTIM_TIMER_MASTER
7921 * @arg @ref LL_HRTIM_TIMER_A
7922 * @arg @ref LL_HRTIM_TIMER_B
7923 * @arg @ref LL_HRTIM_TIMER_C
7924 * @arg @ref LL_HRTIM_TIMER_D
7925 * @arg @ref LL_HRTIM_TIMER_E
7926 * @retval None
7927 */
7929 {
7934 }
7936 /**
7937 * @brief Indicate whether the compare match 1 interrupt has occurred for a given timer (including the master timer) .
7938 * @rmtoll MISR MCMP1 LL_HRTIM_IsActiveFlag_CMP1\n
7939 * TIMxISR CMP1 LL_HRTIM_IsActiveFlag_CMP1
7940 * @param HRTIMx High Resolution Timer instance
7941 * @param Timer This parameter can be one of the following values:
7942 * @arg @ref LL_HRTIM_TIMER_MASTER
7943 * @arg @ref LL_HRTIM_TIMER_A
7944 * @arg @ref LL_HRTIM_TIMER_B
7945 * @arg @ref LL_HRTIM_TIMER_C
7946 * @arg @ref LL_HRTIM_TIMER_D
7947 * @arg @ref LL_HRTIM_TIMER_E
7948 * @retval State of MCMP1/CMP1 bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
7949 */
7951 {
7956 }
7958 /**
7959 * @brief Clear the compare 2 match interrupt for a given timer (including the master timer).
7960 * @rmtoll MICR MCMP2C LL_HRTIM_ClearFlag_CMP2\n
7961 * TIMxICR CMP2C LL_HRTIM_ClearFlag_CMP2
7962 * @param HRTIMx High Resolution Timer instance
7963 * @param Timer This parameter can be one of the following values:
7964 * @arg @ref LL_HRTIM_TIMER_MASTER
7965 * @arg @ref LL_HRTIM_TIMER_A
7966 * @arg @ref LL_HRTIM_TIMER_B
7967 * @arg @ref LL_HRTIM_TIMER_C
7968 * @arg @ref LL_HRTIM_TIMER_D
7969 * @arg @ref LL_HRTIM_TIMER_E
7970 * @retval None
7971 */
7973 {
7978 }
7980 /**
7981 * @brief Indicate whether the compare match 2 interrupt has occurred for a given timer (including the master timer) .
7982 * @rmtoll MISR MCMP2 LL_HRTIM_IsActiveFlag_CMP2\n
7983 * TIMxISR CMP2 LL_HRTIM_IsActiveFlag_CMP2
7984 * @param HRTIMx High Resolution Timer instance
7985 * @param Timer This parameter can be one of the following values:
7986 * @arg @ref LL_HRTIM_TIMER_MASTER
7987 * @arg @ref LL_HRTIM_TIMER_A
7988 * @arg @ref LL_HRTIM_TIMER_B
7989 * @arg @ref LL_HRTIM_TIMER_C
7990 * @arg @ref LL_HRTIM_TIMER_D
7991 * @arg @ref LL_HRTIM_TIMER_E
7992 * @retval State of MCMP2/CMP2 bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
7993 */
7995 {
8000 }
8002 /**
8003 * @brief Clear the compare 3 match interrupt for a given timer (including the master timer).
8004 * @rmtoll MICR MCMP3C LL_HRTIM_ClearFlag_CMP3\n
8005 * TIMxICR CMP3C LL_HRTIM_ClearFlag_CMP3
8006 * @param HRTIMx High Resolution Timer instance
8007 * @param Timer This parameter can be one of the following values:
8008 * @arg @ref LL_HRTIM_TIMER_MASTER
8009 * @arg @ref LL_HRTIM_TIMER_A
8010 * @arg @ref LL_HRTIM_TIMER_B
8011 * @arg @ref LL_HRTIM_TIMER_C
8012 * @arg @ref LL_HRTIM_TIMER_D
8013 * @arg @ref LL_HRTIM_TIMER_E
8014 * @retval None
8015 */
8017 {
8022 }
8024 /**
8025 * @brief Indicate whether the compare match 3 interrupt has occurred for a given timer (including the master timer) .
8026 * @rmtoll MISR MCMP3 LL_HRTIM_IsActiveFlag_CMP3\n
8027 * TIMxISR CMP3 LL_HRTIM_IsActiveFlag_CMP3
8028 * @param HRTIMx High Resolution Timer instance
8029 * @param Timer This parameter can be one of the following values:
8030 * @arg @ref LL_HRTIM_TIMER_MASTER
8031 * @arg @ref LL_HRTIM_TIMER_A
8032 * @arg @ref LL_HRTIM_TIMER_B
8033 * @arg @ref LL_HRTIM_TIMER_C
8034 * @arg @ref LL_HRTIM_TIMER_D
8035 * @arg @ref LL_HRTIM_TIMER_E
8036 * @retval State of MCMP3/CMP3 bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
8037 */
8039 {
8044 }
8046 /**
8047 * @brief Clear the compare 4 match interrupt for a given timer (including the master timer).
8048 * @rmtoll MICR MCMP4C LL_HRTIM_ClearFlag_CMP4\n
8049 * TIMxICR CMP4C LL_HRTIM_ClearFlag_CMP4
8050 * @param HRTIMx High Resolution Timer instance
8051 * @param Timer This parameter can be one of the following values:
8052 * @arg @ref LL_HRTIM_TIMER_MASTER
8053 * @arg @ref LL_HRTIM_TIMER_A
8054 * @arg @ref LL_HRTIM_TIMER_B
8055 * @arg @ref LL_HRTIM_TIMER_C
8056 * @arg @ref LL_HRTIM_TIMER_D
8057 * @arg @ref LL_HRTIM_TIMER_E
8058 * @retval None
8059 */
8061 {
8066 }
8068 /**
8069 * @brief Indicate whether the compare match 4 interrupt has occurred for a given timer (including the master timer) .
8070 * @rmtoll MISR MCMP4 LL_HRTIM_IsActiveFlag_CMP4\n
8071 * TIMxISR CMP4 LL_HRTIM_IsActiveFlag_CMP4
8072 * @param HRTIMx High Resolution Timer instance
8073 * @param Timer This parameter can be one of the following values:
8074 * @arg @ref LL_HRTIM_TIMER_MASTER
8075 * @arg @ref LL_HRTIM_TIMER_A
8076 * @arg @ref LL_HRTIM_TIMER_B
8077 * @arg @ref LL_HRTIM_TIMER_C
8078 * @arg @ref LL_HRTIM_TIMER_D
8079 * @arg @ref LL_HRTIM_TIMER_E
8080 * @retval State of MCMP4/CMP4 bit in HRTIM_MISR/HRTIM_TIMxISR register (1 or 0).
8081 */
8083 {
8088 }
8090 /**
8091 * @brief Clear the capture 1 interrupt flag for a given timer.
8092 * @rmtoll TIMxICR CPT1C LL_HRTIM_ClearFlag_CPT1
8093 * @param HRTIMx High Resolution Timer instance
8094 * @param Timer This parameter can be one of the following values:
8095 * @arg @ref LL_HRTIM_TIMER_A
8096 * @arg @ref LL_HRTIM_TIMER_B
8097 * @arg @ref LL_HRTIM_TIMER_C
8098 * @arg @ref LL_HRTIM_TIMER_D
8099 * @arg @ref LL_HRTIM_TIMER_E
8100 * @retval None
8101 */
8103 {
8108 }
8110 /**
8111 * @brief Indicate whether the capture 1 interrupt occurred for a given timer.
8112 * @rmtoll TIMxISR CPT1 LL_HRTIM_IsActiveFlag_CPT1
8113 * @param HRTIMx High Resolution Timer instance
8114 * @param Timer This parameter can be one of the following values:
8115 * @arg @ref LL_HRTIM_TIMER_A
8116 * @arg @ref LL_HRTIM_TIMER_B
8117 * @arg @ref LL_HRTIM_TIMER_C
8118 * @arg @ref LL_HRTIM_TIMER_D
8119 * @arg @ref LL_HRTIM_TIMER_E
8120 * @retval State of CPT1 bit in HRTIM_TIMxISR register (1 or 0).
8121 */
8123 {
8128 }
8130 /**
8131 * @brief Clear the capture 2 interrupt flag for a given timer.
8132 * @rmtoll TIMxICR CPT2C LL_HRTIM_ClearFlag_CPT2
8133 * @param HRTIMx High Resolution Timer instance
8134 * @param Timer This parameter can be one of the following values:
8135 * @arg @ref LL_HRTIM_TIMER_A
8136 * @arg @ref LL_HRTIM_TIMER_B
8137 * @arg @ref LL_HRTIM_TIMER_C
8138 * @arg @ref LL_HRTIM_TIMER_D
8139 * @arg @ref LL_HRTIM_TIMER_E
8140 * @retval None
8141 */
8143 {
8148 }
8150 /**
8151 * @brief Indicate whether the capture 2 interrupt occurred for a given timer.
8152 * @rmtoll TIMxISR CPT2 LL_HRTIM_IsActiveFlag_CPT2
8153 * @param HRTIMx High Resolution Timer instance
8154 * @param Timer This parameter can be one of the following values:
8155 * @arg @ref LL_HRTIM_TIMER_A
8156 * @arg @ref LL_HRTIM_TIMER_B
8157 * @arg @ref LL_HRTIM_TIMER_C
8158 * @arg @ref LL_HRTIM_TIMER_D
8159 * @arg @ref LL_HRTIM_TIMER_E
8160 * @retval State of CPT2 bit in HRTIM_TIMxISR register (1 or 0).
8161 */
8163 {
8168 }
8170 /**
8171 * @brief Clear the output 1 set interrupt flag for a given timer.
8172 * @rmtoll TIMxICR SET1C LL_HRTIM_ClearFlag_SET1
8173 * @param HRTIMx High Resolution Timer instance
8174 * @param Timer This parameter can be one of the following values:
8175 * @arg @ref LL_HRTIM_TIMER_A
8176 * @arg @ref LL_HRTIM_TIMER_B
8177 * @arg @ref LL_HRTIM_TIMER_C
8178 * @arg @ref LL_HRTIM_TIMER_D
8179 * @arg @ref LL_HRTIM_TIMER_E
8180 * @retval None
8181 */
8183 {
8188 }
8190 /**
8191 * @brief Indicate whether the output 1 set interrupt occurred for a given timer.
8192 * @rmtoll TIMxISR SET1 LL_HRTIM_IsActiveFlag_SET1
8193 * @param HRTIMx High Resolution Timer instance
8194 * @param Timer This parameter can be one of the following values:
8195 * @arg @ref LL_HRTIM_TIMER_A
8196 * @arg @ref LL_HRTIM_TIMER_B
8197 * @arg @ref LL_HRTIM_TIMER_C
8198 * @arg @ref LL_HRTIM_TIMER_D
8199 * @arg @ref LL_HRTIM_TIMER_E
8200 * @retval State of SETx1 bit in HRTIM_TIMxISR register (1 or 0).
8201 */
8203 {
8208 }
8210 /**
8211 * @brief Clear the output 1 reset interrupt flag for a given timer.
8212 * @rmtoll TIMxICR RST1C LL_HRTIM_ClearFlag_RST1
8213 * @param HRTIMx High Resolution Timer instance
8214 * @param Timer This parameter can be one of the following values:
8215 * @arg @ref LL_HRTIM_TIMER_A
8216 * @arg @ref LL_HRTIM_TIMER_B
8217 * @arg @ref LL_HRTIM_TIMER_C
8218 * @arg @ref LL_HRTIM_TIMER_D
8219 * @arg @ref LL_HRTIM_TIMER_E
8220 * @retval None
8221 */
8223 {
8228 }
8230 /**
8231 * @brief Indicate whether the output 1 reset interrupt occurred for a given timer.
8232 * @rmtoll TIMxISR RST1 LL_HRTIM_IsActiveFlag_RST1
8233 * @param HRTIMx High Resolution Timer instance
8234 * @param Timer This parameter can be one of the following values:
8235 * @arg @ref LL_HRTIM_TIMER_A
8236 * @arg @ref LL_HRTIM_TIMER_B
8237 * @arg @ref LL_HRTIM_TIMER_C
8238 * @arg @ref LL_HRTIM_TIMER_D
8239 * @arg @ref LL_HRTIM_TIMER_E
8240 * @retval State of RSTx1 bit in HRTIM_TIMxISR register (1 or 0).
8241 */
8243 {
8248 }
8250 /**
8251 * @brief Clear the output 2 set interrupt flag for a given timer.
8252 * @rmtoll TIMxICR SET2C LL_HRTIM_ClearFlag_SET2
8253 * @param HRTIMx High Resolution Timer instance
8254 * @param Timer This parameter can be one of the following values:
8255 * @arg @ref LL_HRTIM_TIMER_A
8256 * @arg @ref LL_HRTIM_TIMER_B
8257 * @arg @ref LL_HRTIM_TIMER_C
8258 * @arg @ref LL_HRTIM_TIMER_D
8259 * @arg @ref LL_HRTIM_TIMER_E
8260 * @retval None
8261 */
8263 {
8268 }
8270 /**
8271 * @brief Indicate whether the output 2 set interrupt occurred for a given timer.
8272 * @rmtoll TIMxISR SET2 LL_HRTIM_IsActiveFlag_SET2
8273 * @param HRTIMx High Resolution Timer instance
8274 * @param Timer This parameter can be one of the following values:
8275 * @arg @ref LL_HRTIM_TIMER_A
8276 * @arg @ref LL_HRTIM_TIMER_B
8277 * @arg @ref LL_HRTIM_TIMER_C
8278 * @arg @ref LL_HRTIM_TIMER_D
8279 * @arg @ref LL_HRTIM_TIMER_E
8280 * @retval State of SETx2 bit in HRTIM_TIMxISR register (1 or 0).
8281 */
8283 {
8288 }
8290 /**
8291 * @brief Clear the output 2reset interrupt flag for a given timer.
8292 * @rmtoll TIMxICR RST2C LL_HRTIM_ClearFlag_RST2
8293 * @param HRTIMx High Resolution Timer instance
8294 * @param Timer This parameter can be one of the following values:
8295 * @arg @ref LL_HRTIM_TIMER_A
8296 * @arg @ref LL_HRTIM_TIMER_B
8297 * @arg @ref LL_HRTIM_TIMER_C
8298 * @arg @ref LL_HRTIM_TIMER_D
8299 * @arg @ref LL_HRTIM_TIMER_E
8300 * @retval None
8301 */
8303 {
8308 }
8310 /**
8311 * @brief Indicate whether the output 2 reset interrupt occurred for a given timer.
8312 * @rmtoll TIMxISR RST2 LL_HRTIM_IsActiveFlag_RST2
8313 * @param HRTIMx High Resolution Timer instance
8314 * @param Timer This parameter can be one of the following values:
8315 * @arg @ref LL_HRTIM_TIMER_A
8316 * @arg @ref LL_HRTIM_TIMER_B
8317 * @arg @ref LL_HRTIM_TIMER_C
8318 * @arg @ref LL_HRTIM_TIMER_D
8319 * @arg @ref LL_HRTIM_TIMER_E
8320 * @retval State of RSTx2 bit in HRTIM_TIMxISR register (1 or 0).
8321 */
8323 {
8328 }
8330 /**
8331 * @brief Clear the reset and/or roll-over interrupt flag for a given timer.
8332 * @rmtoll TIMxICR RSTC LL_HRTIM_ClearFlag_RST
8333 * @param HRTIMx High Resolution Timer instance
8334 * @param Timer This parameter can be one of the following values:
8335 * @arg @ref LL_HRTIM_TIMER_A
8336 * @arg @ref LL_HRTIM_TIMER_B
8337 * @arg @ref LL_HRTIM_TIMER_C
8338 * @arg @ref LL_HRTIM_TIMER_D
8339 * @arg @ref LL_HRTIM_TIMER_E
8340 * @retval None
8341 */
8343 {
8348 }
8350 /**
8351 * @brief Indicate whether the reset and/or roll-over interrupt occurred for a given timer.
8352 * @rmtoll TIMxISR RST LL_HRTIM_IsActiveFlag_RST
8353 * @param HRTIMx High Resolution Timer instance
8354 * @param Timer This parameter can be one of the following values:
8355 * @arg @ref LL_HRTIM_TIMER_A
8356 * @arg @ref LL_HRTIM_TIMER_B
8357 * @arg @ref LL_HRTIM_TIMER_C
8358 * @arg @ref LL_HRTIM_TIMER_D
8359 * @arg @ref LL_HRTIM_TIMER_E
8360 * @retval State of RST bit in HRTIM_TIMxISR register (1 or 0).
8361 */
8363 {
8368 }
8370 /**
8371 * @brief Clear the delayed protection interrupt flag for a given timer.
8372 * @rmtoll TIMxICR DLYPRTC LL_HRTIM_ClearFlag_DLYPRT
8373 * @param HRTIMx High Resolution Timer instance
8374 * @param Timer This parameter can be one of the following values:
8375 * @arg @ref LL_HRTIM_TIMER_A
8376 * @arg @ref LL_HRTIM_TIMER_B
8377 * @arg @ref LL_HRTIM_TIMER_C
8378 * @arg @ref LL_HRTIM_TIMER_D
8379 * @arg @ref LL_HRTIM_TIMER_E
8380 * @retval None
8381 */
8383 {
8388 }
8390 /**
8391 * @brief Indicate whether the delayed protection interrupt occurred for a given timer.
8392 * @rmtoll TIMxISR DLYPRT LL_HRTIM_IsActiveFlag_DLYPRT
8393 * @param HRTIMx High Resolution Timer instance
8394 * @param Timer This parameter can be one of the following values:
8395 * @arg @ref LL_HRTIM_TIMER_A
8396 * @arg @ref LL_HRTIM_TIMER_B
8397 * @arg @ref LL_HRTIM_TIMER_C
8398 * @arg @ref LL_HRTIM_TIMER_D
8399 * @arg @ref LL_HRTIM_TIMER_E
8400 * @retval State of DLYPRT bit in HRTIM_TIMxISR register (1 or 0).
8401 */
8403 {
8408 }
8410 /**
8411 * @}
8412 */
8414 /** @defgroup HRTIM_EF_IT_Management IT_Management
8415 * @{
8416 */
8418 /**
8419 * @brief Enable the fault 1 interrupt.
8420 * @rmtoll IER FLT1IE LL_HRTIM_EnableIT_FLT1
8421 * @param HRTIMx High Resolution Timer instance
8422 * @retval None
8423 */
8425 {
8427 }
8429 /**
8430 * @brief Disable the fault 1 interrupt.
8431 * @rmtoll IER FLT1IE LL_HRTIM_DisableIT_FLT1
8432 * @param HRTIMx High Resolution Timer instance
8433 * @retval None
8434 */
8436 {
8438 }
8440 /**
8441 * @brief Indicate whether the fault 1 interrupt is enabled.
8442 * @rmtoll IER FLT1IE LL_HRTIM_IsEnabledIT_FLT1
8443 * @param HRTIMx High Resolution Timer instance
8444 * @retval State of FLT1IE bit in HRTIM_IER register (1 or 0).
8445 */
8447 {
8449 }
8451 /**
8452 * @brief Enable the fault 2 interrupt.
8453 * @rmtoll IER FLT2IE LL_HRTIM_EnableIT_FLT2
8454 * @param HRTIMx High Resolution Timer instance
8455 * @retval None
8456 */
8458 {
8460 }
8462 /**
8463 * @brief Disable the fault 2 interrupt.
8464 * @rmtoll IER FLT2IE LL_HRTIM_DisableIT_FLT2
8465 * @param HRTIMx High Resolution Timer instance
8466 * @retval None
8467 */
8469 {
8471 }
8473 /**
8474 * @brief Indicate whether the fault 2 interrupt is enabled.
8475 * @rmtoll IER FLT2IE LL_HRTIM_IsEnabledIT_FLT2
8476 * @param HRTIMx High Resolution Timer instance
8477 * @retval State of FLT2IE bit in HRTIM_IER register (1 or 0).
8478 */
8480 {
8482 }
8484 /**
8485 * @brief Enable the fault 3 interrupt.
8486 * @rmtoll IER FLT3IE LL_HRTIM_EnableIT_FLT3
8487 * @param HRTIMx High Resolution Timer instance
8488 * @retval None
8489 */
8491 {
8493 }
8495 /**
8496 * @brief Disable the fault 3 interrupt.
8497 * @rmtoll IER FLT3IE LL_HRTIM_DisableIT_FLT3
8498 * @param HRTIMx High Resolution Timer instance
8499 * @retval None
8500 */
8502 {
8504 }
8506 /**
8507 * @brief Indicate whether the fault 3 interrupt is enabled.
8508 * @rmtoll IER FLT3IE LL_HRTIM_IsEnabledIT_FLT3
8509 * @param HRTIMx High Resolution Timer instance
8510 * @retval State of FLT3IE bit in HRTIM_IER register (1 or 0).
8511 */
8513 {
8515 }
8517 /**
8518 * @brief Enable the fault 4 interrupt.
8519 * @rmtoll IER FLT4IE LL_HRTIM_EnableIT_FLT4
8520 * @param HRTIMx High Resolution Timer instance
8521 * @retval None
8522 */
8524 {
8526 }
8528 /**
8529 * @brief Disable the fault 4 interrupt.
8530 * @rmtoll IER FLT4IE LL_HRTIM_DisableIT_FLT4
8531 * @param HRTIMx High Resolution Timer instance
8532 * @retval None
8533 */
8535 {
8537 }
8539 /**
8540 * @brief Indicate whether the fault 4 interrupt is enabled.
8541 * @rmtoll IER FLT4IE LL_HRTIM_IsEnabledIT_FLT4
8542 * @param HRTIMx High Resolution Timer instance
8543 * @retval State of FLT4IE bit in HRTIM_IER register (1 or 0).
8544 */
8546 {
8548 }
8550 /**
8551 * @brief Enable the fault 5 interrupt.
8552 * @rmtoll IER FLT5IE LL_HRTIM_EnableIT_FLT5
8553 * @param HRTIMx High Resolution Timer instance
8554 * @retval None
8555 */
8557 {
8559 }
8561 /**
8562 * @brief Disable the fault 5 interrupt.
8563 * @rmtoll IER FLT5IE LL_HRTIM_DisableIT_FLT5
8564 * @param HRTIMx High Resolution Timer instance
8565 * @retval None
8566 */
8568 {
8570 }
8572 /**
8573 * @brief Indicate whether the fault 5 interrupt is enabled.
8574 * @rmtoll IER FLT5IE LL_HRTIM_IsEnabledIT_FLT5
8575 * @param HRTIMx High Resolution Timer instance
8576 * @retval State of FLT5IE bit in HRTIM_IER register (1 or 0).
8577 */
8579 {
8581 }
8583 /**
8584 * @brief Enable the system fault interrupt.
8585 * @rmtoll IER SYSFLTIE LL_HRTIM_EnableIT_SYSFLT
8586 * @param HRTIMx High Resolution Timer instance
8587 * @retval None
8588 */
8590 {
8592 }
8594 /**
8595 * @brief Disable the system fault interrupt.
8596 * @rmtoll IER SYSFLTIE LL_HRTIM_DisableIT_SYSFLT
8597 * @param HRTIMx High Resolution Timer instance
8598 * @retval None
8599 */
8601 {
8603 }
8605 /**
8606 * @brief Indicate whether the system fault interrupt is enabled.
8607 * @rmtoll IER SYSFLTIE LL_HRTIM_IsEnabledIT_SYSFLT
8608 * @param HRTIMx High Resolution Timer instance
8609 * @retval State of SYSFLTIE bit in HRTIM_IER register (1 or 0).
8610 */
8612 {
8614 }
8616 /**
8617 * @brief Enable the DLL ready interrupt.
8618 * @rmtoll IER DLLRDYIE LL_HRTIM_EnableIT_DLLRDY
8619 * @param HRTIMx High Resolution Timer instance
8620 * @retval None
8621 */
8623 {
8625 }
8627 /**
8628 * @brief Disable the DLL ready interrupt.
8629 * @rmtoll IER DLLRDYIE LL_HRTIM_DisableIT_DLLRDY
8630 * @param HRTIMx High Resolution Timer instance
8631 * @retval None
8632 */
8634 {
8636 }
8638 /**
8639 * @brief Indicate whether the DLL ready interrupt is enabled.
8640 * @rmtoll IER DLLRDYIE LL_HRTIM_IsEnabledIT_DLLRDY
8641 * @param HRTIMx High Resolution Timer instance
8642 * @retval State of DLLRDYIE bit in HRTIM_IER register (1 or 0).
8643 */
8645 {
8647 }
8649 /**
8650 * @brief Enable the burst mode period interrupt.
8651 * @rmtoll IER BMPERIE LL_HRTIM_EnableIT_BMPER
8652 * @param HRTIMx High Resolution Timer instance
8653 * @retval None
8654 */
8656 {
8658 }
8660 /**
8661 * @brief Disable the burst mode period interrupt.
8662 * @rmtoll IER BMPERIE LL_HRTIM_DisableIT_BMPER
8663 * @param HRTIMx High Resolution Timer instance
8664 * @retval None
8665 */
8667 {
8669 }
8671 /**
8672 * @brief Indicate whether the burst mode period interrupt is enabled.
8673 * @rmtoll IER BMPERIE LL_HRTIM_IsEnabledIT_BMPER
8674 * @param HRTIMx High Resolution Timer instance
8675 * @retval State of BMPERIE bit in HRTIM_IER register (1 or 0).
8676 */
8678 {
8680 }
8682 /**
8683 * @brief Enable the synchronization input interrupt.
8684 * @rmtoll MDIER SYNCIE LL_HRTIM_EnableIT_SYNC
8685 * @param HRTIMx High Resolution Timer instance
8686 * @retval None
8687 */
8689 {
8691 }
8693 /**
8694 * @brief Disable the synchronization input interrupt.
8695 * @rmtoll MDIER SYNCIE LL_HRTIM_DisableIT_SYNC
8696 * @param HRTIMx High Resolution Timer instance
8697 * @retval None
8698 */
8700 {
8702 }
8704 /**
8705 * @brief Indicate whether the synchronization input interrupt is enabled.
8706 * @rmtoll MDIER SYNCIE LL_HRTIM_IsEnabledIT_SYNC
8707 * @param HRTIMx High Resolution Timer instance
8708 * @retval State of SYNCIE bit in HRTIM_MDIER register (1 or 0).
8709 */
8711 {
8713 }
8715 /**
8716 * @brief Enable the update interrupt for a given timer.
8717 * @rmtoll MDIER MUPDIE LL_HRTIM_EnableIT_UPDATE\n
8718 * TIMxDIER UPDIE LL_HRTIM_EnableIT_UPDATE
8719 * @param HRTIMx High Resolution Timer instance
8720 * @param Timer This parameter can be one of the following values:
8721 * @arg @ref LL_HRTIM_TIMER_MASTER
8722 * @arg @ref LL_HRTIM_TIMER_A
8723 * @arg @ref LL_HRTIM_TIMER_B
8724 * @arg @ref LL_HRTIM_TIMER_C
8725 * @arg @ref LL_HRTIM_TIMER_D
8726 * @arg @ref LL_HRTIM_TIMER_E
8727 * @retval None
8728 */
8730 {
8735 }
8737 /**
8738 * @brief Disable the update interrupt for a given timer.
8739 * @rmtoll MDIER MUPDIE LL_HRTIM_DisableIT_UPDATE\n
8740 * TIMxDIER UPDIE LL_HRTIM_DisableIT_UPDATE
8741 * @param HRTIMx High Resolution Timer instance
8742 * @param Timer This parameter can be one of the following values:
8743 * @arg @ref LL_HRTIM_TIMER_MASTER
8744 * @arg @ref LL_HRTIM_TIMER_A
8745 * @arg @ref LL_HRTIM_TIMER_B
8746 * @arg @ref LL_HRTIM_TIMER_C
8747 * @arg @ref LL_HRTIM_TIMER_D
8748 * @arg @ref LL_HRTIM_TIMER_E
8749 * @retval None
8750 */
8752 {
8757 }
8759 /**
8760 * @brief Indicate whether the update interrupt is enabled for a given timer.
8761 * @rmtoll MDIER MUPDIE LL_HRTIM_IsEnabledIT_UPDATE\n
8762 * TIMxDIER UPDIE LL_HRTIM_IsEnabledIT_UPDATE
8763 * @param HRTIMx High Resolution Timer instance
8764 * @param Timer This parameter can be one of the following values:
8765 * @arg @ref LL_HRTIM_TIMER_MASTER
8766 * @arg @ref LL_HRTIM_TIMER_A
8767 * @arg @ref LL_HRTIM_TIMER_B
8768 * @arg @ref LL_HRTIM_TIMER_C
8769 * @arg @ref LL_HRTIM_TIMER_D
8770 * @arg @ref LL_HRTIM_TIMER_E
8771 * @retval State of MUPDIE/UPDIE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
8772 */
8774 {
8779 }
8781 /**
8782 * @brief Enable the repetition interrupt for a given timer.
8783 * @rmtoll MDIER MREPIE LL_HRTIM_EnableIT_REP\n
8784 * TIMxDIER REPIE LL_HRTIM_EnableIT_REP
8785 * @param HRTIMx High Resolution Timer instance
8786 * @param Timer This parameter can be one of the following values:
8787 * @arg @ref LL_HRTIM_TIMER_MASTER
8788 * @arg @ref LL_HRTIM_TIMER_A
8789 * @arg @ref LL_HRTIM_TIMER_B
8790 * @arg @ref LL_HRTIM_TIMER_C
8791 * @arg @ref LL_HRTIM_TIMER_D
8792 * @arg @ref LL_HRTIM_TIMER_E
8793 * @retval None
8794 */
8796 {
8801 }
8803 /**
8804 * @brief Disable the repetition interrupt for a given timer.
8805 * @rmtoll MDIER MREPIE LL_HRTIM_DisableIT_REP\n
8806 * TIMxDIER REPIE LL_HRTIM_DisableIT_REP
8807 * @param HRTIMx High Resolution Timer instance
8808 * @param Timer This parameter can be one of the following values:
8809 * @arg @ref LL_HRTIM_TIMER_MASTER
8810 * @arg @ref LL_HRTIM_TIMER_A
8811 * @arg @ref LL_HRTIM_TIMER_B
8812 * @arg @ref LL_HRTIM_TIMER_C
8813 * @arg @ref LL_HRTIM_TIMER_D
8814 * @arg @ref LL_HRTIM_TIMER_E
8815 * @retval None
8816 */
8818 {
8823 }
8825 /**
8826 * @brief Indicate whether the repetition interrupt is enabled for a given timer.
8827 * @rmtoll MDIER MREPIE LL_HRTIM_IsEnabledIT_REP\n
8828 * TIMxDIER REPIE LL_HRTIM_IsEnabledIT_REP
8829 * @param HRTIMx High Resolution Timer instance
8830 * @param Timer This parameter can be one of the following values:
8831 * @arg @ref LL_HRTIM_TIMER_MASTER
8832 * @arg @ref LL_HRTIM_TIMER_A
8833 * @arg @ref LL_HRTIM_TIMER_B
8834 * @arg @ref LL_HRTIM_TIMER_C
8835 * @arg @ref LL_HRTIM_TIMER_D
8836 * @arg @ref LL_HRTIM_TIMER_E
8837 * @retval State of MREPIE/REPIE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
8838 */
8840 {
8845 }
8847 /**
8848 * @brief Enable the compare 1 interrupt for a given timer.
8849 * @rmtoll MDIER MCMP1IE LL_HRTIM_EnableIT_CMP1\n
8850 * TIMxDIER CMP1IE LL_HRTIM_EnableIT_CMP1
8851 * @param HRTIMx High Resolution Timer instance
8852 * @param Timer This parameter can be one of the following values:
8853 * @arg @ref LL_HRTIM_TIMER_MASTER
8854 * @arg @ref LL_HRTIM_TIMER_A
8855 * @arg @ref LL_HRTIM_TIMER_B
8856 * @arg @ref LL_HRTIM_TIMER_C
8857 * @arg @ref LL_HRTIM_TIMER_D
8858 * @arg @ref LL_HRTIM_TIMER_E
8859 * @retval None
8860 */
8862 {
8867 }
8869 /**
8870 * @brief Disable the compare 1 interrupt for a given timer.
8871 * @rmtoll MDIER MCMP1IE LL_HRTIM_DisableIT_CMP1\n
8872 * TIMxDIER CMP1IE LL_HRTIM_DisableIT_CMP1
8873 * @param HRTIMx High Resolution Timer instance
8874 * @param Timer This parameter can be one of the following values:
8875 * @arg @ref LL_HRTIM_TIMER_MASTER
8876 * @arg @ref LL_HRTIM_TIMER_A
8877 * @arg @ref LL_HRTIM_TIMER_B
8878 * @arg @ref LL_HRTIM_TIMER_C
8879 * @arg @ref LL_HRTIM_TIMER_D
8880 * @arg @ref LL_HRTIM_TIMER_E
8881 * @retval None
8882 */
8884 {
8889 }
8891 /**
8892 * @brief Indicate whether the compare 1 interrupt is enabled for a given timer.
8893 * @rmtoll MDIER MCMP1IE LL_HRTIM_IsEnabledIT_CMP1\n
8894 * TIMxDIER CMP1IE LL_HRTIM_IsEnabledIT_CMP1
8895 * @param HRTIMx High Resolution Timer instance
8896 * @param Timer This parameter can be one of the following values:
8897 * @arg @ref LL_HRTIM_TIMER_MASTER
8898 * @arg @ref LL_HRTIM_TIMER_A
8899 * @arg @ref LL_HRTIM_TIMER_B
8900 * @arg @ref LL_HRTIM_TIMER_C
8901 * @arg @ref LL_HRTIM_TIMER_D
8902 * @arg @ref LL_HRTIM_TIMER_E
8903 * @retval State of MCMP1IE/CMP1IE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
8904 */
8906 {
8911 }
8913 /**
8914 * @brief Enable the compare 2 interrupt for a given timer.
8915 * @rmtoll MDIER MCMP2IE LL_HRTIM_EnableIT_CMP2\n
8916 * TIMxDIER CMP2IE LL_HRTIM_EnableIT_CMP2
8917 * @param HRTIMx High Resolution Timer instance
8918 * @param Timer This parameter can be one of the following values:
8919 * @arg @ref LL_HRTIM_TIMER_MASTER
8920 * @arg @ref LL_HRTIM_TIMER_A
8921 * @arg @ref LL_HRTIM_TIMER_B
8922 * @arg @ref LL_HRTIM_TIMER_C
8923 * @arg @ref LL_HRTIM_TIMER_D
8924 * @arg @ref LL_HRTIM_TIMER_E
8925 * @retval None
8926 */
8928 {
8933 }
8935 /**
8936 * @brief Disable the compare 2 interrupt for a given timer.
8937 * @rmtoll MDIER MCMP2IE LL_HRTIM_DisableIT_CMP2\n
8938 * TIMxDIER CMP2IE LL_HRTIM_DisableIT_CMP2
8939 * @param HRTIMx High Resolution Timer instance
8940 * @param Timer This parameter can be one of the following values:
8941 * @arg @ref LL_HRTIM_TIMER_MASTER
8942 * @arg @ref LL_HRTIM_TIMER_A
8943 * @arg @ref LL_HRTIM_TIMER_B
8944 * @arg @ref LL_HRTIM_TIMER_C
8945 * @arg @ref LL_HRTIM_TIMER_D
8946 * @arg @ref LL_HRTIM_TIMER_E
8947 * @retval None
8948 */
8950 {
8955 }
8957 /**
8958 * @brief Indicate whether the compare 2 interrupt is enabled for a given timer.
8959 * @rmtoll MDIER MCMP2IE LL_HRTIM_IsEnabledIT_CMP2\n
8960 * TIMxDIER CMP2IE LL_HRTIM_IsEnabledIT_CMP2
8961 * @param HRTIMx High Resolution Timer instance
8962 * @param Timer This parameter can be one of the following values:
8963 * @arg @ref LL_HRTIM_TIMER_MASTER
8964 * @arg @ref LL_HRTIM_TIMER_A
8965 * @arg @ref LL_HRTIM_TIMER_B
8966 * @arg @ref LL_HRTIM_TIMER_C
8967 * @arg @ref LL_HRTIM_TIMER_D
8968 * @arg @ref LL_HRTIM_TIMER_E
8969 * @retval State of MCMP2IE/CMP2IE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
8970 */
8972 {
8977 }
8979 /**
8980 * @brief Enable the compare 3 interrupt for a given timer.
8981 * @rmtoll MDIER MCMP3IE LL_HRTIM_EnableIT_CMP3\n
8982 * TIMxDIER CMP3IE LL_HRTIM_EnableIT_CMP3
8983 * @param HRTIMx High Resolution Timer instance
8984 * @param Timer This parameter can be one of the following values:
8985 * @arg @ref LL_HRTIM_TIMER_MASTER
8986 * @arg @ref LL_HRTIM_TIMER_A
8987 * @arg @ref LL_HRTIM_TIMER_B
8988 * @arg @ref LL_HRTIM_TIMER_C
8989 * @arg @ref LL_HRTIM_TIMER_D
8990 * @arg @ref LL_HRTIM_TIMER_E
8991 * @retval None
8992 */
8994 {
8999 }
9001 /**
9002 * @brief Disable the compare 3 interrupt for a given timer.
9003 * @rmtoll MDIER MCMP3IE LL_HRTIM_DisableIT_CMP3\n
9004 * TIMxDIER CMP3IE LL_HRTIM_DisableIT_CMP3
9005 * @param HRTIMx High Resolution Timer instance
9006 * @param Timer This parameter can be one of the following values:
9007 * @arg @ref LL_HRTIM_TIMER_MASTER
9008 * @arg @ref LL_HRTIM_TIMER_A
9009 * @arg @ref LL_HRTIM_TIMER_B
9010 * @arg @ref LL_HRTIM_TIMER_C
9011 * @arg @ref LL_HRTIM_TIMER_D
9012 * @arg @ref LL_HRTIM_TIMER_E
9013 * @retval None
9014 */
9016 {
9021 }
9023 /**
9024 * @brief Indicate whether the compare 3 interrupt is enabled for a given timer.
9025 * @rmtoll MDIER MCMP3IE LL_HRTIM_IsEnabledIT_CMP3\n
9026 * TIMxDIER CMP3IE LL_HRTIM_IsEnabledIT_CMP3
9027 * @param HRTIMx High Resolution Timer instance
9028 * @param Timer This parameter can be one of the following values:
9029 * @arg @ref LL_HRTIM_TIMER_MASTER
9030 * @arg @ref LL_HRTIM_TIMER_A
9031 * @arg @ref LL_HRTIM_TIMER_B
9032 * @arg @ref LL_HRTIM_TIMER_C
9033 * @arg @ref LL_HRTIM_TIMER_D
9034 * @arg @ref LL_HRTIM_TIMER_E
9035 * @retval State of MCMP3IE/CMP3IE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9036 */
9038 {
9043 }
9045 /**
9046 * @brief Enable the compare 4 interrupt for a given timer.
9047 * @rmtoll MDIER MCMP4IE LL_HRTIM_EnableIT_CMP4\n
9048 * TIMxDIER CMP4IE LL_HRTIM_EnableIT_CMP4
9049 * @param HRTIMx High Resolution Timer instance
9050 * @param Timer This parameter can be one of the following values:
9051 * @arg @ref LL_HRTIM_TIMER_MASTER
9052 * @arg @ref LL_HRTIM_TIMER_A
9053 * @arg @ref LL_HRTIM_TIMER_B
9054 * @arg @ref LL_HRTIM_TIMER_C
9055 * @arg @ref LL_HRTIM_TIMER_D
9056 * @arg @ref LL_HRTIM_TIMER_E
9057 * @retval None
9058 */
9060 {
9065 }
9067 /**
9068 * @brief Disable the compare 4 interrupt for a given timer.
9069 * @rmtoll MDIER MCMP4IE LL_HRTIM_DisableIT_CMP4\n
9070 * TIMxDIER CMP4IE LL_HRTIM_DisableIT_CMP4
9071 * @param HRTIMx High Resolution Timer instance
9072 * @param Timer This parameter can be one of the following values:
9073 * @arg @ref LL_HRTIM_TIMER_MASTER
9074 * @arg @ref LL_HRTIM_TIMER_A
9075 * @arg @ref LL_HRTIM_TIMER_B
9076 * @arg @ref LL_HRTIM_TIMER_C
9077 * @arg @ref LL_HRTIM_TIMER_D
9078 * @arg @ref LL_HRTIM_TIMER_E
9079 * @retval None
9080 */
9082 {
9087 }
9089 /**
9090 * @brief Indicate whether the compare 4 interrupt is enabled for a given timer.
9091 * @rmtoll MDIER MCMP4IE LL_HRTIM_IsEnabledIT_CMP4\n
9092 * TIMxDIER CMP4IE LL_HRTIM_IsEnabledIT_CMP4
9093 * @param HRTIMx High Resolution Timer instance
9094 * @param Timer This parameter can be one of the following values:
9095 * @arg @ref LL_HRTIM_TIMER_MASTER
9096 * @arg @ref LL_HRTIM_TIMER_A
9097 * @arg @ref LL_HRTIM_TIMER_B
9098 * @arg @ref LL_HRTIM_TIMER_C
9099 * @arg @ref LL_HRTIM_TIMER_D
9100 * @arg @ref LL_HRTIM_TIMER_E
9101 * @retval State of MCMP4IE/CMP4IE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9102 */
9104 {
9109 }
9111 /**
9112 * @brief Enable the capture 1 interrupt for a given timer.
9113 * @rmtoll TIMxDIER CPT1IE LL_HRTIM_EnableIT_CPT1
9114 * @param HRTIMx High Resolution Timer instance
9115 * @param Timer This parameter can be one of the following values:
9116 * @arg @ref LL_HRTIM_TIMER_A
9117 * @arg @ref LL_HRTIM_TIMER_B
9118 * @arg @ref LL_HRTIM_TIMER_C
9119 * @arg @ref LL_HRTIM_TIMER_D
9120 * @arg @ref LL_HRTIM_TIMER_E
9121 * @retval None
9122 */
9124 {
9129 }
9131 /**
9132 * @brief Enable the capture 1 interrupt for a given timer.
9133 * @rmtoll TIMxDIER CPT1IE LL_HRTIM_DisableIT_CPT1
9134 * @param HRTIMx High Resolution Timer instance
9135 * @param Timer This parameter can be one of the following values:
9136 * @arg @ref LL_HRTIM_TIMER_A
9137 * @arg @ref LL_HRTIM_TIMER_B
9138 * @arg @ref LL_HRTIM_TIMER_C
9139 * @arg @ref LL_HRTIM_TIMER_D
9140 * @arg @ref LL_HRTIM_TIMER_E
9141 * @retval None
9142 */
9144 {
9149 }
9151 /**
9152 * @brief Indicate whether the capture 1 interrupt is enabled for a given timer.
9153 * @rmtoll TIMxDIER CPT1IE LL_HRTIM_IsEnabledIT_CPT1
9154 * @param HRTIMx High Resolution Timer instance
9155 * @param Timer This parameter can be one of the following values:
9156 * @arg @ref LL_HRTIM_TIMER_A
9157 * @arg @ref LL_HRTIM_TIMER_B
9158 * @arg @ref LL_HRTIM_TIMER_C
9159 * @arg @ref LL_HRTIM_TIMER_D
9160 * @arg @ref LL_HRTIM_TIMER_E
9161 * @retval State of CPT1IE bit in HRTIM_TIMxDIER register (1 or 0).
9162 */
9164 {
9169 }
9171 /**
9172 * @brief Enable the capture 2 interrupt for a given timer.
9173 * @rmtoll TIMxDIER CPT2IE LL_HRTIM_EnableIT_CPT2
9174 * @param HRTIMx High Resolution Timer instance
9175 * @param Timer This parameter can be one of the following values:
9176 * @arg @ref LL_HRTIM_TIMER_A
9177 * @arg @ref LL_HRTIM_TIMER_B
9178 * @arg @ref LL_HRTIM_TIMER_C
9179 * @arg @ref LL_HRTIM_TIMER_D
9180 * @arg @ref LL_HRTIM_TIMER_E
9181 * @retval None
9182 */
9184 {
9189 }
9191 /**
9192 * @brief Enable the capture 2 interrupt for a given timer.
9193 * @rmtoll TIMxDIER CPT2IE LL_HRTIM_DisableIT_CPT2
9194 * @param HRTIMx High Resolution Timer instance
9195 * @param Timer This parameter can be one of the following values:
9196 * @arg @ref LL_HRTIM_TIMER_A
9197 * @arg @ref LL_HRTIM_TIMER_B
9198 * @arg @ref LL_HRTIM_TIMER_C
9199 * @arg @ref LL_HRTIM_TIMER_D
9200 * @arg @ref LL_HRTIM_TIMER_E
9201 * @retval None
9202 */
9204 {
9209 }
9211 /**
9212 * @brief Indicate whether the capture 2 interrupt is enabled for a given timer.
9213 * @rmtoll TIMxDIER CPT2IE LL_HRTIM_IsEnabledIT_CPT2
9214 * @param HRTIMx High Resolution Timer instance
9215 * @param Timer This parameter can be one of the following values:
9216 * @arg @ref LL_HRTIM_TIMER_A
9217 * @arg @ref LL_HRTIM_TIMER_B
9218 * @arg @ref LL_HRTIM_TIMER_C
9219 * @arg @ref LL_HRTIM_TIMER_D
9220 * @arg @ref LL_HRTIM_TIMER_E
9221 * @retval State of CPT2IE bit in HRTIM_TIMxDIER register (1 or 0).
9222 */
9224 {
9229 }
9231 /**
9232 * @brief Enable the output 1 set interrupt for a given timer.
9233 * @rmtoll TIMxDIER SET1IE LL_HRTIM_EnableIT_SET1
9234 * @param HRTIMx High Resolution Timer instance
9235 * @param Timer This parameter can be one of the following values:
9236 * @arg @ref LL_HRTIM_TIMER_A
9237 * @arg @ref LL_HRTIM_TIMER_B
9238 * @arg @ref LL_HRTIM_TIMER_C
9239 * @arg @ref LL_HRTIM_TIMER_D
9240 * @arg @ref LL_HRTIM_TIMER_E
9241 * @retval None
9242 */
9244 {
9249 }
9251 /**
9252 * @brief Disable the output 1 set interrupt for a given timer.
9253 * @rmtoll TIMxDIER SET1IE LL_HRTIM_DisableIT_SET1
9254 * @param HRTIMx High Resolution Timer instance
9255 * @param Timer This parameter can be one of the following values:
9256 * @arg @ref LL_HRTIM_TIMER_A
9257 * @arg @ref LL_HRTIM_TIMER_B
9258 * @arg @ref LL_HRTIM_TIMER_C
9259 * @arg @ref LL_HRTIM_TIMER_D
9260 * @arg @ref LL_HRTIM_TIMER_E
9261 * @retval None
9262 */
9264 {
9269 }
9271 /**
9272 * @brief Indicate whether the output 1 set interrupt is enabled for a given timer.
9273 * @rmtoll TIMxDIER SET1IE LL_HRTIM_IsEnabledIT_SET1
9274 * @param HRTIMx High Resolution Timer instance
9275 * @param Timer This parameter can be one of the following values:
9276 * @arg @ref LL_HRTIM_TIMER_A
9277 * @arg @ref LL_HRTIM_TIMER_B
9278 * @arg @ref LL_HRTIM_TIMER_C
9279 * @arg @ref LL_HRTIM_TIMER_D
9280 * @arg @ref LL_HRTIM_TIMER_E
9281 * @retval State of SET1xIE bit in HRTIM_TIMxDIER register (1 or 0).
9282 */
9284 {
9289 }
9291 /**
9292 * @brief Enable the output 1 reset interrupt for a given timer.
9293 * @rmtoll TIMxDIER RST1IE LL_HRTIM_EnableIT_RST1
9294 * @param HRTIMx High Resolution Timer instance
9295 * @param Timer This parameter can be one of the following values:
9296 * @arg @ref LL_HRTIM_TIMER_A
9297 * @arg @ref LL_HRTIM_TIMER_B
9298 * @arg @ref LL_HRTIM_TIMER_C
9299 * @arg @ref LL_HRTIM_TIMER_D
9300 * @arg @ref LL_HRTIM_TIMER_E
9301 * @retval None
9302 */
9304 {
9309 }
9311 /**
9312 * @brief Disable the output 1 reset interrupt for a given timer.
9313 * @rmtoll TIMxDIER RST1IE LL_HRTIM_DisableIT_RST1
9314 * @param HRTIMx High Resolution Timer instance
9315 * @param Timer This parameter can be one of the following values:
9316 * @arg @ref LL_HRTIM_TIMER_A
9317 * @arg @ref LL_HRTIM_TIMER_B
9318 * @arg @ref LL_HRTIM_TIMER_C
9319 * @arg @ref LL_HRTIM_TIMER_D
9320 * @arg @ref LL_HRTIM_TIMER_E
9321 * @retval None
9322 */
9324 {
9329 }
9331 /**
9332 * @brief Indicate whether the output 1 reset interrupt is enabled for a given timer.
9333 * @rmtoll TIMxDIER RST1IE LL_HRTIM_IsEnabledIT_RST1
9334 * @param HRTIMx High Resolution Timer instance
9335 * @param Timer This parameter can be one of the following values:
9336 * @arg @ref LL_HRTIM_TIMER_A
9337 * @arg @ref LL_HRTIM_TIMER_B
9338 * @arg @ref LL_HRTIM_TIMER_C
9339 * @arg @ref LL_HRTIM_TIMER_D
9340 * @arg @ref LL_HRTIM_TIMER_E
9341 * @retval State of RST1xIE bit in HRTIM_TIMxDIER register (1 or 0).
9342 */
9344 {
9349 }
9351 /**
9352 * @brief Enable the output 2 set interrupt for a given timer.
9353 * @rmtoll TIMxDIER SET2IE LL_HRTIM_EnableIT_SET2
9354 * @param HRTIMx High Resolution Timer instance
9355 * @param Timer This parameter can be one of the following values:
9356 * @arg @ref LL_HRTIM_TIMER_A
9357 * @arg @ref LL_HRTIM_TIMER_B
9358 * @arg @ref LL_HRTIM_TIMER_C
9359 * @arg @ref LL_HRTIM_TIMER_D
9360 * @arg @ref LL_HRTIM_TIMER_E
9361 * @retval None
9362 */
9364 {
9369 }
9371 /**
9372 * @brief Disable the output 2 set interrupt for a given timer.
9373 * @rmtoll TIMxDIER SET2IE LL_HRTIM_DisableIT_SET2
9374 * @param HRTIMx High Resolution Timer instance
9375 * @param Timer This parameter can be one of the following values:
9376 * @arg @ref LL_HRTIM_TIMER_A
9377 * @arg @ref LL_HRTIM_TIMER_B
9378 * @arg @ref LL_HRTIM_TIMER_C
9379 * @arg @ref LL_HRTIM_TIMER_D
9380 * @arg @ref LL_HRTIM_TIMER_E
9381 * @retval None
9382 */
9384 {
9389 }
9391 /**
9392 * @brief Indicate whether the output 2 set interrupt is enabled for a given timer.
9393 * @rmtoll TIMxDIER SET2IE LL_HRTIM_IsEnabledIT_SET2
9394 * @param HRTIMx High Resolution Timer instance
9395 * @param Timer This parameter can be one of the following values:
9396 * @arg @ref LL_HRTIM_TIMER_A
9397 * @arg @ref LL_HRTIM_TIMER_B
9398 * @arg @ref LL_HRTIM_TIMER_C
9399 * @arg @ref LL_HRTIM_TIMER_D
9400 * @arg @ref LL_HRTIM_TIMER_E
9401 * @retval State of SET2xIE bit in HRTIM_TIMxDIER register (1 or 0).
9402 */
9404 {
9409 }
9411 /**
9412 * @brief Enable the output 2 reset interrupt for a given timer.
9413 * @rmtoll TIMxDIER RST2IE LL_HRTIM_EnableIT_RST2
9414 * @param HRTIMx High Resolution Timer instance
9415 * @param Timer This parameter can be one of the following values:
9416 * @arg @ref LL_HRTIM_TIMER_A
9417 * @arg @ref LL_HRTIM_TIMER_B
9418 * @arg @ref LL_HRTIM_TIMER_C
9419 * @arg @ref LL_HRTIM_TIMER_D
9420 * @arg @ref LL_HRTIM_TIMER_E
9421 * @retval None
9422 */
9424 {
9429 }
9431 /**
9432 * @brief Disable the output 2 reset interrupt for a given timer.
9433 * @rmtoll TIMxDIER RST2IE LL_HRTIM_DisableIT_RST2
9434 * @param HRTIMx High Resolution Timer instance
9435 * @param Timer This parameter can be one of the following values:
9436 * @arg @ref LL_HRTIM_TIMER_A
9437 * @arg @ref LL_HRTIM_TIMER_B
9438 * @arg @ref LL_HRTIM_TIMER_C
9439 * @arg @ref LL_HRTIM_TIMER_D
9440 * @arg @ref LL_HRTIM_TIMER_E
9441 * @retval None
9442 */
9444 {
9449 }
9451 /**
9452 * @brief Indicate whether the output 2 reset LL_HRTIM_IsEnabledIT_RST2 is enabled for a given timer.
9453 * @rmtoll TIMxDIER RST2IE LL_HRTIM_DisableIT_RST2
9454 * @param HRTIMx High Resolution Timer instance
9455 * @param Timer This parameter can be one of the following values:
9456 * @arg @ref LL_HRTIM_TIMER_A
9457 * @arg @ref LL_HRTIM_TIMER_B
9458 * @arg @ref LL_HRTIM_TIMER_C
9459 * @arg @ref LL_HRTIM_TIMER_D
9460 * @arg @ref LL_HRTIM_TIMER_E
9461 * @retval State of RST2xIE bit in HRTIM_TIMxDIER register (1 or 0).
9462 */
9464 {
9469 }
9471 /**
9472 * @brief Enable the reset/roll-over interrupt for a given timer.
9473 * @rmtoll TIMxDIER RSTIE LL_HRTIM_EnableIT_RST
9474 * @param HRTIMx High Resolution Timer instance
9475 * @param Timer This parameter can be one of the following values:
9476 * @arg @ref LL_HRTIM_TIMER_A
9477 * @arg @ref LL_HRTIM_TIMER_B
9478 * @arg @ref LL_HRTIM_TIMER_C
9479 * @arg @ref LL_HRTIM_TIMER_D
9480 * @arg @ref LL_HRTIM_TIMER_E
9481 * @retval None
9482 */
9484 {
9489 }
9491 /**
9492 * @brief Disable the reset/roll-over interrupt for a given timer.
9493 * @rmtoll TIMxDIER RSTIE LL_HRTIM_DisableIT_RST
9494 * @param HRTIMx High Resolution Timer instance
9495 * @param Timer This parameter can be one of the following values:
9496 * @arg @ref LL_HRTIM_TIMER_A
9497 * @arg @ref LL_HRTIM_TIMER_B
9498 * @arg @ref LL_HRTIM_TIMER_C
9499 * @arg @ref LL_HRTIM_TIMER_D
9500 * @arg @ref LL_HRTIM_TIMER_E
9501 * @retval None
9502 */
9504 {
9509 }
9511 /**
9512 * @brief Indicate whether the reset/roll-over interrupt is enabled for a given timer.
9513 * @rmtoll TIMxDIER RSTIE LL_HRTIM_IsEnabledIT_RST
9514 * @param HRTIMx High Resolution Timer instance
9515 * @param Timer This parameter can be one of the following values:
9516 * @arg @ref LL_HRTIM_TIMER_A
9517 * @arg @ref LL_HRTIM_TIMER_B
9518 * @arg @ref LL_HRTIM_TIMER_C
9519 * @arg @ref LL_HRTIM_TIMER_D
9520 * @arg @ref LL_HRTIM_TIMER_E
9521 * @retval State of RSTIE bit in HRTIM_TIMxDIER register (1 or 0).
9522 */
9524 {
9529 }
9531 /**
9532 * @brief Enable the delayed protection interrupt for a given timer.
9533 * @rmtoll TIMxDIER DLYPRTIE LL_HRTIM_EnableIT_DLYPRT
9534 * @param HRTIMx High Resolution Timer instance
9535 * @param Timer This parameter can be one of the following values:
9536 * @arg @ref LL_HRTIM_TIMER_A
9537 * @arg @ref LL_HRTIM_TIMER_B
9538 * @arg @ref LL_HRTIM_TIMER_C
9539 * @arg @ref LL_HRTIM_TIMER_D
9540 * @arg @ref LL_HRTIM_TIMER_E
9541 * @retval None
9542 */
9544 {
9549 }
9551 /**
9552 * @brief Disable the delayed protection interrupt for a given timer.
9553 * @rmtoll TIMxDIER DLYPRTIE LL_HRTIM_DisableIT_DLYPRT
9554 * @param HRTIMx High Resolution Timer instance
9555 * @param Timer This parameter can be one of the following values:
9556 * @arg @ref LL_HRTIM_TIMER_A
9557 * @arg @ref LL_HRTIM_TIMER_B
9558 * @arg @ref LL_HRTIM_TIMER_C
9559 * @arg @ref LL_HRTIM_TIMER_D
9560 * @arg @ref LL_HRTIM_TIMER_E
9561 * @retval None
9562 */
9564 {
9569 }
9571 /**
9572 * @brief Indicate whether the delayed protection interrupt is enabled for a given timer.
9573 * @rmtoll TIMxDIER DLYPRTIE LL_HRTIM_IsEnabledIT_DLYPRT
9574 * @param HRTIMx High Resolution Timer instance
9575 * @param Timer This parameter can be one of the following values:
9576 * @arg @ref LL_HRTIM_TIMER_A
9577 * @arg @ref LL_HRTIM_TIMER_B
9578 * @arg @ref LL_HRTIM_TIMER_C
9579 * @arg @ref LL_HRTIM_TIMER_D
9580 * @arg @ref LL_HRTIM_TIMER_E
9581 * @retval State of DLYPRTIE bit in HRTIM_TIMxDIER register (1 or 0).
9582 */
9584 {
9589 }
9591 /**
9592 * @}
9593 */
9595 /** @defgroup HRTIM_EF_DMA_Management DMA_Management
9596 * @{
9597 */
9599 /**
9600 * @brief Enable the synchronization input DMA request.
9601 * @rmtoll MDIER SYNCDE LL_HRTIM_EnableDMAReq_SYNC
9602 * @param HRTIMx High Resolution Timer instance
9603 * @retval None
9604 */
9606 {
9608 }
9610 /**
9611 * @brief Disable the synchronization input DMA request
9612 * @rmtoll MDIER SYNCDE LL_HRTIM_DisableDMAReq_SYNC
9613 * @param HRTIMx High Resolution Timer instance
9614 * @retval None
9615 */
9617 {
9619 }
9621 /**
9622 * @brief Indicate whether the synchronization input DMA request is enabled.
9623 * @rmtoll MDIER SYNCDE LL_HRTIM_IsEnabledDMAReq_SYNC
9624 * @param HRTIMx High Resolution Timer instance
9625 * @retval State of SYNCDE bit in HRTIM_MDIER register (1 or 0).
9626 */
9628 {
9630 }
9632 /**
9633 * @brief Enable the update DMA request for a given timer.
9634 * @rmtoll MDIER MUPDDE LL_HRTIM_EnableDMAReq_UPDATE\n
9635 * TIMxDIER UPDDE LL_HRTIM_EnableDMAReq_UPDATE
9636 * @param HRTIMx High Resolution Timer instance
9637 * @param Timer This parameter can be one of the following values:
9638 * @arg @ref LL_HRTIM_TIMER_MASTER
9639 * @arg @ref LL_HRTIM_TIMER_A
9640 * @arg @ref LL_HRTIM_TIMER_B
9641 * @arg @ref LL_HRTIM_TIMER_C
9642 * @arg @ref LL_HRTIM_TIMER_D
9643 * @arg @ref LL_HRTIM_TIMER_E
9644 * @retval None
9645 */
9647 {
9652 }
9654 /**
9655 * @brief Disable the update DMA request for a given timer.
9656 * @rmtoll MDIER MUPDDE LL_HRTIM_DisableDMAReq_UPDATE\n
9657 * TIMxDIER UPDDE LL_HRTIM_DisableDMAReq_UPDATE
9658 * @param HRTIMx High Resolution Timer instance
9659 * @param Timer This parameter can be one of the following values:
9660 * @arg @ref LL_HRTIM_TIMER_MASTER
9661 * @arg @ref LL_HRTIM_TIMER_A
9662 * @arg @ref LL_HRTIM_TIMER_B
9663 * @arg @ref LL_HRTIM_TIMER_C
9664 * @arg @ref LL_HRTIM_TIMER_D
9665 * @arg @ref LL_HRTIM_TIMER_E
9666 * @retval None
9667 */
9669 {
9674 }
9676 /**
9677 * @brief Indicate whether the update DMA request is enabled for a given timer.
9678 * @rmtoll MDIER MUPDDE LL_HRTIM_IsEnabledDMAReq_UPDATE\n
9679 * TIMxDIER UPDDE LL_HRTIM_IsEnabledDMAReq_UPDATE
9680 * @param HRTIMx High Resolution Timer instance
9681 * @param Timer This parameter can be one of the following values:
9682 * @arg @ref LL_HRTIM_TIMER_MASTER
9683 * @arg @ref LL_HRTIM_TIMER_A
9684 * @arg @ref LL_HRTIM_TIMER_B
9685 * @arg @ref LL_HRTIM_TIMER_C
9686 * @arg @ref LL_HRTIM_TIMER_D
9687 * @arg @ref LL_HRTIM_TIMER_E
9688 * @retval State of MUPDDE/UPDDE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9689 */
9690 __STATIC_INLINE uint32_t LL_HRTIM_IsEnabledDMAReq_UPDATE(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
9691 {
9696 }
9698 /**
9699 * @brief Enable the repetition DMA request for a given timer.
9700 * @rmtoll MDIER MREPDE LL_HRTIM_EnableDMAReq_REP\n
9701 * TIMxDIER REPDE LL_HRTIM_EnableDMAReq_REP
9702 * @param HRTIMx High Resolution Timer instance
9703 * @param Timer This parameter can be one of the following values:
9704 * @arg @ref LL_HRTIM_TIMER_MASTER
9705 * @arg @ref LL_HRTIM_TIMER_A
9706 * @arg @ref LL_HRTIM_TIMER_B
9707 * @arg @ref LL_HRTIM_TIMER_C
9708 * @arg @ref LL_HRTIM_TIMER_D
9709 * @arg @ref LL_HRTIM_TIMER_E
9710 * @retval None
9711 */
9713 {
9718 }
9720 /**
9721 * @brief Disable the repetition DMA request for a given timer.
9722 * @rmtoll MDIER MREPDE LL_HRTIM_DisableDMAReq_REP\n
9723 * TIMxDIER REPDE LL_HRTIM_DisableDMAReq_REP
9724 * @param HRTIMx High Resolution Timer instance
9725 * @param Timer This parameter can be one of the following values:
9726 * @arg @ref LL_HRTIM_TIMER_MASTER
9727 * @arg @ref LL_HRTIM_TIMER_A
9728 * @arg @ref LL_HRTIM_TIMER_B
9729 * @arg @ref LL_HRTIM_TIMER_C
9730 * @arg @ref LL_HRTIM_TIMER_D
9731 * @arg @ref LL_HRTIM_TIMER_E
9732 * @retval None
9733 */
9735 {
9740 }
9742 /**
9743 * @brief Indicate whether the repetition DMA request is enabled for a given timer.
9744 * @rmtoll MDIER MREPDE LL_HRTIM_IsEnabledDMAReq_REP\n
9745 * TIMxDIER REPDE LL_HRTIM_IsEnabledDMAReq_REP
9746 * @param HRTIMx High Resolution Timer instance
9747 * @param Timer This parameter can be one of the following values:
9748 * @arg @ref LL_HRTIM_TIMER_MASTER
9749 * @arg @ref LL_HRTIM_TIMER_A
9750 * @arg @ref LL_HRTIM_TIMER_B
9751 * @arg @ref LL_HRTIM_TIMER_C
9752 * @arg @ref LL_HRTIM_TIMER_D
9753 * @arg @ref LL_HRTIM_TIMER_E
9754 * @retval State of MREPDE/REPDE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9755 */
9757 {
9762 }
9764 /**
9765 * @brief Enable the compare 1 DMA request for a given timer.
9766 * @rmtoll MDIER MCMP1DE LL_HRTIM_EnableDMAReq_CMP1\n
9767 * TIMxDIER CMP1DE LL_HRTIM_EnableDMAReq_CMP1
9768 * @param HRTIMx High Resolution Timer instance
9769 * @param Timer This parameter can be one of the following values:
9770 * @arg @ref LL_HRTIM_TIMER_MASTER
9771 * @arg @ref LL_HRTIM_TIMER_A
9772 * @arg @ref LL_HRTIM_TIMER_B
9773 * @arg @ref LL_HRTIM_TIMER_C
9774 * @arg @ref LL_HRTIM_TIMER_D
9775 * @arg @ref LL_HRTIM_TIMER_E
9776 * @retval None
9777 */
9779 {
9784 }
9786 /**
9787 * @brief Disable the compare 1 DMA request for a given timer.
9788 * @rmtoll MDIER MCMP1DE LL_HRTIM_DisableDMAReq_CMP1\n
9789 * TIMxDIER CMP1DE LL_HRTIM_DisableDMAReq_CMP1
9790 * @param HRTIMx High Resolution Timer instance
9791 * @param Timer This parameter can be one of the following values:
9792 * @arg @ref LL_HRTIM_TIMER_MASTER
9793 * @arg @ref LL_HRTIM_TIMER_A
9794 * @arg @ref LL_HRTIM_TIMER_B
9795 * @arg @ref LL_HRTIM_TIMER_C
9796 * @arg @ref LL_HRTIM_TIMER_D
9797 * @arg @ref LL_HRTIM_TIMER_E
9798 * @retval None
9799 */
9801 {
9806 }
9808 /**
9809 * @brief Indicate whether the compare 1 DMA request is enabled for a given timer.
9810 * @rmtoll MDIER MCMP1DE LL_HRTIM_IsEnabledDMAReq_CMP1\n
9811 * TIMxDIER CMP1DE LL_HRTIM_IsEnabledDMAReq_CMP1
9812 * @param HRTIMx High Resolution Timer instance
9813 * @param Timer This parameter can be one of the following values:
9814 * @arg @ref LL_HRTIM_TIMER_MASTER
9815 * @arg @ref LL_HRTIM_TIMER_A
9816 * @arg @ref LL_HRTIM_TIMER_B
9817 * @arg @ref LL_HRTIM_TIMER_C
9818 * @arg @ref LL_HRTIM_TIMER_D
9819 * @arg @ref LL_HRTIM_TIMER_E
9820 * @retval State of MCMP1DE/CMP1DE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9821 */
9823 {
9828 }
9830 /**
9831 * @brief Enable the compare 2 DMA request for a given timer.
9832 * @rmtoll MDIER MCMP2DE LL_HRTIM_EnableDMAReq_CMP2\n
9833 * TIMxDIER CMP2DE LL_HRTIM_EnableDMAReq_CMP2
9834 * @param HRTIMx High Resolution Timer instance
9835 * @param Timer This parameter can be one of the following values:
9836 * @arg @ref LL_HRTIM_TIMER_MASTER
9837 * @arg @ref LL_HRTIM_TIMER_A
9838 * @arg @ref LL_HRTIM_TIMER_B
9839 * @arg @ref LL_HRTIM_TIMER_C
9840 * @arg @ref LL_HRTIM_TIMER_D
9841 * @arg @ref LL_HRTIM_TIMER_E
9842 * @retval None
9843 */
9845 {
9850 }
9852 /**
9853 * @brief Disable the compare 2 DMA request for a given timer.
9854 * @rmtoll MDIER MCMP2DE LL_HRTIM_DisableDMAReq_CMP2\n
9855 * TIMxDIER CMP2DE LL_HRTIM_DisableDMAReq_CMP2
9856 * @param HRTIMx High Resolution Timer instance
9857 * @param Timer This parameter can be one of the following values:
9858 * @arg @ref LL_HRTIM_TIMER_MASTER
9859 * @arg @ref LL_HRTIM_TIMER_A
9860 * @arg @ref LL_HRTIM_TIMER_B
9861 * @arg @ref LL_HRTIM_TIMER_C
9862 * @arg @ref LL_HRTIM_TIMER_D
9863 * @arg @ref LL_HRTIM_TIMER_E
9864 * @retval None
9865 */
9867 {
9872 }
9874 /**
9875 * @brief Indicate whether the compare 2 DMA request is enabled for a given timer.
9876 * @rmtoll MDIER MCMP2DE LL_HRTIM_IsEnabledDMAReq_CMP2\n
9877 * TIMxDIER CMP2DE LL_HRTIM_IsEnabledDMAReq_CMP2
9878 * @param HRTIMx High Resolution Timer instance
9879 * @param Timer This parameter can be one of the following values:
9880 * @arg @ref LL_HRTIM_TIMER_MASTER
9881 * @arg @ref LL_HRTIM_TIMER_A
9882 * @arg @ref LL_HRTIM_TIMER_B
9883 * @arg @ref LL_HRTIM_TIMER_C
9884 * @arg @ref LL_HRTIM_TIMER_D
9885 * @arg @ref LL_HRTIM_TIMER_E
9886 * @retval State of MCMP2DE/CMP2DE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9887 */
9889 {
9894 }
9896 /**
9897 * @brief Enable the compare 3 DMA request for a given timer.
9898 * @rmtoll MDIER MCMP3DE LL_HRTIM_EnableDMAReq_CMP3\n
9899 * TIMxDIER CMP3DE LL_HRTIM_EnableDMAReq_CMP3
9900 * @param HRTIMx High Resolution Timer instance
9901 * @param Timer This parameter can be one of the following values:
9902 * @arg @ref LL_HRTIM_TIMER_MASTER
9903 * @arg @ref LL_HRTIM_TIMER_A
9904 * @arg @ref LL_HRTIM_TIMER_B
9905 * @arg @ref LL_HRTIM_TIMER_C
9906 * @arg @ref LL_HRTIM_TIMER_D
9907 * @arg @ref LL_HRTIM_TIMER_E
9908 * @retval None
9909 */
9911 {
9916 }
9918 /**
9919 * @brief Disable the compare 3 DMA request for a given timer.
9920 * @rmtoll MDIER MCMP3DE LL_HRTIM_DisableDMAReq_CMP3\n
9921 * TIMxDIER CMP3DE LL_HRTIM_DisableDMAReq_CMP3
9922 * @param HRTIMx High Resolution Timer instance
9923 * @param Timer This parameter can be one of the following values:
9924 * @arg @ref LL_HRTIM_TIMER_MASTER
9925 * @arg @ref LL_HRTIM_TIMER_A
9926 * @arg @ref LL_HRTIM_TIMER_B
9927 * @arg @ref LL_HRTIM_TIMER_C
9928 * @arg @ref LL_HRTIM_TIMER_D
9929 * @arg @ref LL_HRTIM_TIMER_E
9930 * @retval None
9931 */
9933 {
9938 }
9940 /**
9941 * @brief Indicate whether the compare 3 DMA request is enabled for a given timer.
9942 * @rmtoll MDIER MCMP3DE LL_HRTIM_IsEnabledDMAReq_CMP3\n
9943 * TIMxDIER CMP3DE LL_HRTIM_IsEnabledDMAReq_CMP3
9944 * @param HRTIMx High Resolution Timer instance
9945 * @param Timer This parameter can be one of the following values:
9946 * @arg @ref LL_HRTIM_TIMER_MASTER
9947 * @arg @ref LL_HRTIM_TIMER_A
9948 * @arg @ref LL_HRTIM_TIMER_B
9949 * @arg @ref LL_HRTIM_TIMER_C
9950 * @arg @ref LL_HRTIM_TIMER_D
9951 * @arg @ref LL_HRTIM_TIMER_E
9952 * @retval State of MCMP3DE/CMP3DE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
9953 */
9955 {
9960 }
9962 /**
9963 * @brief Enable the compare 4 DMA request for a given timer.
9964 * @rmtoll MDIER MCMP4DE LL_HRTIM_EnableDMAReq_CMP4\n
9965 * TIMxDIER CMP4DE LL_HRTIM_EnableDMAReq_CMP4
9966 * @param HRTIMx High Resolution Timer instance
9967 * @param Timer This parameter can be one of the following values:
9968 * @arg @ref LL_HRTIM_TIMER_MASTER
9969 * @arg @ref LL_HRTIM_TIMER_A
9970 * @arg @ref LL_HRTIM_TIMER_B
9971 * @arg @ref LL_HRTIM_TIMER_C
9972 * @arg @ref LL_HRTIM_TIMER_D
9973 * @arg @ref LL_HRTIM_TIMER_E
9974 * @retval None
9975 */
9977 {
9982 }
9984 /**
9985 * @brief Disable the compare 4 DMA request for a given timer.
9986 * @rmtoll MDIER MCMP4DE LL_HRTIM_DisableDMAReq_CMP4\n
9987 * TIMxDIER CMP4DE LL_HRTIM_DisableDMAReq_CMP4
9988 * @param HRTIMx High Resolution Timer instance
9989 * @param Timer This parameter can be one of the following values:
9990 * @arg @ref LL_HRTIM_TIMER_MASTER
9991 * @arg @ref LL_HRTIM_TIMER_A
9992 * @arg @ref LL_HRTIM_TIMER_B
9993 * @arg @ref LL_HRTIM_TIMER_C
9994 * @arg @ref LL_HRTIM_TIMER_D
9995 * @arg @ref LL_HRTIM_TIMER_E
9996 * @retval None
9997 */
9999 {
10004 }
10006 /**
10007 * @brief Indicate whether the compare 4 DMA request is enabled for a given timer.
10008 * @rmtoll MDIER MCMP4DE LL_HRTIM_IsEnabledDMAReq_CMP4\n
10009 * TIMxDIER CMP4DE LL_HRTIM_IsEnabledDMAReq_CMP4
10010 * @param HRTIMx High Resolution Timer instance
10011 * @param Timer This parameter can be one of the following values:
10012 * @arg @ref LL_HRTIM_TIMER_MASTER
10013 * @arg @ref LL_HRTIM_TIMER_A
10014 * @arg @ref LL_HRTIM_TIMER_B
10015 * @arg @ref LL_HRTIM_TIMER_C
10016 * @arg @ref LL_HRTIM_TIMER_D
10017 * @arg @ref LL_HRTIM_TIMER_E
10018 * @retval State of MCMP4DE/CMP4DE bit in HRTIM_MDIER/HRTIM_TIMxDIER register (1 or 0).
10019 */
10021 {
10026 }
10028 /**
10029 * @brief Enable the capture 1 DMA request for a given timer.
10030 * @rmtoll TIMxDIER CPT1DE LL_HRTIM_EnableDMAReq_CPT1
10031 * @param HRTIMx High Resolution Timer instance
10032 * @param Timer This parameter can be one of the following values:
10033 * @arg @ref LL_HRTIM_TIMER_A
10034 * @arg @ref LL_HRTIM_TIMER_B
10035 * @arg @ref LL_HRTIM_TIMER_C
10036 * @arg @ref LL_HRTIM_TIMER_D
10037 * @arg @ref LL_HRTIM_TIMER_E
10038 * @retval None
10039 */
10041 {
10046 }
10048 /**
10049 * @brief Disable the capture 1 DMA request for a given timer.
10050 * @rmtoll TIMxDIER CPT1DE LL_HRTIM_DisableDMAReq_CPT1
10051 * @param HRTIMx High Resolution Timer instance
10052 * @param Timer This parameter can be one of the following values:
10053 * @arg @ref LL_HRTIM_TIMER_A
10054 * @arg @ref LL_HRTIM_TIMER_B
10055 * @arg @ref LL_HRTIM_TIMER_C
10056 * @arg @ref LL_HRTIM_TIMER_D
10057 * @arg @ref LL_HRTIM_TIMER_E
10058 * @retval None
10059 */
10061 {
10066 }
10068 /**
10069 * @brief Indicate whether the capture 1 DMA request is enabled for a given timer.
10070 * @rmtoll TIMxDIER CPT1DE LL_HRTIM_IsEnabledDMAReq_CPT1
10071 * @param HRTIMx High Resolution Timer instance
10072 * @param Timer This parameter can be one of the following values:
10073 * @arg @ref LL_HRTIM_TIMER_A
10074 * @arg @ref LL_HRTIM_TIMER_B
10075 * @arg @ref LL_HRTIM_TIMER_C
10076 * @arg @ref LL_HRTIM_TIMER_D
10077 * @arg @ref LL_HRTIM_TIMER_E
10078 * @retval State of CPT1DE bit in HRTIM_TIMxDIER register (1 or 0).
10079 */
10081 {
10086 }
10088 /**
10089 * @brief Enable the capture 2 DMA request for a given timer.
10090 * @rmtoll TIMxDIER CPT2DE LL_HRTIM_EnableDMAReq_CPT2
10091 * @param HRTIMx High Resolution Timer instance
10092 * @param Timer This parameter can be one of the following values:
10093 * @arg @ref LL_HRTIM_TIMER_A
10094 * @arg @ref LL_HRTIM_TIMER_B
10095 * @arg @ref LL_HRTIM_TIMER_C
10096 * @arg @ref LL_HRTIM_TIMER_D
10097 * @arg @ref LL_HRTIM_TIMER_E
10098 * @retval None
10099 */
10101 {
10106 }
10108 /**
10109 * @brief Disable the capture 2 DMA request for a given timer.
10110 * @rmtoll TIMxDIER CPT2DE LL_HRTIM_DisableDMAReq_CPT2
10111 * @param HRTIMx High Resolution Timer instance
10112 * @param Timer This parameter can be one of the following values:
10113 * @arg @ref LL_HRTIM_TIMER_A
10114 * @arg @ref LL_HRTIM_TIMER_B
10115 * @arg @ref LL_HRTIM_TIMER_C
10116 * @arg @ref LL_HRTIM_TIMER_D
10117 * @arg @ref LL_HRTIM_TIMER_E
10118 * @retval None
10119 */
10121 {
10126 }
10128 /**
10129 * @brief Indicate whether the capture 2 DMA request is enabled for a given timer.
10130 * @rmtoll TIMxDIER CPT2DE LL_HRTIM_IsEnabledDMAReq_CPT2
10131 * @param HRTIMx High Resolution Timer instance
10132 * @param Timer This parameter can be one of the following values:
10133 * @arg @ref LL_HRTIM_TIMER_A
10134 * @arg @ref LL_HRTIM_TIMER_B
10135 * @arg @ref LL_HRTIM_TIMER_C
10136 * @arg @ref LL_HRTIM_TIMER_D
10137 * @arg @ref LL_HRTIM_TIMER_E
10138 * @retval State of CPT2DE bit in HRTIM_TIMxDIER register (1 or 0).
10139 */
10141 {
10146 }
10148 /**
10149 * @brief Enable the output 1 set DMA request for a given timer.
10150 * @rmtoll TIMxDIER SET1DE LL_HRTIM_EnableDMAReq_SET1
10151 * @param HRTIMx High Resolution Timer instance
10152 * @param Timer This parameter can be one of the following values:
10153 * @arg @ref LL_HRTIM_TIMER_A
10154 * @arg @ref LL_HRTIM_TIMER_B
10155 * @arg @ref LL_HRTIM_TIMER_C
10156 * @arg @ref LL_HRTIM_TIMER_D
10157 * @arg @ref LL_HRTIM_TIMER_E
10158 * @retval None
10159 */
10161 {
10166 }
10168 /**
10169 * @brief Disable the output 1 set DMA request for a given timer.
10170 * @rmtoll TIMxDIER SET1DE LL_HRTIM_DisableDMAReq_SET1
10171 * @param HRTIMx High Resolution Timer instance
10172 * @param Timer This parameter can be one of the following values:
10173 * @arg @ref LL_HRTIM_TIMER_A
10174 * @arg @ref LL_HRTIM_TIMER_B
10175 * @arg @ref LL_HRTIM_TIMER_C
10176 * @arg @ref LL_HRTIM_TIMER_D
10177 * @arg @ref LL_HRTIM_TIMER_E
10178 * @retval None
10179 */
10181 {
10186 }
10188 /**
10189 * @brief Indicate whether the output 1 set DMA request is enabled for a given timer.
10190 * @rmtoll TIMxDIER SET1DE LL_HRTIM_IsEnabledDMAReq_SET1
10191 * @param HRTIMx High Resolution Timer instance
10192 * @param Timer This parameter can be one of the following values:
10193 * @arg @ref LL_HRTIM_TIMER_A
10194 * @arg @ref LL_HRTIM_TIMER_B
10195 * @arg @ref LL_HRTIM_TIMER_C
10196 * @arg @ref LL_HRTIM_TIMER_D
10197 * @arg @ref LL_HRTIM_TIMER_E
10198 * @retval State of SET1xDE bit in HRTIM_TIMxDIER register (1 or 0).
10199 */
10201 {
10206 }
10208 /**
10209 * @brief Enable the output 1 reset DMA request for a given timer.
10210 * @rmtoll TIMxDIER RST1DE LL_HRTIM_EnableDMAReq_RST1
10211 * @param HRTIMx High Resolution Timer instance
10212 * @param Timer This parameter can be one of the following values:
10213 * @arg @ref LL_HRTIM_TIMER_A
10214 * @arg @ref LL_HRTIM_TIMER_B
10215 * @arg @ref LL_HRTIM_TIMER_C
10216 * @arg @ref LL_HRTIM_TIMER_D
10217 * @arg @ref LL_HRTIM_TIMER_E
10218 * @retval None
10219 */
10221 {
10226 }
10228 /**
10229 * @brief Disable the output 1 reset DMA request for a given timer.
10230 * @rmtoll TIMxDIER RST1DE LL_HRTIM_DisableDMAReq_RST1
10231 * @param HRTIMx High Resolution Timer instance
10232 * @param Timer This parameter can be one of the following values:
10233 * @arg @ref LL_HRTIM_TIMER_A
10234 * @arg @ref LL_HRTIM_TIMER_B
10235 * @arg @ref LL_HRTIM_TIMER_C
10236 * @arg @ref LL_HRTIM_TIMER_D
10237 * @arg @ref LL_HRTIM_TIMER_E
10238 * @retval None
10239 */
10241 {
10246 }
10248 /**
10249 * @brief Indicate whether the output 1 reset interrupt is enabled for a given timer.
10250 * @rmtoll TIMxDIER RST1DE LL_HRTIM_IsEnabledDMAReq_RST1
10251 * @param HRTIMx High Resolution Timer instance
10252 * @param Timer This parameter can be one of the following values:
10253 * @arg @ref LL_HRTIM_TIMER_A
10254 * @arg @ref LL_HRTIM_TIMER_B
10255 * @arg @ref LL_HRTIM_TIMER_C
10256 * @arg @ref LL_HRTIM_TIMER_D
10257 * @arg @ref LL_HRTIM_TIMER_E
10258 * @retval State of RST1xDE bit in HRTIM_TIMxDIER register (1 or 0).
10259 */
10261 {
10266 }
10268 /**
10269 * @brief Enable the output 2 set DMA request for a given timer.
10270 * @rmtoll TIMxDIER SET2DE LL_HRTIM_EnableDMAReq_SET2
10271 * @param HRTIMx High Resolution Timer instance
10272 * @param Timer This parameter can be one of the following values:
10273 * @arg @ref LL_HRTIM_TIMER_A
10274 * @arg @ref LL_HRTIM_TIMER_B
10275 * @arg @ref LL_HRTIM_TIMER_C
10276 * @arg @ref LL_HRTIM_TIMER_D
10277 * @arg @ref LL_HRTIM_TIMER_E
10278 * @retval None
10279 */
10281 {
10286 }
10288 /**
10289 * @brief Disable the output 2 set DMA request for a given timer.
10290 * @rmtoll TIMxDIER SET2DE LL_HRTIM_DisableDMAReq_SET2
10291 * @param HRTIMx High Resolution Timer instance
10292 * @param Timer This parameter can be one of the following values:
10293 * @arg @ref LL_HRTIM_TIMER_A
10294 * @arg @ref LL_HRTIM_TIMER_B
10295 * @arg @ref LL_HRTIM_TIMER_C
10296 * @arg @ref LL_HRTIM_TIMER_D
10297 * @arg @ref LL_HRTIM_TIMER_E
10298 * @retval None
10299 */
10301 {
10306 }
10308 /**
10309 * @brief Indicate whether the output 2 set DMA request is enabled for a given timer.
10310 * @rmtoll TIMxDIER SET2DE LL_HRTIM_IsEnabledDMAReq_SET2
10311 * @param HRTIMx High Resolution Timer instance
10312 * @param Timer This parameter can be one of the following values:
10313 * @arg @ref LL_HRTIM_TIMER_A
10314 * @arg @ref LL_HRTIM_TIMER_B
10315 * @arg @ref LL_HRTIM_TIMER_C
10316 * @arg @ref LL_HRTIM_TIMER_D
10317 * @arg @ref LL_HRTIM_TIMER_E
10318 * @retval State of SET2xDE bit in HRTIM_TIMxDIER register (1 or 0).
10319 */
10321 {
10326 }
10328 /**
10329 * @brief Enable the output 2 reset DMA request for a given timer.
10330 * @rmtoll TIMxDIER RST2DE LL_HRTIM_EnableDMAReq_RST2
10331 * @param HRTIMx High Resolution Timer instance
10332 * @param Timer This parameter can be one of the following values:
10333 * @arg @ref LL_HRTIM_TIMER_A
10334 * @arg @ref LL_HRTIM_TIMER_B
10335 * @arg @ref LL_HRTIM_TIMER_C
10336 * @arg @ref LL_HRTIM_TIMER_D
10337 * @arg @ref LL_HRTIM_TIMER_E
10338 * @retval None
10339 */
10341 {
10346 }
10348 /**
10349 * @brief Disable the output 2 reset DMA request for a given timer.
10350 * @rmtoll TIMxDIER RST2DE LL_HRTIM_DisableDMAReq_RST2
10351 * @param HRTIMx High Resolution Timer instance
10352 * @param Timer This parameter can be one of the following values:
10353 * @arg @ref LL_HRTIM_TIMER_A
10354 * @arg @ref LL_HRTIM_TIMER_B
10355 * @arg @ref LL_HRTIM_TIMER_C
10356 * @arg @ref LL_HRTIM_TIMER_D
10357 * @arg @ref LL_HRTIM_TIMER_E
10358 * @retval None
10359 */
10361 {
10366 }
10368 /**
10369 * @brief Indicate whether the output 2 reset DMA request is enabled for a given timer.
10370 * @rmtoll TIMxDIER RST2DE LL_HRTIM_IsEnabledDMAReq_RST2
10371 * @param HRTIMx High Resolution Timer instance
10372 * @param Timer This parameter can be one of the following values:
10373 * @arg @ref LL_HRTIM_TIMER_A
10374 * @arg @ref LL_HRTIM_TIMER_B
10375 * @arg @ref LL_HRTIM_TIMER_C
10376 * @arg @ref LL_HRTIM_TIMER_D
10377 * @arg @ref LL_HRTIM_TIMER_E
10378 * @retval State of RST2xDE bit in HRTIM_TIMxDIER register (1 or 0).
10379 */
10381 {
10386 }
10388 /**
10389 * @brief Enable the reset/roll-over DMA request for a given timer.
10390 * @rmtoll TIMxDIER RSTDE LL_HRTIM_EnableDMAReq_RST
10391 * @param HRTIMx High Resolution Timer instance
10392 * @param Timer This parameter can be one of the following values:
10393 * @arg @ref LL_HRTIM_TIMER_A
10394 * @arg @ref LL_HRTIM_TIMER_B
10395 * @arg @ref LL_HRTIM_TIMER_C
10396 * @arg @ref LL_HRTIM_TIMER_D
10397 * @arg @ref LL_HRTIM_TIMER_E
10398 * @retval None
10399 */
10401 {
10406 }
10408 /**
10409 * @brief Disable the reset/roll-over DMA request for a given timer.
10410 * @rmtoll TIMxDIER RSTDE LL_HRTIM_DisableDMAReq_RST
10411 * @param HRTIMx High Resolution Timer instance
10412 * @param Timer This parameter can be one of the following values:
10413 * @arg @ref LL_HRTIM_TIMER_A
10414 * @arg @ref LL_HRTIM_TIMER_B
10415 * @arg @ref LL_HRTIM_TIMER_C
10416 * @arg @ref LL_HRTIM_TIMER_D
10417 * @arg @ref LL_HRTIM_TIMER_E
10418 * @retval None
10419 */
10421 {
10426 }
10428 /**
10429 * @brief Indicate whether the reset/roll-over DMA request is enabled for a given timer.
10430 * @rmtoll TIMxDIER RSTDE LL_HRTIM_IsEnabledDMAReq_RST
10431 * @param HRTIMx High Resolution Timer instance
10432 * @param Timer This parameter can be one of the following values:
10433 * @arg @ref LL_HRTIM_TIMER_A
10434 * @arg @ref LL_HRTIM_TIMER_B
10435 * @arg @ref LL_HRTIM_TIMER_C
10436 * @arg @ref LL_HRTIM_TIMER_D
10437 * @arg @ref LL_HRTIM_TIMER_E
10438 * @retval State of RSTDE bit in HRTIM_TIMxDIER register (1 or 0).
10439 */
10441 {
10446 }
10448 /**
10449 * @brief Enable the delayed protection DMA request for a given timer.
10450 * @rmtoll TIMxDIER DLYPRTDE LL_HRTIM_EnableDMAReq_DLYPRT
10451 * @param HRTIMx High Resolution Timer instance
10452 * @param Timer This parameter can be one of the following values:
10453 * @arg @ref LL_HRTIM_TIMER_A
10454 * @arg @ref LL_HRTIM_TIMER_B
10455 * @arg @ref LL_HRTIM_TIMER_C
10456 * @arg @ref LL_HRTIM_TIMER_D
10457 * @arg @ref LL_HRTIM_TIMER_E
10458 * @retval None
10459 */
10461 {
10466 }
10468 /**
10469 * @brief Disable the delayed protection DMA request for a given timer.
10470 * @rmtoll TIMxDIER DLYPRTDE LL_HRTIM_DisableDMAReq_DLYPRT
10471 * @param HRTIMx High Resolution Timer instance
10472 * @param Timer This parameter can be one of the following values:
10473 * @arg @ref LL_HRTIM_TIMER_A
10474 * @arg @ref LL_HRTIM_TIMER_B
10475 * @arg @ref LL_HRTIM_TIMER_C
10476 * @arg @ref LL_HRTIM_TIMER_D
10477 * @arg @ref LL_HRTIM_TIMER_E
10478 * @retval None
10479 */
10481 {
10486 }
10488 /**
10489 * @brief Indicate whether the delayed protection DMA request is enabled for a given timer.
10490 * @rmtoll TIMxDIER DLYPRTDE LL_HRTIM_IsEnabledDMAReq_DLYPRT
10491 * @param HRTIMx High Resolution Timer instance
10492 * @param Timer This parameter can be one of the following values:
10493 * @arg @ref LL_HRTIM_TIMER_A
10494 * @arg @ref LL_HRTIM_TIMER_B
10495 * @arg @ref LL_HRTIM_TIMER_C
10496 * @arg @ref LL_HRTIM_TIMER_D
10497 * @arg @ref LL_HRTIM_TIMER_E
10498 * @retval State of DLYPRTDE bit in HRTIM_TIMxDIER register (1 or 0).
10499 */
10500 __STATIC_INLINE uint32_t LL_HRTIM_IsEnabledDMAReq_DLYPRT(HRTIM_TypeDef *HRTIMx, uint32_t Timer)
10501 {
10506 }
10508 /**
10509 * @}
10510 */
10512 #if defined(USE_FULL_LL_DRIVER)
10513 /** @defgroup HRTIM_LL_EF_Init Initialisation and deinitialisation functions
10514 * @{
10515 */
10517 /**
10518 * @}
10519 */
10522 /**
10523 * @}
10524 */
10526 /**
10527 * @}
10528 */
10532 /**
10533 * @}
10534 */
10536 #ifdef __cplusplus
10537 }
10538 #endif
10542 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/