lib/main/STM32F3/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_hal_cec.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f3xx_hal_cec.c
   4   * @author  MCD Application Team
   5   * @brief   CEC HAL module driver.
   6   *          This file provides firmware functions to manage the following
   7   *          functionalities of the High Definition Multimedia Interface
   8   *          Consumer Electronics Control Peripheral (CEC).
   9   *           + Initialization and de-initialization functions
  10   *           + IO operation functions
  11   *           + Peripheral Control functions
  12   *
  13   *
  14   @verbatim
  15  ===============================================================================
  16                         ##### How to use this driver #####
  17  ===============================================================================
  18     [..]
  19     The CEC HAL driver can be used as follow:
  20
  21     (#) Declare a CEC_HandleTypeDef handle structure.
  22     (#) Initialize the CEC low level resources by implementing the HAL_CEC_MspInit ()API:
  23         (##) Enable the CEC interface clock.
  24         (##) CEC pins configuration:
  25             (+) Enable the clock for the CEC GPIOs.
  26             (+) Configure these CEC pins as alternate function pull-up.
  27         (##) NVIC configuration if you need to use interrupt process (HAL_CEC_Transmit_IT()
  28              and HAL_CEC_Receive_IT() APIs):
  29             (+) Configure the CEC interrupt priority.
  30             (+) Enable the NVIC CEC IRQ handle.
  31             (@) The specific CEC interrupts (Transmission complete interrupt,
  32                 RXNE interrupt and Error Interrupts) will be managed using the macros
  33                 __HAL_CEC_ENABLE_IT() and __HAL_CEC_DISABLE_IT() inside the transmit
  34                 and receive process.
  35
  36     (#) Program the Signal Free Time (SFT) and SFT option, Tolerance, reception stop in
  37         in case of Bit Rising Error, Error-Bit generation conditions, device logical
  38         address and Listen mode in the hcec Init structure.
  39
  40     (#) Initialize the CEC registers by calling the HAL_CEC_Init() API.
  41
  42     (@) This API (HAL_CEC_Init()) configures also the low level Hardware GPIO, CLOCK, CORTEX...etc)
  43         by calling the customed HAL_CEC_MspInit() API.
  44
  45   @endverbatim
  46   ******************************************************************************
  47   * @attention
  48   *
  49   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  50   *
  51   * Redistribution and use in source and binary forms, with or without modification,
  52   * are permitted provided that the following conditions are met:
  53   *   1. Redistributions of source code must retain the above copyright notice,
  54   *      this list of conditions and the following disclaimer.
  55   *   2. Redistributions in binary form must reproduce the above copyright notice,
  56   *      this list of conditions and the following disclaimer in the documentation
  57   *      and/or other materials provided with the distribution.
  58   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  59   *      may be used to endorse or promote products derived from this software
  60   *      without specific prior written permission.
  61   *
  62   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  63   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  64   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  65   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  66   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  67   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  68   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  69   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  70   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  71   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  72   *
  73   ******************************************************************************
  74   */
  75
  76 /* Includes ------------------------------------------------------------------*/
  77 #include "stm32f3xx_hal.h"
  78
  79 /** @addtogroup STM32F3xx_HAL_Driver
  80   * @{
  81   */
  82
  83 #ifdef HAL_CEC_MODULE_ENABLED
  84
  85 #if defined(STM32F373xC) || defined(STM32F378xx)
  86 /** @defgroup CEC CEC
  87   * @brief HAL CEC module driver
  88   * @{
  89   */
  90
  91 /* Private typedef -----------------------------------------------------------*/
  92 /* Private define ------------------------------------------------------------*/
  93 /** @defgroup CEC_Private_Constants CEC Private Constants
  94   * @{
  95   */
  96 /**
  97   * @}
  98   */
  99
 100 /* Private macro -------------------------------------------------------------*/
 101 /* Private variables ---------------------------------------------------------*/
 102 /* Private function prototypes -----------------------------------------------*/
 103 /** @defgroup CEC_Private_Functions CEC Private Functions
 104   * @{
 105   */
 106 /**
 107   * @}
 108   */
 109
 110 /* Exported functions ---------------------------------------------------------*/
 111
 112 /** @defgroup CEC_Exported_Functions CEC Exported Functions
 113   * @{
 114   */
 115
 116 /** @defgroup CEC_Exported_Functions_Group1 Initialization and de-initialization functions
 117   *  @brief    Initialization and Configuration functions
 118   *
 119 @verbatim
 120 ===============================================================================
 121             ##### Initialization and Configuration functions #####
 122  ===============================================================================
 123     [..]
 124     This subsection provides a set of functions allowing to initialize the CEC
 125       (+) The following parameters need to be configured:
 126         (++) SignalFreeTime
 127         (++) Tolerance
 128         (++) BRERxStop                 (RX stopped or not upon Bit Rising Error)
 129         (++) BREErrorBitGen            (Error-Bit generation in case of Bit Rising Error)
 130         (++) LBPEErrorBitGen           (Error-Bit generation in case of Long Bit Period Error)
 131         (++) BroadcastMsgNoErrorBitGen (Error-bit generation in case of broadcast message error)
 132         (++) SignalFreeTimeOption      (SFT Timer start definition)
 133         (++) OwnAddress                (CEC device address)
 134         (++) ListenMode
 135
 136 @endverbatim
 137   * @{
 138   */
 139
 140 /**
 141   * @brief Initializes the CEC mode according to the specified
 142   *         parameters in the CEC_InitTypeDef and creates the associated handle .
 143   * @param hcec CEC handle
 144   * @retval HAL status
 145   */
 146 HAL_StatusTypeDef HAL_CEC_Init(CEC_HandleTypeDef *hcec)
 147 {
 148   /* Check the CEC handle allocation */
 149   if((hcec == NULL) ||(hcec->Init.RxBuffer == NULL))
 150   {
 151     return HAL_ERROR;
 152   }
 153
 154   /* Check the parameters */
 155   assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
 156   assert_param(IS_CEC_SIGNALFREETIME(hcec->Init.SignalFreeTime));
 157   assert_param(IS_CEC_TOLERANCE(hcec->Init.Tolerance));
 158   assert_param(IS_CEC_BRERXSTOP(hcec->Init.BRERxStop));
 159   assert_param(IS_CEC_BREERRORBITGEN(hcec->Init.BREErrorBitGen));
 160   assert_param(IS_CEC_LBPEERRORBITGEN(hcec->Init.LBPEErrorBitGen));
 161   assert_param(IS_CEC_BROADCASTERROR_NO_ERRORBIT_GENERATION(hcec->Init.BroadcastMsgNoErrorBitGen));
 162   assert_param(IS_CEC_SFTOP(hcec->Init.SignalFreeTimeOption));
 163   assert_param(IS_CEC_LISTENING_MODE(hcec->Init.ListenMode));
 164   assert_param(IS_CEC_OWN_ADDRESS(hcec->Init.OwnAddress));
 165
 166   if(hcec->gState == HAL_CEC_STATE_RESET)
 167   {
 168     /* Allocate lock resource and initialize it */
 169     hcec->Lock = HAL_UNLOCKED;
 170     /* Init the low level hardware : GPIO, CLOCK */
 171     HAL_CEC_MspInit(hcec);
 172   }
 173   hcec->gState = HAL_CEC_STATE_BUSY;
 174
 175   /* Disable the Peripheral */
 176   __HAL_CEC_DISABLE(hcec);
 177
 178   /* Write to CEC Control Register */
 179   hcec->Instance->CFGR = hcec->Init.SignalFreeTime | hcec->Init.Tolerance | hcec->Init.BRERxStop|\
 180                          hcec->Init.BREErrorBitGen | hcec->Init.LBPEErrorBitGen | hcec->Init.BroadcastMsgNoErrorBitGen |\
 181                          hcec->Init.SignalFreeTimeOption |((uint32_t)(hcec->Init.OwnAddress)<<16U) |\
 182                          hcec->Init.ListenMode;
 183
 184   /* Enable the following CEC Transmission/Reception interrupts as
 185    * well as the following CEC Transmission/Reception Errors interrupts
 186    * Rx Byte Received IT
 187    * End of Reception IT
 188    * Rx overrun
 189    * Rx bit rising error
 190    * Rx short bit period error
 191    * Rx long bit period error
 192    * Rx missing acknowledge
 193    * Tx Byte Request IT
 194    * End of Transmission IT
 195    * Tx Missing Acknowledge IT
 196    * Tx-Error IT
 197    * Tx-Buffer Underrun IT
 198    * Tx arbitration lost   */
 199  __HAL_CEC_ENABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
 200
 201   /* Enable the CEC Peripheral */
 202   __HAL_CEC_ENABLE(hcec);
 203
 204   hcec->ErrorCode = HAL_CEC_ERROR_NONE;
 205   hcec->gState = HAL_CEC_STATE_READY;
 206   hcec->RxState = HAL_CEC_STATE_READY;
 207
 208   return HAL_OK;
 209 }
 210
 211 /**
 212   * @brief DeInitializes the CEC peripheral
 213   * @param hcec CEC handle
 214   * @retval HAL status
 215   */
 216 HAL_StatusTypeDef HAL_CEC_DeInit(CEC_HandleTypeDef *hcec)
 217 {
 218   /* Check the CEC handle allocation */
 219   if(hcec == NULL)
 220   {
 221     return HAL_ERROR;
 222   }
 223
 224   /* Check the parameters */
 225   assert_param(IS_CEC_ALL_INSTANCE(hcec->Instance));
 226
 227   hcec->gState = HAL_CEC_STATE_BUSY;
 228
 229   /* DeInit the low level hardware */
 230   HAL_CEC_MspDeInit(hcec);
 231   /* Disable the Peripheral */
 232   __HAL_CEC_DISABLE(hcec);
 233
 234   /* Clear Flags */
 235   __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXEND|CEC_FLAG_TXBR|CEC_FLAG_RXBR|CEC_FLAG_RXEND|CEC_ISR_ALL_ERROR);
 236
 237   /* Disable the following CEC Transmission/Reception interrupts as
 238    * well as the following CEC Transmission/Reception Errors interrupts
 239    * Rx Byte Received IT
 240    * End of Reception IT
 241    * Rx overrun
 242    * Rx bit rising error
 243    * Rx short bit period error
 244    * Rx long bit period error
 245    * Rx missing acknowledge
 246    * Tx Byte Request IT
 247    * End of Transmission IT
 248    * Tx Missing Acknowledge IT
 249    * Tx-Error IT
 250    * Tx-Buffer Underrun IT
 251    * Tx arbitration lost   */
 252   __HAL_CEC_DISABLE_IT(hcec, CEC_IT_RXBR|CEC_IT_RXEND|CEC_IER_RX_ALL_ERR|CEC_IT_TXBR|CEC_IT_TXEND|CEC_IER_TX_ALL_ERR);
 253
 254   hcec->ErrorCode = HAL_CEC_ERROR_NONE;
 255   hcec->gState = HAL_CEC_STATE_RESET;
 256   hcec->RxState = HAL_CEC_STATE_RESET;
 257
 258   /* Process Unlock */
 259   __HAL_UNLOCK(hcec);
 260
 261   return HAL_OK;
 262 }
 263
 264 /**
 265   * @brief Initializes the Own Address of the CEC device
 266   * @param hcec CEC handle
 267   * @param  CEC_OwnAddress The CEC own address.
 268   * @retval HAL status
 269   */
 270 HAL_StatusTypeDef HAL_CEC_SetDeviceAddress(CEC_HandleTypeDef *hcec, uint16_t CEC_OwnAddress)
 271 {
 272   /* Check the parameters */
 273   assert_param(IS_CEC_OWN_ADDRESS(CEC_OwnAddress));
 274
 275   if ((hcec->gState == HAL_CEC_STATE_READY) && (hcec->RxState == HAL_CEC_STATE_READY))
 276   {
 277     /* Process Locked */
 278     __HAL_LOCK(hcec);
 279
 280     hcec->gState = HAL_CEC_STATE_BUSY;
 281
 282     /* Disable the Peripheral */
 283     __HAL_CEC_DISABLE(hcec);
 284
 285     if(CEC_OwnAddress != CEC_OWN_ADDRESS_NONE)
 286     {
 287       hcec->Instance->CFGR |= ((uint32_t)CEC_OwnAddress<<16U);
 288     }
 289     else
 290     {
 291       hcec->Instance->CFGR &= ~(CEC_CFGR_OAR);
 292     }
 293
 294     hcec->gState = HAL_CEC_STATE_READY;
 295     hcec->ErrorCode = HAL_CEC_ERROR_NONE;
 296
 297     /* Process Unlocked */
 298     __HAL_UNLOCK(hcec);
 299
 300     /* Enable the Peripheral */
 301     __HAL_CEC_ENABLE(hcec);
 302
 303     return  HAL_OK;
 304   }
 305   else
 306   {
 307     return HAL_BUSY;
 308   }
 309 }
 310
 311 /**
 312   * @brief CEC MSP Init
 313   * @param hcec CEC handle
 314   * @retval None
 315   */
 316  __weak void HAL_CEC_MspInit(CEC_HandleTypeDef *hcec)
 317 {
 318   /* Prevent unused argument(s) compilation warning */
 319   UNUSED(hcec);
 320   /* NOTE : This function should not be modified, when the callback is needed,
 321             the HAL_CEC_MspInit can be implemented in the user file
 322    */
 323 }
 324
 325 /**
 326   * @brief CEC MSP DeInit
 327   * @param hcec CEC handle
 328   * @retval None
 329   */
 330  __weak void HAL_CEC_MspDeInit(CEC_HandleTypeDef *hcec)
 331 {
 332   /* Prevent unused argument(s) compilation warning */
 333   UNUSED(hcec);
 334   /* NOTE : This function should not be modified, when the callback is needed,
 335             the HAL_CEC_MspDeInit can be implemented in the user file
 336    */
 337 }
 338
 339 /**
 340   * @}
 341   */
 342
 343 /** @defgroup CEC_Exported_Functions_Group2 Input and Output operation functions
 344   *  @brief CEC Transmit/Receive functions
 345   *
 346 @verbatim
 347  ===============================================================================
 348                       ##### IO operation functions #####
 349  ===============================================================================
 350     This subsection provides a set of functions allowing to manage the CEC data transfers.
 351
 352     (#) The CEC handle must contain the initiator (TX side) and the destination (RX side)
 353         logical addresses (4-bit long addresses, 0x0F for broadcast messages destination)
 354
 355     (#) The communication is performed using Interrupts.
 356            These API's return the HAL status.
 357            The end of the data processing will be indicated through the
 358            dedicated CEC IRQ when using Interrupt mode.
 359            The HAL_CEC_TxCpltCallback(), HAL_CEC_RxCpltCallback() user callbacks
 360            will be executed respectivelly at the end of the transmit or Receive process
 361            The HAL_CEC_ErrorCallback()user callback will be executed when a communication
 362            error is detected
 363
 364     (#) API's with Interrupt are :
 365          (+) HAL_CEC_Transmit_IT()
 366          (+) HAL_CEC_IRQHandler()
 367
 368     (#) A set of User Callbacks are provided:
 369          (+) HAL_CEC_TxCpltCallback()
 370          (+) HAL_CEC_RxCpltCallback()
 371          (+) HAL_CEC_ErrorCallback()
 372
 373 @endverbatim
 374   * @{
 375   */
 376
 377 /**
 378   * @brief Send data in interrupt mode
 379   * @param hcec CEC handle
 380   * @param InitiatorAddress Initiator address
 381   * @param DestinationAddress destination logical address
 382   * @param pData pointer to input byte data buffer
 383   * @param Size amount of data to be sent in bytes (without counting the header).
 384   *              0 means only the header is sent (ping operation).
 385   *              Maximum TX size is 15 bytes (1 opcode and up to 14 operands).
 386   * @retval HAL status
 387   */
 388 HAL_StatusTypeDef HAL_CEC_Transmit_IT(CEC_HandleTypeDef *hcec, uint8_t InitiatorAddress, uint8_t DestinationAddress, uint8_t *pData, uint32_t Size)
 389 {
 390   /* if the IP isn't already busy and if there is no previous transmission
 391      already pending due to arbitration lost */
 392   if (hcec->gState == HAL_CEC_STATE_READY)
 393   {
 394     if((pData == NULL ) && (Size > 0U))
 395     {
 396       return  HAL_ERROR;
 397     }
 398
 399     assert_param(IS_CEC_ADDRESS(DestinationAddress));
 400     assert_param(IS_CEC_ADDRESS(InitiatorAddress));
 401     assert_param(IS_CEC_MSGSIZE(Size));
 402
 403     /* Process Locked */
 404     __HAL_LOCK(hcec);
 405     hcec->pTxBuffPtr = pData;
 406     hcec->gState = HAL_CEC_STATE_BUSY_TX;
 407     hcec->ErrorCode = HAL_CEC_ERROR_NONE;
 408
 409     /* initialize the number of bytes to send,
 410      * 0 means only one header is sent (ping operation) */
 411     hcec->TxXferCount = Size;
 412
 413     /* in case of no payload (Size = 0U), sender is only pinging the system;
 414        Set TX End of Message (TXEOM) bit, must be set before writing data to TXDR */
 415     if (Size == 0U)
 416     {
 417       __HAL_CEC_LAST_BYTE_TX_SET(hcec);
 418     }
 419
 420     /* send header block */
 421     hcec->Instance->TXDR = ((uint8_t)(InitiatorAddress << CEC_INITIATOR_LSB_POS) |(uint8_t) DestinationAddress);
 422     /* Set TX Start of Message  (TXSOM) bit */
 423     __HAL_CEC_FIRST_BYTE_TX_SET(hcec);
 424
 425     /* Process Unlocked */
 426     __HAL_UNLOCK(hcec);
 427
 428     return HAL_OK;
 429
 430   }
 431   else
 432   {
 433     return HAL_BUSY;
 434   }
 435 }
 436
 437 /**
 438   * @brief Get size of the received frame.
 439   * @param hcec CEC handle
 440   * @retval Frame size
 441   */
 442 uint32_t HAL_CEC_GetLastReceivedFrameSize(CEC_HandleTypeDef *hcec)
 443 {
 444   return hcec->RxXferSize;
 445 }
 446
 447 /**
 448   * @brief Change Rx Buffer.
 449   * @param hcec CEC handle
 450   * @param Rxbuffer Rx Buffer
 451   * @note  This function can be called only inside the HAL_CEC_RxCpltCallback()
 452   * @retval Frame size
 453   */
 454 void HAL_CEC_ChangeRxBuffer(CEC_HandleTypeDef *hcec, uint8_t* Rxbuffer)
 455 {
 456   hcec->Init.RxBuffer = Rxbuffer;
 457 }
 458
 459 /**
 460   * @brief This function handles CEC interrupt requests.
 461   * @param hcec CEC handle
 462   * @retval None
 463   */
 464 void HAL_CEC_IRQHandler(CEC_HandleTypeDef *hcec)
 465 {
 466
 467   /* save interrupts register for further error or interrupts handling purposes */
 468   uint32_t reg = 0U;
 469   reg = hcec->Instance->ISR;
 470
 471
 472   /* ----------------------------Arbitration Lost Management----------------------------------*/
 473   /* CEC TX arbitration error interrupt occurred --------------------------------------*/
 474   if((reg & CEC_FLAG_ARBLST) != RESET)
 475   {
 476     hcec->ErrorCode = HAL_CEC_ERROR_ARBLST;
 477     __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_ARBLST);
 478   }
 479
 480   /* ----------------------------Rx Management----------------------------------*/
 481   /* CEC RX byte received interrupt  ---------------------------------------------------*/
 482   if((reg & CEC_FLAG_RXBR) != RESET)
 483   {
 484     /* reception is starting */
 485     hcec->RxState = HAL_CEC_STATE_BUSY_RX;
 486     hcec->RxXferSize++;
 487     /* read received byte */
 488     *hcec->Init.RxBuffer++ = hcec->Instance->RXDR;
 489     __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXBR);
 490   }
 491
 492   /* CEC RX end received interrupt  ---------------------------------------------------*/
 493   if((reg & CEC_FLAG_RXEND) != RESET)
 494   {
 495     /* clear IT */
 496     __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_RXEND);
 497
 498     /* Rx process is completed, restore hcec->RxState to Ready */
 499     hcec->RxState = HAL_CEC_STATE_READY;
 500     hcec->ErrorCode = HAL_CEC_ERROR_NONE;
 501     hcec->Init.RxBuffer -= hcec->RxXferSize;
 502     HAL_CEC_RxCpltCallback(hcec, hcec->RxXferSize);
 503     hcec->RxXferSize = 0U;
 504   }
 505
 506   /* ----------------------------Tx Management----------------------------------*/
 507   /* CEC TX byte request interrupt ------------------------------------------------*/
 508   if((reg & CEC_FLAG_TXBR) != RESET)
 509   {
 510     if (hcec->TxXferCount == 0U)
 511     {
 512       /* if this is the last byte transmission, set TX End of Message (TXEOM) bit */
 513       __HAL_CEC_LAST_BYTE_TX_SET(hcec);
 514       hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
 515     }
 516     else
 517     {
 518       hcec->Instance->TXDR = *hcec->pTxBuffPtr++;
 519       hcec->TxXferCount--;
 520     }
 521     /* clear Tx-Byte request flag */
 522     __HAL_CEC_CLEAR_FLAG(hcec,CEC_FLAG_TXBR);
 523   }
 524
 525   /* CEC TX end interrupt ------------------------------------------------*/
 526   if((reg & CEC_FLAG_TXEND) != RESET)
 527   {
 528     __HAL_CEC_CLEAR_FLAG(hcec, CEC_FLAG_TXEND);
 529
 530     /* Tx process is ended, restore hcec->gState to Ready */
 531     hcec->gState = HAL_CEC_STATE_READY;
 532     /* Call the Process Unlocked before calling the Tx call back API to give the possibility to
 533     start again the Transmission under the Tx call back API */
 534     __HAL_UNLOCK(hcec);
 535     hcec->ErrorCode = HAL_CEC_ERROR_NONE;
 536     HAL_CEC_TxCpltCallback(hcec);
 537   }
 538
 539   /* ----------------------------Rx/Tx Error Management----------------------------------*/
 540   if ((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE|CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != 0U)
 541   {
 542     hcec->ErrorCode = reg;
 543     __HAL_CEC_CLEAR_FLAG(hcec, HAL_CEC_ERROR_RXOVR|HAL_CEC_ERROR_BRE|CEC_FLAG_LBPE|CEC_FLAG_SBPE|HAL_CEC_ERROR_RXACKE|HAL_CEC_ERROR_TXUDR|HAL_CEC_ERROR_TXERR|HAL_CEC_ERROR_TXACKE);
 544
 545
 546     if((reg & (CEC_ISR_RXOVR|CEC_ISR_BRE|CEC_ISR_SBPE|CEC_ISR_LBPE|CEC_ISR_RXACKE)) != RESET)
 547     {
 548       hcec->Init.RxBuffer-=hcec->RxXferSize;
 549       hcec->RxXferSize = 0U;
 550       hcec->RxState = HAL_CEC_STATE_READY;
 551     }
 552     else if (((reg & (CEC_ISR_TXUDR|CEC_ISR_TXERR|CEC_ISR_TXACKE)) != RESET) && ((reg & CEC_ISR_ARBLST) == RESET))
 553     {
 554       /* Set the CEC state ready to be able to start again the process */
 555       hcec->gState = HAL_CEC_STATE_READY;
 556     }
 557
 558     /* Error  Call Back */
 559     HAL_CEC_ErrorCallback(hcec);
 560   }
 561
 562 }
 563
 564 /**
 565   * @brief Tx Transfer completed callback
 566   * @param hcec CEC handle
 567   * @retval None
 568   */
 569  __weak void HAL_CEC_TxCpltCallback(CEC_HandleTypeDef *hcec)
 570 {
 571   /* Prevent unused argument(s) compilation warning */
 572   UNUSED(hcec);
 573   /* NOTE : This function should not be modified, when the callback is needed,
 574             the HAL_CEC_TxCpltCallback can be implemented in the user file
 575    */
 576 }
 577
 578 /**
 579   * @brief Rx Transfer completed callback
 580   * @param hcec CEC handle
 581   * @param RxFrameSize Size of frame
 582   * @retval None
 583   */
 584 __weak void HAL_CEC_RxCpltCallback(CEC_HandleTypeDef *hcec, uint32_t RxFrameSize)
 585 {
 586   /* Prevent unused argument(s) compilation warning */
 587   UNUSED(hcec);
 588   UNUSED(RxFrameSize);
 589   /* NOTE : This function should not be modified, when the callback is needed,
 590             the HAL_CEC_RxCpltCallback can be implemented in the user file
 591    */
 592 }
 593
 594 /**
 595   * @brief CEC error callbacks
 596   * @param hcec CEC handle
 597   * @retval None
 598   */
 599  __weak void HAL_CEC_ErrorCallback(CEC_HandleTypeDef *hcec)
 600 {
 601   /* Prevent unused argument(s) compilation warning */
 602   UNUSED(hcec);
 603   /* NOTE : This function should not be modified, when the callback is needed,
 604             the HAL_CEC_ErrorCallback can be implemented in the user file
 605    */
 606 }
 607 /**
 608   * @}
 609   */
 610
 611 /** @defgroup CEC_Exported_Functions_Group3 Peripheral Control function
 612   *  @brief   CEC control functions
 613   *
 614 @verbatim
 615  ===============================================================================
 616                       ##### Peripheral Control function #####
 617  ===============================================================================
 618     [..]
 619     This subsection provides a set of functions allowing to control the CEC.
 620      (+) HAL_CEC_GetState() API can be helpful to check in run-time the state of the CEC peripheral.
 621          (+) HAL_CEC_GetError() API can be helpful to check in run-time the error of the CEC peripheral.
 622 @endverbatim
 623   * @{
 624   */
 625 /**
 626   * @brief return the CEC state
 627   * @param hcec pointer to a CEC_HandleTypeDef structure that contains
 628   *              the configuration information for the specified CEC module.
 629   * @retval HAL state
 630   */
 631 HAL_CEC_StateTypeDef HAL_CEC_GetState(CEC_HandleTypeDef *hcec)
 632 {
 633   uint32_t temp1 = 0x00U, temp2 = 0x00U;
 634   temp1 = hcec->gState;
 635   temp2 = hcec->RxState;
 636
 637   return (HAL_CEC_StateTypeDef)(temp1 | temp2);
 638 }
 639
 640 /**
 641   * @brief  Return the CEC error code
 642   * @param  hcec pointer to a CEC_HandleTypeDef structure that contains
 643   *              the configuration information for the specified CEC.
 644   * @retval CEC Error Code
 645   */
 646 uint32_t HAL_CEC_GetError(CEC_HandleTypeDef *hcec)
 647 {
 648   return hcec->ErrorCode;
 649 }
 650
 651 /**
 652   * @}
 653   */
 654
 655 /**
 656   * @}
 657   */
 658
 659
 660 #endif /* defined(STM32F373xC) || defined(STM32F378xx) */
 661
 662 #endif /* HAL_CEC_MODULE_ENABLED */
 663 /**
 664   * @}
 665   */
 666
 667 /**
 668   * @}
 669   */
 670
 671 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/