lib/main/STM32F3/Drivers/STM32F3xx_HAL_Driver/Src/stm32f3xx_ll_usart.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f3xx_ll_usart.c
   4   * @author  MCD Application Team
   5   * @brief   USART LL module driver.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; COPYRIGHT(c) 2016 STMicroelectronics</center></h2>
  10   *
  11   * Redistribution and use in source and binary forms, with or without modification,
  12   * are permitted provided that the following conditions are met:
  13   *   1. Redistributions of source code must retain the above copyright notice,
  14   *      this list of conditions and the following disclaimer.
  15   *   2. Redistributions in binary form must reproduce the above copyright notice,
  16   *      this list of conditions and the following disclaimer in the documentation
  17   *      and/or other materials provided with the distribution.
  18   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  19   *      may be used to endorse or promote products derived from this software
  20   *      without specific prior written permission.
  21   *
  22   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  23   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  24   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  25   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  26   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  27   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  28   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  29   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  30   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  31   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32   *
  33   ******************************************************************************
  34   */
  35 #if defined(USE_FULL_LL_DRIVER)
  36
  37 /* Includes ------------------------------------------------------------------*/
  38 #include "stm32f3xx_ll_usart.h"
  39 #include "stm32f3xx_ll_rcc.h"
  40 #include "stm32f3xx_ll_bus.h"
  41 #ifdef  USE_FULL_ASSERT
  42 #include "stm32_assert.h"
  43 #else
  44 #define assert_param(expr) ((void)0U)
  45 #endif
  46
  47 /** @addtogroup STM32F3xx_LL_Driver
  48   * @{
  49   */
  50
  51 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
  52
  53 /** @addtogroup USART_LL
  54   * @{
  55   */
  56
  57 /* Private types -------------------------------------------------------------*/
  58 /* Private variables ---------------------------------------------------------*/
  59 /* Private constants ---------------------------------------------------------*/
  60 /** @addtogroup USART_LL_Private_Constants
  61   * @{
  62   */
  63
  64 /**
  65   * @}
  66   */
  67
  68
  69 /* Private macros ------------------------------------------------------------*/
  70 /** @addtogroup USART_LL_Private_Macros
  71   * @{
  72   */
  73
  74 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
  75  *              divided by the smallest oversampling used on the USART (i.e. 8)    */
  76 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 9000000U)
  77
  78 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
  79 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
  80
  81 /* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */
  82 #define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
  83
  84 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
  85                                        || ((__VALUE__) == LL_USART_DIRECTION_RX) \
  86                                        || ((__VALUE__) == LL_USART_DIRECTION_TX) \
  87                                        || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
  88
  89 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
  90                                     || ((__VALUE__) == LL_USART_PARITY_EVEN) \
  91                                     || ((__VALUE__) == LL_USART_PARITY_ODD))
  92
  93 #if defined(USART_7BITS_SUPPORT)
  94 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
  95                                        || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  96                                        || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
  97 #else
  98 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  99                                        || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
 100 #endif
 101
 102 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
 103                                           || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
 104
 105 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
 106                                               || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
 107
 108 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
 109                                         || ((__VALUE__) == LL_USART_PHASE_2EDGE))
 110
 111 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
 112                                            || ((__VALUE__) == LL_USART_POLARITY_HIGH))
 113
 114 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
 115                                          || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
 116
 117 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
 118                                       || ((__VALUE__) == LL_USART_STOPBITS_1) \
 119                                       || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
 120                                       || ((__VALUE__) == LL_USART_STOPBITS_2))
 121
 122 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
 123                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
 124                                        || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
 125                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
 126
 127 /**
 128   * @}
 129   */
 130
 131 /* Private function prototypes -----------------------------------------------*/
 132
 133 /* Exported functions --------------------------------------------------------*/
 134 /** @addtogroup USART_LL_Exported_Functions
 135   * @{
 136   */
 137
 138 /** @addtogroup USART_LL_EF_Init
 139   * @{
 140   */
 141
 142 /**
 143   * @brief  De-initialize USART registers (Registers restored to their default values).
 144   * @param  USARTx USART Instance
 145   * @retval An ErrorStatus enumeration value:
 146   *          - SUCCESS: USART registers are de-initialized
 147   *          - ERROR: USART registers are not de-initialized
 148   */
 149 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
 150 {
 151   ErrorStatus status = SUCCESS;
 152
 153   /* Check the parameters */
 154   assert_param(IS_UART_INSTANCE(USARTx));
 155
 156   if (USARTx == USART1)
 157   {
 158     /* Force reset of USART clock */
 159     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
 160
 161     /* Release reset of USART clock */
 162     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
 163   }
 164   else if (USARTx == USART2)
 165   {
 166     /* Force reset of USART clock */
 167     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
 168
 169     /* Release reset of USART clock */
 170     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
 171   }
 172   else if (USARTx == USART3)
 173   {
 174     /* Force reset of USART clock */
 175     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
 176
 177     /* Release reset of USART clock */
 178     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
 179   }
 180 #if defined(UART4)
 181   else if (USARTx == UART4)
 182   {
 183     /* Force reset of UART clock */
 184     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
 185
 186     /* Release reset of UART clock */
 187     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
 188   }
 189 #endif /* UART4 */
 190 #if defined(UART5)
 191   else if (USARTx == UART5)
 192   {
 193     /* Force reset of UART clock */
 194     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
 195
 196     /* Release reset of UART clock */
 197     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
 198   }
 199 #endif /* UART5 */
 200   else
 201   {
 202     status = ERROR;
 203   }
 204
 205   return (status);
 206 }
 207
 208 /**
 209   * @brief  Initialize USART registers according to the specified
 210   *         parameters in USART_InitStruct.
 211   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 212   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 213   * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
 214   * @param  USARTx USART Instance
 215   * @param  USART_InitStruct pointer to a LL_USART_InitTypeDef structure
 216   *         that contains the configuration information for the specified USART peripheral.
 217   * @retval An ErrorStatus enumeration value:
 218   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
 219   *          - ERROR: Problem occurred during USART Registers initialization
 220   */
 221 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
 222 {
 223   ErrorStatus status = ERROR;
 224   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
 225 #if defined(STM32F303x8)||defined(STM32F334x8)||defined(STM32F328xx)||defined(STM32F301x8)||defined(STM32F302x8)||defined(STM32F318xx)
 226   LL_RCC_ClocksTypeDef RCC_Clocks;
 227 #endif
 228
 229   /* Check the parameters */
 230   assert_param(IS_UART_INSTANCE(USARTx));
 231   assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
 232   assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
 233   assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
 234   assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
 235   assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
 236   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
 237   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
 238
 239   /* USART needs to be in disabled state, in order to be able to configure some bits in
 240      CRx registers */
 241   if (LL_USART_IsEnabled(USARTx) == 0U)
 242   {
 243     /*---------------------------- USART CR1 Configuration ---------------------
 244      * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
 245      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
 246      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
 247      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
 248      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
 249      */
 250     MODIFY_REG(USARTx->CR1,
 251                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
 252                 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
 253                (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
 254                 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
 255
 256     /*---------------------------- USART CR2 Configuration ---------------------
 257      * Configure USARTx CR2 (Stop bits) with parameters:
 258      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
 259      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
 260      */
 261     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
 262
 263     /*---------------------------- USART CR3 Configuration ---------------------
 264      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
 265      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
 266      */
 267     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
 268
 269     /*---------------------------- USART BRR Configuration ---------------------
 270      * Retrieve Clock frequency used for USART Peripheral
 271      */
 272     if (USARTx == USART1)
 273     {
 274       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
 275     }
 276     else if (USARTx == USART2)
 277     {
 278 #if defined (RCC_CFGR3_USART2SW)
 279       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
 280 #else
 281       /* USART2 clock is PCLK */
 282       LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
 283       periphclk = RCC_Clocks.PCLK1_Frequency;
 284 #endif
 285     }
 286     else if (USARTx == USART3)
 287     {
 288 #if defined (RCC_CFGR3_USART3SW)
 289       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
 290 #else
 291       /* USART3 clock is PCLK */
 292       LL_RCC_GetSystemClocksFreq(&RCC_Clocks);
 293       periphclk = RCC_Clocks.PCLK1_Frequency;
 294 #endif
 295     }
 296 #if defined(UART4)
 297     else if (USARTx == UART4)
 298     {
 299       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
 300     }
 301 #endif /* UART4 */
 302 #if defined(UART5)
 303     else if (USARTx == UART5)
 304     {
 305       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
 306     }
 307 #endif /* UART5 */
 308     else
 309     {
 310       /* Nothing to do, as error code is already assigned to ERROR value */
 311     }
 312
 313     /* Configure the USART Baud Rate :
 314        - valid baud rate value (different from 0) is required
 315        - Peripheral clock as returned by RCC service, should be valid (different from 0).
 316     */
 317     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
 318         && (USART_InitStruct->BaudRate != 0U))
 319     {
 320       status = SUCCESS;
 321       LL_USART_SetBaudRate(USARTx,
 322                            periphclk,
 323                            USART_InitStruct->OverSampling,
 324                            USART_InitStruct->BaudRate);
 325
 326       /* Check BRR is greater than or equal to 16d */
 327       assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
 328
 329       /* Check BRR is greater than or equal to 16d */
 330       assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR));
 331     }
 332   }
 333   /* Endif (=> USART not in Disabled state => return ERROR) */
 334
 335   return (status);
 336 }
 337
 338 /**
 339   * @brief Set each @ref LL_USART_InitTypeDef field to default value.
 340   * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
 341   *                          whose fields will be set to default values.
 342   * @retval None
 343   */
 344
 345 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
 346 {
 347   /* Set USART_InitStruct fields to default values */
 348   USART_InitStruct->BaudRate            = 9600U;
 349   USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
 350   USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
 351   USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
 352   USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
 353   USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
 354   USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
 355 }
 356
 357 /**
 358   * @brief  Initialize USART Clock related settings according to the
 359   *         specified parameters in the USART_ClockInitStruct.
 360   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 361   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 362   * @param  USARTx USART Instance
 363   * @param  USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
 364   *         that contains the Clock configuration information for the specified USART peripheral.
 365   * @retval An ErrorStatus enumeration value:
 366   *          - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
 367   *          - ERROR: Problem occurred during USART Registers initialization
 368   */
 369 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 370 {
 371   ErrorStatus status = SUCCESS;
 372
 373   /* Check USART Instance and Clock signal output parameters */
 374   assert_param(IS_UART_INSTANCE(USARTx));
 375   assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
 376
 377   /* USART needs to be in disabled state, in order to be able to configure some bits in
 378      CRx registers */
 379   if (LL_USART_IsEnabled(USARTx) == 0U)
 380   {
 381     /*---------------------------- USART CR2 Configuration -----------------------*/
 382     /* If Clock signal has to be output */
 383     if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
 384     {
 385       /* Deactivate Clock signal delivery :
 386        * - Disable Clock Output:        USART_CR2_CLKEN cleared
 387        */
 388       LL_USART_DisableSCLKOutput(USARTx);
 389     }
 390     else
 391     {
 392       /* Ensure USART instance is USART capable */
 393       assert_param(IS_USART_INSTANCE(USARTx));
 394
 395       /* Check clock related parameters */
 396       assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
 397       assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
 398       assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
 399
 400       /*---------------------------- USART CR2 Configuration -----------------------
 401        * Configure USARTx CR2 (Clock signal related bits) with parameters:
 402        * - Enable Clock Output:         USART_CR2_CLKEN set
 403        * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
 404        * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
 405        * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
 406        */
 407       MODIFY_REG(USARTx->CR2,
 408                  USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
 409                  USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
 410                  USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
 411     }
 412   }
 413   /* Else (USART not in Disabled state => return ERROR */
 414   else
 415   {
 416     status = ERROR;
 417   }
 418
 419   return (status);
 420 }
 421
 422 /**
 423   * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
 424   * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
 425   *                               whose fields will be set to default values.
 426   * @retval None
 427   */
 428 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 429 {
 430   /* Set LL_USART_ClockInitStruct fields with default values */
 431   USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
 432   USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 433   USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 434   USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 435 }
 436
 437 /**
 438   * @}
 439   */
 440
 441 /**
 442   * @}
 443   */
 444
 445 /**
 446   * @}
 447   */
 448
 449 #endif /* USART1 || USART2|| USART3 || UART4 || UART5 */
 450
 451 /**
 452   * @}
 453   */
 454
 455 #endif /* USE_FULL_LL_DRIVER */
 456
 457 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 458