lib/main/STM32G4/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_dac.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32g4xx_hal_dac.h
   4   * @author  MCD Application Team
   5   * @brief   Header file of DAC HAL module.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19
  20 /* Define to prevent recursive inclusion -------------------------------------*/
  21 #ifndef STM32G4xx_HAL_DAC_H
  22 #define STM32G4xx_HAL_DAC_H
  23
  24 #ifdef __cplusplus
  25 extern "C" {
  26 #endif
  27
  28 /** @addtogroup STM32G4xx_HAL_Driver
  29   * @{
  30   */
  31
  32 /* Includes ------------------------------------------------------------------*/
  33 #include "stm32g4xx_hal_def.h"
  34
  35 #if defined(DAC1) || defined(DAC2) || defined(DAC3) ||defined (DAC4)
  36
  37 /** @addtogroup DAC
  38   * @{
  39   */
  40
  41 /* Exported types ------------------------------------------------------------*/
  42
  43 /** @defgroup DAC_Exported_Types DAC Exported Types
  44   * @{
  45   */
  46
  47 /**
  48   * @brief  HAL State structures definition
  49   */
  50 typedef enum
  51 {
  52   HAL_DAC_STATE_RESET             = 0x00U,  /*!< DAC not yet initialized or disabled  */
  53   HAL_DAC_STATE_READY             = 0x01U,  /*!< DAC initialized and ready for use    */
  54   HAL_DAC_STATE_BUSY              = 0x02U,  /*!< DAC internal processing is ongoing   */
  55   HAL_DAC_STATE_TIMEOUT           = 0x03U,  /*!< DAC timeout state                    */
  56   HAL_DAC_STATE_ERROR             = 0x04U   /*!< DAC error state                      */
  57
  58 } HAL_DAC_StateTypeDef;
  59
  60 /**
  61   * @brief  DAC handle Structure definition
  62   */
  63 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
  64 typedef struct __DAC_HandleTypeDef
  65 #else
  66 typedef struct
  67 #endif
  68 {
  69   DAC_TypeDef                 *Instance;     /*!< Register base address             */
  70
  71   __IO HAL_DAC_StateTypeDef   State;         /*!< DAC communication state           */
  72
  73   HAL_LockTypeDef             Lock;          /*!< DAC locking object                */
  74
  75   DMA_HandleTypeDef           *DMA_Handle1;  /*!< Pointer DMA handler for channel 1 */
  76
  77   DMA_HandleTypeDef           *DMA_Handle2;  /*!< Pointer DMA handler for channel 2 */
  78
  79   __IO uint32_t               ErrorCode;     /*!< DAC Error code                    */
  80
  81 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
  82   void (* ConvCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
  83   void (* ConvHalfCpltCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
  84   void (* ErrorCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
  85   void (* DMAUnderrunCallbackCh1)(struct __DAC_HandleTypeDef *hdac);
  86   void (* ConvCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
  87   void (* ConvHalfCpltCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
  88   void (* ErrorCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
  89   void (* DMAUnderrunCallbackCh2)(struct __DAC_HandleTypeDef *hdac);
  90
  91   void (* MspInitCallback)(struct __DAC_HandleTypeDef *hdac);
  92   void (* MspDeInitCallback)(struct __DAC_HandleTypeDef *hdac);
  93 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
  94
  95 } DAC_HandleTypeDef;
  96
  97 /**
  98   * @brief   DAC Configuration sample and hold Channel structure definition
  99   */
 100 typedef struct
 101 {
 102   uint32_t DAC_SampleTime ;          /*!< Specifies the Sample time for the selected channel.
 103                                           This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
 104                                           This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */
 105
 106   uint32_t DAC_HoldTime ;            /*!< Specifies the hold time for the selected channel
 107                                           This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
 108                                           This parameter must be a number between Min_Data = 0 and Max_Data = 1023 */
 109
 110   uint32_t DAC_RefreshTime ;         /*!< Specifies the refresh time for the selected channel
 111                                           This parameter applies when DAC_SampleAndHold is DAC_SAMPLEANDHOLD_ENABLE.
 112                                           This parameter must be a number between Min_Data = 0 and Max_Data = 255 */
 113 } DAC_SampleAndHoldConfTypeDef;
 114
 115 /**
 116   * @brief   DAC Configuration regular Channel structure definition
 117   */
 118 typedef struct
 119 {
 120   uint32_t DAC_HighFrequency;            /*!< Specifies the frequency interface mode
 121                                               This parameter can be a value of @ref DAC_HighFrequency */
 122
 123   FunctionalState DAC_DMADoubleDataMode; /*!< Specifies if DMA double data mode should be enabled or not for the selected channel.
 124                                               This parameter can be ENABLE or DISABLE */
 125
 126   FunctionalState DAC_SignedFormat;      /*!< Specifies if signed format should be used or not for the selected channel.
 127                                               This parameter can be ENABLE or DISABLE */
 128
 129   uint32_t DAC_SampleAndHold;            /*!< Specifies whether the DAC mode.
 130                                               This parameter can be a value of @ref DAC_SampleAndHold */
 131
 132   uint32_t DAC_Trigger;                  /*!< Specifies the external trigger for the selected DAC channel.
 133                                               This parameter can be a value of @ref DAC_trigger_selection.
 134                                               Note: In case of sawtooth wave generation, this trigger corresponds to the reset trigger. */
 135
 136   uint32_t DAC_Trigger2;                 /*!< Specifies the external secondary trigger for the selected DAC channel.
 137                                               This parameter can be a value of @ref DAC_trigger_selection.
 138                                               Note: In case of sawtooth wave generation, this trigger corresponds to the step trigger.*/
 139
 140   uint32_t DAC_OutputBuffer;             /*!< Specifies whether the DAC channel output buffer is enabled or disabled.
 141                                                This parameter can be a value of @ref DAC_output_buffer */
 142
 143   uint32_t DAC_ConnectOnChipPeripheral ; /*!< Specifies whether the DAC output is connected or not to on chip peripheral .
 144                                               This parameter can be a value of @ref DAC_ConnectOnChipPeripheral */
 145
 146   uint32_t DAC_UserTrimming;             /*!< Specifies the trimming mode
 147                                               This parameter must be a value of @ref DAC_UserTrimming
 148                                               DAC_UserTrimming is either factory or user trimming */
 149
 150   uint32_t DAC_TrimmingValue;             /*!< Specifies the offset trimming value
 151                                                i.e. when DAC_SampleAndHold is DAC_TRIMMING_USER.
 152                                                This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
 153
 154   DAC_SampleAndHoldConfTypeDef  DAC_SampleAndHoldConfig;  /*!< Sample and Hold settings */
 155
 156 } DAC_ChannelConfTypeDef;
 157
 158 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
 159 /**
 160   * @brief  HAL DAC Callback ID enumeration definition
 161   */
 162 typedef enum
 163 {
 164   HAL_DAC_CH1_COMPLETE_CB_ID                 = 0x00U,  /*!< DAC CH1 Complete Callback ID      */
 165   HAL_DAC_CH1_HALF_COMPLETE_CB_ID            = 0x01U,  /*!< DAC CH1 half Complete Callback ID */
 166   HAL_DAC_CH1_ERROR_ID                       = 0x02U,  /*!< DAC CH1 error Callback ID         */
 167   HAL_DAC_CH1_UNDERRUN_CB_ID                 = 0x03U,  /*!< DAC CH1 underrun Callback ID      */
 168   HAL_DAC_CH2_COMPLETE_CB_ID                 = 0x04U,  /*!< DAC CH2 Complete Callback ID      */
 169   HAL_DAC_CH2_HALF_COMPLETE_CB_ID            = 0x05U,  /*!< DAC CH2 half Complete Callback ID */
 170   HAL_DAC_CH2_ERROR_ID                       = 0x06U,  /*!< DAC CH2 error Callback ID         */
 171   HAL_DAC_CH2_UNDERRUN_CB_ID                 = 0x07U,  /*!< DAC CH2 underrun Callback ID      */
 172   HAL_DAC_MSP_INIT_CB_ID                     = 0x08U,  /*!< DAC MspInit Callback ID           */
 173   HAL_DAC_MSP_DEINIT_CB_ID                   = 0x09U,  /*!< DAC MspDeInit Callback ID         */
 174   HAL_DAC_ALL_CB_ID                          = 0x0AU   /*!< DAC All ID                        */
 175 } HAL_DAC_CallbackIDTypeDef;
 176
 177 /**
 178   * @brief  HAL DAC Callback pointer definition
 179   */
 180 typedef void (*pDAC_CallbackTypeDef)(DAC_HandleTypeDef *hdac);
 181 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
 182
 183 /**
 184   * @}
 185   */
 186
 187 /* Exported constants --------------------------------------------------------*/
 188
 189 /** @defgroup DAC_Exported_Constants DAC Exported Constants
 190   * @{
 191   */
 192
 193 /** @defgroup DAC_Error_Code DAC Error Code
 194   * @{
 195   */
 196 #define  HAL_DAC_ERROR_NONE              0x00U    /*!< No error                          */
 197 #define  HAL_DAC_ERROR_DMAUNDERRUNCH1    0x01U    /*!< DAC channel1 DMA underrun error   */
 198 #define  HAL_DAC_ERROR_DMAUNDERRUNCH2    0x02U    /*!< DAC channel2 DMA underrun error   */
 199 #define  HAL_DAC_ERROR_DMA               0x04U    /*!< DMA error                         */
 200 #define  HAL_DAC_ERROR_TIMEOUT           0x08U    /*!< Timeout error                     */
 201 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
 202 #define HAL_DAC_ERROR_INVALID_CALLBACK   0x10U    /*!< Invalid callback error            */
 203 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
 204
 205 /**
 206   * @}
 207   */
 208
 209 /** @defgroup DAC_trigger_selection DAC trigger selection
 210   * @{
 211   */
 212 #define DAC_TRIGGER_NONE                0x00000000U                                                                       /*!< DAC (all) conversion is automatic once the DAC_DHRxxxx register has been loaded, and not by external trigger */
 213 #define DAC_TRIGGER_SOFTWARE            (                                                                    DAC_CR_TEN1) /*!< DAC (all) conversion started by software trigger for DAC channel */
 214 #define DAC_TRIGGER_T1_TRGO             (                                                   DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC3: TIM1 TRGO selected as external conversion trigger for DAC channel. */
 215 #define DAC_TRIGGER_T8_TRGO             (                                                   DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC1/2/4: TIM8 TRGO selected as external conversion trigger for DAC channel. Refer to device datasheet for DACx availability. */
 216 #define DAC_TRIGGER_T7_TRGO             (                                  DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< DAC (all): TIM7 TRGO selected as external conversion trigger for DAC channel */
 217 #define DAC_TRIGGER_T15_TRGO            (                                  DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC (all): TIM15 TRGO selected as external conversion trigger for DAC channel */
 218 #define DAC_TRIGGER_T2_TRGO             (                 DAC_CR_TSEL1_2                                   | DAC_CR_TEN1) /*!< DAC (all): TIM2 TRGO selected as external conversion trigger for DAC channel */
 219 #define DAC_TRIGGER_T4_TRGO             (                 DAC_CR_TSEL1_2                  | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC (all): TIM4 TRGO selected as external conversion trigger for DAC channel */
 220 #define DAC_TRIGGER_EXT_IT9             (                 DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< DAC (all): EXTI Line9 event selected as external conversion trigger for DAC channel. Note: only to be used as update or reset (sawtooth generation) trigger */
 221 #define DAC_TRIGGER_EXT_IT10            (                 DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< DAC (all): EXTI Line10 event selected as external conversion trigger for DAC channel. Note: only to be used as step (sawtooth generation) trigger */
 222 #define DAC_TRIGGER_T6_TRGO             (                 DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC (all): TIM6 TRGO selected as external conversion trigger for DAC channel */
 223 #define DAC_TRIGGER_T3_TRGO             (DAC_CR_TSEL1_3                                                    | DAC_CR_TEN1) /*!< DAC (all): TIM3 TRGO selected as external conversion trigger for DAC channel */
 224 #define DAC_TRIGGER_HRTIM_RST_TRG1      (DAC_CR_TSEL1_3                                   | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC (all): HRTIM RST TRIG 1 selected as external conversion trigger for DAC channel. Note: only to be used as reset (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 225 #define DAC_TRIGGER_HRTIM_STEP_TRG1     (DAC_CR_TSEL1_3                                   | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC (all): HRTIM STEP TRIG 1 selected as external conversion trigger for DAC channel. Note: only to be used as step (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 226 #define DAC_TRIGGER_HRTIM_RST_TRG2      (DAC_CR_TSEL1_3                  | DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< DAC (all): HRTIM RST TRIG 2 selected as external conversion trigger for DAC channel. Note: only to be used as reset (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 227 #define DAC_TRIGGER_HRTIM_STEP_TRG2     (DAC_CR_TSEL1_3                  | DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< DAC (all): HRTIM STEP TRIG 2 selected as external conversion trigger for DAC channel. Note: only to be used as step (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 228 #define DAC_TRIGGER_HRTIM_RST_TRG3      (DAC_CR_TSEL1_3                  | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC (all): HRTIM RST TRIG 3 selected as external conversion trigger for DAC channel. Note: only to be used as reset (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 229 #define DAC_TRIGGER_HRTIM_STEP_TRG3     (DAC_CR_TSEL1_3                  | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC (all): HRTIM STEP TRIG 3 selected as external conversion trigger for DAC channel. Note: only to be used as step (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 230 #define DAC_TRIGGER_HRTIM_RST_TRG4      (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2                                   | DAC_CR_TEN1) /*!< DAC (all): HRTIM RST TRIG 4 selected as external conversion trigger for DAC channel. Note: only to be used as reset (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 231 #define DAC_TRIGGER_HRTIM_STEP_TRG4     (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2                                   | DAC_CR_TEN1) /*!< DAC (all): HRTIM STEP TRIG 4 selected as external conversion trigger for DAC channel. Note: only to be used as step (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 232 #define DAC_TRIGGER_HRTIM_RST_TRG5      (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2                  | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC (all): HRTIM RST TRIG 5 selected as external conversion trigger for DAC channel. Note: only to be used as reset (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 233 #define DAC_TRIGGER_HRTIM_STEP_TRG5     (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2                  | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC (all): HRTIM STEP TRIG 5 selected as external conversion trigger for DAC channel. Note: only to be used as step (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 234 #define DAC_TRIGGER_HRTIM_RST_TRG6      (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< DAC (all): HRTIM RST TRIG 6 selected as external conversion trigger for DAC channel. Note: only to be used as reset (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 235 #define DAC_TRIGGER_HRTIM_STEP_TRG6     (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1                  | DAC_CR_TEN1) /*!< DAC (all): HRTIM STEP TRIG 6 selected as external conversion trigger for DAC channel. Note: only to be used as step (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 236 #define DAC_TRIGGER_HRTIM_TRG01         (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC1&4: HRTIM TRIG OUT 1 selected as external conversion trigger for DAC channel. Note: only to be used as update or reset (sawtooth generation) trigger. Refer to device datasheet for DACx instance availability. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 237 #define DAC_TRIGGER_HRTIM_TRG02         (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC2: HRTIM TRIG OUT 1 selected as external conversion trigger for DAC channel. Note: only to be used as update or reset (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported and DAC2 instance present (refer to device datasheet for supported features list and DAC2 instance availability) */
 238 #define DAC_TRIGGER_HRTIM_TRG03         (DAC_CR_TSEL1_3 | DAC_CR_TSEL1_2 | DAC_CR_TSEL1_1 | DAC_CR_TSEL1_0 | DAC_CR_TEN1) /*!< DAC3: HRTIM TRIG OUT 1 selected as external conversion trigger for DAC channel. Note: only to be used as update or reset (sawtooth generation) trigger. On this STM32 serie, parameter only available if HRTIM feature is supported (refer to device datasheet for supported features list) */
 239 /**
 240   * @}
 241   */
 242
 243 /** @defgroup DAC_output_buffer DAC output buffer
 244   * @{
 245   */
 246 #define DAC_OUTPUTBUFFER_ENABLE            0x00000000U
 247 #define DAC_OUTPUTBUFFER_DISABLE           (DAC_MCR_MODE1_1)
 248
 249 /**
 250   * @}
 251   */
 252
 253 /** @defgroup DAC_Channel_selection DAC Channel selection
 254   * @{
 255   */
 256 #define DAC_CHANNEL_1                      0x00000000U
 257 #define DAC_CHANNEL_2                      0x00000010U
 258 /**
 259   * @}
 260   */
 261
 262 /** @defgroup DAC_data_alignment DAC data alignment
 263   * @{
 264   */
 265 #define DAC_ALIGN_12B_R                    0x00000000U
 266 #define DAC_ALIGN_12B_L                    0x00000004U
 267 #define DAC_ALIGN_8B_R                     0x00000008U
 268
 269 /**
 270   * @}
 271   */
 272
 273 /** @defgroup DAC_flags_definition DAC flags definition
 274   * @{
 275   */
 276 #define DAC_FLAG_DMAUDR1                   (DAC_SR_DMAUDR1)
 277 #define DAC_FLAG_DMAUDR2                   (DAC_SR_DMAUDR2)
 278 #define DAC_FLAG_DAC1RDY                   (DAC_SR_DAC1RDY)
 279 #define DAC_FLAG_DAC2RDY                   (DAC_SR_DAC2RDY)
 280
 281 /**
 282   * @}
 283   */
 284
 285 /** @defgroup DAC_IT_definition  DAC IT definition
 286   * @{
 287   */
 288 #define DAC_IT_DMAUDR1                   (DAC_SR_DMAUDR1)
 289 #define DAC_IT_DMAUDR2                   (DAC_SR_DMAUDR2)
 290
 291 /**
 292   * @}
 293   */
 294
 295 /** @defgroup DAC_ConnectOnChipPeripheral DAC ConnectOnChipPeripheral
 296   * @{
 297   */
 298 #define DAC_CHIPCONNECT_EXTERNAL       (1UL << 0)
 299 #define DAC_CHIPCONNECT_INTERNAL       (1UL << 1)
 300 #define DAC_CHIPCONNECT_BOTH           (1UL << 2)
 301 /**
 302   * @}
 303   */
 304
 305 /** @defgroup DAC_UserTrimming DAC User Trimming
 306   * @{
 307   */
 308
 309 #define DAC_TRIMMING_FACTORY        0x00000000U           /*!< Factory trimming */
 310 #define DAC_TRIMMING_USER           0x00000001U           /*!< User trimming */
 311
 312 /**
 313   * @}
 314   */
 315
 316 /** @defgroup DAC_SampleAndHold DAC power mode
 317   * @{
 318   */
 319 #define DAC_SAMPLEANDHOLD_DISABLE     0x00000000U
 320 #define DAC_SAMPLEANDHOLD_ENABLE      (DAC_MCR_MODE1_2)
 321
 322 /**
 323   * @}
 324   */
 325
 326 /** @defgroup DAC_HighFrequency DAC high frequency interface mode
 327   * @{
 328   */
 329 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE        0x00000000U        /*!< High frequency interface mode disabled */
 330 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ    (DAC_MCR_HFSEL_0)  /*!< High frequency interface mode compatible to AHB>80MHz enabled */
 331 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_160MHZ   (DAC_MCR_HFSEL_1)  /*!< High frequency interface mode compatible to AHB>160MHz enabled */
 332 #define DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC      0x00000002U        /*!< High frequency interface mode automatic */
 333
 334 /**
 335   * @}
 336   */
 337
 338 /**
 339   * @}
 340   */
 341
 342 /* Exported macro ------------------------------------------------------------*/
 343
 344 /** @defgroup DAC_Exported_Macros DAC Exported Macros
 345   * @{
 346   */
 347
 348 /** @brief Reset DAC handle state.
 349   * @param  __HANDLE__ specifies the DAC handle.
 350   * @retval None
 351   */
 352 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
 353 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) do {                                                        \
 354                                                       (__HANDLE__)->State             = HAL_DAC_STATE_RESET; \
 355                                                       (__HANDLE__)->MspInitCallback   = NULL;                  \
 356                                                       (__HANDLE__)->MspDeInitCallback = NULL;                  \
 357                                                      } while(0)
 358 #else
 359 #define __HAL_DAC_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_DAC_STATE_RESET)
 360 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
 361
 362 /** @brief Enable the DAC channel.
 363   * @param  __HANDLE__ specifies the DAC handle.
 364   * @param  __DAC_Channel__ specifies the DAC channel
 365   * @retval None
 366   */
 367 #define __HAL_DAC_ENABLE(__HANDLE__, __DAC_Channel__) \
 368   ((__HANDLE__)->Instance->CR |=  (DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
 369
 370 /** @brief Disable the DAC channel.
 371   * @param  __HANDLE__ specifies the DAC handle
 372   * @param  __DAC_Channel__ specifies the DAC channel.
 373   * @retval None
 374   */
 375 #define __HAL_DAC_DISABLE(__HANDLE__, __DAC_Channel__) \
 376   ((__HANDLE__)->Instance->CR &=  ~(DAC_CR_EN1 << ((__DAC_Channel__) & 0x10UL)))
 377
 378 /** @brief Set DHR12R1 alignment.
 379   * @param  __ALIGNMENT__ specifies the DAC alignment
 380   * @retval None
 381   */
 382 #define DAC_DHR12R1_ALIGNMENT(__ALIGNMENT__) (0x00000008U + (__ALIGNMENT__))
 383
 384 /** @brief  Set DHR12R2 alignment.
 385   * @param  __ALIGNMENT__ specifies the DAC alignment
 386   * @retval None
 387   */
 388 #define DAC_DHR12R2_ALIGNMENT(__ALIGNMENT__) (0x00000014U + (__ALIGNMENT__))
 389
 390 /** @brief  Set DHR12RD alignment.
 391   * @param  __ALIGNMENT__ specifies the DAC alignment
 392   * @retval None
 393   */
 394 #define DAC_DHR12RD_ALIGNMENT(__ALIGNMENT__) (0x00000020U + (__ALIGNMENT__))
 395
 396 /** @brief Enable the DAC interrupt.
 397   * @param  __HANDLE__ specifies the DAC handle
 398   * @param  __INTERRUPT__ specifies the DAC interrupt.
 399   *          This parameter can be any combination of the following values:
 400   *            @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
 401   *            @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt (1)
 402   *
 403   *         (1) On this STM32 serie, parameter not available on all instances.
 404   *             Refer to device datasheet for channels availability.
 405   * @retval None
 406   */
 407 #define __HAL_DAC_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) |= (__INTERRUPT__))
 408
 409 /** @brief Disable the DAC interrupt.
 410   * @param  __HANDLE__ specifies the DAC handle
 411   * @param  __INTERRUPT__ specifies the DAC interrupt.
 412   *          This parameter can be any combination of the following values:
 413   *            @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
 414   *            @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt (1)
 415   *
 416   *         (1) On this STM32 serie, parameter not available on all instances.
 417   *             Refer to device datasheet for channels availability.
 418   * @retval None
 419   */
 420 #define __HAL_DAC_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR) &= ~(__INTERRUPT__))
 421
 422 /** @brief  Check whether the specified DAC interrupt source is enabled or not.
 423   * @param __HANDLE__ DAC handle
 424   * @param __INTERRUPT__ DAC interrupt source to check
 425   *          This parameter can be any combination of the following values:
 426   *            @arg DAC_IT_DMAUDR1: DAC channel 1 DMA underrun interrupt
 427   *            @arg DAC_IT_DMAUDR2: DAC channel 2 DMA underrun interrupt (1)
 428   *
 429   *         (1) On this STM32 serie, parameter not available on all instances.
 430   *             Refer to device datasheet for channels availability.
 431   * @retval State of interruption (SET or RESET)
 432   */
 433 #define __HAL_DAC_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->CR & (__INTERRUPT__)) == (__INTERRUPT__))
 434
 435 /** @brief  Get the selected DAC's flag status.
 436   * @param  __HANDLE__ specifies the DAC handle.
 437   * @param  __FLAG__ specifies the DAC flag to get.
 438   *          This parameter can be any combination of the following values:
 439   *            @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
 440   *            @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag (1)
 441   *            @arg DAC_FLAG_DAC1RDY: DAC channel 1 ready status flag
 442   *            @arg DAC_FLAG_DAC2RDY: DAC channel 2 ready status flag (1)
 443   *
 444   *         (1) On this STM32 serie, parameter not available on all instances.
 445   *             Refer to device datasheet for channels availability.
 446   * @retval None
 447   */
 448 #define __HAL_DAC_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
 449
 450 /** @brief  Clear the DAC's flag.
 451   * @param  __HANDLE__ specifies the DAC handle.
 452   * @param  __FLAG__ specifies the DAC flag to clear.
 453   *          This parameter can be any combination of the following values:
 454   *            @arg DAC_FLAG_DMAUDR1: DAC channel 1 DMA underrun flag
 455   *            @arg DAC_FLAG_DMAUDR2: DAC channel 2 DMA underrun flag (1)
 456   *
 457   *         (1) On this STM32 serie, parameter not available on all instances.
 458   *             Refer to device datasheet for channels availability.
 459   * @retval None
 460   */
 461 #define __HAL_DAC_CLEAR_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->SR) = (__FLAG__))
 462
 463 /**
 464   * @}
 465   */
 466
 467 /* Private macro -------------------------------------------------------------*/
 468
 469 /** @defgroup DAC_Private_Macros DAC Private Macros
 470   * @{
 471   */
 472 #define IS_DAC_OUTPUT_BUFFER_STATE(STATE) (((STATE) == DAC_OUTPUTBUFFER_ENABLE) || \
 473                                            ((STATE) == DAC_OUTPUTBUFFER_DISABLE))
 474
 475 #if defined(STM32G474xx) || defined(STM32G484xx) || defined(STM32G473xx)
 476 #define IS_DAC_CHANNEL(DACX, CHANNEL)        \
 477   (((DACX) == DAC2) ?                  \
 478    ((CHANNEL) == DAC_CHANNEL_1)        \
 479    :                                    \
 480    (((CHANNEL) == DAC_CHANNEL_1)    || \
 481     ((CHANNEL) == DAC_CHANNEL_2)))
 482 #else
 483 #define IS_DAC_CHANNEL(DACX, CHANNEL)        \
 484   (((CHANNEL) == DAC_CHANNEL_1)     || \
 485    ((CHANNEL) == DAC_CHANNEL_2))
 486 #endif
 487
 488 #define IS_DAC_ALIGN(ALIGN) (((ALIGN) == DAC_ALIGN_12B_R) || \
 489                              ((ALIGN) == DAC_ALIGN_12B_L) || \
 490                              ((ALIGN) == DAC_ALIGN_8B_R))
 491
 492 #define IS_DAC_DATA(DATA) ((DATA) <= 0xFFF0U)
 493
 494 #define IS_DAC_REFRESHTIME(TIME)   ((TIME) <= 0x000000FFU)
 495
 496 /**
 497   * @}
 498   */
 499
 500 /* Include DAC HAL Extended module */
 501 #include "stm32g4xx_hal_dac_ex.h"
 502
 503 /* Exported functions --------------------------------------------------------*/
 504
 505 /** @addtogroup DAC_Exported_Functions
 506   * @{
 507   */
 508
 509 /** @addtogroup DAC_Exported_Functions_Group1
 510   * @{
 511   */
 512 /* Initialization and de-initialization functions *****************************/
 513 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac);
 514 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac);
 515 void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac);
 516 void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac);
 517
 518 /**
 519   * @}
 520   */
 521
 522 /** @addtogroup DAC_Exported_Functions_Group2
 523   * @{
 524   */
 525 /* IO operation functions *****************************************************/
 526 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel);
 527 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel);
 528 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
 529                                     uint32_t Alignment);
 530 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel);
 531
 532 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac);
 533
 534 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data);
 535
 536 void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac);
 537 void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac);
 538 void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac);
 539 void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac);
 540
 541 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
 542 /* DAC callback registering/unregistering */
 543 HAL_StatusTypeDef     HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
 544                                                pDAC_CallbackTypeDef pCallback);
 545 HAL_StatusTypeDef     HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID);
 546 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
 547
 548 /**
 549   * @}
 550   */
 551
 552 /** @addtogroup DAC_Exported_Functions_Group3
 553   * @{
 554   */
 555 /* Peripheral Control functions ***********************************************/
 556 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel);
 557
 558 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel);
 559 /**
 560   * @}
 561   */
 562
 563 /** @addtogroup DAC_Exported_Functions_Group4
 564   * @{
 565   */
 566 /* Peripheral State and Error functions ***************************************/
 567 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac);
 568 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac);
 569
 570 /**
 571   * @}
 572   */
 573
 574 /**
 575   * @}
 576   */
 577
 578 /** @defgroup DAC_Private_Functions DAC Private Functions
 579   * @{
 580   */
 581 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma);
 582 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma);
 583 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma);
 584 /**
 585   * @}
 586   */
 587
 588 /**
 589   * @}
 590   */
 591
 592 #endif /* DAC1 || DAC2 || DAC3 || DAC4 */
 593
 594 /**
 595   * @}
 596   */
 597
 598 #ifdef __cplusplus
 599 }
 600 #endif
 601
 602
 603 #endif /*STM32G4xx_HAL_DAC_H */
 604
 605 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 606