Merge pull request #11189 from klutvott123/move-telemetry-displayport-init
[betaflight.git] / lib / main / STM32G4 / Drivers / STM32G4xx_HAL_Driver / Inc / stm32g4xx_hal_i2s.h
blobb7957f92afa108304729521251345c89f24bfc81
1 /**
2 ******************************************************************************
3 * @file stm32g4xx_hal_i2s.h
4 * @author MCD Application Team
5 * @brief Header file of I2S HAL module.
6 ******************************************************************************
7 * @attention
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
17 ******************************************************************************
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32G4xx_HAL_I2S_H
22 #define STM32G4xx_HAL_I2S_H
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
28 #if defined(SPI_I2S_SUPPORT)
29 /* Includes ------------------------------------------------------------------*/
30 #include "stm32g4xx_hal_def.h"
32 /** @addtogroup STM32G4xx_HAL_Driver
33 * @{
36 /** @addtogroup I2S
37 * @{
40 /* Exported types ------------------------------------------------------------*/
41 /** @defgroup I2S_Exported_Types I2S Exported Types
42 * @{
45 /**
46 * @brief I2S Init structure definition
48 typedef struct
50 uint32_t Mode; /*!< Specifies the I2S operating mode.
51 This parameter can be a value of @ref I2S_Mode */
53 uint32_t Standard; /*!< Specifies the standard used for the I2S communication.
54 This parameter can be a value of @ref I2S_Standard */
56 uint32_t DataFormat; /*!< Specifies the data format for the I2S communication.
57 This parameter can be a value of @ref I2S_Data_Format */
59 uint32_t MCLKOutput; /*!< Specifies whether the I2S MCLK output is enabled or not.
60 This parameter can be a value of @ref I2S_MCLK_Output */
62 uint32_t AudioFreq; /*!< Specifies the frequency selected for the I2S communication.
63 This parameter can be a value of @ref I2S_Audio_Frequency */
65 uint32_t CPOL; /*!< Specifies the idle state of the I2S clock.
66 This parameter can be a value of @ref I2S_Clock_Polarity */
67 } I2S_InitTypeDef;
69 /**
70 * @brief HAL State structures definition
72 typedef enum
74 HAL_I2S_STATE_RESET = 0x00U, /*!< I2S not yet initialized or disabled */
75 HAL_I2S_STATE_READY = 0x01U, /*!< I2S initialized and ready for use */
76 HAL_I2S_STATE_BUSY = 0x02U, /*!< I2S internal process is ongoing */
77 HAL_I2S_STATE_BUSY_TX = 0x03U, /*!< Data Transmission process is ongoing */
78 HAL_I2S_STATE_BUSY_RX = 0x04U, /*!< Data Reception process is ongoing */
79 HAL_I2S_STATE_TIMEOUT = 0x06U, /*!< I2S timeout state */
80 HAL_I2S_STATE_ERROR = 0x07U /*!< I2S error state */
81 } HAL_I2S_StateTypeDef;
83 /**
84 * @brief I2S handle Structure definition
86 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1)
87 typedef struct __I2S_HandleTypeDef
88 #else
89 typedef struct
90 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
92 SPI_TypeDef *Instance; /*!< I2S registers base address */
94 I2S_InitTypeDef Init; /*!< I2S communication parameters */
96 uint16_t *pTxBuffPtr; /*!< Pointer to I2S Tx transfer buffer */
98 __IO uint16_t TxXferSize; /*!< I2S Tx transfer size */
100 __IO uint16_t TxXferCount; /*!< I2S Tx transfer Counter */
102 uint16_t *pRxBuffPtr; /*!< Pointer to I2S Rx transfer buffer */
104 __IO uint16_t RxXferSize; /*!< I2S Rx transfer size */
106 __IO uint16_t RxXferCount; /*!< I2S Rx transfer counter
107 (This field is initialized at the
108 same value as transfer size at the
109 beginning of the transfer and
110 decremented when a sample is received
111 NbSamplesReceived = RxBufferSize-RxBufferCount) */
112 DMA_HandleTypeDef *hdmatx; /*!< I2S Tx DMA handle parameters */
114 DMA_HandleTypeDef *hdmarx; /*!< I2S Rx DMA handle parameters */
116 __IO HAL_LockTypeDef Lock; /*!< I2S locking object */
118 __IO HAL_I2S_StateTypeDef State; /*!< I2S communication state */
120 __IO uint32_t ErrorCode; /*!< I2S Error code
121 This parameter can be a value of @ref I2S_Error */
123 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
124 void (* TxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Completed callback */
125 void (* RxCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Completed callback */
126 void (* TxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Tx Half Completed callback */
127 void (* RxHalfCpltCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Rx Half Completed callback */
128 void (* ErrorCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Error callback */
129 void (* MspInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp Init callback */
130 void (* MspDeInitCallback)(struct __I2S_HandleTypeDef *hi2s); /*!< I2S Msp DeInit callback */
132 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
133 } I2S_HandleTypeDef;
135 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
137 * @brief HAL I2S Callback ID enumeration definition
139 typedef enum
141 HAL_I2S_TX_COMPLETE_CB_ID = 0x00U, /*!< I2S Tx Completed callback ID */
142 HAL_I2S_RX_COMPLETE_CB_ID = 0x01U, /*!< I2S Rx Completed callback ID */
143 HAL_I2S_TX_HALF_COMPLETE_CB_ID = 0x03U, /*!< I2S Tx Half Completed callback ID */
144 HAL_I2S_RX_HALF_COMPLETE_CB_ID = 0x04U, /*!< I2S Rx Half Completed callback ID */
145 HAL_I2S_ERROR_CB_ID = 0x06U, /*!< I2S Error callback ID */
146 HAL_I2S_MSPINIT_CB_ID = 0x07U, /*!< I2S Msp Init callback ID */
147 HAL_I2S_MSPDEINIT_CB_ID = 0x08U /*!< I2S Msp DeInit callback ID */
149 } HAL_I2S_CallbackIDTypeDef;
152 * @brief HAL I2S Callback pointer definition
154 typedef void (*pI2S_CallbackTypeDef)(I2S_HandleTypeDef *hi2s); /*!< pointer to an I2S callback function */
156 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
158 * @}
161 /* Exported constants --------------------------------------------------------*/
162 /** @defgroup I2S_Exported_Constants I2S Exported Constants
163 * @{
165 /** @defgroup I2S_Error I2S Error
166 * @{
168 #define HAL_I2S_ERROR_NONE (0x00000000U) /*!< No error */
169 #define HAL_I2S_ERROR_TIMEOUT (0x00000001U) /*!< Timeout error */
170 #define HAL_I2S_ERROR_OVR (0x00000002U) /*!< OVR error */
171 #define HAL_I2S_ERROR_UDR (0x00000004U) /*!< UDR error */
172 #define HAL_I2S_ERROR_DMA (0x00000008U) /*!< DMA transfer error */
173 #define HAL_I2S_ERROR_PRESCALER (0x00000010U) /*!< Prescaler Calculation error */
174 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
175 #define HAL_I2S_ERROR_INVALID_CALLBACK (0x00000020U) /*!< Invalid Callback error */
176 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
178 * @}
181 /** @defgroup I2S_Mode I2S Mode
182 * @{
184 #define I2S_MODE_SLAVE_TX (0x00000000U)
185 #define I2S_MODE_SLAVE_RX (SPI_I2SCFGR_I2SCFG_0)
186 #define I2S_MODE_MASTER_TX (SPI_I2SCFGR_I2SCFG_1)
187 #define I2S_MODE_MASTER_RX ((SPI_I2SCFGR_I2SCFG_0 | SPI_I2SCFGR_I2SCFG_1))
189 * @}
192 /** @defgroup I2S_Standard I2S Standard
193 * @{
195 #define I2S_STANDARD_PHILIPS (0x00000000U)
196 #define I2S_STANDARD_MSB (SPI_I2SCFGR_I2SSTD_0)
197 #define I2S_STANDARD_LSB (SPI_I2SCFGR_I2SSTD_1)
198 #define I2S_STANDARD_PCM_SHORT ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1))
199 #define I2S_STANDARD_PCM_LONG ((SPI_I2SCFGR_I2SSTD_0 | SPI_I2SCFGR_I2SSTD_1 | SPI_I2SCFGR_PCMSYNC))
201 * @}
204 /** @defgroup I2S_Data_Format I2S Data Format
205 * @{
207 #define I2S_DATAFORMAT_16B (0x00000000U)
208 #define I2S_DATAFORMAT_16B_EXTENDED (SPI_I2SCFGR_CHLEN)
209 #define I2S_DATAFORMAT_24B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_0))
210 #define I2S_DATAFORMAT_32B ((SPI_I2SCFGR_CHLEN | SPI_I2SCFGR_DATLEN_1))
212 * @}
215 /** @defgroup I2S_MCLK_Output I2S MCLK Output
216 * @{
218 #define I2S_MCLKOUTPUT_ENABLE (SPI_I2SPR_MCKOE)
219 #define I2S_MCLKOUTPUT_DISABLE (0x00000000U)
221 * @}
224 /** @defgroup I2S_Audio_Frequency I2S Audio Frequency
225 * @{
227 #define I2S_AUDIOFREQ_192K (192000U)
228 #define I2S_AUDIOFREQ_96K (96000U)
229 #define I2S_AUDIOFREQ_48K (48000U)
230 #define I2S_AUDIOFREQ_44K (44100U)
231 #define I2S_AUDIOFREQ_32K (32000U)
232 #define I2S_AUDIOFREQ_22K (22050U)
233 #define I2S_AUDIOFREQ_16K (16000U)
234 #define I2S_AUDIOFREQ_11K (11025U)
235 #define I2S_AUDIOFREQ_8K (8000U)
236 #define I2S_AUDIOFREQ_DEFAULT (2U)
238 * @}
241 /** @defgroup I2S_Clock_Polarity I2S Clock Polarity
242 * @{
244 #define I2S_CPOL_LOW (0x00000000U)
245 #define I2S_CPOL_HIGH (SPI_I2SCFGR_CKPOL)
247 * @}
250 /** @defgroup I2S_Interrupts_Definition I2S Interrupts Definition
251 * @{
253 #define I2S_IT_TXE SPI_CR2_TXEIE
254 #define I2S_IT_RXNE SPI_CR2_RXNEIE
255 #define I2S_IT_ERR SPI_CR2_ERRIE
257 * @}
260 /** @defgroup I2S_Flags_Definition I2S Flags Definition
261 * @{
263 #define I2S_FLAG_TXE SPI_SR_TXE
264 #define I2S_FLAG_RXNE SPI_SR_RXNE
266 #define I2S_FLAG_UDR SPI_SR_UDR
267 #define I2S_FLAG_OVR SPI_SR_OVR
268 #define I2S_FLAG_FRE SPI_SR_FRE
270 #define I2S_FLAG_CHSIDE SPI_SR_CHSIDE
271 #define I2S_FLAG_BSY SPI_SR_BSY
273 #define I2S_FLAG_MASK (SPI_SR_RXNE\
274 | SPI_SR_TXE | SPI_SR_UDR | SPI_SR_OVR | SPI_SR_FRE | SPI_SR_CHSIDE | SPI_SR_BSY)
276 * @}
280 * @}
283 /* Exported macros -----------------------------------------------------------*/
284 /** @defgroup I2S_Exported_macros I2S Exported Macros
285 * @{
288 /** @brief Reset I2S handle state
289 * @param __HANDLE__ specifies the I2S Handle.
290 * @retval None
292 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
293 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) do{ \
294 (__HANDLE__)->State = HAL_I2S_STATE_RESET; \
295 (__HANDLE__)->MspInitCallback = NULL; \
296 (__HANDLE__)->MspDeInitCallback = NULL; \
297 } while(0)
298 #else
299 #define __HAL_I2S_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_I2S_STATE_RESET)
300 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
302 /** @brief Enable the specified SPI peripheral (in I2S mode).
303 * @param __HANDLE__ specifies the I2S Handle.
304 * @retval None
306 #define __HAL_I2S_ENABLE(__HANDLE__) (SET_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
308 /** @brief Disable the specified SPI peripheral (in I2S mode).
309 * @param __HANDLE__ specifies the I2S Handle.
310 * @retval None
312 #define __HAL_I2S_DISABLE(__HANDLE__) (CLEAR_BIT((__HANDLE__)->Instance->I2SCFGR, SPI_I2SCFGR_I2SE))
314 /** @brief Enable the specified I2S interrupts.
315 * @param __HANDLE__ specifies the I2S Handle.
316 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
317 * This parameter can be one of the following values:
318 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
319 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
320 * @arg I2S_IT_ERR: Error interrupt enable
321 * @retval None
323 #define __HAL_I2S_ENABLE_IT(__HANDLE__, __INTERRUPT__) (SET_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
325 /** @brief Disable the specified I2S interrupts.
326 * @param __HANDLE__ specifies the I2S Handle.
327 * @param __INTERRUPT__ specifies the interrupt source to enable or disable.
328 * This parameter can be one of the following values:
329 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
330 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
331 * @arg I2S_IT_ERR: Error interrupt enable
332 * @retval None
334 #define __HAL_I2S_DISABLE_IT(__HANDLE__, __INTERRUPT__) (CLEAR_BIT((__HANDLE__)->Instance->CR2,(__INTERRUPT__)))
336 /** @brief Checks if the specified I2S interrupt source is enabled or disabled.
337 * @param __HANDLE__ specifies the I2S Handle.
338 * This parameter can be I2S where x: 1, 2, or 3 to select the I2S peripheral.
339 * @param __INTERRUPT__ specifies the I2S interrupt source to check.
340 * This parameter can be one of the following values:
341 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
342 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
343 * @arg I2S_IT_ERR: Error interrupt enable
344 * @retval The new state of __IT__ (TRUE or FALSE).
346 #define __HAL_I2S_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
347 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
349 /** @brief Checks whether the specified I2S flag is set or not.
350 * @param __HANDLE__ specifies the I2S Handle.
351 * @param __FLAG__ specifies the flag to check.
352 * This parameter can be one of the following values:
353 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
354 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
355 * @arg I2S_FLAG_UDR: Underrun flag
356 * @arg I2S_FLAG_OVR: Overrun flag
357 * @arg I2S_FLAG_FRE: Frame error flag
358 * @arg I2S_FLAG_CHSIDE: Channel Side flag
359 * @arg I2S_FLAG_BSY: Busy flag
360 * @retval The new state of __FLAG__ (TRUE or FALSE).
362 #define __HAL_I2S_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
364 /** @brief Clears the I2S OVR pending flag.
365 * @param __HANDLE__ specifies the I2S Handle.
366 * @retval None
368 #define __HAL_I2S_CLEAR_OVRFLAG(__HANDLE__) do{ \
369 __IO uint32_t tmpreg_ovr = 0x00U; \
370 tmpreg_ovr = (__HANDLE__)->Instance->DR; \
371 tmpreg_ovr = (__HANDLE__)->Instance->SR; \
372 UNUSED(tmpreg_ovr); \
373 }while(0U)
374 /** @brief Clears the I2S UDR pending flag.
375 * @param __HANDLE__ specifies the I2S Handle.
376 * @retval None
378 #define __HAL_I2S_CLEAR_UDRFLAG(__HANDLE__) do{\
379 __IO uint32_t tmpreg_udr = 0x00U;\
380 tmpreg_udr = ((__HANDLE__)->Instance->SR);\
381 UNUSED(tmpreg_udr); \
382 }while(0U)
384 * @}
387 /* Exported functions --------------------------------------------------------*/
388 /** @addtogroup I2S_Exported_Functions
389 * @{
392 /** @addtogroup I2S_Exported_Functions_Group1
393 * @{
395 /* Initialization/de-initialization functions ********************************/
396 HAL_StatusTypeDef HAL_I2S_Init(I2S_HandleTypeDef *hi2s);
397 HAL_StatusTypeDef HAL_I2S_DeInit(I2S_HandleTypeDef *hi2s);
398 void HAL_I2S_MspInit(I2S_HandleTypeDef *hi2s);
399 void HAL_I2S_MspDeInit(I2S_HandleTypeDef *hi2s);
401 /* Callbacks Register/UnRegister functions ***********************************/
402 #if (USE_HAL_I2S_REGISTER_CALLBACKS == 1U)
403 HAL_StatusTypeDef HAL_I2S_RegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID,
404 pI2S_CallbackTypeDef pCallback);
405 HAL_StatusTypeDef HAL_I2S_UnRegisterCallback(I2S_HandleTypeDef *hi2s, HAL_I2S_CallbackIDTypeDef CallbackID);
406 #endif /* USE_HAL_I2S_REGISTER_CALLBACKS */
408 * @}
411 /** @addtogroup I2S_Exported_Functions_Group2
412 * @{
414 /* I/O operation functions ***************************************************/
415 /* Blocking mode: Polling */
416 HAL_StatusTypeDef HAL_I2S_Transmit(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
417 HAL_StatusTypeDef HAL_I2S_Receive(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size, uint32_t Timeout);
419 /* Non-Blocking mode: Interrupt */
420 HAL_StatusTypeDef HAL_I2S_Transmit_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
421 HAL_StatusTypeDef HAL_I2S_Receive_IT(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
422 void HAL_I2S_IRQHandler(I2S_HandleTypeDef *hi2s);
424 /* Non-Blocking mode: DMA */
425 HAL_StatusTypeDef HAL_I2S_Transmit_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
426 HAL_StatusTypeDef HAL_I2S_Receive_DMA(I2S_HandleTypeDef *hi2s, uint16_t *pData, uint16_t Size);
428 HAL_StatusTypeDef HAL_I2S_DMAPause(I2S_HandleTypeDef *hi2s);
429 HAL_StatusTypeDef HAL_I2S_DMAResume(I2S_HandleTypeDef *hi2s);
430 HAL_StatusTypeDef HAL_I2S_DMAStop(I2S_HandleTypeDef *hi2s);
432 /* Callbacks used in non blocking modes (Interrupt and DMA) *******************/
433 void HAL_I2S_TxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
434 void HAL_I2S_TxCpltCallback(I2S_HandleTypeDef *hi2s);
435 void HAL_I2S_RxHalfCpltCallback(I2S_HandleTypeDef *hi2s);
436 void HAL_I2S_RxCpltCallback(I2S_HandleTypeDef *hi2s);
437 void HAL_I2S_ErrorCallback(I2S_HandleTypeDef *hi2s);
439 * @}
442 /** @addtogroup I2S_Exported_Functions_Group3
443 * @{
445 /* Peripheral Control and State functions ************************************/
446 HAL_I2S_StateTypeDef HAL_I2S_GetState(I2S_HandleTypeDef *hi2s);
447 uint32_t HAL_I2S_GetError(I2S_HandleTypeDef *hi2s);
449 * @}
453 * @}
456 /* Private types -------------------------------------------------------------*/
457 /* Private variables ---------------------------------------------------------*/
458 /* Private constants ---------------------------------------------------------*/
459 /** @defgroup I2S_Private_Constants I2S Private Constants
460 * @{
464 * @}
467 /* Private macros ------------------------------------------------------------*/
468 /** @defgroup I2S_Private_Macros I2S Private Macros
469 * @{
472 /** @brief Check whether the specified SPI flag is set or not.
473 * @param __SR__ copy of I2S SR regsiter.
474 * @param __FLAG__ specifies the flag to check.
475 * This parameter can be one of the following values:
476 * @arg I2S_FLAG_RXNE: Receive buffer not empty flag
477 * @arg I2S_FLAG_TXE: Transmit buffer empty flag
478 * @arg I2S_FLAG_UDR: Underrun error flag
479 * @arg I2S_FLAG_OVR: Overrun flag
480 * @arg I2S_FLAG_CHSIDE: Channel side flag
481 * @arg I2S_FLAG_BSY: Busy flag
482 * @retval SET or RESET.
484 #define I2S_CHECK_FLAG(__SR__, __FLAG__) ((((__SR__)\
485 & ((__FLAG__) & I2S_FLAG_MASK)) == ((__FLAG__) & I2S_FLAG_MASK)) ? SET : RESET)
487 /** @brief Check whether the specified SPI Interrupt is set or not.
488 * @param __CR2__ copy of I2S CR2 regsiter.
489 * @param __INTERRUPT__ specifies the SPI interrupt source to check.
490 * This parameter can be one of the following values:
491 * @arg I2S_IT_TXE: Tx buffer empty interrupt enable
492 * @arg I2S_IT_RXNE: RX buffer not empty interrupt enable
493 * @arg I2S_IT_ERR: Error interrupt enable
494 * @retval SET or RESET.
496 #define I2S_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__) ((((__CR2__)\
497 & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
499 /** @brief Checks if I2S Mode parameter is in allowed range.
500 * @param __MODE__ specifies the I2S Mode.
501 * This parameter can be a value of @ref I2S_Mode
502 * @retval None
504 #define IS_I2S_MODE(__MODE__) (((__MODE__) == I2S_MODE_SLAVE_TX) || \
505 ((__MODE__) == I2S_MODE_SLAVE_RX) || \
506 ((__MODE__) == I2S_MODE_MASTER_TX) || \
507 ((__MODE__) == I2S_MODE_MASTER_RX))
509 #define IS_I2S_STANDARD(__STANDARD__) (((__STANDARD__) == I2S_STANDARD_PHILIPS) || \
510 ((__STANDARD__) == I2S_STANDARD_MSB) || \
511 ((__STANDARD__) == I2S_STANDARD_LSB) || \
512 ((__STANDARD__) == I2S_STANDARD_PCM_SHORT) || \
513 ((__STANDARD__) == I2S_STANDARD_PCM_LONG))
515 #define IS_I2S_DATA_FORMAT(__FORMAT__) (((__FORMAT__) == I2S_DATAFORMAT_16B) || \
516 ((__FORMAT__) == I2S_DATAFORMAT_16B_EXTENDED) || \
517 ((__FORMAT__) == I2S_DATAFORMAT_24B) || \
518 ((__FORMAT__) == I2S_DATAFORMAT_32B))
520 #define IS_I2S_MCLK_OUTPUT(__OUTPUT__) (((__OUTPUT__) == I2S_MCLKOUTPUT_ENABLE) || \
521 ((__OUTPUT__) == I2S_MCLKOUTPUT_DISABLE))
523 #define IS_I2S_AUDIO_FREQ(__FREQ__) ((((__FREQ__) >= I2S_AUDIOFREQ_8K) && \
524 ((__FREQ__) <= I2S_AUDIOFREQ_192K)) || \
525 ((__FREQ__) == I2S_AUDIOFREQ_DEFAULT))
527 /** @brief Checks if I2S Serial clock steady state parameter is in allowed range.
528 * @param __CPOL__ specifies the I2S serial clock steady state.
529 * This parameter can be a value of @ref I2S_Clock_Polarity
530 * @retval None
532 #define IS_I2S_CPOL(__CPOL__) (((__CPOL__) == I2S_CPOL_LOW) || \
533 ((__CPOL__) == I2S_CPOL_HIGH))
536 * @}
540 * @}
544 * @}
546 #endif /* SPI_I2S_SUPPORT */
548 #ifdef __cplusplus
550 #endif
552 #endif /* STM32G4xx_HAL_I2S_H */
554 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/