lib/main/STM32G4/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_opamp.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32g4xx_hal_opamp.h
   4   * @author  MCD Application Team
   5   * @brief   Header file of OPAMP HAL module.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; Copyright (c) 2018 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19
  20 /* Define to prevent recursive inclusion -------------------------------------*/
  21 #ifndef STM32G4xx_HAL_OPAMP_H
  22 #define STM32G4xx_HAL_OPAMP_H
  23
  24 #ifdef __cplusplus
  25 extern "C" {
  26 #endif
  27
  28 /* Includes ------------------------------------------------------------------*/
  29 #include "stm32g4xx_hal_def.h"
  30
  31 /** @addtogroup STM32G4xx_HAL_Driver
  32   * @{
  33   */
  34
  35 /** @addtogroup OPAMP
  36   * @{
  37   */
  38
  39 /* Exported types ------------------------------------------------------------*/
  40 /** @defgroup OPAMP_Exported_Types OPAMP Exported Types
  41   * @{
  42   */
  43
  44 /**
  45   * @brief  OPAMP Init structure definition
  46   */
  47
  48 typedef struct
  49 {
  50   uint32_t PowerMode;                   /*!< Specifies the power mode Normal or High Speed.
  51                                              This parameter must be a value of @ref OPAMP_PowerMode */
  52
  53   uint32_t Mode;                        /*!< Specifies the OPAMP mode
  54                                              This parameter must be a value of @ref OPAMP_Mode
  55                                              mode is either Standalone, Follower or PGA */
  56
  57   uint32_t InvertingInput;              /*!< Specifies the inverting input in Standalone & Pga modes
  58                                                - In Standalone mode:   i.e when mode is OPAMP_STANDALONE_MODE
  59                                                  This parameter must be a value of @ref OPAMP_InvertingInput
  60                                                  InvertingInput is either VINM0 or VINM1
  61                                                - In PGA mode:          i.e when mode is OPAMP_PGA_MODE
  62                                                  & in Follower mode    i.e when mode is OPAMP_FOLLOWER_MODE
  63                                                  This parameter is Not Applicable */
  64
  65   uint32_t NonInvertingInput;           /*!< Specifies the non inverting input of the opamp:
  66                                              This parameter must be a value of @ref OPAMP_NonInvertingInput
  67                                              NonInvertingInput is either VINP0, VINP1, VINP2 or VINP3 */
  68
  69   FunctionalState InternalOutput;       /*!< Specifies the configuration of the internal output from OPAMP to ADC.
  70                                              This parameter can be ENABLE or DISABLE
  71                                              Note: When this output is enabled, regular output to I/O is disabled */
  72
  73   uint32_t TimerControlledMuxmode;      /*!< Specifies if the Timer controlled Mux mode is enabled or disabled
  74                                              This parameter must be a single value of @ref OPAMP_TimerControlledMuxmode
  75                                              or a combination of them to build a more complex switch scheme by
  76                                              using different timers */
  77
  78   uint32_t InvertingInputSecondary;     /*!< Specifies the inverting input (secondary) of the opamp when
  79                                              TimerControlledMuxmode is enabled
  80                                              i.e. when TimerControlledMuxmode is OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE
  81                                                - In Standalone mode:   i.e when mode is OPAMP_STANDALONE_MODE
  82                                                  This parameter must be a value of @ref OPAMP_InvertingInputSecondary
  83                                                  InvertingInputSecondary is either VINM0 or VINM1
  84                                                - In PGA mode:          i.e when mode is OPAMP_PGA_MODE
  85                                                  & in Follower mode    i.e when mode is OPAMP_FOLLOWER_MODE
  86                                                  This parameter must be a value of @ref OPAMP_InvertingInputSecondary
  87                                                  and is used to choose secondary mode (PGA or follower) */
  88
  89   uint32_t NonInvertingInputSecondary;  /*!< Specifies the non inverting input (secondary) of the opamp when
  90                                              TimerControlledMuxmode is enabled
  91                                              i.e. when TimerControlledMuxmode is OPAMP_TIMERCONTROLLEDMUXMODE_ENABLE
  92                                              This parameter must be a value of @ref OPAMP_NonInvertingInputSecondary
  93                                              NonInvertingInput is either VINP0, VINP1, VINP2 or VINP3 */
  94
  95   uint32_t PgaConnect;                  /*!< Specifies the inverting pin in PGA mode
  96                                              i.e. when mode is OPAMP_PGA_MODE
  97                                              This parameter must be a value of @ref OPAMP_PgaConnect
  98                                              Either: not connected, connected to VINM0
  99                                              In this last case, VINM0 can then be used to input signal (negative gain case
 100                                              with or without bias on VINPx) or to input bias (positive gain case with bias) */
 101
 102   uint32_t PgaGain;                     /*!< Specifies the gain in PGA mode
 103                                              i.e. when mode is OPAMP_PGA_MODE.
 104                                              This parameter must be a value of @ref OPAMP_PgaGain
 105                                              (2, 4, 8, 16, 32 or 64) for positive gain & (-1, -3 ,-7, -15, -31 or -63) for negative gain */
 106
 107   uint32_t UserTrimming;                /*!< Specifies the trimming mode
 108                                              This parameter must be a value of @ref OPAMP_UserTrimming
 109                                              UserTrimming is either factory or user trimming */
 110
 111   uint32_t TrimmingValueP;              /*!< Specifies the offset trimming value (PMOS)
 112                                              i.e. when UserTrimming is OPAMP_TRIMMING_USER.
 113                                              This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
 114
 115   uint32_t TrimmingValueN;              /*!< Specifies the offset trimming value (NMOS)
 116                                              i.e. when UserTrimming is OPAMP_TRIMMING_USER.
 117                                              This parameter must be a number between Min_Data = 1 and Max_Data = 31 */
 118
 119 } OPAMP_InitTypeDef;
 120
 121 /**
 122   * @brief  HAL State structures definition
 123   */
 124
 125 typedef enum
 126 {
 127   HAL_OPAMP_STATE_RESET               = 0x00000000UL, /*!< OPAMP is not yet Initialized          */
 128
 129   HAL_OPAMP_STATE_READY               = 0x00000001UL, /*!< OPAMP is initialized and ready for use */
 130   HAL_OPAMP_STATE_CALIBBUSY           = 0x00000002UL, /*!< OPAMP is enabled in auto calibration mode */
 131
 132   HAL_OPAMP_STATE_BUSY                = 0x00000004UL, /*!< OPAMP is enabled and running in normal mode */
 133   HAL_OPAMP_STATE_BUSYLOCKED          = 0x00000005UL, /*!< OPAMP control register is locked
 134                                                          only system reset allows reconfiguring the opamp. */
 135
 136 } HAL_OPAMP_StateTypeDef;
 137
 138 /**
 139   * @brief OPAMP Handle Structure definition
 140   */
 141 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
 142 typedef struct __OPAMP_HandleTypeDef
 143 #else
 144 typedef struct
 145 #endif
 146 {
 147   OPAMP_TypeDef       *Instance;                    /*!< OPAMP instance's registers base address   */
 148   OPAMP_InitTypeDef   Init;                         /*!< OPAMP required parameters */
 149   HAL_StatusTypeDef Status;                         /*!< OPAMP peripheral status   */
 150   HAL_LockTypeDef   Lock;                           /*!< Locking object          */
 151   __IO HAL_OPAMP_StateTypeDef  State;               /*!< OPAMP communication state */
 152
 153 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
 154   void (* MspInitCallback)(struct __OPAMP_HandleTypeDef *hopamp);
 155   void (* MspDeInitCallback)(struct __OPAMP_HandleTypeDef *hopamp);
 156 #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
 157
 158 } OPAMP_HandleTypeDef;
 159
 160 /**
 161   * @brief OPAMP_TrimmingValueTypeDef definition
 162   */
 163
 164 typedef  uint32_t OPAMP_TrimmingValueTypeDef;
 165 /**
 166   * @}
 167   */
 168
 169 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
 170 /**
 171   * @brief  HAL OPAMP Callback ID enumeration definition
 172   */
 173 typedef enum
 174 {
 175   HAL_OPAMP_MSP_INIT_CB_ID                     = 0x01UL,  /*!< OPAMP MspInit Callback ID           */
 176   HAL_OPAMP_MSP_DEINIT_CB_ID                   = 0x02UL,  /*!< OPAMP MspDeInit Callback ID         */
 177   HAL_OPAMP_ALL_CB_ID                          = 0x03UL   /*!< OPAMP All ID                        */
 178 } HAL_OPAMP_CallbackIDTypeDef;
 179
 180 /**
 181   * @brief  HAL OPAMP Callback pointer definition
 182   */
 183 typedef void (*pOPAMP_CallbackTypeDef)(OPAMP_HandleTypeDef *hopamp);
 184 #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
 185
 186
 187 /* Exported constants --------------------------------------------------------*/
 188 /** @defgroup OPAMP_Exported_Constants OPAMP Exported Constants
 189   * @{
 190   */
 191 /** @defgroup OPAMP_Mode OPAMP Mode
 192   * @{
 193   */
 194 #define OPAMP_STANDALONE_MODE            (0x00000000UL)         /*!< standalone mode */
 195 #define OPAMP_PGA_MODE                   OPAMP_CSR_VMSEL_1      /*!< PGA mode */
 196 #define OPAMP_FOLLOWER_MODE              OPAMP_CSR_VMSEL        /*!< follower mode */
 197 /**
 198   * @}
 199   */
 200
 201 /** @defgroup OPAMP_NonInvertingInput OPAMP Non Inverting Input
 202   * @{
 203   */
 204 #define OPAMP_NONINVERTINGINPUT_IO0         (0x00000000UL)        /*!< Non inverting input connected to I/O VINP0
 205                                                                        (PA1  for OPAMP1, PA7  for OPAMP2, PB0  for OPAMP3, PB13 for OPAMP4, PB14 for OPAMP5, PB12 for OPAMP6)
 206                                                                        Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 207 #define OPAMP_NONINVERTINGINPUT_IO1         OPAMP_CSR_VPSEL_0     /*!< Non inverting input connected to I/O VINP1
 208                                                                        (PA3  for OPAMP1, PB14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4, PD12 for OPAMP5, PD9  for OPAMP6)
 209                                                                        Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 210 #define OPAMP_NONINVERTINGINPUT_IO2         OPAMP_CSR_VPSEL_1     /*!< Non inverting input connected to I/O VINP2
 211                                                                        (PA7  for OPAMP1, PB0  for OPAMP2, PA1  for OPAMP3, PB11 for OPAMP4, PC3  for OPAMP5, PB13 for OPAMP6)
 212                                                                        Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 213 #define OPAMP_NONINVERTINGINPUT_IO3         OPAMP_CSR_VPSEL       /*!< Non inverting input connected to I/O VINP3
 214                                                                        (PD14 for OPAMP2) */
 215 #define OPAMP_NONINVERTINGINPUT_DAC         OPAMP_CSR_VPSEL       /*!< Non inverting input connected internally to DAC channel
 216                                                                        (DAC3_CH1 for OPAMP1, DAC3_CH2  for OPAMP3, DAC4_CH1 for OPAMP4, DAC4_CH2 for OPAMP5, DAC3_CH1 for OPAMP6)
 217                                                                        Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 218 /**
 219   * @}
 220   */
 221
 222 /** @defgroup OPAMP_InvertingInput OPAMP Inverting Input
 223   * @{
 224   */
 225 #define OPAMP_INVERTINGINPUT_IO0       (0x00000000UL)              /*!< Inverting input connected to I/O VINM0
 226                                                                        (PA3  for OPAMP1, PA5  for OPAMP2, PB2  for OPAMP3, PB10 for OPAMP4, PB15 for OPAMP5, PA1  for OPAMP6)
 227                                                                        Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 228 #define OPAMP_INVERTINGINPUT_IO1       OPAMP_CSR_VMSEL_0           /*!< Inverting input connected to I/0 VINM1
 229                                                                        (PC5  for OPAMP1, PC5  for OPAMP2, PB10 for OPAMP3, PB8  for OPAMP4, PA3  for OPAMP5, PB1  for OPAMP6)
 230                                                                        Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 231 /**
 232   * @}
 233   */
 234
 235 /** @defgroup OPAMP_TimerControlledMuxmode OPAMP Timer Controlled Mux mode
 236   * @note The switch can be controlled either by a single timer or a combination of them,
 237   *       in this case application has to 'ORed' the values below
 238   *       ex OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 | OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6
 239   * @{
 240   */
 241 #define OPAMP_TIMERCONTROLLEDMUXMODE_DISABLE    (0x00000000UL)       /*!< Timer controlled Mux mode disabled */
 242 #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6   OPAMP_TCMR_T1CMEN    /*!< Timer controlled Mux mode enabled using TIM1 OC6 */
 243 #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6   OPAMP_TCMR_T8CMEN    /*!< Timer controlled Mux mode enabled using TIM8 OC6 */
 244 #if defined(TIM20)
 245 #define OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6  OPAMP_TCMR_T20CMEN   /*!< Timer controlled Mux mode enabled using TIM20 OC6
 246                                                                           Note: On this STM32 serie, TIM20 is not available on all devices. Refer to device datasheet for more details */
 247 #endif
 248 /**
 249   * @}
 250   */
 251
 252 /** @defgroup OPAMP_NonInvertingInputSecondary OPAMP Non Inverting Input Secondary
 253   * @{
 254   */
 255 #define OPAMP_SEC_NONINVERTINGINPUT_IO0         (0x00000000UL)        /*!< Secondary non inverting input connected to I/O VINP0
 256                                                                            (PA1  for OPAMP1, PA7  for OPAMP2, PB0  for OPAMP3, PB13 for OPAMP4, PB14 for OPAMP5, PB12 for OPAMP6)
 257                                                                            Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 258 #define OPAMP_SEC_NONINVERTINGINPUT_IO1         OPAMP_TCMR_VPSSEL_0   /*!< Secondary non inverting input connected to I/O VINP1
 259                                                                            (PA3  for OPAMP1, PB14 for OPAMP2, PB13 for OPAMP3, PD11 for OPAMP4, PD12 for OPAMP5, PD9  for OPAMP6)
 260                                                                            Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 261 #define OPAMP_SEC_NONINVERTINGINPUT_IO2         OPAMP_TCMR_VPSSEL_1   /*!< Secondary non inverting input connected to I/O VINP2
 262                                                                            (PA7  for OPAMP1, PB0  for OPAMP2, PA1  for OPAMP3, PB11 for OPAMP4, PC3  for OPAMP5, PB13 for OPAMP6)
 263                                                                            Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 264 #define OPAMP_SEC_NONINVERTINGINPUT_IO3         OPAMP_TCMR_VPSSEL     /*!< Secondary non inverting input connected to I/O VINP3
 265                                                                            (PD14 for OPAMP2) */
 266 #define OPAMP_SEC_NONINVERTINGINPUT_DAC         OPAMP_TCMR_VPSSEL     /*!< Secondary non inverting input connected internally to DAC channel
 267                                                                            (DAC3_CH1 for OPAMP1, DAC3_CH2  for OPAMP3, DAC4_CH1 for OPAMP4, DAC4_CH2 for OPAMP5, DAC3_CH1 for OPAMP6)
 268                                                                            Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 269 /**
 270   * @}
 271   */
 272
 273 /** @defgroup OPAMP_InvertingInputSecondary OPAMP Inverting Input Secondary
 274   * @{
 275   */
 276 #define OPAMP_SEC_INVERTINGINPUT_IO0       (0x00000000UL)              /*!< OPAMP secondary mode is standalone mode - Only applicable if @ref OPAMP_STANDALONE_MODE
 277                                                                             has been configured by call to @ref HAL_OPAMP_Init().
 278                                                                             Secondary inverting input connected to I/O VINM0
 279                                                                             (PA3  for OPAMP1, PA5  for OPAMP2, PB2  for OPAMP3, PB10 for OPAMP4, PB15 for OPAMP5, PA1  for OPAMP6)
 280                                                                             Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 281 #define OPAMP_SEC_INVERTINGINPUT_IO1       OPAMP_TCMR_VMSSEL           /*!< OPAMP secondary mode is standalone mode - Only applicable if @ref OPAMP_STANDALONE_MODE
 282                                                                             has been configured by call to @ref HAL_OPAMP_Init().
 283                                                                             Secondary inverting input connected to I/0 VINM1
 284                                                                             (PC5  for OPAMP1, PC5  for OPAMP2, PB10 for OPAMP3, PB8  for OPAMP4, PA3  for OPAMP5, PB1  for OPAMP6)
 285                                                                             Note: On this STM32 serie, all OPAMPx are not available on all devices. Refer to device datasheet for more details */
 286 #define OPAMP_SEC_INVERTINGINPUT_PGA       (0x00000000UL)              /*!< OPAMP secondary mode is PGA mode - Only applicable if configured mode through call to @ref HAL_OPAMP_Init()
 287                                                                            is @ref OPAMP_PGA_MODE or @ref OPAMP_FOLLOWER_MODE.
 288                                                                            OPAMP secondary inverting input is:
 289                                                                              - Not connected if configured mode is @ref OPAMP_FOLLOWER_MODE
 290                                                                              - Not connected if configured mode is @ref OPAMP_PGA_MODE and PGA connect mode is @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_NO
 291                                                                              - Connected to VINM0 and possibly VINM1 if any of the other modes as been configured
 292                                                                            (see @ref OPAMP_PgaConnect description for more details on PGA connection modes) */
 293 #define OPAMP_SEC_INVERTINGINPUT_FOLLOWER  OPAMP_TCMR_VMSSEL           /*!< OPAMP secondary mode is Follower mode - Only applicable if configured mode through call to @ref HAL_OPAMP_Init()
 294                                                                            is @ref OPAMP_PGA_MODE or @ref OPAMP_FOLLOWER_MODE.
 295                                                                            OPAMP secondary inverting input is not connected. */
 296 /**
 297   * @}
 298   */
 299
 300 /** @defgroup OPAMP_PgaConnect OPAMP Pga Connect
 301   * @{
 302   */
 303 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_NO               (0x00000000UL)                            /*!< In PGA mode, the inverting input is not connected */
 304 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0              OPAMP_CSR_PGGAIN_4                        /*!< In PGA mode, the inverting input is connected to VINM0 for filtering */
 305 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS         OPAMP_CSR_PGGAIN_3                        /*!< In PGA mode, the inverting input is connected to VINM0
 306                                                                                                       - Input signal on VINM0, bias on VINPx: negative gain
 307                                                                                                       - Bias on VINM0, input signal on VINPx: positive gain */
 308 #define OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS     (OPAMP_CSR_PGGAIN_4|OPAMP_CSR_PGGAIN_3)   /*!< In PGA mode, the inverting input is connected to VINM0
 309                                                                                                       - Input signal on VINM0, bias on VINPx: negative gain
 310                                                                                                       - Bias on VINM0, input signal on VINPx: positive gain
 311                                                                                                       And VINM1 is connected too for filtering */
 312 /**
 313   * @}
 314   */
 315
 316 /** @defgroup OPAMP_PgaGain OPAMP Pga Gain
 317   * @note Gain sign:
 318   *         - is positive if the @ref OPAMP_PgaConnect configuration is
 319   *           @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_NO or OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0
 320   *         - may be positive or negative if the @ref OPAMP_PgaConnect configuration is
 321   *           @ref OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS or OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS
 322   *       see @ref OPAMP_PgaConnect for more details
 323   * @{
 324   */
 325 #define OPAMP_PGA_GAIN_2_OR_MINUS_1          (0x00000000UL)                                                      /*!< PGA gain could be 2  or -1  */
 326 #define OPAMP_PGA_GAIN_4_OR_MINUS_3          (                                          OPAMP_CSR_PGGAIN_0)      /*!< PGA gain could be 4  or -3  */
 327 #define OPAMP_PGA_GAIN_8_OR_MINUS_7          (                     OPAMP_CSR_PGGAIN_1                     )      /*!< PGA gain could be 8  or -7  */
 328 #define OPAMP_PGA_GAIN_16_OR_MINUS_15        (                     OPAMP_CSR_PGGAIN_1 | OPAMP_CSR_PGGAIN_0)      /*!< PGA gain could be 16 or -15 */
 329 #define OPAMP_PGA_GAIN_32_OR_MINUS_31        (OPAMP_CSR_PGGAIN_2                                          )      /*!< PGA gain could be 32 or -31 */
 330 #define OPAMP_PGA_GAIN_64_OR_MINUS_63        (OPAMP_CSR_PGGAIN_2 |                      OPAMP_CSR_PGGAIN_0)      /*!< PGA gain could be 64 or -63 */
 331 /**
 332   * @}
 333   */
 334
 335 /** @defgroup OPAMP_PowerMode OPAMP PowerMode
 336   * @{
 337   */
 338 #define OPAMP_POWERMODE_NORMAL        (0x00000000UL)         /*!< Output in normal mode */
 339 #define OPAMP_POWERMODE_HIGHSPEED     OPAMP_CSR_HIGHSPEEDEN  /*!< Output in highspeed mode */
 340 /**
 341   * @}
 342   */
 343
 344 /** @defgroup OPAMP_UserTrimming OPAMP User Trimming
 345   * @{
 346   */
 347 #define OPAMP_TRIMMING_FACTORY        (0x00000000UL)                       /*!< Factory trimming */
 348 #define OPAMP_TRIMMING_USER           OPAMP_CSR_USERTRIM                   /*!< User trimming */
 349 /**
 350   * @}
 351   */
 352
 353 /** @defgroup OPAMP_FactoryTrimming OPAMP Factory Trimming
 354   * @{
 355   */
 356 #define OPAMP_FACTORYTRIMMING_DUMMY    (0xFFFFFFFFUL)                         /*!< Dummy trimming value */
 357
 358 #define OPAMP_FACTORYTRIMMING_N        (0x00000000UL)                         /*!< Offset trimming N */
 359 #define OPAMP_FACTORYTRIMMING_P        (0x00000001UL)                         /*!< Offset trimming P */
 360 /**
 361   * @}
 362   */
 363
 364 /** @defgroup OPAMP_VREF OPAMP VREF
 365   * @{
 366   */
 367 #define OPAMP_VREF_3VDDA                    (0x00000000UL)          /*!< OPAMP Vref = 3.3% VDDA */
 368 #define OPAMP_VREF_10VDDA                    OPAMP_CSR_CALSEL_0     /*!< OPAMP Vref = 10% VDDA  */
 369 #define OPAMP_VREF_50VDDA                    OPAMP_CSR_CALSEL_1     /*!< OPAMP Vref = 50% VDDA  */
 370 #define OPAMP_VREF_90VDDA                    OPAMP_CSR_CALSEL       /*!< OPAMP Vref = 90% VDDA  */
 371 /**
 372   * @}
 373   */
 374
 375 /**
 376   * @}
 377   */
 378
 379
 380 /* Private constants ---------------------------------------------------------*/
 381 /** @defgroup OPAMP_Private_Constants OPAMP Private Constants
 382   * @brief   OPAMP Private constants and defines
 383   * @{
 384   */
 385 /** @defgroup OPAMP_Input OPAMP Input
 386   * @{
 387   */
 388 #define OPAMP_INPUT_INVERTING                 ( 24UL) /*!< Inverting input */
 389 #define OPAMP_INPUT_NONINVERTING              ( 19UL) /*!< Non inverting input */
 390
 391 #define IS_OPAMP_INPUT(INPUT) (((INPUT) == OPAMP_INPUT_INVERTING) || \
 392                                ((INPUT) == OPAMP_INPUT_NONINVERTING))
 393 /**
 394   * @}
 395   */
 396
 397 /**
 398   * @}
 399   */
 400
 401
 402 /* Private macro -------------------------------------------------------------*/
 403
 404 /** @defgroup OPAMP_Private_Macros OPAMP Private Macros
 405   * @{
 406   */
 407
 408 #define IS_OPAMP_FUNCTIONAL_NORMALMODE(INPUT) (((INPUT) == OPAMP_STANDALONE_MODE) || \
 409                                                ((INPUT) == OPAMP_PGA_MODE) || \
 410                                                ((INPUT) == OPAMP_FOLLOWER_MODE))
 411
 412 #define IS_OPAMP_NONINVERTING_INPUT(INPUT) (((INPUT) == OPAMP_NONINVERTINGINPUT_IO0) || \
 413                                             ((INPUT) == OPAMP_NONINVERTINGINPUT_IO1) || \
 414                                             ((INPUT) == OPAMP_NONINVERTINGINPUT_IO2) || \
 415                                             ((INPUT) == OPAMP_NONINVERTINGINPUT_IO3) || \
 416                                             ((INPUT) == OPAMP_NONINVERTINGINPUT_DAC))
 417
 418 #define IS_OPAMP_INVERTING_INPUT(INPUT) (((INPUT) == OPAMP_INVERTINGINPUT_IO0) || \
 419                                          ((INPUT) == OPAMP_INVERTINGINPUT_IO1))
 420
 421 #if defined(TIM20)
 422 #define IS_OPAMP_TIMERCONTROLLED_MUXMODE(MUXMODE)  \
 423   ((MUXMODE) <= (OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 |    \
 424                  OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6 |    \
 425                  OPAMP_TIMERCONTROLLEDMUXMODE_TIM20_CH6))
 426 #else
 427 #define IS_OPAMP_TIMERCONTROLLED_MUXMODE(MUXMODE)  \
 428   ((MUXMODE) <= (OPAMP_TIMERCONTROLLEDMUXMODE_TIM1_CH6 |    \
 429                  OPAMP_TIMERCONTROLLEDMUXMODE_TIM8_CH6))
 430 #endif
 431
 432 #define IS_OPAMP_SEC_NONINVERTING_INPUT(INPUT) (((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO0) || \
 433                                                 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO1) || \
 434                                                 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO2) || \
 435                                                 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_IO3) || \
 436                                                 ((INPUT) == OPAMP_SEC_NONINVERTINGINPUT_DAC))
 437
 438 #define IS_OPAMP_SEC_INVERTING_INPUT(INPUT) (((INPUT) == OPAMP_SEC_INVERTINGINPUT_IO0) || \
 439                                              ((INPUT) == OPAMP_SEC_INVERTINGINPUT_IO1) || \
 440                                              ((INPUT) == OPAMP_SEC_INVERTINGINPUT_PGA) || \
 441                                              ((INPUT) == OPAMP_SEC_INVERTINGINPUT_FOLLOWER))
 442
 443 #define IS_OPAMP_PGACONNECT(CONNECT) (((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_NO)            || \
 444                                       ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0)           || \
 445                                       ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_BIAS)      || \
 446                                       ((CONNECT) == OPAMP_PGA_CONNECT_INVERTINGINPUT_IO0_IO1_BIAS))
 447
 448 #define IS_OPAMP_PGA_GAIN(GAIN) (((GAIN) == OPAMP_PGA_GAIN_2_OR_MINUS_1)   || \
 449                                  ((GAIN) == OPAMP_PGA_GAIN_4_OR_MINUS_3)   || \
 450                                  ((GAIN) == OPAMP_PGA_GAIN_8_OR_MINUS_7)   || \
 451                                  ((GAIN) == OPAMP_PGA_GAIN_16_OR_MINUS_15) || \
 452                                  ((GAIN) == OPAMP_PGA_GAIN_32_OR_MINUS_31) || \
 453                                  ((GAIN) == OPAMP_PGA_GAIN_64_OR_MINUS_63))
 454
 455 #define IS_OPAMP_POWERMODE(POWERMODE) (((POWERMODE) == OPAMP_POWERMODE_NORMAL) || \
 456                                        ((POWERMODE) == OPAMP_POWERMODE_HIGHSPEED) )
 457
 458 #define IS_OPAMP_TRIMMING(TRIMMING) (((TRIMMING) == OPAMP_TRIMMING_FACTORY) || \
 459                                      ((TRIMMING) == OPAMP_TRIMMING_USER))
 460
 461 #define IS_OPAMP_FACTORYTRIMMING(TRIMMING) (((TRIMMING) == OPAMP_FACTORYTRIMMING_N) || \
 462                                             ((TRIMMING) == OPAMP_FACTORYTRIMMING_P))
 463
 464 #define IS_OPAMP_TRIMMINGVALUE(TRIMMINGVALUE) ((TRIMMINGVALUE) <= 0x1FUL)
 465
 466 #define IS_OPAMP_VREF(VREF) (((VREF) == OPAMP_VREF_3VDDA)  || \
 467                              ((VREF) == OPAMP_VREF_10VDDA) || \
 468                              ((VREF) == OPAMP_VREF_50VDDA) || \
 469                              ((VREF) == OPAMP_VREF_90VDDA))
 470 /**
 471   * @}
 472   */
 473
 474
 475 /* Exported macros -----------------------------------------------------------*/
 476 /** @defgroup OPAMP_Exported_Macros OPAMP Exported Macros
 477   * @{
 478   */
 479
 480 /** @brief Reset OPAMP handle state
 481   * @param  __HANDLE__ OPAMP handle.
 482   * @retval None
 483   */
 484 #define __HAL_OPAMP_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_OPAMP_STATE_RESET)
 485
 486 /**
 487   * @}
 488   */
 489
 490 /* Include OPAMP HAL Extended module */
 491 #include "stm32g4xx_hal_opamp_ex.h"
 492
 493 /* Exported functions --------------------------------------------------------*/
 494 /** @defgroup OPAMP_Exported_Functions OPAMP Exported Functions
 495   * @{
 496   */
 497
 498 /** @defgroup OPAMP_Exported_Functions_Group1 Initialization and de-initialization functions
 499   * @{
 500   */
 501
 502 /* Initialization/de-initialization functions  **********************************/
 503 HAL_StatusTypeDef HAL_OPAMP_Init(OPAMP_HandleTypeDef *hopamp);
 504 HAL_StatusTypeDef HAL_OPAMP_DeInit(OPAMP_HandleTypeDef *hopamp);
 505 void HAL_OPAMP_MspInit(OPAMP_HandleTypeDef *hopamp);
 506 void HAL_OPAMP_MspDeInit(OPAMP_HandleTypeDef *hopamp);
 507 /**
 508   * @}
 509   */
 510
 511
 512 /** @defgroup OPAMP_Exported_Functions_Group2 Input and Output operation functions
 513   * @{
 514   */
 515
 516 /* I/O operation functions  *****************************************************/
 517 HAL_StatusTypeDef HAL_OPAMP_Start(OPAMP_HandleTypeDef *hopamp);
 518 HAL_StatusTypeDef HAL_OPAMP_Stop(OPAMP_HandleTypeDef *hopamp);
 519 HAL_StatusTypeDef HAL_OPAMP_SelfCalibrate(OPAMP_HandleTypeDef *hopamp);
 520
 521 /**
 522   * @}
 523   */
 524
 525 /** @defgroup OPAMP_Exported_Functions_Group3 Peripheral Control functions
 526   * @{
 527   */
 528
 529 /* Peripheral Control functions  ************************************************/
 530 #if (USE_HAL_OPAMP_REGISTER_CALLBACKS == 1)
 531 /* OPAMP callback registering/unregistering */
 532 HAL_StatusTypeDef HAL_OPAMP_RegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackId,
 533                                              pOPAMP_CallbackTypeDef pCallback);
 534 HAL_StatusTypeDef HAL_OPAMP_UnRegisterCallback(OPAMP_HandleTypeDef *hopamp, HAL_OPAMP_CallbackIDTypeDef CallbackId);
 535 #endif /* USE_HAL_OPAMP_REGISTER_CALLBACKS */
 536
 537 HAL_StatusTypeDef HAL_OPAMP_Lock(OPAMP_HandleTypeDef *hopamp);
 538 HAL_StatusTypeDef HAL_OPAMP_LockTimerMux(OPAMP_HandleTypeDef *hopamp);
 539
 540 /**
 541   * @}
 542   */
 543
 544 /** @defgroup OPAMP_Exported_Functions_Group4 Peripheral State functions
 545   * @{
 546   */
 547
 548 /* Peripheral State functions  **************************************************/
 549 HAL_OPAMP_StateTypeDef HAL_OPAMP_GetState(OPAMP_HandleTypeDef *hopamp);
 550 OPAMP_TrimmingValueTypeDef HAL_OPAMP_GetTrimOffset(OPAMP_HandleTypeDef *hopamp, uint32_t trimmingoffset);
 551
 552 /**
 553   * @}
 554   */
 555
 556 /**
 557   * @}
 558   */
 559
 560 /**
 561   * @}
 562   */
 563
 564 /**
 565   * @}
 566   */
 567
 568
 569 #ifdef __cplusplus
 570 }
 571 #endif
 572
 573 #endif /* STM32G4xx_HAL_OPAMP_H */
 574
 575 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/