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Merge pull request #11189 from klutvott123/move-telemetry-displayport-init
[betaflight.git] / lib / main / STM32G4 / Drivers / STM32G4xx_HAL_Driver / Inc / stm32g4xx_hal_pcd.h
blob852dc8093c6329f46b32536be4a4af94590a3f7e
1 /**
2 ******************************************************************************
3 * @file stm32g4xx_hal_pcd.h
4 * @author MCD Application Team
5 * @brief Header file of PCD HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32G4xx_HAL_PCD_H
22 #define STM32G4xx_HAL_PCD_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32g4xx_ll_usb.h"
30
31 #if defined (USB)
32
33 /** @addtogroup STM32G4xx_HAL_Driver
34 * @{
35 */
36
37 /** @addtogroup PCD
38 * @{
39 */
40
41 /* Exported types ------------------------------------------------------------*/
42 /** @defgroup PCD_Exported_Types PCD Exported Types
43 * @{
44 */
45
46 /**
47 * @brief PCD State structure definition
48 */
49 typedef enum
50 {
51 HAL_PCD_STATE_RESET = 0x00,
52 HAL_PCD_STATE_READY = 0x01,
53 HAL_PCD_STATE_ERROR = 0x02,
54 HAL_PCD_STATE_BUSY = 0x03,
55 HAL_PCD_STATE_TIMEOUT = 0x04
56 } PCD_StateTypeDef;
57
58 /* Device LPM suspend state */
59 typedef enum
60 {
61 LPM_L0 = 0x00, /* on */
62 LPM_L1 = 0x01, /* LPM L1 sleep */
63 LPM_L2 = 0x02, /* suspend */
64 LPM_L3 = 0x03, /* off */
65 } PCD_LPM_StateTypeDef;
66
67 typedef enum
68 {
69 PCD_LPM_L0_ACTIVE = 0x00, /* on */
70 PCD_LPM_L1_ACTIVE = 0x01, /* LPM L1 sleep */
71 } PCD_LPM_MsgTypeDef;
72
73 typedef enum
74 {
75 PCD_BCD_ERROR = 0xFF,
76 PCD_BCD_CONTACT_DETECTION = 0xFE,
77 PCD_BCD_STD_DOWNSTREAM_PORT = 0xFD,
78 PCD_BCD_CHARGING_DOWNSTREAM_PORT = 0xFC,
79 PCD_BCD_DEDICATED_CHARGING_PORT = 0xFB,
80 PCD_BCD_DISCOVERY_COMPLETED = 0x00,
81
82 } PCD_BCD_MsgTypeDef;
83
84
85
86
87
88 typedef USB_TypeDef PCD_TypeDef;
89 typedef USB_CfgTypeDef PCD_InitTypeDef;
90 typedef USB_EPTypeDef PCD_EPTypeDef;
91
92
93 /**
94 * @brief PCD Handle Structure definition
95 */
96 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
97 typedef struct __PCD_HandleTypeDef
98 #else
99 typedef struct
100 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
101 {
102 PCD_TypeDef *Instance; /*!< Register base address */
103 PCD_InitTypeDef Init; /*!< PCD required parameters */
104 __IO uint8_t USB_Address; /*!< USB Address */
105 PCD_EPTypeDef IN_ep[8]; /*!< IN endpoint parameters */
106 PCD_EPTypeDef OUT_ep[8]; /*!< OUT endpoint parameters */
107 HAL_LockTypeDef Lock; /*!< PCD peripheral status */
108 __IO PCD_StateTypeDef State; /*!< PCD communication state */
109 __IO uint32_t ErrorCode; /*!< PCD Error code */
110 uint32_t Setup[12]; /*!< Setup packet buffer */
111 PCD_LPM_StateTypeDef LPM_State; /*!< LPM State */
112 uint32_t BESL;
113
114
115 uint32_t lpm_active; /*!< Enable or disable the Link Power Management .
116 This parameter can be set to ENABLE or DISABLE */
117
118 uint32_t battery_charging_active; /*!< Enable or disable Battery charging.
119 This parameter can be set to ENABLE or DISABLE */
120 void *pData; /*!< Pointer to upper stack Handler */
121
122 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
123 void (* SOFCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD SOF callback */
124 void (* SetupStageCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Setup Stage callback */
125 void (* ResetCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Reset callback */
126 void (* SuspendCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Suspend callback */
127 void (* ResumeCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Resume callback */
128 void (* ConnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Connect callback */
129 void (* DisconnectCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Disconnect callback */
130
131 void (* DataOutStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data OUT Stage callback */
132 void (* DataInStageCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD Data IN Stage callback */
133 void (* ISOOUTIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO OUT Incomplete callback */
134 void (* ISOINIncompleteCallback)(struct __PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< USB OTG PCD ISO IN Incomplete callback */
135 void (* BCDCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< USB OTG PCD BCD callback */
136 void (* LPMCallback)(struct __PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< USB OTG PCD LPM callback */
137
138 void (* MspInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp Init callback */
139 void (* MspDeInitCallback)(struct __PCD_HandleTypeDef *hpcd); /*!< USB OTG PCD Msp DeInit callback */
140 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
141 } PCD_HandleTypeDef;
142
143 /**
144 * @}
145 */
146
147 /* Include PCD HAL Extended module */
148 #include "stm32g4xx_hal_pcd_ex.h"
149
150 /* Exported constants --------------------------------------------------------*/
151 /** @defgroup PCD_Exported_Constants PCD Exported Constants
152 * @{
153 */
154
155 /** @defgroup PCD_Speed PCD Speed
156 * @{
157 */
158 #define PCD_SPEED_FULL 2U
159 /**
160 * @}
161 */
162
163 /** @defgroup PCD_PHY_Module PCD PHY Module
164 * @{
165 */
166 #define PCD_PHY_ULPI 1U
167 #define PCD_PHY_EMBEDDED 2U
168 #define PCD_PHY_UTMI 3U
169 /**
170 * @}
171 */
172
173 /** @defgroup PCD_Error_Code_definition PCD Error Code definition
174 * @brief PCD Error Code definition
175 * @{
176 */
177 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
178 #define HAL_PCD_ERROR_INVALID_CALLBACK (0x00000010U) /*!< Invalid Callback error */
179 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
180
181 /**
182 * @}
183 */
184
185 /**
186 * @}
187 */
188
189 /* Exported macros -----------------------------------------------------------*/
190 /** @defgroup PCD_Exported_Macros PCD Exported Macros
191 * @brief macros to handle interrupts and specific clock configurations
192 * @{
193 */
194
195
196 #define __HAL_PCD_ENABLE(__HANDLE__) (void)USB_EnableGlobalInt ((__HANDLE__)->Instance)
197 #define __HAL_PCD_DISABLE(__HANDLE__) (void)USB_DisableGlobalInt ((__HANDLE__)->Instance)
198 #define __HAL_PCD_GET_FLAG(__HANDLE__, __INTERRUPT__) ((USB_ReadInterrupts((__HANDLE__)->Instance) & (__INTERRUPT__)) == (__INTERRUPT__))
199 #define __HAL_PCD_CLEAR_FLAG(__HANDLE__, __INTERRUPT__) (((__HANDLE__)->Instance->ISTR) &= ~(__INTERRUPT__))
200
201 #define __HAL_USB_WAKEUP_EXTI_ENABLE_IT() EXTI->IMR1 |= USB_WAKEUP_EXTI_LINE
202 #define __HAL_USB_WAKEUP_EXTI_DISABLE_IT() EXTI->IMR1 &= ~(USB_WAKEUP_EXTI_LINE)
203 #define __HAL_USB_WAKEUP_EXTI_GET_FLAG() EXTI->PR1 & (USB_WAKEUP_EXTI_LINE)
204 #define __HAL_USB_WAKEUP_EXTI_CLEAR_FLAG() EXTI->PR1 = USB_WAKEUP_EXTI_LINE
205
206 #define __HAL_USB_WAKEUP_EXTI_ENABLE_RISING_EDGE() \
207 do { \
208 EXTI->FTSR1 &= ~(USB_WAKEUP_EXTI_LINE); \
209 EXTI->RTSR1 |= USB_WAKEUP_EXTI_LINE; \
210 } while(0U)
211
212
213
214 /**
215 * @}
216 */
217
218 /* Exported functions --------------------------------------------------------*/
219 /** @addtogroup PCD_Exported_Functions PCD Exported Functions
220 * @{
221 */
222
223 /* Initialization/de-initialization functions ********************************/
224 /** @addtogroup PCD_Exported_Functions_Group1 Initialization and de-initialization functions
225 * @{
226 */
227 HAL_StatusTypeDef HAL_PCD_Init(PCD_HandleTypeDef *hpcd);
228 HAL_StatusTypeDef HAL_PCD_DeInit(PCD_HandleTypeDef *hpcd);
229 void HAL_PCD_MspInit(PCD_HandleTypeDef *hpcd);
230 void HAL_PCD_MspDeInit(PCD_HandleTypeDef *hpcd);
231
232 #if (USE_HAL_PCD_REGISTER_CALLBACKS == 1U)
233 /** @defgroup HAL_PCD_Callback_ID_enumeration_definition HAL USB OTG PCD Callback ID enumeration definition
234 * @brief HAL USB OTG PCD Callback ID enumeration definition
235 * @{
236 */
237 typedef enum
238 {
239 HAL_PCD_SOF_CB_ID = 0x01, /*!< USB PCD SOF callback ID */
240 HAL_PCD_SETUPSTAGE_CB_ID = 0x02, /*!< USB PCD Setup Stage callback ID */
241 HAL_PCD_RESET_CB_ID = 0x03, /*!< USB PCD Reset callback ID */
242 HAL_PCD_SUSPEND_CB_ID = 0x04, /*!< USB PCD Suspend callback ID */
243 HAL_PCD_RESUME_CB_ID = 0x05, /*!< USB PCD Resume callback ID */
244 HAL_PCD_CONNECT_CB_ID = 0x06, /*!< USB PCD Connect callback ID */
245 HAL_PCD_DISCONNECT_CB_ID = 0x07, /*!< USB PCD Disconnect callback ID */
246
247 HAL_PCD_MSPINIT_CB_ID = 0x08, /*!< USB PCD MspInit callback ID */
248 HAL_PCD_MSPDEINIT_CB_ID = 0x09 /*!< USB PCD MspDeInit callback ID */
249
250 } HAL_PCD_CallbackIDTypeDef;
251 /**
252 * @}
253 */
254
255 /** @defgroup HAL_PCD_Callback_pointer_definition HAL USB OTG PCD Callback pointer definition
256 * @brief HAL USB OTG PCD Callback pointer definition
257 * @{
258 */
259
260 typedef void (*pPCD_CallbackTypeDef)(PCD_HandleTypeDef *hpcd); /*!< pointer to a common USB OTG PCD callback function */
261 typedef void (*pPCD_DataOutStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data OUT Stage callback */
262 typedef void (*pPCD_DataInStageCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD Data IN Stage callback */
263 typedef void (*pPCD_IsoOutIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO OUT Incomplete callback */
264 typedef void (*pPCD_IsoInIncpltCallbackTypeDef)(PCD_HandleTypeDef *hpcd, uint8_t epnum); /*!< pointer to USB OTG PCD ISO IN Incomplete callback */
265 typedef void (*pPCD_LpmCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_LPM_MsgTypeDef msg); /*!< pointer to USB OTG PCD LPM callback */
266 typedef void (*pPCD_BcdCallbackTypeDef)(PCD_HandleTypeDef *hpcd, PCD_BCD_MsgTypeDef msg); /*!< pointer to USB OTG PCD BCD callback */
267
268 /**
269 * @}
270 */
271
272 HAL_StatusTypeDef HAL_PCD_RegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID, pPCD_CallbackTypeDef pCallback);
273 HAL_StatusTypeDef HAL_PCD_UnRegisterCallback(PCD_HandleTypeDef *hpcd, HAL_PCD_CallbackIDTypeDef CallbackID);
274
275 HAL_StatusTypeDef HAL_PCD_RegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataOutStageCallbackTypeDef pCallback);
276 HAL_StatusTypeDef HAL_PCD_UnRegisterDataOutStageCallback(PCD_HandleTypeDef *hpcd);
277
278 HAL_StatusTypeDef HAL_PCD_RegisterDataInStageCallback(PCD_HandleTypeDef *hpcd, pPCD_DataInStageCallbackTypeDef pCallback);
279 HAL_StatusTypeDef HAL_PCD_UnRegisterDataInStageCallback(PCD_HandleTypeDef *hpcd);
280
281 HAL_StatusTypeDef HAL_PCD_RegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoOutIncpltCallbackTypeDef pCallback);
282 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoOutIncpltCallback(PCD_HandleTypeDef *hpcd);
283
284 HAL_StatusTypeDef HAL_PCD_RegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd, pPCD_IsoInIncpltCallbackTypeDef pCallback);
285 HAL_StatusTypeDef HAL_PCD_UnRegisterIsoInIncpltCallback(PCD_HandleTypeDef *hpcd);
286
287 HAL_StatusTypeDef HAL_PCD_RegisterBcdCallback(PCD_HandleTypeDef *hpcd, pPCD_BcdCallbackTypeDef pCallback);
288 HAL_StatusTypeDef HAL_PCD_UnRegisterBcdCallback(PCD_HandleTypeDef *hpcd);
289
290 HAL_StatusTypeDef HAL_PCD_RegisterLpmCallback(PCD_HandleTypeDef *hpcd, pPCD_LpmCallbackTypeDef pCallback);
291 HAL_StatusTypeDef HAL_PCD_UnRegisterLpmCallback(PCD_HandleTypeDef *hpcd);
292 #endif /* USE_HAL_PCD_REGISTER_CALLBACKS */
293 /**
294 * @}
295 */
296
297 /* I/O operation functions ***************************************************/
298 /* Non-Blocking mode: Interrupt */
299 /** @addtogroup PCD_Exported_Functions_Group2 Input and Output operation functions
300 * @{
301 */
302 HAL_StatusTypeDef HAL_PCD_Start(PCD_HandleTypeDef *hpcd);
303 HAL_StatusTypeDef HAL_PCD_Stop(PCD_HandleTypeDef *hpcd);
304 void HAL_PCD_IRQHandler(PCD_HandleTypeDef *hpcd);
305
306 void HAL_PCD_SOFCallback(PCD_HandleTypeDef *hpcd);
307 void HAL_PCD_SetupStageCallback(PCD_HandleTypeDef *hpcd);
308 void HAL_PCD_ResetCallback(PCD_HandleTypeDef *hpcd);
309 void HAL_PCD_SuspendCallback(PCD_HandleTypeDef *hpcd);
310 void HAL_PCD_ResumeCallback(PCD_HandleTypeDef *hpcd);
311 void HAL_PCD_ConnectCallback(PCD_HandleTypeDef *hpcd);
312 void HAL_PCD_DisconnectCallback(PCD_HandleTypeDef *hpcd);
313
314 void HAL_PCD_DataOutStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
315 void HAL_PCD_DataInStageCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
316 void HAL_PCD_ISOOUTIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
317 void HAL_PCD_ISOINIncompleteCallback(PCD_HandleTypeDef *hpcd, uint8_t epnum);
318 /**
319 * @}
320 */
321
322 /* Peripheral Control functions **********************************************/
323 /** @addtogroup PCD_Exported_Functions_Group3 Peripheral Control functions
324 * @{
325 */
326 HAL_StatusTypeDef HAL_PCD_DevConnect(PCD_HandleTypeDef *hpcd);
327 HAL_StatusTypeDef HAL_PCD_DevDisconnect(PCD_HandleTypeDef *hpcd);
328 HAL_StatusTypeDef HAL_PCD_SetAddress(PCD_HandleTypeDef *hpcd, uint8_t address);
329 HAL_StatusTypeDef HAL_PCD_EP_Open(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint16_t ep_mps, uint8_t ep_type);
330 HAL_StatusTypeDef HAL_PCD_EP_Close(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
331 HAL_StatusTypeDef HAL_PCD_EP_Receive(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
332 HAL_StatusTypeDef HAL_PCD_EP_Transmit(PCD_HandleTypeDef *hpcd, uint8_t ep_addr, uint8_t *pBuf, uint32_t len);
333 uint32_t HAL_PCD_EP_GetRxCount(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
334 HAL_StatusTypeDef HAL_PCD_EP_SetStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
335 HAL_StatusTypeDef HAL_PCD_EP_ClrStall(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
336 HAL_StatusTypeDef HAL_PCD_EP_Flush(PCD_HandleTypeDef *hpcd, uint8_t ep_addr);
337 HAL_StatusTypeDef HAL_PCD_ActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
338 HAL_StatusTypeDef HAL_PCD_DeActivateRemoteWakeup(PCD_HandleTypeDef *hpcd);
339 /**
340 * @}
341 */
342
343 /* Peripheral State functions ************************************************/
344 /** @addtogroup PCD_Exported_Functions_Group4 Peripheral State functions
345 * @{
346 */
347 PCD_StateTypeDef HAL_PCD_GetState(PCD_HandleTypeDef *hpcd);
348 /**
349 * @}
350 */
351
352 /**
353 * @}
354 */
355
356 /* Private constants ---------------------------------------------------------*/
357 /** @defgroup PCD_Private_Constants PCD Private Constants
358 * @{
359 */
360 /** @defgroup USB_EXTI_Line_Interrupt USB EXTI line interrupt
361 * @{
362 */
363
364
365 #define USB_WAKEUP_EXTI_LINE (0x1U << 18) /*!< USB FS EXTI Line WakeUp Interrupt */
366
367
368 /**
369 * @}
370 */
371
372 /** @defgroup PCD_EP0_MPS PCD EP0 MPS
373 * @{
374 */
375 #define PCD_EP0MPS_64 DEP0CTL_MPS_64
376 #define PCD_EP0MPS_32 DEP0CTL_MPS_32
377 #define PCD_EP0MPS_16 DEP0CTL_MPS_16
378 #define PCD_EP0MPS_08 DEP0CTL_MPS_8
379 /**
380 * @}
381 */
382
383 /** @defgroup PCD_ENDP PCD ENDP
384 * @{
385 */
386 #define PCD_ENDP0 0U
387 #define PCD_ENDP1 1U
388 #define PCD_ENDP2 2U
389 #define PCD_ENDP3 3U
390 #define PCD_ENDP4 4U
391 #define PCD_ENDP5 5U
392 #define PCD_ENDP6 6U
393 #define PCD_ENDP7 7U
394 /**
395 * @}
396 */
397
398 /** @defgroup PCD_ENDP_Kind PCD Endpoint Kind
399 * @{
400 */
401 #define PCD_SNG_BUF 0U
402 #define PCD_DBL_BUF 1U
403 /**
404 * @}
405 */
406
407 /**
408 * @}
409 */
410
411 /* Private macros ------------------------------------------------------------*/
412 /** @defgroup PCD_Private_Macros PCD Private Macros
413 * @{
414 */
415
416 /******************** Bit definition for USB_COUNTn_RX register *************/
417 #define USB_CNTRX_NBLK_MSK (0x1FU << 10)
418 #define USB_CNTRX_BLSIZE (0x1U << 15)
419
420 /* SetENDPOINT */
421 #define PCD_SET_ENDPOINT(USBx, bEpNum, wRegValue) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)) = (uint16_t)(wRegValue))
422
423 /* GetENDPOINT */
424 #define PCD_GET_ENDPOINT(USBx, bEpNum) (*(__IO uint16_t *)(&(USBx)->EP0R + ((bEpNum) * 2U)))
425
426 /* ENDPOINT transfer */
427 #define USB_EP0StartXfer USB_EPStartXfer
428
429 /**
430 * @brief sets the type in the endpoint register(bits EP_TYPE[1:0])
431 * @param USBx USB peripheral instance register address.
432 * @param bEpNum Endpoint Number.
433 * @param wType Endpoint Type.
434 * @retval None
435 */
436 #define PCD_SET_EPTYPE(USBx, bEpNum, wType) (PCD_SET_ENDPOINT((USBx), (bEpNum), \
437 ((PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_MASK) | (wType) | USB_EP_CTR_TX | USB_EP_CTR_RX)))
438
439 /**
440 * @brief gets the type in the endpoint register(bits EP_TYPE[1:0])
441 * @param USBx USB peripheral instance register address.
442 * @param bEpNum Endpoint Number.
443 * @retval Endpoint Type
444 */
445 #define PCD_GET_EPTYPE(USBx, bEpNum) (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EP_T_FIELD)
446
447 /**
448 * @brief free buffer used from the application realizing it to the line
449 * toggles bit SW_BUF in the double buffered endpoint register
450 * @param USBx USB device.
451 * @param bEpNum, bDir
452 * @retval None
453 */
454 #define PCD_FreeUserBuffer(USBx, bEpNum, bDir) do { \
455 if ((bDir) == 0U) \
456 { \
457 /* OUT double buffered endpoint */ \
458 PCD_TX_DTOG((USBx), (bEpNum)); \
459 } \
460 else if ((bDir) == 1U) \
461 { \
462 /* IN double buffered endpoint */ \
463 PCD_RX_DTOG((USBx), (bEpNum)); \
464 } \
465 } while(0)
466
467 /**
468 * @brief sets the status for tx transfer (bits STAT_TX[1:0]).
469 * @param USBx USB peripheral instance register address.
470 * @param bEpNum Endpoint Number.
471 * @param wState new state
472 * @retval None
473 */
474 #define PCD_SET_EP_TX_STATUS(USBx, bEpNum, wState) do { \
475 register uint16_t _wRegVal; \
476 \
477 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_DTOGMASK; \
478 /* toggle first bit ? */ \
479 if ((USB_EPTX_DTOG1 & (wState))!= 0U) \
480 { \
481 _wRegVal ^= USB_EPTX_DTOG1; \
482 } \
483 /* toggle second bit ? */ \
484 if ((USB_EPTX_DTOG2 & (wState))!= 0U) \
485 { \
486 _wRegVal ^= USB_EPTX_DTOG2; \
487 } \
488 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
489 } while(0) /* PCD_SET_EP_TX_STATUS */
490
491 /**
492 * @brief sets the status for rx transfer (bits STAT_TX[1:0])
493 * @param USBx USB peripheral instance register address.
494 * @param bEpNum Endpoint Number.
495 * @param wState new state
496 * @retval None
497 */
498 #define PCD_SET_EP_RX_STATUS(USBx, bEpNum,wState) do { \
499 register uint16_t _wRegVal; \
500 \
501 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_DTOGMASK; \
502 /* toggle first bit ? */ \
503 if ((USB_EPRX_DTOG1 & (wState))!= 0U) \
504 { \
505 _wRegVal ^= USB_EPRX_DTOG1; \
506 } \
507 /* toggle second bit ? */ \
508 if ((USB_EPRX_DTOG2 & (wState))!= 0U) \
509 { \
510 _wRegVal ^= USB_EPRX_DTOG2; \
511 } \
512 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
513 } while(0) /* PCD_SET_EP_RX_STATUS */
514
515 /**
516 * @brief sets the status for rx & tx (bits STAT_TX[1:0] & STAT_RX[1:0])
517 * @param USBx USB peripheral instance register address.
518 * @param bEpNum Endpoint Number.
519 * @param wStaterx new state.
520 * @param wStatetx new state.
521 * @retval None
522 */
523 #define PCD_SET_EP_TXRX_STATUS(USBx, bEpNum, wStaterx, wStatetx) do { \
524 register uint16_t _wRegVal; \
525 \
526 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (USB_EPRX_DTOGMASK | USB_EPTX_STAT); \
527 /* toggle first bit ? */ \
528 if ((USB_EPRX_DTOG1 & (wStaterx))!= 0U) \
529 { \
530 _wRegVal ^= USB_EPRX_DTOG1; \
531 } \
532 /* toggle second bit ? */ \
533 if ((USB_EPRX_DTOG2 & (wStaterx))!= 0U) \
534 { \
535 _wRegVal ^= USB_EPRX_DTOG2; \
536 } \
537 /* toggle first bit ? */ \
538 if ((USB_EPTX_DTOG1 & (wStatetx))!= 0U) \
539 { \
540 _wRegVal ^= USB_EPTX_DTOG1; \
541 } \
542 /* toggle second bit ? */ \
543 if ((USB_EPTX_DTOG2 & (wStatetx))!= 0U) \
544 { \
545 _wRegVal ^= USB_EPTX_DTOG2; \
546 } \
547 \
548 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
549 } while(0) /* PCD_SET_EP_TXRX_STATUS */
550
551 /**
552 * @brief gets the status for tx/rx transfer (bits STAT_TX[1:0]
553 * /STAT_RX[1:0])
554 * @param USBx USB peripheral instance register address.
555 * @param bEpNum Endpoint Number.
556 * @retval status
557 */
558 #define PCD_GET_EP_TX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPTX_STAT)
559 #define PCD_GET_EP_RX_STATUS(USBx, bEpNum) ((uint16_t)PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPRX_STAT)
560
561 /**
562 * @brief sets directly the VALID tx/rx-status into the endpoint register
563 * @param USBx USB peripheral instance register address.
564 * @param bEpNum Endpoint Number.
565 * @retval None
566 */
567 #define PCD_SET_EP_TX_VALID(USBx, bEpNum) (PCD_SET_EP_TX_STATUS((USBx), (bEpNum), USB_EP_TX_VALID))
568 #define PCD_SET_EP_RX_VALID(USBx, bEpNum) (PCD_SET_EP_RX_STATUS((USBx), (bEpNum), USB_EP_RX_VALID))
569
570 /**
571 * @brief checks stall condition in an endpoint.
572 * @param USBx USB peripheral instance register address.
573 * @param bEpNum Endpoint Number.
574 * @retval TRUE = endpoint in stall condition.
575 */
576 #define PCD_GET_EP_TX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_TX_STATUS((USBx), (bEpNum)) \
577 == USB_EP_TX_STALL)
578 #define PCD_GET_EP_RX_STALL_STATUS(USBx, bEpNum) (PCD_GET_EP_RX_STATUS((USBx), (bEpNum)) \
579 == USB_EP_RX_STALL)
580
581 /**
582 * @brief set & clear EP_KIND bit.
583 * @param USBx USB peripheral instance register address.
584 * @param bEpNum Endpoint Number.
585 * @retval None
586 */
587 #define PCD_SET_EP_KIND(USBx, bEpNum) do { \
588 register uint16_t _wRegVal; \
589 \
590 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
591 \
592 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_KIND)); \
593 } while(0) /* PCD_SET_EP_KIND */
594
595 #define PCD_CLEAR_EP_KIND(USBx, bEpNum) do { \
596 register uint16_t _wRegVal; \
597 \
598 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPKIND_MASK; \
599 \
600 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
601 } while(0) /* PCD_CLEAR_EP_KIND */
602
603 /**
604 * @brief Sets/clears directly STATUS_OUT bit in the endpoint register.
605 * @param USBx USB peripheral instance register address.
606 * @param bEpNum Endpoint Number.
607 * @retval None
608 */
609 #define PCD_SET_OUT_STATUS(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
610 #define PCD_CLEAR_OUT_STATUS(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
611
612 /**
613 * @brief Sets/clears directly EP_KIND bit in the endpoint register.
614 * @param USBx USB peripheral instance register address.
615 * @param bEpNum Endpoint Number.
616 * @retval None
617 */
618 #define PCD_SET_EP_DBUF(USBx, bEpNum) PCD_SET_EP_KIND((USBx), (bEpNum))
619 #define PCD_CLEAR_EP_DBUF(USBx, bEpNum) PCD_CLEAR_EP_KIND((USBx), (bEpNum))
620
621 /**
622 * @brief Clears bit CTR_RX / CTR_TX in the endpoint register.
623 * @param USBx USB peripheral instance register address.
624 * @param bEpNum Endpoint Number.
625 * @retval None
626 */
627 #define PCD_CLEAR_RX_EP_CTR(USBx, bEpNum) do { \
628 register uint16_t _wRegVal; \
629 \
630 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0x7FFFU & USB_EPREG_MASK); \
631 \
632 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_TX)); \
633 } while(0) /* PCD_CLEAR_RX_EP_CTR */
634
635 #define PCD_CLEAR_TX_EP_CTR(USBx, bEpNum) do { \
636 register uint16_t _wRegVal; \
637 \
638 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & (0xFF7FU & USB_EPREG_MASK); \
639 \
640 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX)); \
641 } while(0) /* PCD_CLEAR_TX_EP_CTR */
642
643 /**
644 * @brief Toggles DTOG_RX / DTOG_TX bit in the endpoint register.
645 * @param USBx USB peripheral instance register address.
646 * @param bEpNum Endpoint Number.
647 * @retval None
648 */
649 #define PCD_RX_DTOG(USBx, bEpNum) do { \
650 register uint16_t _wEPVal; \
651 \
652 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
653 \
654 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_RX)); \
655 } while(0) /* PCD_RX_DTOG */
656
657 #define PCD_TX_DTOG(USBx, bEpNum) do { \
658 register uint16_t _wEPVal; \
659 \
660 _wEPVal = PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK; \
661 \
662 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wEPVal | USB_EP_CTR_RX | USB_EP_CTR_TX | USB_EP_DTOG_TX)); \
663 } while(0) /* PCD_TX_DTOG */
664 /**
665 * @brief Clears DTOG_RX / DTOG_TX bit in the endpoint register.
666 * @param USBx USB peripheral instance register address.
667 * @param bEpNum Endpoint Number.
668 * @retval None
669 */
670 #define PCD_CLEAR_RX_DTOG(USBx, bEpNum) do { \
671 register uint16_t _wRegVal; \
672 \
673 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
674 \
675 if ((_wRegVal & USB_EP_DTOG_RX) != 0U)\
676 { \
677 PCD_RX_DTOG((USBx), (bEpNum)); \
678 } \
679 } while(0) /* PCD_CLEAR_RX_DTOG */
680
681 #define PCD_CLEAR_TX_DTOG(USBx, bEpNum) do { \
682 register uint16_t _wRegVal; \
683 \
684 _wRegVal = PCD_GET_ENDPOINT((USBx), (bEpNum)); \
685 \
686 if ((_wRegVal & USB_EP_DTOG_TX) != 0U)\
687 { \
688 PCD_TX_DTOG((USBx), (bEpNum)); \
689 } \
690 } while(0) /* PCD_CLEAR_TX_DTOG */
691
692 /**
693 * @brief Sets address in an endpoint register.
694 * @param USBx USB peripheral instance register address.
695 * @param bEpNum Endpoint Number.
696 * @param bAddr Address.
697 * @retval None
698 */
699 #define PCD_SET_EP_ADDRESS(USBx, bEpNum, bAddr) do { \
700 register uint16_t _wRegVal; \
701 \
702 _wRegVal = (PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPREG_MASK) | (bAddr); \
703 \
704 PCD_SET_ENDPOINT((USBx), (bEpNum), (_wRegVal | USB_EP_CTR_RX | USB_EP_CTR_TX)); \
705 } while(0) /* PCD_SET_EP_ADDRESS */
706
707 /**
708 * @brief Gets address in an endpoint register.
709 * @param USBx USB peripheral instance register address.
710 * @param bEpNum Endpoint Number.
711 * @retval None
712 */
713 #define PCD_GET_EP_ADDRESS(USBx, bEpNum) ((uint8_t)(PCD_GET_ENDPOINT((USBx), (bEpNum)) & USB_EPADDR_FIELD))
714
715 #define PCD_EP_TX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
716 #define PCD_EP_RX_CNT(USBx, bEpNum) ((uint16_t *)((((uint32_t)(USBx)->BTABLE + ((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS) + ((uint32_t)(USBx) + 0x400U)))
717
718 /**
719 * @brief sets address of the tx/rx buffer.
720 * @param USBx USB peripheral instance register address.
721 * @param bEpNum Endpoint Number.
722 * @param wAddr address to be set (must be word aligned).
723 * @retval None
724 */
725 #define PCD_SET_EP_TX_ADDRESS(USBx, bEpNum, wAddr) do { \
726 register uint16_t *_wRegVal; \
727 register uint32_t _wRegBase = (uint32_t)USBx; \
728 \
729 _wRegBase += (uint32_t)(USBx)->BTABLE; \
730 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + (((uint32_t)(bEpNum) * 8U) * PMA_ACCESS)); \
731 *_wRegVal = ((wAddr) >> 1) << 1; \
732 } while(0) /* PCD_SET_EP_TX_ADDRESS */
733
734 #define PCD_SET_EP_RX_ADDRESS(USBx, bEpNum, wAddr) do { \
735 register uint16_t *_wRegVal; \
736 register uint32_t _wRegBase = (uint32_t)USBx; \
737 \
738 _wRegBase += (uint32_t)(USBx)->BTABLE; \
739 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 4U) * PMA_ACCESS)); \
740 *_wRegVal = ((wAddr) >> 1) << 1; \
741 } while(0) /* PCD_SET_EP_RX_ADDRESS */
742
743 /**
744 * @brief Gets address of the tx/rx buffer.
745 * @param USBx USB peripheral instance register address.
746 * @param bEpNum Endpoint Number.
747 * @retval address of the buffer.
748 */
749 #define PCD_GET_EP_TX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_TX_ADDRESS((USBx), (bEpNum)))
750 #define PCD_GET_EP_RX_ADDRESS(USBx, bEpNum) ((uint16_t)*PCD_EP_RX_ADDRESS((USBx), (bEpNum)))
751
752 /**
753 * @brief Sets counter of rx buffer with no. of blocks.
754 * @param pdwReg Register pointer
755 * @param wCount Counter.
756 * @param wNBlocks no. of Blocks.
757 * @retval None
758 */
759 #define PCD_CALC_BLK32(pdwReg, wCount, wNBlocks) do { \
760 (wNBlocks) = (wCount) >> 5; \
761 *(pdwReg) = (uint16_t)(((wNBlocks) << 10) | USB_CNTRX_BLSIZE); \
762 } while(0) /* PCD_CALC_BLK32 */
763
764 #define PCD_CALC_BLK2(pdwReg, wCount, wNBlocks) do { \
765 (wNBlocks) = (wCount) >> 1; \
766 if (((wCount) & 0x1U) != 0U) \
767 { \
768 (wNBlocks)++; \
769 } \
770 *(pdwReg) = (uint16_t)((wNBlocks) << 10); \
771 } while(0) /* PCD_CALC_BLK2 */
772
773 #define PCD_SET_EP_CNT_RX_REG(pdwReg, wCount) do { \
774 uint32_t wNBlocks; \
775 if ((wCount) == 0U) \
776 { \
777 *(pdwReg) &= (uint16_t)~USB_CNTRX_NBLK_MSK; \
778 *(pdwReg) |= USB_CNTRX_BLSIZE; \
779 } \
780 else if((wCount) < 62U) \
781 { \
782 PCD_CALC_BLK2((pdwReg), (wCount), wNBlocks); \
783 } \
784 else \
785 { \
786 PCD_CALC_BLK32((pdwReg),(wCount), wNBlocks); \
787 } \
788 } while(0) /* PCD_SET_EP_CNT_RX_REG */
789
790 #define PCD_SET_EP_RX_DBUF0_CNT(USBx, bEpNum, wCount) do { \
791 register uint32_t _wRegBase = (uint32_t)(USBx); \
792 uint16_t *pdwReg; \
793 \
794 _wRegBase += (uint32_t)(USBx)->BTABLE; \
795 pdwReg = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
796 PCD_SET_EP_CNT_RX_REG(pdwReg, (wCount)); \
797 } while(0)
798
799 /**
800 * @brief sets counter for the tx/rx buffer.
801 * @param USBx USB peripheral instance register address.
802 * @param bEpNum Endpoint Number.
803 * @param wCount Counter value.
804 * @retval None
805 */
806 #define PCD_SET_EP_TX_CNT(USBx, bEpNum, wCount) do { \
807 register uint32_t _wRegBase = (uint32_t)(USBx); \
808 uint16_t *_wRegVal; \
809 \
810 _wRegBase += (uint32_t)(USBx)->BTABLE; \
811 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 2U) * PMA_ACCESS)); \
812 *_wRegVal = (uint16_t)(wCount); \
813 } while(0)
814
815 #define PCD_SET_EP_RX_CNT(USBx, bEpNum, wCount) do { \
816 register uint32_t _wRegBase = (uint32_t)(USBx); \
817 uint16_t *_wRegVal; \
818 \
819 _wRegBase += (uint32_t)(USBx)->BTABLE; \
820 _wRegVal = (uint16_t *)(_wRegBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
821 PCD_SET_EP_CNT_RX_REG(_wRegVal, (wCount)); \
822 } while(0)
823
824 /**
825 * @brief gets counter of the tx buffer.
826 * @param USBx USB peripheral instance register address.
827 * @param bEpNum Endpoint Number.
828 * @retval Counter value
829 */
830 #define PCD_GET_EP_TX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_TX_CNT((USBx), (bEpNum))) & 0x3ffU)
831 #define PCD_GET_EP_RX_CNT(USBx, bEpNum) ((uint32_t)(*PCD_EP_RX_CNT((USBx), (bEpNum))) & 0x3ffU)
832
833 /**
834 * @brief Sets buffer 0/1 address in a double buffer endpoint.
835 * @param USBx USB peripheral instance register address.
836 * @param bEpNum Endpoint Number.
837 * @param wBuf0Addr buffer 0 address.
838 * @retval Counter value
839 */
840 #define PCD_SET_EP_DBUF0_ADDR(USBx, bEpNum, wBuf0Addr) do { \
841 PCD_SET_EP_TX_ADDRESS((USBx), (bEpNum), (wBuf0Addr)); \
842 } while(0) /* PCD_SET_EP_DBUF0_ADDR */
843 #define PCD_SET_EP_DBUF1_ADDR(USBx, bEpNum, wBuf1Addr) do { \
844 PCD_SET_EP_RX_ADDRESS((USBx), (bEpNum), (wBuf1Addr)); \
845 } while(0) /* PCD_SET_EP_DBUF1_ADDR */
846
847 /**
848 * @brief Sets addresses in a double buffer endpoint.
849 * @param USBx USB peripheral instance register address.
850 * @param bEpNum Endpoint Number.
851 * @param wBuf0Addr: buffer 0 address.
852 * @param wBuf1Addr = buffer 1 address.
853 * @retval None
854 */
855 #define PCD_SET_EP_DBUF_ADDR(USBx, bEpNum, wBuf0Addr, wBuf1Addr) do { \
856 PCD_SET_EP_DBUF0_ADDR((USBx), (bEpNum), (wBuf0Addr)); \
857 PCD_SET_EP_DBUF1_ADDR((USBx), (bEpNum), (wBuf1Addr)); \
858 } while(0) /* PCD_SET_EP_DBUF_ADDR */
859
860 /**
861 * @brief Gets buffer 0/1 address of a double buffer endpoint.
862 * @param USBx USB peripheral instance register address.
863 * @param bEpNum Endpoint Number.
864 * @retval None
865 */
866 #define PCD_GET_EP_DBUF0_ADDR(USBx, bEpNum) (PCD_GET_EP_TX_ADDRESS((USBx), (bEpNum)))
867 #define PCD_GET_EP_DBUF1_ADDR(USBx, bEpNum) (PCD_GET_EP_RX_ADDRESS((USBx), (bEpNum)))
868
869 /**
870 * @brief Gets buffer 0/1 address of a double buffer endpoint.
871 * @param USBx USB peripheral instance register address.
872 * @param bEpNum Endpoint Number.
873 * @param bDir endpoint dir EP_DBUF_OUT = OUT
874 * EP_DBUF_IN = IN
875 * @param wCount: Counter value
876 * @retval None
877 */
878 #define PCD_SET_EP_DBUF0_CNT(USBx, bEpNum, bDir, wCount) do { \
879 if ((bDir) == 0U) \
880 /* OUT endpoint */ \
881 { \
882 PCD_SET_EP_RX_DBUF0_CNT((USBx), (bEpNum), (wCount)); \
883 } \
884 else \
885 { \
886 if ((bDir) == 1U) \
887 { \
888 /* IN endpoint */ \
889 PCD_SET_EP_TX_CNT((USBx), (bEpNum), (wCount)); \
890 } \
891 } \
892 } while(0) /* SetEPDblBuf0Count*/
893
894 #define PCD_SET_EP_DBUF1_CNT(USBx, bEpNum, bDir, wCount) do { \
895 register uint32_t _wBase = (uint32_t)(USBx); \
896 uint16_t *_wEPRegVal; \
897 \
898 if ((bDir) == 0U) \
899 { \
900 /* OUT endpoint */ \
901 PCD_SET_EP_RX_CNT((USBx), (bEpNum), (wCount)); \
902 } \
903 else \
904 { \
905 if ((bDir) == 1U) \
906 { \
907 /* IN endpoint */ \
908 _wBase += (uint32_t)(USBx)->BTABLE; \
909 _wEPRegVal = (uint16_t *)(_wBase + 0x400U + ((((uint32_t)(bEpNum) * 8U) + 6U) * PMA_ACCESS)); \
910 *_wEPRegVal = (uint16_t)(wCount); \
911 } \
912 } \
913 } while(0) /* SetEPDblBuf1Count */
914
915 #define PCD_SET_EP_DBUF_CNT(USBx, bEpNum, bDir, wCount) do { \
916 PCD_SET_EP_DBUF0_CNT((USBx), (bEpNum), (bDir), (wCount)); \
917 PCD_SET_EP_DBUF1_CNT((USBx), (bEpNum), (bDir), (wCount)); \
918 } while(0) /* PCD_SET_EP_DBUF_CNT */
919
920 /**
921 * @brief Gets buffer 0/1 rx/tx counter for double buffering.
922 * @param USBx USB peripheral instance register address.
923 * @param bEpNum Endpoint Number.
924 * @retval None
925 */
926 #define PCD_GET_EP_DBUF0_CNT(USBx, bEpNum) (PCD_GET_EP_TX_CNT((USBx), (bEpNum)))
927 #define PCD_GET_EP_DBUF1_CNT(USBx, bEpNum) (PCD_GET_EP_RX_CNT((USBx), (bEpNum)))
928
929
930
931 /**
932 * @}
933 */
934
935 /**
936 * @}
937 */
938
939 /**
940 * @}
941 */
942 #endif /* defined (USB) */
943
944 #ifdef __cplusplus
945 }
946 #endif
947
948 #endif /* STM32G4xx_HAL_PCD_H */
949
950 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/