lib/main/STM32G4/Drivers/STM32G4xx_HAL_Driver/Inc/stm32g4xx_hal_spi.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32g4xx_hal_spi.h
   4   * @author  MCD Application Team
   5   * @brief   Header file of SPI HAL module.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19
  20 /* Define to prevent recursive inclusion -------------------------------------*/
  21 #ifndef STM32G4xx_HAL_SPI_H
  22 #define STM32G4xx_HAL_SPI_H
  23
  24 #ifdef __cplusplus
  25 extern "C" {
  26 #endif
  27
  28 /* Includes ------------------------------------------------------------------*/
  29 #include "stm32g4xx_hal_def.h"
  30
  31 /** @addtogroup STM32G4xx_HAL_Driver
  32   * @{
  33   */
  34
  35 /** @addtogroup SPI
  36   * @{
  37   */
  38
  39 /* Exported types ------------------------------------------------------------*/
  40 /** @defgroup SPI_Exported_Types SPI Exported Types
  41   * @{
  42   */
  43
  44 /**
  45   * @brief  SPI Configuration Structure definition
  46   */
  47 typedef struct
  48 {
  49   uint32_t Mode;                /*!< Specifies the SPI operating mode.
  50                                      This parameter can be a value of @ref SPI_Mode */
  51
  52   uint32_t Direction;           /*!< Specifies the SPI bidirectional mode state.
  53                                      This parameter can be a value of @ref SPI_Direction */
  54
  55   uint32_t DataSize;            /*!< Specifies the SPI data size.
  56                                      This parameter can be a value of @ref SPI_Data_Size */
  57
  58   uint32_t CLKPolarity;         /*!< Specifies the serial clock steady state.
  59                                      This parameter can be a value of @ref SPI_Clock_Polarity */
  60
  61   uint32_t CLKPhase;            /*!< Specifies the clock active edge for the bit capture.
  62                                      This parameter can be a value of @ref SPI_Clock_Phase */
  63
  64   uint32_t NSS;                 /*!< Specifies whether the NSS signal is managed by
  65                                      hardware (NSS pin) or by software using the SSI bit.
  66                                      This parameter can be a value of @ref SPI_Slave_Select_management */
  67
  68   uint32_t BaudRatePrescaler;   /*!< Specifies the Baud Rate prescaler value which will be
  69                                      used to configure the transmit and receive SCK clock.
  70                                      This parameter can be a value of @ref SPI_BaudRate_Prescaler
  71                                      @note The communication clock is derived from the master
  72                                      clock. The slave clock does not need to be set. */
  73
  74   uint32_t FirstBit;            /*!< Specifies whether data transfers start from MSB or LSB bit.
  75                                      This parameter can be a value of @ref SPI_MSB_LSB_transmission */
  76
  77   uint32_t TIMode;              /*!< Specifies if the TI mode is enabled or not.
  78                                      This parameter can be a value of @ref SPI_TI_mode */
  79
  80   uint32_t CRCCalculation;      /*!< Specifies if the CRC calculation is enabled or not.
  81                                      This parameter can be a value of @ref SPI_CRC_Calculation */
  82
  83   uint32_t CRCPolynomial;       /*!< Specifies the polynomial used for the CRC calculation.
  84                                      This parameter must be an odd number between Min_Data = 1 and Max_Data = 65535 */
  85
  86   uint32_t CRCLength;           /*!< Specifies the CRC Length used for the CRC calculation.
  87                                      CRC Length is only used with Data8 and Data16, not other data size
  88                                      This parameter can be a value of @ref SPI_CRC_length */
  89
  90   uint32_t NSSPMode;            /*!< Specifies whether the NSSP signal is enabled or not .
  91                                      This parameter can be a value of @ref SPI_NSSP_Mode
  92                                      This mode is activated by the NSSP bit in the SPIx_CR2 register and
  93                                      it takes effect only if the SPI interface is configured as Motorola SPI
  94                                      master (FRF=0) with capture on the first edge (SPIx_CR1 CPHA = 0,
  95                                      CPOL setting is ignored).. */
  96 } SPI_InitTypeDef;
  97
  98 /**
  99   * @brief  HAL SPI State structure definition
 100   */
 101 typedef enum
 102 {
 103   HAL_SPI_STATE_RESET      = 0x00U,    /*!< Peripheral not Initialized                         */
 104   HAL_SPI_STATE_READY      = 0x01U,    /*!< Peripheral Initialized and ready for use           */
 105   HAL_SPI_STATE_BUSY       = 0x02U,    /*!< an internal process is ongoing                     */
 106   HAL_SPI_STATE_BUSY_TX    = 0x03U,    /*!< Data Transmission process is ongoing               */
 107   HAL_SPI_STATE_BUSY_RX    = 0x04U,    /*!< Data Reception process is ongoing                  */
 108   HAL_SPI_STATE_BUSY_TX_RX = 0x05U,    /*!< Data Transmission and Reception process is ongoing */
 109   HAL_SPI_STATE_ERROR      = 0x06U,    /*!< SPI error state                                    */
 110   HAL_SPI_STATE_ABORT      = 0x07U     /*!< SPI abort is ongoing                               */
 111 } HAL_SPI_StateTypeDef;
 112
 113 /**
 114   * @brief  SPI handle Structure definition
 115   */
 116 typedef struct __SPI_HandleTypeDef
 117 {
 118   SPI_TypeDef                *Instance;      /*!< SPI registers base address               */
 119
 120   SPI_InitTypeDef            Init;           /*!< SPI communication parameters             */
 121
 122   uint8_t                    *pTxBuffPtr;    /*!< Pointer to SPI Tx transfer Buffer        */
 123
 124   uint16_t                   TxXferSize;     /*!< SPI Tx Transfer size                     */
 125
 126   __IO uint16_t              TxXferCount;    /*!< SPI Tx Transfer Counter                  */
 127
 128   uint8_t                    *pRxBuffPtr;    /*!< Pointer to SPI Rx transfer Buffer        */
 129
 130   uint16_t                   RxXferSize;     /*!< SPI Rx Transfer size                     */
 131
 132   __IO uint16_t              RxXferCount;    /*!< SPI Rx Transfer Counter                  */
 133
 134   uint32_t                   CRCSize;        /*!< SPI CRC size used for the transfer       */
 135
 136   void (*RxISR)(struct __SPI_HandleTypeDef *hspi);   /*!< function pointer on Rx ISR       */
 137
 138   void (*TxISR)(struct __SPI_HandleTypeDef *hspi);   /*!< function pointer on Tx ISR       */
 139
 140   DMA_HandleTypeDef          *hdmatx;        /*!< SPI Tx DMA Handle parameters             */
 141
 142   DMA_HandleTypeDef          *hdmarx;        /*!< SPI Rx DMA Handle parameters             */
 143
 144   HAL_LockTypeDef            Lock;           /*!< Locking object                           */
 145
 146   __IO HAL_SPI_StateTypeDef  State;          /*!< SPI communication state                  */
 147
 148   __IO uint32_t              ErrorCode;      /*!< SPI Error code                           */
 149
 150 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
 151   void (* TxCpltCallback)(struct __SPI_HandleTypeDef *hspi);             /*!< SPI Tx Completed callback          */
 152   void (* RxCpltCallback)(struct __SPI_HandleTypeDef *hspi);             /*!< SPI Rx Completed callback          */
 153   void (* TxRxCpltCallback)(struct __SPI_HandleTypeDef *hspi);           /*!< SPI TxRx Completed callback        */
 154   void (* TxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi);         /*!< SPI Tx Half Completed callback     */
 155   void (* RxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi);         /*!< SPI Rx Half Completed callback     */
 156   void (* TxRxHalfCpltCallback)(struct __SPI_HandleTypeDef *hspi);       /*!< SPI TxRx Half Completed callback   */
 157   void (* ErrorCallback)(struct __SPI_HandleTypeDef *hspi);              /*!< SPI Error callback                 */
 158   void (* AbortCpltCallback)(struct __SPI_HandleTypeDef *hspi);          /*!< SPI Abort callback                 */
 159   void (* MspInitCallback)(struct __SPI_HandleTypeDef *hspi);            /*!< SPI Msp Init callback              */
 160   void (* MspDeInitCallback)(struct __SPI_HandleTypeDef *hspi);          /*!< SPI Msp DeInit callback            */
 161
 162 #endif  /* USE_HAL_SPI_REGISTER_CALLBACKS */
 163 } SPI_HandleTypeDef;
 164
 165 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
 166 /**
 167   * @brief  HAL SPI Callback ID enumeration definition
 168   */
 169 typedef enum
 170 {
 171   HAL_SPI_TX_COMPLETE_CB_ID             = 0x00U,    /*!< SPI Tx Completed callback ID         */
 172   HAL_SPI_RX_COMPLETE_CB_ID             = 0x01U,    /*!< SPI Rx Completed callback ID         */
 173   HAL_SPI_TX_RX_COMPLETE_CB_ID          = 0x02U,    /*!< SPI TxRx Completed callback ID       */
 174   HAL_SPI_TX_HALF_COMPLETE_CB_ID        = 0x03U,    /*!< SPI Tx Half Completed callback ID    */
 175   HAL_SPI_RX_HALF_COMPLETE_CB_ID        = 0x04U,    /*!< SPI Rx Half Completed callback ID    */
 176   HAL_SPI_TX_RX_HALF_COMPLETE_CB_ID     = 0x05U,    /*!< SPI TxRx Half Completed callback ID  */
 177   HAL_SPI_ERROR_CB_ID                   = 0x06U,    /*!< SPI Error callback ID                */
 178   HAL_SPI_ABORT_CB_ID                   = 0x07U,    /*!< SPI Abort callback ID                */
 179   HAL_SPI_MSPINIT_CB_ID                 = 0x08U,    /*!< SPI Msp Init callback ID             */
 180   HAL_SPI_MSPDEINIT_CB_ID               = 0x09U     /*!< SPI Msp DeInit callback ID           */
 181
 182 } HAL_SPI_CallbackIDTypeDef;
 183
 184 /**
 185   * @brief  HAL SPI Callback pointer definition
 186   */
 187 typedef  void (*pSPI_CallbackTypeDef)(SPI_HandleTypeDef *hspi); /*!< pointer to an SPI callback function */
 188
 189 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
 190 /**
 191   * @}
 192   */
 193
 194 /* Exported constants --------------------------------------------------------*/
 195 /** @defgroup SPI_Exported_Constants SPI Exported Constants
 196   * @{
 197   */
 198
 199 /** @defgroup SPI_Error_Code SPI Error Code
 200   * @{
 201   */
 202 #define HAL_SPI_ERROR_NONE              (0x00000000U)   /*!< No error                               */
 203 #define HAL_SPI_ERROR_MODF              (0x00000001U)   /*!< MODF error                             */
 204 #define HAL_SPI_ERROR_CRC               (0x00000002U)   /*!< CRC error                              */
 205 #define HAL_SPI_ERROR_OVR               (0x00000004U)   /*!< OVR error                              */
 206 #define HAL_SPI_ERROR_FRE               (0x00000008U)   /*!< FRE error                              */
 207 #define HAL_SPI_ERROR_DMA               (0x00000010U)   /*!< DMA transfer error                     */
 208 #define HAL_SPI_ERROR_FLAG              (0x00000020U)   /*!< Error on RXNE/TXE/BSY/FTLVL/FRLVL Flag */
 209 #define HAL_SPI_ERROR_ABORT             (0x00000040U)   /*!< Error during SPI Abort procedure       */
 210 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
 211 #define HAL_SPI_ERROR_INVALID_CALLBACK  (0x00000080U)   /*!< Invalid Callback error                 */
 212 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
 213 /**
 214   * @}
 215   */
 216
 217 /** @defgroup SPI_Mode SPI Mode
 218   * @{
 219   */
 220 #define SPI_MODE_SLAVE                  (0x00000000U)
 221 #define SPI_MODE_MASTER                 (SPI_CR1_MSTR | SPI_CR1_SSI)
 222 /**
 223   * @}
 224   */
 225
 226 /** @defgroup SPI_Direction SPI Direction Mode
 227   * @{
 228   */
 229 #define SPI_DIRECTION_2LINES            (0x00000000U)
 230 #define SPI_DIRECTION_2LINES_RXONLY     SPI_CR1_RXONLY
 231 #define SPI_DIRECTION_1LINE             SPI_CR1_BIDIMODE
 232 /**
 233   * @}
 234   */
 235
 236 /** @defgroup SPI_Data_Size SPI Data Size
 237   * @{
 238   */
 239 #define SPI_DATASIZE_4BIT               (0x00000300U)
 240 #define SPI_DATASIZE_5BIT               (0x00000400U)
 241 #define SPI_DATASIZE_6BIT               (0x00000500U)
 242 #define SPI_DATASIZE_7BIT               (0x00000600U)
 243 #define SPI_DATASIZE_8BIT               (0x00000700U)
 244 #define SPI_DATASIZE_9BIT               (0x00000800U)
 245 #define SPI_DATASIZE_10BIT              (0x00000900U)
 246 #define SPI_DATASIZE_11BIT              (0x00000A00U)
 247 #define SPI_DATASIZE_12BIT              (0x00000B00U)
 248 #define SPI_DATASIZE_13BIT              (0x00000C00U)
 249 #define SPI_DATASIZE_14BIT              (0x00000D00U)
 250 #define SPI_DATASIZE_15BIT              (0x00000E00U)
 251 #define SPI_DATASIZE_16BIT              (0x00000F00U)
 252 /**
 253   * @}
 254   */
 255
 256 /** @defgroup SPI_Clock_Polarity SPI Clock Polarity
 257   * @{
 258   */
 259 #define SPI_POLARITY_LOW                (0x00000000U)
 260 #define SPI_POLARITY_HIGH               SPI_CR1_CPOL
 261 /**
 262   * @}
 263   */
 264
 265 /** @defgroup SPI_Clock_Phase SPI Clock Phase
 266   * @{
 267   */
 268 #define SPI_PHASE_1EDGE                 (0x00000000U)
 269 #define SPI_PHASE_2EDGE                 SPI_CR1_CPHA
 270 /**
 271   * @}
 272   */
 273
 274 /** @defgroup SPI_Slave_Select_management SPI Slave Select Management
 275   * @{
 276   */
 277 #define SPI_NSS_SOFT                    SPI_CR1_SSM
 278 #define SPI_NSS_HARD_INPUT              (0x00000000U)
 279 #define SPI_NSS_HARD_OUTPUT             (SPI_CR2_SSOE << 16U)
 280 /**
 281   * @}
 282   */
 283
 284 /** @defgroup SPI_NSSP_Mode SPI NSS Pulse Mode
 285   * @{
 286   */
 287 #define SPI_NSS_PULSE_ENABLE            SPI_CR2_NSSP
 288 #define SPI_NSS_PULSE_DISABLE           (0x00000000U)
 289 /**
 290   * @}
 291   */
 292
 293 /** @defgroup SPI_BaudRate_Prescaler SPI BaudRate Prescaler
 294   * @{
 295   */
 296 #define SPI_BAUDRATEPRESCALER_2         (0x00000000U)
 297 #define SPI_BAUDRATEPRESCALER_4         (SPI_CR1_BR_0)
 298 #define SPI_BAUDRATEPRESCALER_8         (SPI_CR1_BR_1)
 299 #define SPI_BAUDRATEPRESCALER_16        (SPI_CR1_BR_1 | SPI_CR1_BR_0)
 300 #define SPI_BAUDRATEPRESCALER_32        (SPI_CR1_BR_2)
 301 #define SPI_BAUDRATEPRESCALER_64        (SPI_CR1_BR_2 | SPI_CR1_BR_0)
 302 #define SPI_BAUDRATEPRESCALER_128       (SPI_CR1_BR_2 | SPI_CR1_BR_1)
 303 #define SPI_BAUDRATEPRESCALER_256       (SPI_CR1_BR_2 | SPI_CR1_BR_1 | SPI_CR1_BR_0)
 304 /**
 305   * @}
 306   */
 307
 308 /** @defgroup SPI_MSB_LSB_transmission SPI MSB LSB Transmission
 309   * @{
 310   */
 311 #define SPI_FIRSTBIT_MSB                (0x00000000U)
 312 #define SPI_FIRSTBIT_LSB                SPI_CR1_LSBFIRST
 313 /**
 314   * @}
 315   */
 316
 317 /** @defgroup SPI_TI_mode SPI TI Mode
 318   * @{
 319   */
 320 #define SPI_TIMODE_DISABLE              (0x00000000U)
 321 #define SPI_TIMODE_ENABLE               SPI_CR2_FRF
 322 /**
 323   * @}
 324   */
 325
 326 /** @defgroup SPI_CRC_Calculation SPI CRC Calculation
 327   * @{
 328   */
 329 #define SPI_CRCCALCULATION_DISABLE      (0x00000000U)
 330 #define SPI_CRCCALCULATION_ENABLE       SPI_CR1_CRCEN
 331 /**
 332   * @}
 333   */
 334
 335 /** @defgroup SPI_CRC_length SPI CRC Length
 336   * @{
 337   * This parameter can be one of the following values:
 338   *     SPI_CRC_LENGTH_DATASIZE: aligned with the data size
 339   *     SPI_CRC_LENGTH_8BIT    : CRC 8bit
 340   *     SPI_CRC_LENGTH_16BIT   : CRC 16bit
 341   */
 342 #define SPI_CRC_LENGTH_DATASIZE         (0x00000000U)
 343 #define SPI_CRC_LENGTH_8BIT             (0x00000001U)
 344 #define SPI_CRC_LENGTH_16BIT            (0x00000002U)
 345 /**
 346   * @}
 347   */
 348
 349 /** @defgroup SPI_FIFO_reception_threshold SPI FIFO Reception Threshold
 350   * @{
 351   * This parameter can be one of the following values:
 352   *     SPI_RXFIFO_THRESHOLD or SPI_RXFIFO_THRESHOLD_QF :
 353   *          RXNE event is generated if the FIFO
 354   *          level is greater or equal to 1/4(8-bits).
 355   *     SPI_RXFIFO_THRESHOLD_HF: RXNE event is generated if the FIFO
 356   *          level is greater or equal to 1/2(16 bits). */
 357 #define SPI_RXFIFO_THRESHOLD            SPI_CR2_FRXTH
 358 #define SPI_RXFIFO_THRESHOLD_QF         SPI_CR2_FRXTH
 359 #define SPI_RXFIFO_THRESHOLD_HF         (0x00000000U)
 360 /**
 361   * @}
 362   */
 363
 364 /** @defgroup SPI_Interrupt_definition SPI Interrupt Definition
 365   * @{
 366   */
 367 #define SPI_IT_TXE                      SPI_CR2_TXEIE
 368 #define SPI_IT_RXNE                     SPI_CR2_RXNEIE
 369 #define SPI_IT_ERR                      SPI_CR2_ERRIE
 370 /**
 371   * @}
 372   */
 373
 374 /** @defgroup SPI_Flags_definition SPI Flags Definition
 375   * @{
 376   */
 377 #define SPI_FLAG_RXNE                   SPI_SR_RXNE   /* SPI status flag: Rx buffer not empty flag       */
 378 #define SPI_FLAG_TXE                    SPI_SR_TXE    /* SPI status flag: Tx buffer empty flag           */
 379 #define SPI_FLAG_BSY                    SPI_SR_BSY    /* SPI status flag: Busy flag                      */
 380 #define SPI_FLAG_CRCERR                 SPI_SR_CRCERR /* SPI Error flag: CRC error flag                  */
 381 #define SPI_FLAG_MODF                   SPI_SR_MODF   /* SPI Error flag: Mode fault flag                 */
 382 #define SPI_FLAG_OVR                    SPI_SR_OVR    /* SPI Error flag: Overrun flag                    */
 383 #define SPI_FLAG_FRE                    SPI_SR_FRE    /* SPI Error flag: TI mode frame format error flag */
 384 #define SPI_FLAG_FTLVL                  SPI_SR_FTLVL  /* SPI fifo transmission level                     */
 385 #define SPI_FLAG_FRLVL                  SPI_SR_FRLVL  /* SPI fifo reception level                        */
 386 #define SPI_FLAG_MASK                   (SPI_SR_RXNE | SPI_SR_TXE | SPI_SR_BSY | SPI_SR_CRCERR\
 387                                          | SPI_SR_MODF | SPI_SR_OVR | SPI_SR_FRE | SPI_SR_FTLVL | SPI_SR_FRLVL)
 388 /**
 389   * @}
 390   */
 391
 392 /** @defgroup SPI_transmission_fifo_status_level SPI Transmission FIFO Status Level
 393   * @{
 394   */
 395 #define SPI_FTLVL_EMPTY                 (0x00000000U)
 396 #define SPI_FTLVL_QUARTER_FULL          (0x00000800U)
 397 #define SPI_FTLVL_HALF_FULL             (0x00001000U)
 398 #define SPI_FTLVL_FULL                  (0x00001800U)
 399
 400 /**
 401   * @}
 402   */
 403
 404 /** @defgroup SPI_reception_fifo_status_level SPI Reception FIFO Status Level
 405   * @{
 406   */
 407 #define SPI_FRLVL_EMPTY                 (0x00000000U)
 408 #define SPI_FRLVL_QUARTER_FULL          (0x00000200U)
 409 #define SPI_FRLVL_HALF_FULL             (0x00000400U)
 410 #define SPI_FRLVL_FULL                  (0x00000600U)
 411 /**
 412   * @}
 413   */
 414
 415 /**
 416   * @}
 417   */
 418
 419 /* Exported macros -----------------------------------------------------------*/
 420 /** @defgroup SPI_Exported_Macros SPI Exported Macros
 421   * @{
 422   */
 423
 424 /** @brief  Reset SPI handle state.
 425   * @param  __HANDLE__ specifies the SPI Handle.
 426   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 427   * @retval None
 428   */
 429 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
 430 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__)                do{                                                  \
 431                                                                     (__HANDLE__)->State = HAL_SPI_STATE_RESET;       \
 432                                                                     (__HANDLE__)->MspInitCallback = NULL;            \
 433                                                                     (__HANDLE__)->MspDeInitCallback = NULL;          \
 434                                                                   } while(0)
 435 #else
 436 #define __HAL_SPI_RESET_HANDLE_STATE(__HANDLE__) ((__HANDLE__)->State = HAL_SPI_STATE_RESET)
 437 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
 438
 439 /** @brief  Enable the specified SPI interrupts.
 440   * @param  __HANDLE__ specifies the SPI Handle.
 441   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 442   * @param  __INTERRUPT__ specifies the interrupt source to enable.
 443   *         This parameter can be one of the following values:
 444   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
 445   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
 446   *            @arg SPI_IT_ERR: Error interrupt enable
 447   * @retval None
 448   */
 449 #define __HAL_SPI_ENABLE_IT(__HANDLE__, __INTERRUPT__)   SET_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
 450
 451 /** @brief  Disable the specified SPI interrupts.
 452   * @param  __HANDLE__ specifies the SPI handle.
 453   *         This parameter can be SPIx where x: 1, 2, or 3 to select the SPI peripheral.
 454   * @param  __INTERRUPT__ specifies the interrupt source to disable.
 455   *         This parameter can be one of the following values:
 456   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
 457   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
 458   *            @arg SPI_IT_ERR: Error interrupt enable
 459   * @retval None
 460   */
 461 #define __HAL_SPI_DISABLE_IT(__HANDLE__, __INTERRUPT__)  CLEAR_BIT((__HANDLE__)->Instance->CR2, (__INTERRUPT__))
 462
 463 /** @brief  Check whether the specified SPI interrupt source is enabled or not.
 464   * @param  __HANDLE__ specifies the SPI Handle.
 465   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 466   * @param  __INTERRUPT__ specifies the SPI interrupt source to check.
 467   *          This parameter can be one of the following values:
 468   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
 469   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
 470   *            @arg SPI_IT_ERR: Error interrupt enable
 471   * @retval The new state of __IT__ (TRUE or FALSE).
 472   */
 473 #define __HAL_SPI_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->CR2\
 474                                                               & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 475
 476 /** @brief  Check whether the specified SPI flag is set or not.
 477   * @param  __HANDLE__ specifies the SPI Handle.
 478   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 479   * @param  __FLAG__ specifies the flag to check.
 480   *         This parameter can be one of the following values:
 481   *            @arg SPI_FLAG_RXNE: Receive buffer not empty flag
 482   *            @arg SPI_FLAG_TXE: Transmit buffer empty flag
 483   *            @arg SPI_FLAG_CRCERR: CRC error flag
 484   *            @arg SPI_FLAG_MODF: Mode fault flag
 485   *            @arg SPI_FLAG_OVR: Overrun flag
 486   *            @arg SPI_FLAG_BSY: Busy flag
 487   *            @arg SPI_FLAG_FRE: Frame format error flag
 488   *            @arg SPI_FLAG_FTLVL: SPI fifo transmission level
 489   *            @arg SPI_FLAG_FRLVL: SPI fifo reception level
 490   * @retval The new state of __FLAG__ (TRUE or FALSE).
 491   */
 492 #define __HAL_SPI_GET_FLAG(__HANDLE__, __FLAG__) ((((__HANDLE__)->Instance->SR) & (__FLAG__)) == (__FLAG__))
 493
 494 /** @brief  Clear the SPI CRCERR pending flag.
 495   * @param  __HANDLE__ specifies the SPI Handle.
 496   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 497   * @retval None
 498   */
 499 #define __HAL_SPI_CLEAR_CRCERRFLAG(__HANDLE__) ((__HANDLE__)->Instance->SR = (uint16_t)(~SPI_FLAG_CRCERR))
 500
 501 /** @brief  Clear the SPI MODF pending flag.
 502   * @param  __HANDLE__ specifies the SPI Handle.
 503   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 504   * @retval None
 505   */
 506 #define __HAL_SPI_CLEAR_MODFFLAG(__HANDLE__)             \
 507   do{                                                    \
 508     __IO uint32_t tmpreg_modf = 0x00U;                   \
 509     tmpreg_modf = (__HANDLE__)->Instance->SR;            \
 510     CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE); \
 511     UNUSED(tmpreg_modf);                                 \
 512   } while(0U)
 513
 514 /** @brief  Clear the SPI OVR pending flag.
 515   * @param  __HANDLE__ specifies the SPI Handle.
 516   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 517   * @retval None
 518   */
 519 #define __HAL_SPI_CLEAR_OVRFLAG(__HANDLE__)        \
 520   do{                                              \
 521     __IO uint32_t tmpreg_ovr = 0x00U;              \
 522     tmpreg_ovr = (__HANDLE__)->Instance->DR;       \
 523     tmpreg_ovr = (__HANDLE__)->Instance->SR;       \
 524     UNUSED(tmpreg_ovr);                            \
 525   } while(0U)
 526
 527 /** @brief  Clear the SPI FRE pending flag.
 528   * @param  __HANDLE__ specifies the SPI Handle.
 529   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 530   * @retval None
 531   */
 532 #define __HAL_SPI_CLEAR_FREFLAG(__HANDLE__)        \
 533   do{                                              \
 534     __IO uint32_t tmpreg_fre = 0x00U;              \
 535     tmpreg_fre = (__HANDLE__)->Instance->SR;       \
 536     UNUSED(tmpreg_fre);                            \
 537   }while(0U)
 538
 539 /** @brief  Enable the SPI peripheral.
 540   * @param  __HANDLE__ specifies the SPI Handle.
 541   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 542   * @retval None
 543   */
 544 #define __HAL_SPI_ENABLE(__HANDLE__)  SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
 545
 546 /** @brief  Disable the SPI peripheral.
 547   * @param  __HANDLE__ specifies the SPI Handle.
 548   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 549   * @retval None
 550   */
 551 #define __HAL_SPI_DISABLE(__HANDLE__) CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_SPE)
 552
 553 /**
 554   * @}
 555   */
 556
 557 /* Private macros ------------------------------------------------------------*/
 558 /** @defgroup SPI_Private_Macros SPI Private Macros
 559   * @{
 560   */
 561
 562 /** @brief  Set the SPI transmit-only mode.
 563   * @param  __HANDLE__ specifies the SPI Handle.
 564   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 565   * @retval None
 566   */
 567 #define SPI_1LINE_TX(__HANDLE__)  SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
 568
 569 /** @brief  Set the SPI receive-only mode.
 570   * @param  __HANDLE__ specifies the SPI Handle.
 571   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 572   * @retval None
 573   */
 574 #define SPI_1LINE_RX(__HANDLE__)  CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_BIDIOE)
 575
 576 /** @brief  Reset the CRC calculation of the SPI.
 577   * @param  __HANDLE__ specifies the SPI Handle.
 578   *         This parameter can be SPI where x: 1, 2, or 3 to select the SPI peripheral.
 579   * @retval None
 580   */
 581 #define SPI_RESET_CRC(__HANDLE__) do{CLEAR_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);\
 582                                        SET_BIT((__HANDLE__)->Instance->CR1, SPI_CR1_CRCEN);}while(0U)
 583
 584 /** @brief  Check whether the specified SPI flag is set or not.
 585   * @param  __SR__  copy of SPI SR regsiter.
 586   * @param  __FLAG__ specifies the flag to check.
 587   *         This parameter can be one of the following values:
 588   *            @arg SPI_FLAG_RXNE: Receive buffer not empty flag
 589   *            @arg SPI_FLAG_TXE: Transmit buffer empty flag
 590   *            @arg SPI_FLAG_CRCERR: CRC error flag
 591   *            @arg SPI_FLAG_MODF: Mode fault flag
 592   *            @arg SPI_FLAG_OVR: Overrun flag
 593   *            @arg SPI_FLAG_BSY: Busy flag
 594   *            @arg SPI_FLAG_FRE: Frame format error flag
 595   *            @arg SPI_FLAG_FTLVL: SPI fifo transmission level
 596   *            @arg SPI_FLAG_FRLVL: SPI fifo reception level
 597   * @retval SET or RESET.
 598   */
 599 #define SPI_CHECK_FLAG(__SR__, __FLAG__)         ((((__SR__) & ((__FLAG__) & SPI_FLAG_MASK)) == ((__FLAG__) & SPI_FLAG_MASK)) ? SET : RESET)
 600
 601 /** @brief  Check whether the specified SPI Interrupt is set or not.
 602   * @param  __CR2__  copy of SPI CR2 regsiter.
 603   * @param  __INTERRUPT__ specifies the SPI interrupt source to check.
 604   *         This parameter can be one of the following values:
 605   *            @arg SPI_IT_TXE: Tx buffer empty interrupt enable
 606   *            @arg SPI_IT_RXNE: RX buffer not empty interrupt enable
 607   *            @arg SPI_IT_ERR: Error interrupt enable
 608   * @retval SET or RESET.
 609   */
 610 #define SPI_CHECK_IT_SOURCE(__CR2__, __INTERRUPT__)      ((((__CR2__) & (__INTERRUPT__)) == (__INTERRUPT__)) ? SET : RESET)
 611
 612 /** @brief  Checks if SPI Mode parameter is in allowed range.
 613   * @param  __MODE__ specifies the SPI Mode.
 614   *         This parameter can be a value of @ref SPI_Mode
 615   * @retval None
 616   */
 617 #define IS_SPI_MODE(__MODE__) (((__MODE__) == SPI_MODE_SLAVE) || \
 618                                ((__MODE__) == SPI_MODE_MASTER))
 619
 620 /** @brief  Checks if SPI Direction Mode parameter is in allowed range.
 621   * @param  __MODE__ specifies the SPI Direction Mode.
 622   *         This parameter can be a value of @ref SPI_Direction
 623   * @retval None
 624   */
 625 #define IS_SPI_DIRECTION(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES)        || \
 626                                     ((__MODE__) == SPI_DIRECTION_2LINES_RXONLY) || \
 627                                     ((__MODE__) == SPI_DIRECTION_1LINE))
 628
 629 /** @brief  Checks if SPI Direction Mode parameter is 2 lines.
 630   * @param  __MODE__ specifies the SPI Direction Mode.
 631   * @retval None
 632   */
 633 #define IS_SPI_DIRECTION_2LINES(__MODE__) ((__MODE__) == SPI_DIRECTION_2LINES)
 634
 635 /** @brief  Checks if SPI Direction Mode parameter is 1 or 2 lines.
 636   * @param  __MODE__ specifies the SPI Direction Mode.
 637   * @retval None
 638   */
 639 #define IS_SPI_DIRECTION_2LINES_OR_1LINE(__MODE__) (((__MODE__) == SPI_DIRECTION_2LINES) || \
 640                                                     ((__MODE__) == SPI_DIRECTION_1LINE))
 641
 642 /** @brief  Checks if SPI Data Size parameter is in allowed range.
 643   * @param  __DATASIZE__ specifies the SPI Data Size.
 644   *         This parameter can be a value of @ref SPI_Data_Size
 645   * @retval None
 646   */
 647 #define IS_SPI_DATASIZE(__DATASIZE__) (((__DATASIZE__) == SPI_DATASIZE_16BIT) || \
 648                                        ((__DATASIZE__) == SPI_DATASIZE_15BIT) || \
 649                                        ((__DATASIZE__) == SPI_DATASIZE_14BIT) || \
 650                                        ((__DATASIZE__) == SPI_DATASIZE_13BIT) || \
 651                                        ((__DATASIZE__) == SPI_DATASIZE_12BIT) || \
 652                                        ((__DATASIZE__) == SPI_DATASIZE_11BIT) || \
 653                                        ((__DATASIZE__) == SPI_DATASIZE_10BIT) || \
 654                                        ((__DATASIZE__) == SPI_DATASIZE_9BIT)  || \
 655                                        ((__DATASIZE__) == SPI_DATASIZE_8BIT)  || \
 656                                        ((__DATASIZE__) == SPI_DATASIZE_7BIT)  || \
 657                                        ((__DATASIZE__) == SPI_DATASIZE_6BIT)  || \
 658                                        ((__DATASIZE__) == SPI_DATASIZE_5BIT)  || \
 659                                        ((__DATASIZE__) == SPI_DATASIZE_4BIT))
 660
 661 /** @brief  Checks if SPI Serial clock steady state parameter is in allowed range.
 662   * @param  __CPOL__ specifies the SPI serial clock steady state.
 663   *         This parameter can be a value of @ref SPI_Clock_Polarity
 664   * @retval None
 665   */
 666 #define IS_SPI_CPOL(__CPOL__) (((__CPOL__) == SPI_POLARITY_LOW) || \
 667                                ((__CPOL__) == SPI_POLARITY_HIGH))
 668
 669 /** @brief  Checks if SPI Clock Phase parameter is in allowed range.
 670   * @param  __CPHA__ specifies the SPI Clock Phase.
 671   *         This parameter can be a value of @ref SPI_Clock_Phase
 672   * @retval None
 673   */
 674 #define IS_SPI_CPHA(__CPHA__) (((__CPHA__) == SPI_PHASE_1EDGE) || \
 675                                ((__CPHA__) == SPI_PHASE_2EDGE))
 676
 677 /** @brief  Checks if SPI Slave Select parameter is in allowed range.
 678   * @param  __NSS__ specifies the SPI Slave Select management parameter.
 679   *         This parameter can be a value of @ref SPI_Slave_Select_management
 680   * @retval None
 681   */
 682 #define IS_SPI_NSS(__NSS__) (((__NSS__) == SPI_NSS_SOFT)       || \
 683                              ((__NSS__) == SPI_NSS_HARD_INPUT) || \
 684                              ((__NSS__) == SPI_NSS_HARD_OUTPUT))
 685
 686 /** @brief  Checks if SPI NSS Pulse parameter is in allowed range.
 687   * @param  __NSSP__ specifies the SPI NSS Pulse Mode parameter.
 688   *         This parameter can be a value of @ref SPI_NSSP_Mode
 689   * @retval None
 690   */
 691 #define IS_SPI_NSSP(__NSSP__) (((__NSSP__) == SPI_NSS_PULSE_ENABLE) || \
 692                                ((__NSSP__) == SPI_NSS_PULSE_DISABLE))
 693
 694 /** @brief  Checks if SPI Baudrate prescaler parameter is in allowed range.
 695   * @param  __PRESCALER__ specifies the SPI Baudrate prescaler.
 696   *         This parameter can be a value of @ref SPI_BaudRate_Prescaler
 697   * @retval None
 698   */
 699 #define IS_SPI_BAUDRATE_PRESCALER(__PRESCALER__) (((__PRESCALER__) == SPI_BAUDRATEPRESCALER_2)   || \
 700                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_4)   || \
 701                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_8)   || \
 702                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_16)  || \
 703                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_32)  || \
 704                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_64)  || \
 705                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_128) || \
 706                                                   ((__PRESCALER__) == SPI_BAUDRATEPRESCALER_256))
 707
 708 /** @brief  Checks if SPI MSB LSB transmission parameter is in allowed range.
 709   * @param  __BIT__ specifies the SPI MSB LSB transmission (whether data transfer starts from MSB or LSB bit).
 710   *         This parameter can be a value of @ref SPI_MSB_LSB_transmission
 711   * @retval None
 712   */
 713 #define IS_SPI_FIRST_BIT(__BIT__) (((__BIT__) == SPI_FIRSTBIT_MSB) || \
 714                                    ((__BIT__) == SPI_FIRSTBIT_LSB))
 715
 716 /** @brief  Checks if SPI TI mode parameter is in allowed range.
 717   * @param  __MODE__ specifies the SPI TI mode.
 718   *         This parameter can be a value of @ref SPI_TI_mode
 719   * @retval None
 720   */
 721 #define IS_SPI_TIMODE(__MODE__) (((__MODE__) == SPI_TIMODE_DISABLE) || \
 722                                  ((__MODE__) == SPI_TIMODE_ENABLE))
 723
 724 /** @brief  Checks if SPI CRC calculation enabled state is in allowed range.
 725   * @param  __CALCULATION__ specifies the SPI CRC calculation enable state.
 726   *         This parameter can be a value of @ref SPI_CRC_Calculation
 727   * @retval None
 728   */
 729 #define IS_SPI_CRC_CALCULATION(__CALCULATION__) (((__CALCULATION__) == SPI_CRCCALCULATION_DISABLE) || \
 730                                                  ((__CALCULATION__) == SPI_CRCCALCULATION_ENABLE))
 731
 732 /** @brief  Checks if SPI CRC length is in allowed range.
 733   * @param  __LENGTH__ specifies the SPI CRC length.
 734   *         This parameter can be a value of @ref SPI_CRC_length
 735   * @retval None
 736   */
 737 #define IS_SPI_CRC_LENGTH(__LENGTH__) (((__LENGTH__) == SPI_CRC_LENGTH_DATASIZE) ||\
 738                                        ((__LENGTH__) == SPI_CRC_LENGTH_8BIT)  ||   \
 739                                        ((__LENGTH__) == SPI_CRC_LENGTH_16BIT))
 740
 741 /** @brief  Checks if SPI polynomial value to be used for the CRC calculation, is in allowed range.
 742   * @param  __POLYNOMIAL__ specifies the SPI polynomial value to be used for the CRC calculation.
 743   *         This parameter must be a number between Min_Data = 0 and Max_Data = 65535
 744   * @retval None
 745   */
 746 #define IS_SPI_CRC_POLYNOMIAL(__POLYNOMIAL__) (((__POLYNOMIAL__) >= 0x1U) && ((__POLYNOMIAL__) <= 0xFFFFU) && (((__POLYNOMIAL__)&0x1U) != 0U))
 747
 748 /** @brief  Checks if DMA handle is valid.
 749   * @param  __HANDLE__ specifies a DMA Handle.
 750   * @retval None
 751   */
 752 #define IS_SPI_DMA_HANDLE(__HANDLE__) ((__HANDLE__) != NULL)
 753
 754 /**
 755   * @}
 756   */
 757
 758 /* Include SPI HAL Extended module */
 759 #include "stm32g4xx_hal_spi_ex.h"
 760
 761 /* Exported functions --------------------------------------------------------*/
 762 /** @addtogroup SPI_Exported_Functions
 763   * @{
 764   */
 765
 766 /** @addtogroup SPI_Exported_Functions_Group1
 767   * @{
 768   */
 769 /* Initialization/de-initialization functions  ********************************/
 770 HAL_StatusTypeDef HAL_SPI_Init(SPI_HandleTypeDef *hspi);
 771 HAL_StatusTypeDef HAL_SPI_DeInit(SPI_HandleTypeDef *hspi);
 772 void HAL_SPI_MspInit(SPI_HandleTypeDef *hspi);
 773 void HAL_SPI_MspDeInit(SPI_HandleTypeDef *hspi);
 774
 775 /* Callbacks Register/UnRegister functions  ***********************************/
 776 #if (USE_HAL_SPI_REGISTER_CALLBACKS == 1U)
 777 HAL_StatusTypeDef HAL_SPI_RegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID, pSPI_CallbackTypeDef pCallback);
 778 HAL_StatusTypeDef HAL_SPI_UnRegisterCallback(SPI_HandleTypeDef *hspi, HAL_SPI_CallbackIDTypeDef CallbackID);
 779 #endif /* USE_HAL_SPI_REGISTER_CALLBACKS */
 780 /**
 781   * @}
 782   */
 783
 784 /** @addtogroup SPI_Exported_Functions_Group2
 785   * @{
 786   */
 787 /* I/O operation functions  ***************************************************/
 788 HAL_StatusTypeDef HAL_SPI_Transmit(SPI_HandleTypeDef *hspi, const uint8_t *pData, uint16_t Size, uint32_t Timeout);
 789 HAL_StatusTypeDef HAL_SPI_Receive(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size, uint32_t Timeout);
 790 HAL_StatusTypeDef HAL_SPI_TransmitReceive(SPI_HandleTypeDef *hspi, const uint8_t *pTxData, uint8_t *pRxData, uint16_t Size,
 791                                           uint32_t Timeout);
 792 HAL_StatusTypeDef HAL_SPI_Transmit_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 793 HAL_StatusTypeDef HAL_SPI_Receive_IT(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 794 HAL_StatusTypeDef HAL_SPI_TransmitReceive_IT(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
 795                                              uint16_t Size);
 796 HAL_StatusTypeDef HAL_SPI_Transmit_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 797 HAL_StatusTypeDef HAL_SPI_Receive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pData, uint16_t Size);
 798 HAL_StatusTypeDef HAL_SPI_TransmitReceive_DMA(SPI_HandleTypeDef *hspi, uint8_t *pTxData, uint8_t *pRxData,
 799                                               uint16_t Size);
 800 HAL_StatusTypeDef HAL_SPI_DMAPause(SPI_HandleTypeDef *hspi);
 801 HAL_StatusTypeDef HAL_SPI_DMAResume(SPI_HandleTypeDef *hspi);
 802 HAL_StatusTypeDef HAL_SPI_DMAStop(SPI_HandleTypeDef *hspi);
 803 /* Transfer Abort functions */
 804 HAL_StatusTypeDef HAL_SPI_Abort(SPI_HandleTypeDef *hspi);
 805 HAL_StatusTypeDef HAL_SPI_Abort_IT(SPI_HandleTypeDef *hspi);
 806
 807 void HAL_SPI_IRQHandler(SPI_HandleTypeDef *hspi);
 808 void HAL_SPI_TxCpltCallback(SPI_HandleTypeDef *hspi);
 809 void HAL_SPI_RxCpltCallback(SPI_HandleTypeDef *hspi);
 810 void HAL_SPI_TxRxCpltCallback(SPI_HandleTypeDef *hspi);
 811 void HAL_SPI_TxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 812 void HAL_SPI_RxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 813 void HAL_SPI_TxRxHalfCpltCallback(SPI_HandleTypeDef *hspi);
 814 void HAL_SPI_ErrorCallback(SPI_HandleTypeDef *hspi);
 815 void HAL_SPI_AbortCpltCallback(SPI_HandleTypeDef *hspi);
 816 /**
 817   * @}
 818   */
 819
 820 /** @addtogroup SPI_Exported_Functions_Group3
 821   * @{
 822   */
 823 /* Peripheral State and Error functions ***************************************/
 824 HAL_SPI_StateTypeDef HAL_SPI_GetState(SPI_HandleTypeDef *hspi);
 825 uint32_t             HAL_SPI_GetError(SPI_HandleTypeDef *hspi);
 826 /**
 827   * @}
 828   */
 829
 830 /**
 831   * @}
 832   */
 833
 834 /**
 835   * @}
 836   */
 837
 838 /**
 839   * @}
 840   */
 841
 842 #ifdef __cplusplus
 843 }
 844 #endif
 845
 846 #endif /* STM32G4xx_HAL_SPI_H */
 847
 848 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/