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Merge pull request #11189 from klutvott123/move-telemetry-displayport-init
[betaflight.git] / lib / main / STM32G4 / Drivers / STM32G4xx_HAL_Driver / Inc / stm32g4xx_hal_uart.h
blobf667c7aec442cf748815cf4460561d2a8930344b
1 /**
2 ******************************************************************************
3 * @file stm32g4xx_hal_uart.h
4 * @author MCD Application Team
5 * @brief Header file of UART HAL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef STM32G4xx_HAL_UART_H
22 #define STM32G4xx_HAL_UART_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32g4xx_hal_def.h"
30
31 /** @addtogroup STM32G4xx_HAL_Driver
32 * @{
33 */
34
35 /** @addtogroup UART
36 * @{
37 */
38
39 /* Exported types ------------------------------------------------------------*/
40 /** @defgroup UART_Exported_Types UART Exported Types
41 * @{
42 */
43
44 /**
45 * @brief UART Init Structure definition
46 */
47 typedef struct
48 {
49 uint32_t BaudRate; /*!< This member configures the UART communication baud rate.
50 The baud rate register is computed using the following formula:
51 LPUART:
52 =======
53 Baud Rate Register = ((256 * lpuart_ker_ckpres) / ((huart->Init.BaudRate)))
54 where lpuart_ker_ck_pres is the UART input clock divided by a prescaler
55 UART:
56 =====
57 - If oversampling is 16 or in LIN mode,
58 Baud Rate Register = ((uart_ker_ckpres) / ((huart->Init.BaudRate)))
59 - If oversampling is 8,
60 Baud Rate Register[15:4] = ((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[15:4]
61 Baud Rate Register[3] = 0
62 Baud Rate Register[2:0] = (((2 * uart_ker_ckpres) / ((huart->Init.BaudRate)))[3:0]) >> 1
63 where uart_ker_ck_pres is the UART input clock divided by a prescaler */
64
65 uint32_t WordLength; /*!< Specifies the number of data bits transmitted or received in a frame.
66 This parameter can be a value of @ref UARTEx_Word_Length. */
67
68 uint32_t StopBits; /*!< Specifies the number of stop bits transmitted.
69 This parameter can be a value of @ref UART_Stop_Bits. */
70
71 uint32_t Parity; /*!< Specifies the parity mode.
72 This parameter can be a value of @ref UART_Parity
73 @note When parity is enabled, the computed parity is inserted
74 at the MSB position of the transmitted data (9th bit when
75 the word length is set to 9 data bits; 8th bit when the
76 word length is set to 8 data bits). */
77
78 uint32_t Mode; /*!< Specifies whether the Receive or Transmit mode is enabled or disabled.
79 This parameter can be a value of @ref UART_Mode. */
80
81 uint32_t HwFlowCtl; /*!< Specifies whether the hardware flow control mode is enabled
82 or disabled.
83 This parameter can be a value of @ref UART_Hardware_Flow_Control. */
84
85 uint32_t OverSampling; /*!< Specifies whether the Over sampling 8 is enabled or disabled, to achieve higher speed (up to f_PCLK/8).
86 This parameter can be a value of @ref UART_Over_Sampling. */
87
88 uint32_t OneBitSampling; /*!< Specifies whether a single sample or three samples' majority vote is selected.
89 Selecting the single sample method increases the receiver tolerance to clock
90 deviations. This parameter can be a value of @ref UART_OneBit_Sampling. */
91
92 uint32_t ClockPrescaler; /*!< Specifies the prescaler value used to divide the UART clock source.
93 This parameter can be a value of @ref UART_ClockPrescaler. */
94
95 } UART_InitTypeDef;
96
97 /**
98 * @brief UART Advanced Features initialization structure definition
99 */
100 typedef struct
101 {
102 uint32_t AdvFeatureInit; /*!< Specifies which advanced UART features is initialized. Several
103 Advanced Features may be initialized at the same time .
104 This parameter can be a value of @ref UART_Advanced_Features_Initialization_Type. */
105
106 uint32_t TxPinLevelInvert; /*!< Specifies whether the TX pin active level is inverted.
107 This parameter can be a value of @ref UART_Tx_Inv. */
108
109 uint32_t RxPinLevelInvert; /*!< Specifies whether the RX pin active level is inverted.
110 This parameter can be a value of @ref UART_Rx_Inv. */
111
112 uint32_t DataInvert; /*!< Specifies whether data are inverted (positive/direct logic
113 vs negative/inverted logic).
114 This parameter can be a value of @ref UART_Data_Inv. */
115
116 uint32_t Swap; /*!< Specifies whether TX and RX pins are swapped.
117 This parameter can be a value of @ref UART_Rx_Tx_Swap. */
118
119 uint32_t OverrunDisable; /*!< Specifies whether the reception overrun detection is disabled.
120 This parameter can be a value of @ref UART_Overrun_Disable. */
121
122 uint32_t DMADisableonRxError; /*!< Specifies whether the DMA is disabled in case of reception error.
123 This parameter can be a value of @ref UART_DMA_Disable_on_Rx_Error. */
124
125 uint32_t AutoBaudRateEnable; /*!< Specifies whether auto Baud rate detection is enabled.
126 This parameter can be a value of @ref UART_AutoBaudRate_Enable. */
127
128 uint32_t AutoBaudRateMode; /*!< If auto Baud rate detection is enabled, specifies how the rate
129 detection is carried out.
130 This parameter can be a value of @ref UART_AutoBaud_Rate_Mode. */
131
132 uint32_t MSBFirst; /*!< Specifies whether MSB is sent first on UART line.
133 This parameter can be a value of @ref UART_MSB_First. */
134 } UART_AdvFeatureInitTypeDef;
135
136
137
138 /**
139 * @brief HAL UART State definition
140 * @note HAL UART State value is a combination of 2 different substates: gState and RxState (see @ref UART_State_Definition).
141 * - gState contains UART state information related to global Handle management
142 * and also information related to Tx operations.
143 * gState value coding follow below described bitmap :
144 * b7-b6 Error information
145 * 00 : No Error
146 * 01 : (Not Used)
147 * 10 : Timeout
148 * 11 : Error
149 * b5 Peripheral initialization status
150 * 0 : Reset (Peripheral not initialized)
151 * 1 : Init done (Peripheral not initialized. HAL UART Init function already called)
152 * b4-b3 (not used)
153 * xx : Should be set to 00
154 * b2 Intrinsic process state
155 * 0 : Ready
156 * 1 : Busy (Peripheral busy with some configuration or internal operations)
157 * b1 (not used)
158 * x : Should be set to 0
159 * b0 Tx state
160 * 0 : Ready (no Tx operation ongoing)
161 * 1 : Busy (Tx operation ongoing)
162 * - RxState contains information related to Rx operations.
163 * RxState value coding follow below described bitmap :
164 * b7-b6 (not used)
165 * xx : Should be set to 00
166 * b5 Peripheral initialization status
167 * 0 : Reset (Peripheral not initialized)
168 * 1 : Init done (Peripheral not initialized)
169 * b4-b2 (not used)
170 * xxx : Should be set to 000
171 * b1 Rx state
172 * 0 : Ready (no Rx operation ongoing)
173 * 1 : Busy (Rx operation ongoing)
174 * b0 (not used)
175 * x : Should be set to 0.
176 */
177 typedef uint32_t HAL_UART_StateTypeDef;
178
179 /**
180 * @brief UART clock sources definition
181 */
182 typedef enum
183 {
184 UART_CLOCKSOURCE_PCLK1 = 0x00U, /*!< PCLK1 clock source */
185 UART_CLOCKSOURCE_PCLK2 = 0x01U, /*!< PCLK2 clock source */
186 UART_CLOCKSOURCE_HSI = 0x02U, /*!< HSI clock source */
187 UART_CLOCKSOURCE_SYSCLK = 0x04U, /*!< SYSCLK clock source */
188 UART_CLOCKSOURCE_LSE = 0x08U, /*!< LSE clock source */
189 UART_CLOCKSOURCE_UNDEFINED = 0x10U /*!< Undefined clock source */
190 } UART_ClockSourceTypeDef;
191
192 /**
193 * @brief UART handle Structure definition
194 */
195 typedef struct __UART_HandleTypeDef
196 {
197 USART_TypeDef *Instance; /*!< UART registers base address */
198
199 UART_InitTypeDef Init; /*!< UART communication parameters */
200
201 UART_AdvFeatureInitTypeDef AdvancedInit; /*!< UART Advanced Features initialization parameters */
202
203 uint8_t *pTxBuffPtr; /*!< Pointer to UART Tx transfer Buffer */
204
205 uint16_t TxXferSize; /*!< UART Tx Transfer size */
206
207 __IO uint16_t TxXferCount; /*!< UART Tx Transfer Counter */
208
209 uint8_t *pRxBuffPtr; /*!< Pointer to UART Rx transfer Buffer */
210
211 uint16_t RxXferSize; /*!< UART Rx Transfer size */
212
213 __IO uint16_t RxXferCount; /*!< UART Rx Transfer Counter */
214
215 uint16_t Mask; /*!< UART Rx RDR register mask */
216
217 uint32_t FifoMode; /*!< Specifies if the FIFO mode is being used.
218 This parameter can be a value of @ref UARTEx_FIFO_mode. */
219
220 uint16_t NbRxDataToProcess; /*!< Number of data to process during RX ISR execution */
221
222 uint16_t NbTxDataToProcess; /*!< Number of data to process during TX ISR execution */
223
224 void (*RxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Rx IRQ handler */
225
226 void (*TxISR)(struct __UART_HandleTypeDef *huart); /*!< Function pointer on Tx IRQ handler */
227
228 DMA_HandleTypeDef *hdmatx; /*!< UART Tx DMA Handle parameters */
229
230 DMA_HandleTypeDef *hdmarx; /*!< UART Rx DMA Handle parameters */
231
232 HAL_LockTypeDef Lock; /*!< Locking object */
233
234 __IO HAL_UART_StateTypeDef gState; /*!< UART state information related to global Handle management
235 and also related to Tx operations.
236 This parameter can be a value of @ref HAL_UART_StateTypeDef */
237
238 __IO HAL_UART_StateTypeDef RxState; /*!< UART state information related to Rx operations.
239 This parameter can be a value of @ref HAL_UART_StateTypeDef */
240
241 __IO uint32_t ErrorCode; /*!< UART Error code */
242
243 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
244 void (* TxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Half Complete Callback */
245 void (* TxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Complete Callback */
246 void (* RxHalfCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Half Complete Callback */
247 void (* RxCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Complete Callback */
248 void (* ErrorCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Error Callback */
249 void (* AbortCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Complete Callback */
250 void (* AbortTransmitCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Transmit Complete Callback */
251 void (* AbortReceiveCpltCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Abort Receive Complete Callback */
252 void (* WakeupCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Wakeup Callback */
253 void (* RxFifoFullCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Rx Fifo Full Callback */
254 void (* TxFifoEmptyCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Tx Fifo Empty Callback */
255
256 void (* MspInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp Init callback */
257 void (* MspDeInitCallback)(struct __UART_HandleTypeDef *huart); /*!< UART Msp DeInit callback */
258 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
259
260 } UART_HandleTypeDef;
261
262 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
263 /**
264 * @brief HAL UART Callback ID enumeration definition
265 */
266 typedef enum
267 {
268 HAL_UART_TX_HALFCOMPLETE_CB_ID = 0x00U, /*!< UART Tx Half Complete Callback ID */
269 HAL_UART_TX_COMPLETE_CB_ID = 0x01U, /*!< UART Tx Complete Callback ID */
270 HAL_UART_RX_HALFCOMPLETE_CB_ID = 0x02U, /*!< UART Rx Half Complete Callback ID */
271 HAL_UART_RX_COMPLETE_CB_ID = 0x03U, /*!< UART Rx Complete Callback ID */
272 HAL_UART_ERROR_CB_ID = 0x04U, /*!< UART Error Callback ID */
273 HAL_UART_ABORT_COMPLETE_CB_ID = 0x05U, /*!< UART Abort Complete Callback ID */
274 HAL_UART_ABORT_TRANSMIT_COMPLETE_CB_ID = 0x06U, /*!< UART Abort Transmit Complete Callback ID */
275 HAL_UART_ABORT_RECEIVE_COMPLETE_CB_ID = 0x07U, /*!< UART Abort Receive Complete Callback ID */
276 HAL_UART_WAKEUP_CB_ID = 0x08U, /*!< UART Wakeup Callback ID */
277 HAL_UART_RX_FIFO_FULL_CB_ID = 0x09U, /*!< UART Rx Fifo Full Callback ID */
278 HAL_UART_TX_FIFO_EMPTY_CB_ID = 0x0AU, /*!< UART Tx Fifo Empty Callback ID */
279
280 HAL_UART_MSPINIT_CB_ID = 0x0BU, /*!< UART MspInit callback ID */
281 HAL_UART_MSPDEINIT_CB_ID = 0x0CU /*!< UART MspDeInit callback ID */
282
283 } HAL_UART_CallbackIDTypeDef;
284
285 /**
286 * @brief HAL UART Callback pointer definition
287 */
288 typedef void (*pUART_CallbackTypeDef)(UART_HandleTypeDef *huart); /*!< pointer to an UART callback function */
289
290 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
291
292 /**
293 * @}
294 */
295
296 /* Exported constants --------------------------------------------------------*/
297 /** @defgroup UART_Exported_Constants UART Exported Constants
298 * @{
299 */
300
301 /** @defgroup UART_State_Definition UART State Code Definition
302 * @{
303 */
304 #define HAL_UART_STATE_RESET 0x00000000U /*!< Peripheral is not initialized
305 Value is allowed for gState and RxState */
306 #define HAL_UART_STATE_READY 0x00000020U /*!< Peripheral Initialized and ready for use
307 Value is allowed for gState and RxState */
308 #define HAL_UART_STATE_BUSY 0x00000024U /*!< an internal process is ongoing
309 Value is allowed for gState only */
310 #define HAL_UART_STATE_BUSY_TX 0x00000021U /*!< Data Transmission process is ongoing
311 Value is allowed for gState only */
312 #define HAL_UART_STATE_BUSY_RX 0x00000022U /*!< Data Reception process is ongoing
313 Value is allowed for RxState only */
314 #define HAL_UART_STATE_BUSY_TX_RX 0x00000023U /*!< Data Transmission and Reception process is ongoing
315 Not to be used for neither gState nor RxState.
316 Value is result of combination (Or) between gState and RxState values */
317 #define HAL_UART_STATE_TIMEOUT 0x000000A0U /*!< Timeout state
318 Value is allowed for gState only */
319 #define HAL_UART_STATE_ERROR 0x000000E0U /*!< Error
320 Value is allowed for gState only */
321 /**
322 * @}
323 */
324
325 /** @defgroup UART_Error_Definition UART Error Definition
326 * @{
327 */
328 #define HAL_UART_ERROR_NONE ((uint32_t)0x00000000U) /*!< No error */
329 #define HAL_UART_ERROR_PE ((uint32_t)0x00000001U) /*!< Parity error */
330 #define HAL_UART_ERROR_NE ((uint32_t)0x00000002U) /*!< Noise error */
331 #define HAL_UART_ERROR_FE ((uint32_t)0x00000004U) /*!< Frame error */
332 #define HAL_UART_ERROR_ORE ((uint32_t)0x00000008U) /*!< Overrun error */
333 #define HAL_UART_ERROR_DMA ((uint32_t)0x00000010U) /*!< DMA transfer error */
334 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
335 #define HAL_UART_ERROR_INVALID_CALLBACK ((uint32_t)0x00000020U) /*!< Invalid Callback error */
336 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
337 /**
338 * @}
339 */
340
341 /** @defgroup UART_Stop_Bits UART Number of Stop Bits
342 * @{
343 */
344 #define UART_STOPBITS_0_5 USART_CR2_STOP_0 /*!< UART frame with 0.5 stop bit */
345 #define UART_STOPBITS_1 0x00000000U /*!< UART frame with 1 stop bit */
346 #define UART_STOPBITS_1_5 (USART_CR2_STOP_0 | USART_CR2_STOP_1) /*!< UART frame with 1.5 stop bits */
347 #define UART_STOPBITS_2 USART_CR2_STOP_1 /*!< UART frame with 2 stop bits */
348 /**
349 * @}
350 */
351
352 /** @defgroup UART_Parity UART Parity
353 * @{
354 */
355 #define UART_PARITY_NONE 0x00000000U /*!< No parity */
356 #define UART_PARITY_EVEN USART_CR1_PCE /*!< Even parity */
357 #define UART_PARITY_ODD (USART_CR1_PCE | USART_CR1_PS) /*!< Odd parity */
358 /**
359 * @}
360 */
361
362 /** @defgroup UART_Hardware_Flow_Control UART Hardware Flow Control
363 * @{
364 */
365 #define UART_HWCONTROL_NONE 0x00000000U /*!< No hardware control */
366 #define UART_HWCONTROL_RTS USART_CR3_RTSE /*!< Request To Send */
367 #define UART_HWCONTROL_CTS USART_CR3_CTSE /*!< Clear To Send */
368 #define UART_HWCONTROL_RTS_CTS (USART_CR3_RTSE | USART_CR3_CTSE) /*!< Request and Clear To Send */
369 /**
370 * @}
371 */
372
373 /** @defgroup UART_Mode UART Transfer Mode
374 * @{
375 */
376 #define UART_MODE_RX USART_CR1_RE /*!< RX mode */
377 #define UART_MODE_TX USART_CR1_TE /*!< TX mode */
378 #define UART_MODE_TX_RX (USART_CR1_TE |USART_CR1_RE) /*!< RX and TX mode */
379 /**
380 * @}
381 */
382
383 /** @defgroup UART_State UART State
384 * @{
385 */
386 #define UART_STATE_DISABLE 0x00000000U /*!< UART disabled */
387 #define UART_STATE_ENABLE USART_CR1_UE /*!< UART enabled */
388 /**
389 * @}
390 */
391
392 /** @defgroup UART_Over_Sampling UART Over Sampling
393 * @{
394 */
395 #define UART_OVERSAMPLING_16 0x00000000U /*!< Oversampling by 16 */
396 #define UART_OVERSAMPLING_8 USART_CR1_OVER8 /*!< Oversampling by 8 */
397 /**
398 * @}
399 */
400
401 /** @defgroup UART_OneBit_Sampling UART One Bit Sampling Method
402 * @{
403 */
404 #define UART_ONE_BIT_SAMPLE_DISABLE 0x00000000U /*!< One-bit sampling disable */
405 #define UART_ONE_BIT_SAMPLE_ENABLE USART_CR3_ONEBIT /*!< One-bit sampling enable */
406 /**
407 * @}
408 */
409
410 /** @defgroup UART_ClockPrescaler UART Clock Prescaler
411 * @{
412 */
413 #define UART_PRESCALER_DIV1 0x00000000U /*!< fclk_pres = fclk */
414 #define UART_PRESCALER_DIV2 0x00000001U /*!< fclk_pres = fclk/2 */
415 #define UART_PRESCALER_DIV4 0x00000002U /*!< fclk_pres = fclk/4 */
416 #define UART_PRESCALER_DIV6 0x00000003U /*!< fclk_pres = fclk/6 */
417 #define UART_PRESCALER_DIV8 0x00000004U /*!< fclk_pres = fclk/8 */
418 #define UART_PRESCALER_DIV10 0x00000005U /*!< fclk_pres = fclk/10 */
419 #define UART_PRESCALER_DIV12 0x00000006U /*!< fclk_pres = fclk/12 */
420 #define UART_PRESCALER_DIV16 0x00000007U /*!< fclk_pres = fclk/16 */
421 #define UART_PRESCALER_DIV32 0x00000008U /*!< fclk_pres = fclk/32 */
422 #define UART_PRESCALER_DIV64 0x00000009U /*!< fclk_pres = fclk/64 */
423 #define UART_PRESCALER_DIV128 0x0000000AU /*!< fclk_pres = fclk/128 */
424 #define UART_PRESCALER_DIV256 0x0000000BU /*!< fclk_pres = fclk/256 */
425 /**
426 * @}
427 */
428
429 /** @defgroup UART_AutoBaud_Rate_Mode UART Advanced Feature AutoBaud Rate Mode
430 * @{
431 */
432 #define UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT 0x00000000U /*!< Auto Baud rate detection on start bit */
433 #define UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE USART_CR2_ABRMODE_0 /*!< Auto Baud rate detection on falling edge */
434 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME USART_CR2_ABRMODE_1 /*!< Auto Baud rate detection on 0x7F frame detection */
435 #define UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME USART_CR2_ABRMODE /*!< Auto Baud rate detection on 0x55 frame detection */
436 /**
437 * @}
438 */
439
440 /** @defgroup UART_Receiver_TimeOut UART Receiver TimeOut
441 * @{
442 */
443 #define UART_RECEIVER_TIMEOUT_DISABLE 0x00000000U /*!< UART receiver timeout disable */
444 #define UART_RECEIVER_TIMEOUT_ENABLE USART_CR2_RTOEN /*!< UART receiver timeout enable */
445 /**
446 * @}
447 */
448
449 /** @defgroup UART_LIN UART Local Interconnection Network mode
450 * @{
451 */
452 #define UART_LIN_DISABLE 0x00000000U /*!< Local Interconnect Network disable */
453 #define UART_LIN_ENABLE USART_CR2_LINEN /*!< Local Interconnect Network enable */
454 /**
455 * @}
456 */
457
458 /** @defgroup UART_LIN_Break_Detection UART LIN Break Detection
459 * @{
460 */
461 #define UART_LINBREAKDETECTLENGTH_10B 0x00000000U /*!< LIN 10-bit break detection length */
462 #define UART_LINBREAKDETECTLENGTH_11B USART_CR2_LBDL /*!< LIN 11-bit break detection length */
463 /**
464 * @}
465 */
466
467 /** @defgroup UART_DMA_Tx UART DMA Tx
468 * @{
469 */
470 #define UART_DMA_TX_DISABLE 0x00000000U /*!< UART DMA TX disabled */
471 #define UART_DMA_TX_ENABLE USART_CR3_DMAT /*!< UART DMA TX enabled */
472 /**
473 * @}
474 */
475
476 /** @defgroup UART_DMA_Rx UART DMA Rx
477 * @{
478 */
479 #define UART_DMA_RX_DISABLE 0x00000000U /*!< UART DMA RX disabled */
480 #define UART_DMA_RX_ENABLE USART_CR3_DMAR /*!< UART DMA RX enabled */
481 /**
482 * @}
483 */
484
485 /** @defgroup UART_Half_Duplex_Selection UART Half Duplex Selection
486 * @{
487 */
488 #define UART_HALF_DUPLEX_DISABLE 0x00000000U /*!< UART half-duplex disabled */
489 #define UART_HALF_DUPLEX_ENABLE USART_CR3_HDSEL /*!< UART half-duplex enabled */
490 /**
491 * @}
492 */
493
494 /** @defgroup UART_WakeUp_Methods UART WakeUp Methods
495 * @{
496 */
497 #define UART_WAKEUPMETHOD_IDLELINE 0x00000000U /*!< UART wake-up on idle line */
498 #define UART_WAKEUPMETHOD_ADDRESSMARK USART_CR1_WAKE /*!< UART wake-up on address mark */
499 /**
500 * @}
501 */
502
503 /** @defgroup UART_Request_Parameters UART Request Parameters
504 * @{
505 */
506 #define UART_AUTOBAUD_REQUEST USART_RQR_ABRRQ /*!< Auto-Baud Rate Request */
507 #define UART_SENDBREAK_REQUEST USART_RQR_SBKRQ /*!< Send Break Request */
508 #define UART_MUTE_MODE_REQUEST USART_RQR_MMRQ /*!< Mute Mode Request */
509 #define UART_RXDATA_FLUSH_REQUEST USART_RQR_RXFRQ /*!< Receive Data flush Request */
510 #define UART_TXDATA_FLUSH_REQUEST USART_RQR_TXFRQ /*!< Transmit data flush Request */
511 /**
512 * @}
513 */
514
515 /** @defgroup UART_Advanced_Features_Initialization_Type UART Advanced Feature Initialization Type
516 * @{
517 */
518 #define UART_ADVFEATURE_NO_INIT 0x00000000U /*!< No advanced feature initialization */
519 #define UART_ADVFEATURE_TXINVERT_INIT 0x00000001U /*!< TX pin active level inversion */
520 #define UART_ADVFEATURE_RXINVERT_INIT 0x00000002U /*!< RX pin active level inversion */
521 #define UART_ADVFEATURE_DATAINVERT_INIT 0x00000004U /*!< Binary data inversion */
522 #define UART_ADVFEATURE_SWAP_INIT 0x00000008U /*!< TX/RX pins swap */
523 #define UART_ADVFEATURE_RXOVERRUNDISABLE_INIT 0x00000010U /*!< RX overrun disable */
524 #define UART_ADVFEATURE_DMADISABLEONERROR_INIT 0x00000020U /*!< DMA disable on Reception Error */
525 #define UART_ADVFEATURE_AUTOBAUDRATE_INIT 0x00000040U /*!< Auto Baud rate detection initialization */
526 #define UART_ADVFEATURE_MSBFIRST_INIT 0x00000080U /*!< Most significant bit sent/received first */
527 /**
528 * @}
529 */
530
531 /** @defgroup UART_Tx_Inv UART Advanced Feature TX Pin Active Level Inversion
532 * @{
533 */
534 #define UART_ADVFEATURE_TXINV_DISABLE 0x00000000U /*!< TX pin active level inversion disable */
535 #define UART_ADVFEATURE_TXINV_ENABLE USART_CR2_TXINV /*!< TX pin active level inversion enable */
536 /**
537 * @}
538 */
539
540 /** @defgroup UART_Rx_Inv UART Advanced Feature RX Pin Active Level Inversion
541 * @{
542 */
543 #define UART_ADVFEATURE_RXINV_DISABLE 0x00000000U /*!< RX pin active level inversion disable */
544 #define UART_ADVFEATURE_RXINV_ENABLE USART_CR2_RXINV /*!< RX pin active level inversion enable */
545 /**
546 * @}
547 */
548
549 /** @defgroup UART_Data_Inv UART Advanced Feature Binary Data Inversion
550 * @{
551 */
552 #define UART_ADVFEATURE_DATAINV_DISABLE 0x00000000U /*!< Binary data inversion disable */
553 #define UART_ADVFEATURE_DATAINV_ENABLE USART_CR2_DATAINV /*!< Binary data inversion enable */
554 /**
555 * @}
556 */
557
558 /** @defgroup UART_Rx_Tx_Swap UART Advanced Feature RX TX Pins Swap
559 * @{
560 */
561 #define UART_ADVFEATURE_SWAP_DISABLE 0x00000000U /*!< TX/RX pins swap disable */
562 #define UART_ADVFEATURE_SWAP_ENABLE USART_CR2_SWAP /*!< TX/RX pins swap enable */
563 /**
564 * @}
565 */
566
567 /** @defgroup UART_Overrun_Disable UART Advanced Feature Overrun Disable
568 * @{
569 */
570 #define UART_ADVFEATURE_OVERRUN_ENABLE 0x00000000U /*!< RX overrun enable */
571 #define UART_ADVFEATURE_OVERRUN_DISABLE USART_CR3_OVRDIS /*!< RX overrun disable */
572 /**
573 * @}
574 */
575
576 /** @defgroup UART_AutoBaudRate_Enable UART Advanced Feature Auto BaudRate Enable
577 * @{
578 */
579 #define UART_ADVFEATURE_AUTOBAUDRATE_DISABLE 0x00000000U /*!< RX Auto Baud rate detection enable */
580 #define UART_ADVFEATURE_AUTOBAUDRATE_ENABLE USART_CR2_ABREN /*!< RX Auto Baud rate detection disable */
581 /**
582 * @}
583 */
584
585 /** @defgroup UART_DMA_Disable_on_Rx_Error UART Advanced Feature DMA Disable On Rx Error
586 * @{
587 */
588 #define UART_ADVFEATURE_DMA_ENABLEONRXERROR 0x00000000U /*!< DMA enable on Reception Error */
589 #define UART_ADVFEATURE_DMA_DISABLEONRXERROR USART_CR3_DDRE /*!< DMA disable on Reception Error */
590 /**
591 * @}
592 */
593
594 /** @defgroup UART_MSB_First UART Advanced Feature MSB First
595 * @{
596 */
597 #define UART_ADVFEATURE_MSBFIRST_DISABLE 0x00000000U /*!< Most significant bit sent/received first disable */
598 #define UART_ADVFEATURE_MSBFIRST_ENABLE USART_CR2_MSBFIRST /*!< Most significant bit sent/received first enable */
599 /**
600 * @}
601 */
602
603 /** @defgroup UART_Stop_Mode_Enable UART Advanced Feature Stop Mode Enable
604 * @{
605 */
606 #define UART_ADVFEATURE_STOPMODE_DISABLE 0x00000000U /*!< UART stop mode disable */
607 #define UART_ADVFEATURE_STOPMODE_ENABLE USART_CR1_UESM /*!< UART stop mode enable */
608 /**
609 * @}
610 */
611
612 /** @defgroup UART_Mute_Mode UART Advanced Feature Mute Mode Enable
613 * @{
614 */
615 #define UART_ADVFEATURE_MUTEMODE_DISABLE 0x00000000U /*!< UART mute mode disable */
616 #define UART_ADVFEATURE_MUTEMODE_ENABLE USART_CR1_MME /*!< UART mute mode enable */
617 /**
618 * @}
619 */
620
621 /** @defgroup UART_CR2_ADDRESS_LSB_POS UART Address-matching LSB Position In CR2 Register
622 * @{
623 */
624 #define UART_CR2_ADDRESS_LSB_POS 24U /*!< UART address-matching LSB position in CR2 register */
625 /**
626 * @}
627 */
628
629 /** @defgroup UART_WakeUp_from_Stop_Selection UART WakeUp From Stop Selection
630 * @{
631 */
632 #define UART_WAKEUP_ON_ADDRESS 0x00000000U /*!< UART wake-up on address */
633 #define UART_WAKEUP_ON_STARTBIT USART_CR3_WUS_1 /*!< UART wake-up on start bit */
634 #define UART_WAKEUP_ON_READDATA_NONEMPTY USART_CR3_WUS /*!< UART wake-up on receive data register not empty or RXFIFO is not empty */
635 /**
636 * @}
637 */
638
639 /** @defgroup UART_DriverEnable_Polarity UART DriverEnable Polarity
640 * @{
641 */
642 #define UART_DE_POLARITY_HIGH 0x00000000U /*!< Driver enable signal is active high */
643 #define UART_DE_POLARITY_LOW USART_CR3_DEP /*!< Driver enable signal is active low */
644 /**
645 * @}
646 */
647
648 /** @defgroup UART_CR1_DEAT_ADDRESS_LSB_POS UART Driver Enable Assertion Time LSB Position In CR1 Register
649 * @{
650 */
651 #define UART_CR1_DEAT_ADDRESS_LSB_POS 21U /*!< UART Driver Enable assertion time LSB position in CR1 register */
652 /**
653 * @}
654 */
655
656 /** @defgroup UART_CR1_DEDT_ADDRESS_LSB_POS UART Driver Enable DeAssertion Time LSB Position In CR1 Register
657 * @{
658 */
659 #define UART_CR1_DEDT_ADDRESS_LSB_POS 16U /*!< UART Driver Enable de-assertion time LSB position in CR1 register */
660 /**
661 * @}
662 */
663
664 /** @defgroup UART_Interruption_Mask UART Interruptions Flag Mask
665 * @{
666 */
667 #define UART_IT_MASK 0x001FU /*!< UART interruptions flags mask */
668 /**
669 * @}
670 */
671
672 /** @defgroup UART_TimeOut_Value UART polling-based communications time-out value
673 * @{
674 */
675 #define HAL_UART_TIMEOUT_VALUE 0x1FFFFFFU /*!< UART polling-based communications time-out value */
676 /**
677 * @}
678 */
679
680 /** @defgroup UART_Flags UART Status Flags
681 * Elements values convention: 0xXXXX
682 * - 0xXXXX : Flag mask in the ISR register
683 * @{
684 */
685 #define UART_FLAG_TXFT USART_ISR_TXFT /*!< UART TXFIFO threshold flag */
686 #define UART_FLAG_RXFT USART_ISR_RXFT /*!< UART RXFIFO threshold flag */
687 #define UART_FLAG_RXFF USART_ISR_RXFF /*!< UART RXFIFO Full flag */
688 #define UART_FLAG_TXFE USART_ISR_TXFE /*!< UART TXFIFO Empty flag */
689 #define UART_FLAG_REACK USART_ISR_REACK /*!< UART receive enable acknowledge flag */
690 #define UART_FLAG_TEACK USART_ISR_TEACK /*!< UART transmit enable acknowledge flag */
691 #define UART_FLAG_WUF USART_ISR_WUF /*!< UART wake-up from stop mode flag */
692 #define UART_FLAG_RWU USART_ISR_RWU /*!< UART receiver wake-up from mute mode flag */
693 #define UART_FLAG_SBKF USART_ISR_SBKF /*!< UART send break flag */
694 #define UART_FLAG_CMF USART_ISR_CMF /*!< UART character match flag */
695 #define UART_FLAG_BUSY USART_ISR_BUSY /*!< UART busy flag */
696 #define UART_FLAG_ABRF USART_ISR_ABRF /*!< UART auto Baud rate flag */
697 #define UART_FLAG_ABRE USART_ISR_ABRE /*!< UART auto Baud rate error */
698 #define UART_FLAG_CTS USART_ISR_CTS /*!< UART clear to send flag */
699 #define UART_FLAG_CTSIF USART_ISR_CTSIF /*!< UART clear to send interrupt flag */
700 #define UART_FLAG_LBDF USART_ISR_LBDF /*!< UART LIN break detection flag */
701 #define UART_FLAG_TXE USART_ISR_TXE_TXFNF /*!< UART transmit data register empty */
702 #define UART_FLAG_TXFNF USART_ISR_TXE_TXFNF /*!< UART TXFIFO not full */
703 #define UART_FLAG_TC USART_ISR_TC /*!< UART transmission complete */
704 #define UART_FLAG_RXNE USART_ISR_RXNE_RXFNE /*!< UART read data register not empty */
705 #define UART_FLAG_RXFNE USART_ISR_RXNE_RXFNE /*!< UART RXFIFO not empty */
706 #define UART_FLAG_IDLE USART_ISR_IDLE /*!< UART idle flag */
707 #define UART_FLAG_ORE USART_ISR_ORE /*!< UART overrun error */
708 #define UART_FLAG_NE USART_ISR_NE /*!< UART noise error */
709 #define UART_FLAG_FE USART_ISR_FE /*!< UART frame error */
710 #define UART_FLAG_PE USART_ISR_PE /*!< UART parity error */
711 /**
712 * @}
713 */
714
715 /** @defgroup UART_Interrupt_definition UART Interrupts Definition
716 * Elements values convention: 000ZZZZZ0XXYYYYYb
717 * - YYYYY : Interrupt source position in the XX register (5bits)
718 * - XX : Interrupt source register (2bits)
719 * - 01: CR1 register
720 * - 10: CR2 register
721 * - 11: CR3 register
722 * - ZZZZZ : Flag position in the ISR register(5bits)
723 * Elements values convention: 000000000XXYYYYYb
724 * - YYYYY : Interrupt source position in the XX register (5bits)
725 * - XX : Interrupt source register (2bits)
726 * - 01: CR1 register
727 * - 10: CR2 register
728 * - 11: CR3 register
729 * Elements values convention: 0000ZZZZ00000000b
730 * - ZZZZ : Flag position in the ISR register(4bits)
731 * @{
732 */
733 #define UART_IT_PE 0x0028U /*!< UART parity error interruption */
734 #define UART_IT_TXE 0x0727U /*!< UART transmit data register empty interruption */
735 #define UART_IT_TXFNF 0x0727U /*!< UART TX FIFO not full interruption */
736 #define UART_IT_TC 0x0626U /*!< UART transmission complete interruption */
737 #define UART_IT_RXNE 0x0525U /*!< UART read data register not empty interruption */
738 #define UART_IT_RXFNE 0x0525U /*!< UART RXFIFO not empty interruption */
739 #define UART_IT_IDLE 0x0424U /*!< UART idle interruption */
740 #define UART_IT_LBD 0x0846U /*!< UART LIN break detection interruption */
741 #define UART_IT_CTS 0x096AU /*!< UART CTS interruption */
742 #define UART_IT_CM 0x112EU /*!< UART character match interruption */
743 #define UART_IT_WUF 0x1476U /*!< UART wake-up from stop mode interruption */
744 #define UART_IT_RXFF 0x183FU /*!< UART RXFIFO full interruption */
745 #define UART_IT_TXFE 0x173EU /*!< UART TXFIFO empty interruption */
746 #define UART_IT_RXFT 0x1A7CU /*!< UART RXFIFO threshold reached interruption */
747 #define UART_IT_TXFT 0x1B77U /*!< UART TXFIFO threshold reached interruption */
748
749 #define UART_IT_ERR 0x0060U /*!< UART error interruption */
750
751 #define UART_IT_ORE 0x0300U /*!< UART overrun error interruption */
752 #define UART_IT_NE 0x0200U /*!< UART noise error interruption */
753 #define UART_IT_FE 0x0100U /*!< UART frame error interruption */
754 /**
755 * @}
756 */
757
758 /** @defgroup UART_IT_CLEAR_Flags UART Interruption Clear Flags
759 * @{
760 */
761 #define UART_CLEAR_PEF USART_ICR_PECF /*!< Parity Error Clear Flag */
762 #define UART_CLEAR_FEF USART_ICR_FECF /*!< Framing Error Clear Flag */
763 #define UART_CLEAR_NEF USART_ICR_NECF /*!< Noise Error detected Clear Flag */
764 #define UART_CLEAR_OREF USART_ICR_ORECF /*!< Overrun Error Clear Flag */
765 #define UART_CLEAR_IDLEF USART_ICR_IDLECF /*!< IDLE line detected Clear Flag */
766 #define UART_CLEAR_TXFECF USART_ICR_TXFECF /*!< TXFIFO empty clear flag */
767 #define UART_CLEAR_TCF USART_ICR_TCCF /*!< Transmission Complete Clear Flag */
768 #define UART_CLEAR_LBDF USART_ICR_LBDCF /*!< LIN Break Detection Clear Flag */
769 #define UART_CLEAR_CTSF USART_ICR_CTSCF /*!< CTS Interrupt Clear Flag */
770 #define UART_CLEAR_CMF USART_ICR_CMCF /*!< Character Match Clear Flag */
771 #define UART_CLEAR_WUF USART_ICR_WUCF /*!< Wake Up from stop mode Clear Flag */
772 /**
773 * @}
774 */
775
776
777 /**
778 * @}
779 */
780
781 /* Exported macros -----------------------------------------------------------*/
782 /** @defgroup UART_Exported_Macros UART Exported Macros
783 * @{
784 */
785
786 /** @brief Reset UART handle states.
787 * @param __HANDLE__ UART handle.
788 * @retval None
789 */
790 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
791 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
792 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
793 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
794 (__HANDLE__)->MspInitCallback = NULL; \
795 (__HANDLE__)->MspDeInitCallback = NULL; \
796 } while(0U)
797 #else
798 #define __HAL_UART_RESET_HANDLE_STATE(__HANDLE__) do{ \
799 (__HANDLE__)->gState = HAL_UART_STATE_RESET; \
800 (__HANDLE__)->RxState = HAL_UART_STATE_RESET; \
801 } while(0U)
802 #endif /*USE_HAL_UART_REGISTER_CALLBACKS */
803
804 /** @brief Flush the UART Data registers.
805 * @param __HANDLE__ specifies the UART Handle.
806 * @retval None
807 */
808 #define __HAL_UART_FLUSH_DRREGISTER(__HANDLE__) \
809 do{ \
810 SET_BIT((__HANDLE__)->Instance->RQR, UART_RXDATA_FLUSH_REQUEST); \
811 SET_BIT((__HANDLE__)->Instance->RQR, UART_TXDATA_FLUSH_REQUEST); \
812 } while(0U)
813
814 /** @brief Clear the specified UART pending flag.
815 * @param __HANDLE__ specifies the UART Handle.
816 * @param __FLAG__ specifies the flag to check.
817 * This parameter can be any combination of the following values:
818 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
819 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
820 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
821 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
822 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
823 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty clear Flag
824 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
825 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
826 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
827 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
828 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
829 * @retval None
830 */
831 #define __HAL_UART_CLEAR_FLAG(__HANDLE__, __FLAG__) ((__HANDLE__)->Instance->ICR = (__FLAG__))
832
833 /** @brief Clear the UART PE pending flag.
834 * @param __HANDLE__ specifies the UART Handle.
835 * @retval None
836 */
837 #define __HAL_UART_CLEAR_PEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_PEF)
838
839 /** @brief Clear the UART FE pending flag.
840 * @param __HANDLE__ specifies the UART Handle.
841 * @retval None
842 */
843 #define __HAL_UART_CLEAR_FEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_FEF)
844
845 /** @brief Clear the UART NE pending flag.
846 * @param __HANDLE__ specifies the UART Handle.
847 * @retval None
848 */
849 #define __HAL_UART_CLEAR_NEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_NEF)
850
851 /** @brief Clear the UART ORE pending flag.
852 * @param __HANDLE__ specifies the UART Handle.
853 * @retval None
854 */
855 #define __HAL_UART_CLEAR_OREFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_OREF)
856
857 /** @brief Clear the UART IDLE pending flag.
858 * @param __HANDLE__ specifies the UART Handle.
859 * @retval None
860 */
861 #define __HAL_UART_CLEAR_IDLEFLAG(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_IDLEF)
862
863 /** @brief Clear the UART TX FIFO empty clear flag.
864 * @param __HANDLE__ specifies the UART Handle.
865 * @retval None
866 */
867 #define __HAL_UART_CLEAR_TXFECF(__HANDLE__) __HAL_UART_CLEAR_FLAG((__HANDLE__), UART_CLEAR_TXFECF)
868
869 /** @brief Check whether the specified UART flag is set or not.
870 * @param __HANDLE__ specifies the UART Handle.
871 * @param __FLAG__ specifies the flag to check.
872 * This parameter can be one of the following values:
873 * @arg @ref UART_FLAG_TXFT TXFIFO threshold flag
874 * @arg @ref UART_FLAG_RXFT RXFIFO threshold flag
875 * @arg @ref UART_FLAG_RXFF RXFIFO Full flag
876 * @arg @ref UART_FLAG_TXFE TXFIFO Empty flag
877 * @arg @ref UART_FLAG_REACK Receive enable acknowledge flag
878 * @arg @ref UART_FLAG_TEACK Transmit enable acknowledge flag
879 * @arg @ref UART_FLAG_WUF Wake up from stop mode flag
880 * @arg @ref UART_FLAG_RWU Receiver wake up flag (if the UART in mute mode)
881 * @arg @ref UART_FLAG_SBKF Send Break flag
882 * @arg @ref UART_FLAG_CMF Character match flag
883 * @arg @ref UART_FLAG_BUSY Busy flag
884 * @arg @ref UART_FLAG_ABRF Auto Baud rate detection flag
885 * @arg @ref UART_FLAG_ABRE Auto Baud rate detection error flag
886 * @arg @ref UART_FLAG_CTS CTS Change flag
887 * @arg @ref UART_FLAG_LBDF LIN Break detection flag
888 * @arg @ref UART_FLAG_TXE Transmit data register empty flag
889 * @arg @ref UART_FLAG_TXFNF UART TXFIFO not full flag
890 * @arg @ref UART_FLAG_TC Transmission Complete flag
891 * @arg @ref UART_FLAG_RXNE Receive data register not empty flag
892 * @arg @ref UART_FLAG_RXFNE UART RXFIFO not empty flag
893 * @arg @ref UART_FLAG_IDLE Idle Line detection flag
894 * @arg @ref UART_FLAG_ORE Overrun Error flag
895 * @arg @ref UART_FLAG_NE Noise Error flag
896 * @arg @ref UART_FLAG_FE Framing Error flag
897 * @arg @ref UART_FLAG_PE Parity Error flag
898 * @retval The new state of __FLAG__ (TRUE or FALSE).
899 */
900 #define __HAL_UART_GET_FLAG(__HANDLE__, __FLAG__) (((__HANDLE__)->Instance->ISR & (__FLAG__)) == (__FLAG__))
901
902 /** @brief Enable the specified UART interrupt.
903 * @param __HANDLE__ specifies the UART Handle.
904 * @param __INTERRUPT__ specifies the UART interrupt source to enable.
905 * This parameter can be one of the following values:
906 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
907 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
908 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
909 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
910 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
911 * @arg @ref UART_IT_CM Character match interrupt
912 * @arg @ref UART_IT_CTS CTS change interrupt
913 * @arg @ref UART_IT_LBD LIN Break detection interrupt
914 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
915 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
916 * @arg @ref UART_IT_TC Transmission complete interrupt
917 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
918 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
919 * @arg @ref UART_IT_IDLE Idle line detection interrupt
920 * @arg @ref UART_IT_PE Parity Error interrupt
921 * @arg @ref UART_IT_ERR Error interrupt (frame error, noise error, overrun error)
922 * @retval None
923 */
924 #define __HAL_UART_ENABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
925 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
926 ((__HANDLE__)->Instance->CR3 |= (1U << ((__INTERRUPT__) & UART_IT_MASK))))
927
928
929 /** @brief Disable the specified UART interrupt.
930 * @param __HANDLE__ specifies the UART Handle.
931 * @param __INTERRUPT__ specifies the UART interrupt source to disable.
932 * This parameter can be one of the following values:
933 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
934 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
935 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
936 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
937 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
938 * @arg @ref UART_IT_CM Character match interrupt
939 * @arg @ref UART_IT_CTS CTS change interrupt
940 * @arg @ref UART_IT_LBD LIN Break detection interrupt
941 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
942 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
943 * @arg @ref UART_IT_TC Transmission complete interrupt
944 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
945 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
946 * @arg @ref UART_IT_IDLE Idle line detection interrupt
947 * @arg @ref UART_IT_PE Parity Error interrupt
948 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
949 * @retval None
950 */
951 #define __HAL_UART_DISABLE_IT(__HANDLE__, __INTERRUPT__) (((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U)? ((__HANDLE__)->Instance->CR1 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
952 ((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U)? ((__HANDLE__)->Instance->CR2 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))): \
953 ((__HANDLE__)->Instance->CR3 &= ~ (1U << ((__INTERRUPT__) & UART_IT_MASK))))
954
955 /** @brief Check whether the specified UART interrupt has occurred or not.
956 * @param __HANDLE__ specifies the UART Handle.
957 * @param __INTERRUPT__ specifies the UART interrupt to check.
958 * This parameter can be one of the following values:
959 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
960 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
961 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
962 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
963 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
964 * @arg @ref UART_IT_CM Character match interrupt
965 * @arg @ref UART_IT_CTS CTS change interrupt
966 * @arg @ref UART_IT_LBD LIN Break detection interrupt
967 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
968 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
969 * @arg @ref UART_IT_TC Transmission complete interrupt
970 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
971 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
972 * @arg @ref UART_IT_IDLE Idle line detection interrupt
973 * @arg @ref UART_IT_PE Parity Error interrupt
974 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
975 * @retval The new state of __INTERRUPT__ (SET or RESET).
976 */
977 #define __HAL_UART_GET_IT(__HANDLE__, __INTERRUPT__) ((((__HANDLE__)->Instance->ISR\
978 & (1U << ((__INTERRUPT__)>> 8U))) != RESET) ? SET : RESET)
979
980 /** @brief Check whether the specified UART interrupt source is enabled or not.
981 * @param __HANDLE__ specifies the UART Handle.
982 * @param __INTERRUPT__ specifies the UART interrupt source to check.
983 * This parameter can be one of the following values:
984 * @arg @ref UART_IT_RXFF RXFIFO Full interrupt
985 * @arg @ref UART_IT_TXFE TXFIFO Empty interrupt
986 * @arg @ref UART_IT_RXFT RXFIFO threshold interrupt
987 * @arg @ref UART_IT_TXFT TXFIFO threshold interrupt
988 * @arg @ref UART_IT_WUF Wakeup from stop mode interrupt
989 * @arg @ref UART_IT_CM Character match interrupt
990 * @arg @ref UART_IT_CTS CTS change interrupt
991 * @arg @ref UART_IT_LBD LIN Break detection interrupt
992 * @arg @ref UART_IT_TXE Transmit Data Register empty interrupt
993 * @arg @ref UART_IT_TXFNF TX FIFO not full interrupt
994 * @arg @ref UART_IT_TC Transmission complete interrupt
995 * @arg @ref UART_IT_RXNE Receive Data register not empty interrupt
996 * @arg @ref UART_IT_RXFNE RXFIFO not empty interrupt
997 * @arg @ref UART_IT_IDLE Idle line detection interrupt
998 * @arg @ref UART_IT_PE Parity Error interrupt
999 * @arg @ref UART_IT_ERR Error interrupt (Frame error, noise error, overrun error)
1000 * @retval The new state of __INTERRUPT__ (SET or RESET).
1001 */
1002 #define __HAL_UART_GET_IT_SOURCE(__HANDLE__, __INTERRUPT__) ((((((((uint8_t)(__INTERRUPT__)) >> 5U) == 1U) ? (__HANDLE__)->Instance->CR1 : \
1003 (((((uint8_t)(__INTERRUPT__)) >> 5U) == 2U) ? (__HANDLE__)->Instance->CR2 : \
1004 (__HANDLE__)->Instance->CR3)) & (1U << (((uint16_t)(__INTERRUPT__)) & UART_IT_MASK))) != RESET) ? SET : RESET)
1005
1006 /** @brief Clear the specified UART ISR flag, in setting the proper ICR register flag.
1007 * @param __HANDLE__ specifies the UART Handle.
1008 * @param __IT_CLEAR__ specifies the interrupt clear register flag that needs to be set
1009 * to clear the corresponding interrupt
1010 * This parameter can be one of the following values:
1011 * @arg @ref UART_CLEAR_PEF Parity Error Clear Flag
1012 * @arg @ref UART_CLEAR_FEF Framing Error Clear Flag
1013 * @arg @ref UART_CLEAR_NEF Noise detected Clear Flag
1014 * @arg @ref UART_CLEAR_OREF Overrun Error Clear Flag
1015 * @arg @ref UART_CLEAR_IDLEF IDLE line detected Clear Flag
1016 * @arg @ref UART_CLEAR_TXFECF TXFIFO empty Clear Flag
1017 * @arg @ref UART_CLEAR_TCF Transmission Complete Clear Flag
1018 * @arg @ref UART_CLEAR_LBDF LIN Break Detection Clear Flag
1019 * @arg @ref UART_CLEAR_CTSF CTS Interrupt Clear Flag
1020 * @arg @ref UART_CLEAR_CMF Character Match Clear Flag
1021 * @arg @ref UART_CLEAR_WUF Wake Up from stop mode Clear Flag
1022 * @retval None
1023 */
1024 #define __HAL_UART_CLEAR_IT(__HANDLE__, __IT_CLEAR__) ((__HANDLE__)->Instance->ICR = (uint32_t)(__IT_CLEAR__))
1025
1026 /** @brief Set a specific UART request flag.
1027 * @param __HANDLE__ specifies the UART Handle.
1028 * @param __REQ__ specifies the request flag to set
1029 * This parameter can be one of the following values:
1030 * @arg @ref UART_AUTOBAUD_REQUEST Auto-Baud Rate Request
1031 * @arg @ref UART_SENDBREAK_REQUEST Send Break Request
1032 * @arg @ref UART_MUTE_MODE_REQUEST Mute Mode Request
1033 * @arg @ref UART_RXDATA_FLUSH_REQUEST Receive Data flush Request
1034 * @arg @ref UART_TXDATA_FLUSH_REQUEST Transmit data flush Request
1035 * @retval None
1036 */
1037 #define __HAL_UART_SEND_REQ(__HANDLE__, __REQ__) ((__HANDLE__)->Instance->RQR |= (uint16_t)(__REQ__))
1038
1039 /** @brief Enable the UART one bit sample method.
1040 * @param __HANDLE__ specifies the UART Handle.
1041 * @retval None
1042 */
1043 #define __HAL_UART_ONE_BIT_SAMPLE_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3|= USART_CR3_ONEBIT)
1044
1045 /** @brief Disable the UART one bit sample method.
1046 * @param __HANDLE__ specifies the UART Handle.
1047 * @retval None
1048 */
1049 #define __HAL_UART_ONE_BIT_SAMPLE_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR3 &= ~USART_CR3_ONEBIT)
1050
1051 /** @brief Enable UART.
1052 * @param __HANDLE__ specifies the UART Handle.
1053 * @retval None
1054 */
1055 #define __HAL_UART_ENABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 |= USART_CR1_UE)
1056
1057 /** @brief Disable UART.
1058 * @param __HANDLE__ specifies the UART Handle.
1059 * @retval None
1060 */
1061 #define __HAL_UART_DISABLE(__HANDLE__) ((__HANDLE__)->Instance->CR1 &= ~USART_CR1_UE)
1062
1063 /** @brief Enable CTS flow control.
1064 * @note This macro allows to enable CTS hardware flow control for a given UART instance,
1065 * without need to call HAL_UART_Init() function.
1066 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1067 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1068 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1069 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1070 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1071 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1072 * @param __HANDLE__ specifies the UART Handle.
1073 * @retval None
1074 */
1075 #define __HAL_UART_HWCONTROL_CTS_ENABLE(__HANDLE__) \
1076 do{ \
1077 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1078 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_CTSE; \
1079 } while(0U)
1080
1081 /** @brief Disable CTS flow control.
1082 * @note This macro allows to disable CTS hardware flow control for a given UART instance,
1083 * without need to call HAL_UART_Init() function.
1084 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1085 * @note As macro is expected to be used for modifying CTS Hw flow control feature activation, without need
1086 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1087 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1088 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1089 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1090 * @param __HANDLE__ specifies the UART Handle.
1091 * @retval None
1092 */
1093 #define __HAL_UART_HWCONTROL_CTS_DISABLE(__HANDLE__) \
1094 do{ \
1095 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_CTSE); \
1096 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_CTSE); \
1097 } while(0U)
1098
1099 /** @brief Enable RTS flow control.
1100 * @note This macro allows to enable RTS hardware flow control for a given UART instance,
1101 * without need to call HAL_UART_Init() function.
1102 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1103 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1104 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1105 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1106 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1107 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1108 * @param __HANDLE__ specifies the UART Handle.
1109 * @retval None
1110 */
1111 #define __HAL_UART_HWCONTROL_RTS_ENABLE(__HANDLE__) \
1112 do{ \
1113 SET_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE); \
1114 (__HANDLE__)->Init.HwFlowCtl |= USART_CR3_RTSE; \
1115 } while(0U)
1116
1117 /** @brief Disable RTS flow control.
1118 * @note This macro allows to disable RTS hardware flow control for a given UART instance,
1119 * without need to call HAL_UART_Init() function.
1120 * As involving direct access to UART registers, usage of this macro should be fully endorsed by user.
1121 * @note As macro is expected to be used for modifying RTS Hw flow control feature activation, without need
1122 * for USART instance Deinit/Init, following conditions for macro call should be fulfilled :
1123 * - UART instance should have already been initialised (through call of HAL_UART_Init() )
1124 * - macro could only be called when corresponding UART instance is disabled (i.e. __HAL_UART_DISABLE(__HANDLE__))
1125 * and should be followed by an Enable macro (i.e. __HAL_UART_ENABLE(__HANDLE__)).
1126 * @param __HANDLE__ specifies the UART Handle.
1127 * @retval None
1128 */
1129 #define __HAL_UART_HWCONTROL_RTS_DISABLE(__HANDLE__) \
1130 do{ \
1131 CLEAR_BIT((__HANDLE__)->Instance->CR3, USART_CR3_RTSE);\
1132 (__HANDLE__)->Init.HwFlowCtl &= ~(USART_CR3_RTSE); \
1133 } while(0U)
1134 /**
1135 * @}
1136 */
1137
1138 /* Private macros --------------------------------------------------------*/
1139 /** @defgroup UART_Private_Macros UART Private Macros
1140 * @{
1141 */
1142 /** @brief Get UART clok division factor from clock prescaler value.
1143 * @param __CLOCKPRESCALER__ UART prescaler value.
1144 * @retval UART clock division factor
1145 */
1146 #define UART_GET_DIV_FACTOR(__CLOCKPRESCALER__) \
1147 (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) ? 1U : \
1148 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) ? 2U : \
1149 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) ? 4U : \
1150 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) ? 6U : \
1151 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) ? 8U : \
1152 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) ? 10U : \
1153 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) ? 12U : \
1154 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) ? 16U : \
1155 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) ? 32U : \
1156 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) ? 64U : \
1157 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) ? 128U : \
1158 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256) ? 256U : 1U)
1159
1160 /** @brief BRR division operation to set BRR register with LPUART.
1161 * @param __PCLK__ LPUART clock.
1162 * @param __BAUD__ Baud rate set by the user.
1163 * @param __CLOCKPRESCALER__ UART prescaler value.
1164 * @retval Division result
1165 */
1166 #define UART_DIV_LPUART(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((uint32_t)(((((uint64_t)(__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*256U)\
1167 + (uint32_t)((__BAUD__)/2U)) / (__BAUD__)))
1168
1169 /** @brief BRR division operation to set BRR register in 8-bit oversampling mode.
1170 * @param __PCLK__ UART clock.
1171 * @param __BAUD__ Baud rate set by the user.
1172 * @param __CLOCKPRESCALER__ UART prescaler value.
1173 * @retval Division result
1174 */
1175 #define UART_DIV_SAMPLING8(__PCLK__, __BAUD__, __CLOCKPRESCALER__) (((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))*2U)\
1176 + ((__BAUD__)/2U)) / (__BAUD__))
1177
1178 /** @brief BRR division operation to set BRR register in 16-bit oversampling mode.
1179 * @param __PCLK__ UART clock.
1180 * @param __BAUD__ Baud rate set by the user.
1181 * @param __CLOCKPRESCALER__ UART prescaler value.
1182 * @retval Division result
1183 */
1184 #define UART_DIV_SAMPLING16(__PCLK__, __BAUD__, __CLOCKPRESCALER__) ((((__PCLK__)/UART_GET_DIV_FACTOR((__CLOCKPRESCALER__)))\
1185 + ((__BAUD__)/2U)) / (__BAUD__))
1186
1187 /** @brief Check whether or not UART instance is Low Power UART.
1188 * @param __HANDLE__ specifies the UART Handle.
1189 * @retval SET (instance is LPUART) or RESET (instance isn't LPUART)
1190 */
1191 #define UART_INSTANCE_LOWPOWER(__HANDLE__) (IS_LPUART_INSTANCE((__HANDLE__)->Instance))
1192
1193 /** @brief Check UART Baud rate.
1194 * @param __BAUDRATE__ Baudrate specified by the user.
1195 * The maximum Baud Rate is derived from the maximum clock on G4 (i.e. 150 MHz)
1196 * divided by the smallest oversampling used on the USART (i.e. 8)
1197 * @retval SET (__BAUDRATE__ is valid) or RESET (__BAUDRATE__ is invalid)
1198 */
1199 #define IS_UART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) < 18750001U)
1200
1201 /** @brief Check UART assertion time.
1202 * @param __TIME__ 5-bit value assertion time.
1203 * @retval Test result (TRUE or FALSE).
1204 */
1205 #define IS_UART_ASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
1206
1207 /** @brief Check UART deassertion time.
1208 * @param __TIME__ 5-bit value deassertion time.
1209 * @retval Test result (TRUE or FALSE).
1210 */
1211 #define IS_UART_DEASSERTIONTIME(__TIME__) ((__TIME__) <= 0x1FU)
1212
1213 /**
1214 * @brief Ensure that UART frame number of stop bits is valid.
1215 * @param __STOPBITS__ UART frame number of stop bits.
1216 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1217 */
1218 #define IS_UART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_0_5) || \
1219 ((__STOPBITS__) == UART_STOPBITS_1) || \
1220 ((__STOPBITS__) == UART_STOPBITS_1_5) || \
1221 ((__STOPBITS__) == UART_STOPBITS_2))
1222
1223 /**
1224 * @brief Ensure that LPUART frame number of stop bits is valid.
1225 * @param __STOPBITS__ LPUART frame number of stop bits.
1226 * @retval SET (__STOPBITS__ is valid) or RESET (__STOPBITS__ is invalid)
1227 */
1228 #define IS_LPUART_STOPBITS(__STOPBITS__) (((__STOPBITS__) == UART_STOPBITS_1) || \
1229 ((__STOPBITS__) == UART_STOPBITS_2))
1230
1231 /**
1232 * @brief Ensure that UART frame parity is valid.
1233 * @param __PARITY__ UART frame parity.
1234 * @retval SET (__PARITY__ is valid) or RESET (__PARITY__ is invalid)
1235 */
1236 #define IS_UART_PARITY(__PARITY__) (((__PARITY__) == UART_PARITY_NONE) || \
1237 ((__PARITY__) == UART_PARITY_EVEN) || \
1238 ((__PARITY__) == UART_PARITY_ODD))
1239
1240 /**
1241 * @brief Ensure that UART hardware flow control is valid.
1242 * @param __CONTROL__ UART hardware flow control.
1243 * @retval SET (__CONTROL__ is valid) or RESET (__CONTROL__ is invalid)
1244 */
1245 #define IS_UART_HARDWARE_FLOW_CONTROL(__CONTROL__)\
1246 (((__CONTROL__) == UART_HWCONTROL_NONE) || \
1247 ((__CONTROL__) == UART_HWCONTROL_RTS) || \
1248 ((__CONTROL__) == UART_HWCONTROL_CTS) || \
1249 ((__CONTROL__) == UART_HWCONTROL_RTS_CTS))
1250
1251 /**
1252 * @brief Ensure that UART communication mode is valid.
1253 * @param __MODE__ UART communication mode.
1254 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1255 */
1256 #define IS_UART_MODE(__MODE__) ((((__MODE__) & (~((uint32_t)(UART_MODE_TX_RX)))) == 0x00U) && ((__MODE__) != 0x00U))
1257
1258 /**
1259 * @brief Ensure that UART state is valid.
1260 * @param __STATE__ UART state.
1261 * @retval SET (__STATE__ is valid) or RESET (__STATE__ is invalid)
1262 */
1263 #define IS_UART_STATE(__STATE__) (((__STATE__) == UART_STATE_DISABLE) || \
1264 ((__STATE__) == UART_STATE_ENABLE))
1265
1266 /**
1267 * @brief Ensure that UART oversampling is valid.
1268 * @param __SAMPLING__ UART oversampling.
1269 * @retval SET (__SAMPLING__ is valid) or RESET (__SAMPLING__ is invalid)
1270 */
1271 #define IS_UART_OVERSAMPLING(__SAMPLING__) (((__SAMPLING__) == UART_OVERSAMPLING_16) || \
1272 ((__SAMPLING__) == UART_OVERSAMPLING_8))
1273
1274 /**
1275 * @brief Ensure that UART frame sampling is valid.
1276 * @param __ONEBIT__ UART frame sampling.
1277 * @retval SET (__ONEBIT__ is valid) or RESET (__ONEBIT__ is invalid)
1278 */
1279 #define IS_UART_ONE_BIT_SAMPLE(__ONEBIT__) (((__ONEBIT__) == UART_ONE_BIT_SAMPLE_DISABLE) || \
1280 ((__ONEBIT__) == UART_ONE_BIT_SAMPLE_ENABLE))
1281
1282 /**
1283 * @brief Ensure that UART auto Baud rate detection mode is valid.
1284 * @param __MODE__ UART auto Baud rate detection mode.
1285 * @retval SET (__MODE__ is valid) or RESET (__MODE__ is invalid)
1286 */
1287 #define IS_UART_ADVFEATURE_AUTOBAUDRATEMODE(__MODE__) (((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONSTARTBIT) || \
1288 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ONFALLINGEDGE) || \
1289 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X7FFRAME) || \
1290 ((__MODE__) == UART_ADVFEATURE_AUTOBAUDRATE_ON0X55FRAME))
1291
1292 /**
1293 * @brief Ensure that UART receiver timeout setting is valid.
1294 * @param __TIMEOUT__ UART receiver timeout setting.
1295 * @retval SET (__TIMEOUT__ is valid) or RESET (__TIMEOUT__ is invalid)
1296 */
1297 #define IS_UART_RECEIVER_TIMEOUT(__TIMEOUT__) (((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_DISABLE) || \
1298 ((__TIMEOUT__) == UART_RECEIVER_TIMEOUT_ENABLE))
1299
1300 /**
1301 * @brief Ensure that UART LIN state is valid.
1302 * @param __LIN__ UART LIN state.
1303 * @retval SET (__LIN__ is valid) or RESET (__LIN__ is invalid)
1304 */
1305 #define IS_UART_LIN(__LIN__) (((__LIN__) == UART_LIN_DISABLE) || \
1306 ((__LIN__) == UART_LIN_ENABLE))
1307
1308 /**
1309 * @brief Ensure that UART LIN break detection length is valid.
1310 * @param __LENGTH__ UART LIN break detection length.
1311 * @retval SET (__LENGTH__ is valid) or RESET (__LENGTH__ is invalid)
1312 */
1313 #define IS_UART_LIN_BREAK_DETECT_LENGTH(__LENGTH__) (((__LENGTH__) == UART_LINBREAKDETECTLENGTH_10B) || \
1314 ((__LENGTH__) == UART_LINBREAKDETECTLENGTH_11B))
1315
1316 /**
1317 * @brief Ensure that UART DMA TX state is valid.
1318 * @param __DMATX__ UART DMA TX state.
1319 * @retval SET (__DMATX__ is valid) or RESET (__DMATX__ is invalid)
1320 */
1321 #define IS_UART_DMA_TX(__DMATX__) (((__DMATX__) == UART_DMA_TX_DISABLE) || \
1322 ((__DMATX__) == UART_DMA_TX_ENABLE))
1323
1324 /**
1325 * @brief Ensure that UART DMA RX state is valid.
1326 * @param __DMARX__ UART DMA RX state.
1327 * @retval SET (__DMARX__ is valid) or RESET (__DMARX__ is invalid)
1328 */
1329 #define IS_UART_DMA_RX(__DMARX__) (((__DMARX__) == UART_DMA_RX_DISABLE) || \
1330 ((__DMARX__) == UART_DMA_RX_ENABLE))
1331
1332 /**
1333 * @brief Ensure that UART half-duplex state is valid.
1334 * @param __HDSEL__ UART half-duplex state.
1335 * @retval SET (__HDSEL__ is valid) or RESET (__HDSEL__ is invalid)
1336 */
1337 #define IS_UART_HALF_DUPLEX(__HDSEL__) (((__HDSEL__) == UART_HALF_DUPLEX_DISABLE) || \
1338 ((__HDSEL__) == UART_HALF_DUPLEX_ENABLE))
1339
1340 /**
1341 * @brief Ensure that UART wake-up method is valid.
1342 * @param __WAKEUP__ UART wake-up method .
1343 * @retval SET (__WAKEUP__ is valid) or RESET (__WAKEUP__ is invalid)
1344 */
1345 #define IS_UART_WAKEUPMETHOD(__WAKEUP__) (((__WAKEUP__) == UART_WAKEUPMETHOD_IDLELINE) || \
1346 ((__WAKEUP__) == UART_WAKEUPMETHOD_ADDRESSMARK))
1347
1348 /**
1349 * @brief Ensure that UART request parameter is valid.
1350 * @param __PARAM__ UART request parameter.
1351 * @retval SET (__PARAM__ is valid) or RESET (__PARAM__ is invalid)
1352 */
1353 #define IS_UART_REQUEST_PARAMETER(__PARAM__) (((__PARAM__) == UART_AUTOBAUD_REQUEST) || \
1354 ((__PARAM__) == UART_SENDBREAK_REQUEST) || \
1355 ((__PARAM__) == UART_MUTE_MODE_REQUEST) || \
1356 ((__PARAM__) == UART_RXDATA_FLUSH_REQUEST) || \
1357 ((__PARAM__) == UART_TXDATA_FLUSH_REQUEST))
1358
1359 /**
1360 * @brief Ensure that UART advanced features initialization is valid.
1361 * @param __INIT__ UART advanced features initialization.
1362 * @retval SET (__INIT__ is valid) or RESET (__INIT__ is invalid)
1363 */
1364 #define IS_UART_ADVFEATURE_INIT(__INIT__) ((__INIT__) <= (UART_ADVFEATURE_NO_INIT | \
1365 UART_ADVFEATURE_TXINVERT_INIT | \
1366 UART_ADVFEATURE_RXINVERT_INIT | \
1367 UART_ADVFEATURE_DATAINVERT_INIT | \
1368 UART_ADVFEATURE_SWAP_INIT | \
1369 UART_ADVFEATURE_RXOVERRUNDISABLE_INIT | \
1370 UART_ADVFEATURE_DMADISABLEONERROR_INIT | \
1371 UART_ADVFEATURE_AUTOBAUDRATE_INIT | \
1372 UART_ADVFEATURE_MSBFIRST_INIT))
1373
1374 /**
1375 * @brief Ensure that UART frame TX inversion setting is valid.
1376 * @param __TXINV__ UART frame TX inversion setting.
1377 * @retval SET (__TXINV__ is valid) or RESET (__TXINV__ is invalid)
1378 */
1379 #define IS_UART_ADVFEATURE_TXINV(__TXINV__) (((__TXINV__) == UART_ADVFEATURE_TXINV_DISABLE) || \
1380 ((__TXINV__) == UART_ADVFEATURE_TXINV_ENABLE))
1381
1382 /**
1383 * @brief Ensure that UART frame RX inversion setting is valid.
1384 * @param __RXINV__ UART frame RX inversion setting.
1385 * @retval SET (__RXINV__ is valid) or RESET (__RXINV__ is invalid)
1386 */
1387 #define IS_UART_ADVFEATURE_RXINV(__RXINV__) (((__RXINV__) == UART_ADVFEATURE_RXINV_DISABLE) || \
1388 ((__RXINV__) == UART_ADVFEATURE_RXINV_ENABLE))
1389
1390 /**
1391 * @brief Ensure that UART frame data inversion setting is valid.
1392 * @param __DATAINV__ UART frame data inversion setting.
1393 * @retval SET (__DATAINV__ is valid) or RESET (__DATAINV__ is invalid)
1394 */
1395 #define IS_UART_ADVFEATURE_DATAINV(__DATAINV__) (((__DATAINV__) == UART_ADVFEATURE_DATAINV_DISABLE) || \
1396 ((__DATAINV__) == UART_ADVFEATURE_DATAINV_ENABLE))
1397
1398 /**
1399 * @brief Ensure that UART frame RX/TX pins swap setting is valid.
1400 * @param __SWAP__ UART frame RX/TX pins swap setting.
1401 * @retval SET (__SWAP__ is valid) or RESET (__SWAP__ is invalid)
1402 */
1403 #define IS_UART_ADVFEATURE_SWAP(__SWAP__) (((__SWAP__) == UART_ADVFEATURE_SWAP_DISABLE) || \
1404 ((__SWAP__) == UART_ADVFEATURE_SWAP_ENABLE))
1405
1406 /**
1407 * @brief Ensure that UART frame overrun setting is valid.
1408 * @param __OVERRUN__ UART frame overrun setting.
1409 * @retval SET (__OVERRUN__ is valid) or RESET (__OVERRUN__ is invalid)
1410 */
1411 #define IS_UART_OVERRUN(__OVERRUN__) (((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_ENABLE) || \
1412 ((__OVERRUN__) == UART_ADVFEATURE_OVERRUN_DISABLE))
1413
1414 /**
1415 * @brief Ensure that UART auto Baud rate state is valid.
1416 * @param __AUTOBAUDRATE__ UART auto Baud rate state.
1417 * @retval SET (__AUTOBAUDRATE__ is valid) or RESET (__AUTOBAUDRATE__ is invalid)
1418 */
1419 #define IS_UART_ADVFEATURE_AUTOBAUDRATE(__AUTOBAUDRATE__) (((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_DISABLE) || \
1420 ((__AUTOBAUDRATE__) == UART_ADVFEATURE_AUTOBAUDRATE_ENABLE))
1421
1422 /**
1423 * @brief Ensure that UART DMA enabling or disabling on error setting is valid.
1424 * @param __DMA__ UART DMA enabling or disabling on error setting.
1425 * @retval SET (__DMA__ is valid) or RESET (__DMA__ is invalid)
1426 */
1427 #define IS_UART_ADVFEATURE_DMAONRXERROR(__DMA__) (((__DMA__) == UART_ADVFEATURE_DMA_ENABLEONRXERROR) || \
1428 ((__DMA__) == UART_ADVFEATURE_DMA_DISABLEONRXERROR))
1429
1430 /**
1431 * @brief Ensure that UART frame MSB first setting is valid.
1432 * @param __MSBFIRST__ UART frame MSB first setting.
1433 * @retval SET (__MSBFIRST__ is valid) or RESET (__MSBFIRST__ is invalid)
1434 */
1435 #define IS_UART_ADVFEATURE_MSBFIRST(__MSBFIRST__) (((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_DISABLE) || \
1436 ((__MSBFIRST__) == UART_ADVFEATURE_MSBFIRST_ENABLE))
1437
1438 /**
1439 * @brief Ensure that UART stop mode state is valid.
1440 * @param __STOPMODE__ UART stop mode state.
1441 * @retval SET (__STOPMODE__ is valid) or RESET (__STOPMODE__ is invalid)
1442 */
1443 #define IS_UART_ADVFEATURE_STOPMODE(__STOPMODE__) (((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_DISABLE) || \
1444 ((__STOPMODE__) == UART_ADVFEATURE_STOPMODE_ENABLE))
1445
1446 /**
1447 * @brief Ensure that UART mute mode state is valid.
1448 * @param __MUTE__ UART mute mode state.
1449 * @retval SET (__MUTE__ is valid) or RESET (__MUTE__ is invalid)
1450 */
1451 #define IS_UART_MUTE_MODE(__MUTE__) (((__MUTE__) == UART_ADVFEATURE_MUTEMODE_DISABLE) || \
1452 ((__MUTE__) == UART_ADVFEATURE_MUTEMODE_ENABLE))
1453
1454 /**
1455 * @brief Ensure that UART wake-up selection is valid.
1456 * @param __WAKE__ UART wake-up selection.
1457 * @retval SET (__WAKE__ is valid) or RESET (__WAKE__ is invalid)
1458 */
1459 #define IS_UART_WAKEUP_SELECTION(__WAKE__) (((__WAKE__) == UART_WAKEUP_ON_ADDRESS) || \
1460 ((__WAKE__) == UART_WAKEUP_ON_STARTBIT) || \
1461 ((__WAKE__) == UART_WAKEUP_ON_READDATA_NONEMPTY))
1462
1463 /**
1464 * @brief Ensure that UART driver enable polarity is valid.
1465 * @param __POLARITY__ UART driver enable polarity.
1466 * @retval SET (__POLARITY__ is valid) or RESET (__POLARITY__ is invalid)
1467 */
1468 #define IS_UART_DE_POLARITY(__POLARITY__) (((__POLARITY__) == UART_DE_POLARITY_HIGH) || \
1469 ((__POLARITY__) == UART_DE_POLARITY_LOW))
1470
1471 /**
1472 * @brief Ensure that UART Prescaler is valid.
1473 * @param __CLOCKPRESCALER__ UART Prescaler value.
1474 * @retval SET (__CLOCKPRESCALER__ is valid) or RESET (__CLOCKPRESCALER__ is invalid)
1475 */
1476 #define IS_UART_PRESCALER(__CLOCKPRESCALER__) (((__CLOCKPRESCALER__) == UART_PRESCALER_DIV1) || \
1477 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV2) || \
1478 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV4) || \
1479 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV6) || \
1480 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV8) || \
1481 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV10) || \
1482 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV12) || \
1483 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV16) || \
1484 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV32) || \
1485 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV64) || \
1486 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV128) || \
1487 ((__CLOCKPRESCALER__) == UART_PRESCALER_DIV256))
1488
1489 /**
1490 * @}
1491 */
1492
1493 /* Include UART HAL Extended module */
1494 #include "stm32g4xx_hal_uart_ex.h"
1495
1496
1497 /* Exported functions --------------------------------------------------------*/
1498 /** @addtogroup UART_Exported_Functions UART Exported Functions
1499 * @{
1500 */
1501
1502 /** @addtogroup UART_Exported_Functions_Group1 Initialization and de-initialization functions
1503 * @{
1504 */
1505
1506 /* Initialization and de-initialization functions ****************************/
1507 HAL_StatusTypeDef HAL_UART_Init(UART_HandleTypeDef *huart);
1508 HAL_StatusTypeDef HAL_HalfDuplex_Init(UART_HandleTypeDef *huart);
1509 HAL_StatusTypeDef HAL_LIN_Init(UART_HandleTypeDef *huart, uint32_t BreakDetectLength);
1510 HAL_StatusTypeDef HAL_MultiProcessor_Init(UART_HandleTypeDef *huart, uint8_t Address, uint32_t WakeUpMethod);
1511 HAL_StatusTypeDef HAL_UART_DeInit(UART_HandleTypeDef *huart);
1512 void HAL_UART_MspInit(UART_HandleTypeDef *huart);
1513 void HAL_UART_MspDeInit(UART_HandleTypeDef *huart);
1514
1515 /* Callbacks Register/UnRegister functions ***********************************/
1516 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1517 HAL_StatusTypeDef HAL_UART_RegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID,
1518 pUART_CallbackTypeDef pCallback);
1519 HAL_StatusTypeDef HAL_UART_UnRegisterCallback(UART_HandleTypeDef *huart, HAL_UART_CallbackIDTypeDef CallbackID);
1520 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1521
1522 /**
1523 * @}
1524 */
1525
1526 /** @addtogroup UART_Exported_Functions_Group2 IO operation functions
1527 * @{
1528 */
1529
1530 /* IO operation functions *****************************************************/
1531 HAL_StatusTypeDef HAL_UART_Transmit(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
1532 HAL_StatusTypeDef HAL_UART_Receive(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size, uint32_t Timeout);
1533 HAL_StatusTypeDef HAL_UART_Transmit_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1534 HAL_StatusTypeDef HAL_UART_Receive_IT(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1535 HAL_StatusTypeDef HAL_UART_Transmit_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1536 HAL_StatusTypeDef HAL_UART_Receive_DMA(UART_HandleTypeDef *huart, uint8_t *pData, uint16_t Size);
1537 HAL_StatusTypeDef HAL_UART_DMAPause(UART_HandleTypeDef *huart);
1538 HAL_StatusTypeDef HAL_UART_DMAResume(UART_HandleTypeDef *huart);
1539 HAL_StatusTypeDef HAL_UART_DMAStop(UART_HandleTypeDef *huart);
1540 /* Transfer Abort functions */
1541 HAL_StatusTypeDef HAL_UART_Abort(UART_HandleTypeDef *huart);
1542 HAL_StatusTypeDef HAL_UART_AbortTransmit(UART_HandleTypeDef *huart);
1543 HAL_StatusTypeDef HAL_UART_AbortReceive(UART_HandleTypeDef *huart);
1544 HAL_StatusTypeDef HAL_UART_Abort_IT(UART_HandleTypeDef *huart);
1545 HAL_StatusTypeDef HAL_UART_AbortTransmit_IT(UART_HandleTypeDef *huart);
1546 HAL_StatusTypeDef HAL_UART_AbortReceive_IT(UART_HandleTypeDef *huart);
1547
1548 void HAL_UART_IRQHandler(UART_HandleTypeDef *huart);
1549 void HAL_UART_TxHalfCpltCallback(UART_HandleTypeDef *huart);
1550 void HAL_UART_TxCpltCallback(UART_HandleTypeDef *huart);
1551 void HAL_UART_RxHalfCpltCallback(UART_HandleTypeDef *huart);
1552 void HAL_UART_RxCpltCallback(UART_HandleTypeDef *huart);
1553 void HAL_UART_ErrorCallback(UART_HandleTypeDef *huart);
1554 void HAL_UART_AbortCpltCallback(UART_HandleTypeDef *huart);
1555 void HAL_UART_AbortTransmitCpltCallback(UART_HandleTypeDef *huart);
1556 void HAL_UART_AbortReceiveCpltCallback(UART_HandleTypeDef *huart);
1557
1558 /**
1559 * @}
1560 */
1561
1562 /** @addtogroup UART_Exported_Functions_Group3 Peripheral Control functions
1563 * @{
1564 */
1565
1566 /* Peripheral Control functions ************************************************/
1567 HAL_StatusTypeDef HAL_LIN_SendBreak(UART_HandleTypeDef *huart);
1568 HAL_StatusTypeDef HAL_MultiProcessor_EnableMuteMode(UART_HandleTypeDef *huart);
1569 HAL_StatusTypeDef HAL_MultiProcessor_DisableMuteMode(UART_HandleTypeDef *huart);
1570 void HAL_MultiProcessor_EnterMuteMode(UART_HandleTypeDef *huart);
1571 HAL_StatusTypeDef HAL_HalfDuplex_EnableTransmitter(UART_HandleTypeDef *huart);
1572 HAL_StatusTypeDef HAL_HalfDuplex_EnableReceiver(UART_HandleTypeDef *huart);
1573
1574 /**
1575 * @}
1576 */
1577
1578 /** @addtogroup UART_Exported_Functions_Group4 Peripheral State and Error functions
1579 * @{
1580 */
1581
1582 /* Peripheral State and Errors functions **************************************************/
1583 HAL_UART_StateTypeDef HAL_UART_GetState(UART_HandleTypeDef *huart);
1584 uint32_t HAL_UART_GetError(UART_HandleTypeDef *huart);
1585
1586 /**
1587 * @}
1588 */
1589
1590 /**
1591 * @}
1592 */
1593
1594 /* Private functions -----------------------------------------------------------*/
1595 /** @addtogroup UART_Private_Functions UART Private Functions
1596 * @{
1597 */
1598 #if (USE_HAL_UART_REGISTER_CALLBACKS == 1)
1599 void UART_InitCallbacksToDefault(UART_HandleTypeDef *huart);
1600 #endif /* USE_HAL_UART_REGISTER_CALLBACKS */
1601 HAL_StatusTypeDef UART_SetConfig(UART_HandleTypeDef *huart);
1602 HAL_StatusTypeDef UART_CheckIdleState(UART_HandleTypeDef *huart);
1603 HAL_StatusTypeDef UART_WaitOnFlagUntilTimeout(UART_HandleTypeDef *huart, uint32_t Flag, FlagStatus Status,
1604 uint32_t Tickstart, uint32_t Timeout);
1605 void UART_AdvFeatureConfig(UART_HandleTypeDef *huart);
1606
1607 /**
1608 * @}
1609 */
1610
1611 /**
1612 * @}
1613 */
1614
1615 /**
1616 * @}
1617 */
1618
1619 #ifdef __cplusplus
1620 }
1621 #endif
1622
1623 #endif /* STM32G4xx_HAL_UART_H */
1624
1625 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/