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Merge pull request #11189 from klutvott123/move-telemetry-displayport-init
[betaflight.git] / lib / main / STM32G4 / Drivers / STM32G4xx_HAL_Driver / Inc / stm32g4xx_ll_dmamux.h
blob8542f5b77d01f86f017e40a77a88061c10e7bdab
1 /**
2 ******************************************************************************
3 * @file stm32g4xx_ll_dmamux.h
4 * @author MCD Application Team
5 * @brief Header file of DMAMUX LL module.
6 ******************************************************************************
7 * @attention
8 *
9 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
10 * All rights reserved.</center></h2>
11 *
12 * This software component is licensed by ST under BSD 3-Clause license,
13 * the "License"; You may not use this file except in compliance with the
14 * License. You may obtain a copy of the License at:
15 * opensource.org/licenses/BSD-3-Clause
16 *
17 ******************************************************************************
18 */
19
20 /* Define to prevent recursive inclusion -------------------------------------*/
21 #ifndef __STM32G4xx_LL_DMAMUX_H
22 #define __STM32G4xx_LL_DMAMUX_H
23
24 #ifdef __cplusplus
25 extern "C" {
26 #endif
27
28 /* Includes ------------------------------------------------------------------*/
29 #include "stm32g4xx.h"
30
31 /** @addtogroup STM32G4xx_LL_Driver
32 * @{
33 */
34
35 #if defined (DMAMUX1)
36
37 /** @defgroup DMAMUX_LL DMAMUX
38 * @{
39 */
40
41 /* Private types -------------------------------------------------------------*/
42 /* Private variables ---------------------------------------------------------*/
43 /* Private constants ---------------------------------------------------------*/
44 /** @defgroup DMAMUX_LL_Private_Constants DMAMUX Private Constants
45 * @{
46 */
47 /* Define used to get DMAMUX CCR register size */
48 #define DMAMUX_CCR_SIZE 0x00000004U
49
50 /* Define used to get DMAMUX RGCR register size */
51 #define DMAMUX_RGCR_SIZE 0x00000004U
52 /**
53 * @}
54 */
55
56 /* Private macros ------------------------------------------------------------*/
57 /** @defgroup DMAMUX_LL_Private_Macros DMAMUX Private Macros
58 * @{
59 */
60 #define UNUSED(X) (void)X
61 /**
62 * @}
63 */
64
65 /* Exported types ------------------------------------------------------------*/
66 /* Exported constants --------------------------------------------------------*/
67 /** @defgroup DMAMUX_LL_Exported_Constants DMAMUX Exported Constants
68 * @{
69 */
70 /** @defgroup DMAMUX_LL_EC_CLEAR_FLAG Clear Flags Defines
71 * @brief Flags defines which can be used with LL_DMAMUX_WriteReg function
72 * @{
73 */
74 #define LL_DMAMUX_CFR_CSOF0 DMAMUX_CFR_CSOF0 /*!< Synchronization Event Overrun Flag Channel 0 */
75 #define LL_DMAMUX_CFR_CSOF1 DMAMUX_CFR_CSOF1 /*!< Synchronization Event Overrun Flag Channel 1 */
76 #define LL_DMAMUX_CFR_CSOF2 DMAMUX_CFR_CSOF2 /*!< Synchronization Event Overrun Flag Channel 2 */
77 #define LL_DMAMUX_CFR_CSOF3 DMAMUX_CFR_CSOF3 /*!< Synchronization Event Overrun Flag Channel 3 */
78 #define LL_DMAMUX_CFR_CSOF4 DMAMUX_CFR_CSOF4 /*!< Synchronization Event Overrun Flag Channel 4 */
79 #define LL_DMAMUX_CFR_CSOF5 DMAMUX_CFR_CSOF5 /*!< Synchronization Event Overrun Flag Channel 5 */
80 #define LL_DMAMUX_CFR_CSOF6 DMAMUX_CFR_CSOF6 /*!< Synchronization Event Overrun Flag Channel 6 */
81 #define LL_DMAMUX_CFR_CSOF7 DMAMUX_CFR_CSOF7 /*!< Synchronization Event Overrun Flag Channel 7 */
82 #define LL_DMAMUX_CFR_CSOF8 DMAMUX_CFR_CSOF8 /*!< Synchronization Event Overrun Flag Channel 8 */
83 #define LL_DMAMUX_CFR_CSOF9 DMAMUX_CFR_CSOF9 /*!< Synchronization Event Overrun Flag Channel 9 */
84 #define LL_DMAMUX_CFR_CSOF10 DMAMUX_CFR_CSOF10 /*!< Synchronization Event Overrun Flag Channel 10 */
85 #define LL_DMAMUX_CFR_CSOF11 DMAMUX_CFR_CSOF11 /*!< Synchronization Event Overrun Flag Channel 11 */
86 #define LL_DMAMUX_CFR_CSOF12 DMAMUX_CFR_CSOF12 /*!< Synchronization Event Overrun Flag Channel 12 */
87 #define LL_DMAMUX_CFR_CSOF13 DMAMUX_CFR_CSOF13 /*!< Synchronization Event Overrun Flag Channel 13 */
88 #define LL_DMAMUX_CFR_CSOF14 DMAMUX_CFR_CSOF14 /*!< Synchronization Event Overrun Flag Channel 14 */
89 #define LL_DMAMUX_CFR_CSOF15 DMAMUX_CFR_CSOF15 /*!< Synchronization Event Overrun Flag Channel 15 */
90 #define LL_DMAMUX_RGCFR_RGCOF0 DMAMUX_RGCFR_COF0 /*!< Request Generator 0 Trigger Event Overrun Flag */
91 #define LL_DMAMUX_RGCFR_RGCOF1 DMAMUX_RGCFR_COF1 /*!< Request Generator 1 Trigger Event Overrun Flag */
92 #define LL_DMAMUX_RGCFR_RGCOF2 DMAMUX_RGCFR_COF2 /*!< Request Generator 2 Trigger Event Overrun Flag */
93 #define LL_DMAMUX_RGCFR_RGCOF3 DMAMUX_RGCFR_COF3 /*!< Request Generator 3 Trigger Event Overrun Flag */
94 /**
95 * @}
96 */
97
98 /** @defgroup DMAMUX_LL_EC_GET_FLAG Get Flags Defines
99 * @brief Flags defines which can be used with LL_DMAMUX_ReadReg function
100 * @{
101 */
102 #define LL_DMAMUX_CSR_SOF0 DMAMUX_CSR_SOF0 /*!< Synchronization Event Overrun Flag Channel 0 */
103 #define LL_DMAMUX_CSR_SOF1 DMAMUX_CSR_SOF1 /*!< Synchronization Event Overrun Flag Channel 1 */
104 #define LL_DMAMUX_CSR_SOF2 DMAMUX_CSR_SOF2 /*!< Synchronization Event Overrun Flag Channel 2 */
105 #define LL_DMAMUX_CSR_SOF3 DMAMUX_CSR_SOF3 /*!< Synchronization Event Overrun Flag Channel 3 */
106 #define LL_DMAMUX_CSR_SOF4 DMAMUX_CSR_SOF4 /*!< Synchronization Event Overrun Flag Channel 4 */
107 #define LL_DMAMUX_CSR_SOF5 DMAMUX_CSR_SOF5 /*!< Synchronization Event Overrun Flag Channel 5 */
108 #define LL_DMAMUX_CSR_SOF6 DMAMUX_CSR_SOF6 /*!< Synchronization Event Overrun Flag Channel 6 */
109 #define LL_DMAMUX_CSR_SOF7 DMAMUX_CSR_SOF7 /*!< Synchronization Event Overrun Flag Channel 7 */
110 #define LL_DMAMUX_CSR_SOF8 DMAMUX_CSR_SOF8 /*!< Synchronization Event Overrun Flag Channel 8 */
111 #define LL_DMAMUX_CSR_SOF9 DMAMUX_CSR_SOF9 /*!< Synchronization Event Overrun Flag Channel 9 */
112 #define LL_DMAMUX_CSR_SOF10 DMAMUX_CSR_SOF10 /*!< Synchronization Event Overrun Flag Channel 10 */
113 #define LL_DMAMUX_CSR_SOF11 DMAMUX_CSR_SOF11 /*!< Synchronization Event Overrun Flag Channel 11 */
114 #define LL_DMAMUX_CSR_SOF12 DMAMUX_CSR_SOF12 /*!< Synchronization Event Overrun Flag Channel 12 */
115 #define LL_DMAMUX_CSR_SOF13 DMAMUX_CSR_SOF13 /*!< Synchronization Event Overrun Flag Channel 13 */
116 #define LL_DMAMUX_CSR_SOF14 DMAMUX_CSR_SOF14 /*!< Synchronization Event Overrun Flag Channel 14 */
117 #define LL_DMAMUX_CSR_SOF15 DMAMUX_CSR_SOF15 /*!< Synchronization Event Overrun Flag Channel 15 */
118 #define LL_DMAMUX_RGSR_RGOF0 DMAMUX_RGSR_OF0 /*!< Request Generator 0 Trigger Event Overrun Flag */
119 #define LL_DMAMUX_RGSR_RGOF1 DMAMUX_RGSR_OF1 /*!< Request Generator 1 Trigger Event Overrun Flag */
120 #define LL_DMAMUX_RGSR_RGOF2 DMAMUX_RGSR_OF2 /*!< Request Generator 2 Trigger Event Overrun Flag */
121 #define LL_DMAMUX_RGSR_RGOF3 DMAMUX_RGSR_OF3 /*!< Request Generator 3 Trigger Event Overrun Flag */
122 /**
123 * @}
124 */
125
126 /** @defgroup DMAMUX_LL_EC_IT IT Defines
127 * @brief IT defines which can be used with LL_DMA_ReadReg and LL_DMAMUX_WriteReg functions
128 * @{
129 */
130 #define LL_DMAMUX_CCR_SOIE DMAMUX_CxCR_SOIE /*!< Synchronization Event Overrun Interrupt */
131 #define LL_DMAMUX_RGCR_RGOIE DMAMUX_RGxCR_OIE /*!< Request Generation Trigger Event Overrun Interrupt */
132 /**
133 * @}
134 */
135
136 /** @defgroup DMAMUX_LL_EC_REQUEST Transfer request
137 * @{
138 */
139 #define LL_DMAMUX_REQ_MEM2MEM 0x00000000U /*!< Memory to memory transfer */
140 #define LL_DMAMUX_REQ_GENERATOR0 0x00000001U /*!< DMAMUX request generator 0 */
141 #define LL_DMAMUX_REQ_GENERATOR1 0x00000002U /*!< DMAMUX request generator 1 */
142 #define LL_DMAMUX_REQ_GENERATOR2 0x00000003U /*!< DMAMUX request generator 2 */
143 #define LL_DMAMUX_REQ_GENERATOR3 0x00000004U /*!< DMAMUX request generator 3 */
144 #define LL_DMAMUX_REQ_ADC1 0x00000005U /*!< DMAMUX ADC1 request */
145 #define LL_DMAMUX_REQ_DAC1_CH1 0x00000006U /*!< DMAMUX DAC1 CH1 request */
146 #define LL_DMAMUX_REQ_DAC1_CH2 0x00000007U /*!< DMAMUX DAC1 CH2 request */
147 #define LL_DMAMUX_REQ_TIM6_UP 0x00000008U /*!< DMAMUX TIM6 UP request */
148 #define LL_DMAMUX_REQ_TIM7_UP 0x00000009U /*!< DMAMUX TIM7 UP request */
149 #define LL_DMAMUX_REQ_SPI1_RX 0x0000000AU /*!< DMAMUX SPI1 RX request */
150 #define LL_DMAMUX_REQ_SPI1_TX 0x0000000BU /*!< DMAMUX SPI1 TX request */
151 #define LL_DMAMUX_REQ_SPI2_RX 0x0000000CU /*!< DMAMUX SPI2 RX request */
152 #define LL_DMAMUX_REQ_SPI2_TX 0x0000000DU /*!< DMAMUX SPI2 TX request */
153 #define LL_DMAMUX_REQ_SPI3_RX 0x0000000EU /*!< DMAMUX SPI3 RX request */
154 #define LL_DMAMUX_REQ_SPI3_TX 0x0000000FU /*!< DMAMUX SPI3 TX request */
155 #define LL_DMAMUX_REQ_I2C1_RX 0x00000010U /*!< DMAMUX I2C1 RX request */
156 #define LL_DMAMUX_REQ_I2C1_TX 0x00000011U /*!< DMAMUX I2C1 TX request */
157 #define LL_DMAMUX_REQ_I2C2_RX 0x00000012U /*!< DMAMUX I2C2 RX request */
158 #define LL_DMAMUX_REQ_I2C2_TX 0x00000013U /*!< DMAMUX I2C2 TX request */
159 #define LL_DMAMUX_REQ_I2C3_RX 0x00000014U /*!< DMAMUX I2C3 RX request */
160 #define LL_DMAMUX_REQ_I2C3_TX 0x00000015U /*!< DMAMUX I2C3 TX request */
161 #define LL_DMAMUX_REQ_I2C4_RX 0x00000016U /*!< DMAMUX I2C4 RX request */
162 #define LL_DMAMUX_REQ_I2C4_TX 0x00000017U /*!< DMAMUX I2C4 TX request */
163 #define LL_DMAMUX_REQ_USART1_RX 0x00000018U /*!< DMAMUX USART1 RX request */
164 #define LL_DMAMUX_REQ_USART1_TX 0x00000019U /*!< DMAMUX USART1 TX request */
165 #define LL_DMAMUX_REQ_USART2_RX 0x0000001AU /*!< DMAMUX USART2 RX request */
166 #define LL_DMAMUX_REQ_USART2_TX 0x0000001BU /*!< DMAMUX USART2 TX request */
167 #define LL_DMAMUX_REQ_USART3_RX 0x0000001CU /*!< DMAMUX USART3 RX request */
168 #define LL_DMAMUX_REQ_USART3_TX 0x0000001DU /*!< DMAMUX USART3 TX request */
169 #define LL_DMAMUX_REQ_UART4_RX 0x0000001EU /*!< DMAMUX UART4 RX request */
170 #define LL_DMAMUX_REQ_UART4_TX 0x0000001FU /*!< DMAMUX UART4 TX request */
171 #define LL_DMAMUX_REQ_UART5_RX 0x00000020U /*!< DMAMUX UART5 RX request */
172 #define LL_DMAMUX_REQ_UART5_TX 0x00000021U /*!< DMAMUX UART5 TX request */
173 #define LL_DMAMUX_REQ_LPUART1_RX 0x00000022U /*!< DMAMUX LPUART1 RX request */
174 #define LL_DMAMUX_REQ_LPUART1_TX 0x00000023U /*!< DMAMUX LPUART1 TX request */
175 #define LL_DMAMUX_REQ_ADC2 0x00000024U /*!< DMAMUX ADC2 request */
176 #define LL_DMAMUX_REQ_ADC3 0x00000025U /*!< DMAMUX ADC3 request */
177 #define LL_DMAMUX_REQ_ADC4 0x00000026U /*!< DMAMUX ADC4 request */
178 #define LL_DMAMUX_REQ_ADC5 0x00000027U /*!< DMAMUX ADC5 request */
179 #define LL_DMAMUX_REQ_QSPI 0x00000028U /*!< DMAMUX QSPI request */
180 #define LL_DMAMUX_REQ_DAC2_CH1 0x00000029U /*!< DMAMUX DAC2 CH1 request */
181 #define LL_DMAMUX_REQ_TIM1_CH1 0x0000002AU /*!< DMAMUX TIM1 CH1 request */
182 #define LL_DMAMUX_REQ_TIM1_CH2 0x0000002BU /*!< DMAMUX TIM1 CH2 request */
183 #define LL_DMAMUX_REQ_TIM1_CH3 0x0000002CU /*!< DMAMUX TIM1 CH3 request */
184 #define LL_DMAMUX_REQ_TIM1_CH4 0x0000002DU /*!< DMAMUX TIM1 CH4 request */
185 #define LL_DMAMUX_REQ_TIM1_UP 0x0000002EU /*!< DMAMUX TIM1 UP request */
186 #define LL_DMAMUX_REQ_TIM1_TRIG 0x0000002FU /*!< DMAMUX TIM1 TRIG request */
187 #define LL_DMAMUX_REQ_TIM1_COM 0x00000030U /*!< DMAMUX TIM1 COM request */
188 #define LL_DMAMUX_REQ_TIM8_CH1 0x00000031U /*!< DMAMUX TIM8 CH1 request */
189 #define LL_DMAMUX_REQ_TIM8_CH2 0x00000032U /*!< DMAMUX TIM8 CH2 request */
190 #define LL_DMAMUX_REQ_TIM8_CH3 0x00000033U /*!< DMAMUX TIM8 CH3 request */
191 #define LL_DMAMUX_REQ_TIM8_CH4 0x00000034U /*!< DMAMUX TIM8 CH4 request */
192 #define LL_DMAMUX_REQ_TIM8_UP 0x00000035U /*!< DMAMUX TIM8 UP request */
193 #define LL_DMAMUX_REQ_TIM8_TRIG 0x00000036U /*!< DMAMUX TIM8 TRIG request */
194 #define LL_DMAMUX_REQ_TIM8_COM 0x00000037U /*!< DMAMUX TIM8 COM request */
195 #define LL_DMAMUX_REQ_TIM2_CH1 0x00000038U /*!< DMAMUX TIM2 CH1 request */
196 #define LL_DMAMUX_REQ_TIM2_CH2 0x00000039U /*!< DMAMUX TIM2 CH2 request */
197 #define LL_DMAMUX_REQ_TIM2_CH3 0x0000003AU /*!< DMAMUX TIM2 CH3 request */
198 #define LL_DMAMUX_REQ_TIM2_CH4 0x0000003BU /*!< DMAMUX TIM2 CH4 request */
199 #define LL_DMAMUX_REQ_TIM2_UP 0x0000003CU /*!< DMAMUX TIM2 UP request */
200 #define LL_DMAMUX_REQ_TIM3_CH1 0x0000003DU /*!< DMAMUX TIM3 CH1 request */
201 #define LL_DMAMUX_REQ_TIM3_CH2 0x0000003EU /*!< DMAMUX TIM3 CH2 request */
202 #define LL_DMAMUX_REQ_TIM3_CH3 0x0000003FU /*!< DMAMUX TIM3 CH3 request */
203 #define LL_DMAMUX_REQ_TIM3_CH4 0x00000040U /*!< DMAMUX TIM3 CH4 request */
204 #define LL_DMAMUX_REQ_TIM3_UP 0x00000041U /*!< DMAMUX TIM3 UP request */
205 #define LL_DMAMUX_REQ_TIM3_TRIG 0x00000042U /*!< DMAMUX TIM3 TRIG request */
206 #define LL_DMAMUX_REQ_TIM4_CH1 0x00000043U /*!< DMAMUX TIM4 CH1 request */
207 #define LL_DMAMUX_REQ_TIM4_CH2 0x00000044U /*!< DMAMUX TIM4 CH2 request */
208 #define LL_DMAMUX_REQ_TIM4_CH3 0x00000045U /*!< DMAMUX TIM4 CH3 request */
209 #define LL_DMAMUX_REQ_TIM4_CH4 0x00000046U /*!< DMAMUX TIM4 CH4 request */
210 #define LL_DMAMUX_REQ_TIM4_UP 0x00000047U /*!< DMAMUX TIM4 UP request */
211 #define LL_DMAMUX_REQ_TIM5_CH1 0x00000048U /*!< DMAMUX TIM5 CH1 request */
212 #define LL_DMAMUX_REQ_TIM5_CH2 0x00000049U /*!< DMAMUX TIM5 CH2 request */
213 #define LL_DMAMUX_REQ_TIM5_CH3 0x0000004AU /*!< DMAMUX TIM5 CH3 request */
214 #define LL_DMAMUX_REQ_TIM5_CH4 0x0000004BU /*!< DMAMUX TIM5 CH4 request */
215 #define LL_DMAMUX_REQ_TIM5_UP 0x0000004CU /*!< DMAMUX TIM5 UP request */
216 #define LL_DMAMUX_REQ_TIM5_TRIG 0x0000004DU /*!< DMAMUX TIM5 TRIG request */
217 #define LL_DMAMUX_REQ_TIM15_CH1 0x0000004EU /*!< DMAMUX TIM15 CH1 request */
218 #define LL_DMAMUX_REQ_TIM15_UP 0x0000004FU /*!< DMAMUX TIM15 UP request */
219 #define LL_DMAMUX_REQ_TIM15_TRIG 0x00000050U /*!< DMAMUX TIM15 TRIG request */
220 #define LL_DMAMUX_REQ_TIM15_COM 0x00000051U /*!< DMAMUX TIM15 COM request */
221 #define LL_DMAMUX_REQ_TIM16_CH1 0x00000052U /*!< DMAMUX TIM16 CH1 request */
222 #define LL_DMAMUX_REQ_TIM16_UP 0x00000053U /*!< DMAMUX TIM16 UP request */
223 #define LL_DMAMUX_REQ_TIM17_CH1 0x00000054U /*!< DMAMUX TIM17 CH1 request */
224 #define LL_DMAMUX_REQ_TIM17_UP 0x00000055U /*!< DMAMUX TIM17 UP request */
225 #define LL_DMAMUX_REQ_TIM20_CH1 0x00000056U /*!< DMAMUX TIM20 CH1 request */
226 #define LL_DMAMUX_REQ_TIM20_CH2 0x00000057U /*!< DMAMUX TIM20 CH2 request */
227 #define LL_DMAMUX_REQ_TIM20_CH3 0x00000058U /*!< DMAMUX TIM20 CH3 request */
228 #define LL_DMAMUX_REQ_TIM20_CH4 0x00000059U /*!< DMAMUX TIM20 CH4 request */
229 #define LL_DMAMUX_REQ_TIM20_UP 0x0000005AU /*!< DMAMUX TIM20 UP request */
230 #define LL_DMAMUX_REQ_AES_IN 0x0000005BU /*!< DMAMUX AES_IN request */
231 #define LL_DMAMUX_REQ_AES_OUT 0x0000005CU /*!< DMAMUX AES_OUT request */
232 #define LL_DMAMUX_REQ_TIM20_TRIG 0x0000005DU /*!< DMAMUX TIM20 TRIG request */
233 #define LL_DMAMUX_REQ_TIM20_COM 0x0000005EU /*!< DMAMUX TIM20 COM request */
234 #define LL_DMAMUX_REQ_HRTIM1_M 0x0000005FU /*!< DMAMUX HRTIM M request */
235 #define LL_DMAMUX_REQ_HRTIM1_A 0x00000060U /*!< DMAMUX HRTIM A request */
236 #define LL_DMAMUX_REQ_HRTIM1_B 0x00000061U /*!< DMAMUX HRTIM B request */
237 #define LL_DMAMUX_REQ_HRTIM1_C 0x00000062U /*!< DMAMUX HRTIM C request */
238 #define LL_DMAMUX_REQ_HRTIM1_D 0x00000063U /*!< DMAMUX HRTIM D request */
239 #define LL_DMAMUX_REQ_HRTIM1_E 0x00000064U /*!< DMAMUX HRTIM E request */
240 #define LL_DMAMUX_REQ_HRTIM1_F 0x00000065U /*!< DMAMUX HRTIM F request */
241 #define LL_DMAMUX_REQ_DAC3_CH1 0x00000066U /*!< DMAMUX DAC3 CH1 request */
242 #define LL_DMAMUX_REQ_DAC3_CH2 0x00000067U /*!< DMAMUX DAC3 CH2 request */
243 #define LL_DMAMUX_REQ_DAC4_CH1 0x00000068U /*!< DMAMUX DAC4 CH1 request */
244 #define LL_DMAMUX_REQ_DAC4_CH2 0x00000069U /*!< DMAMUX DAC4 CH2 request */
245 #define LL_DMAMUX_REQ_SPI4_RX 0x0000006AU /*!< DMAMUX SPI4 RX request */
246 #define LL_DMAMUX_REQ_SPI4_TX 0x0000006BU /*!< DMAMUX SPI4 TX request */
247 #define LL_DMAMUX_REQ_SAI1_A 0x0000006CU /*!< DMAMUX SAI1 A request */
248 #define LL_DMAMUX_REQ_SAI1_B 0x0000006DU /*!< DMAMUX SAI1 B request */
249 #define LL_DMAMUX_REQ_FMAC_WRITE 0x0000006EU /*!< DMAMUX FMAC WRITE request */
250 #define LL_DMAMUX_REQ_FMAC_READ 0x0000006FU /*!< DMAMUX FMAC READ request */
251 #define LL_DMAMUX_REQ_CORDIC_WRITE 0x00000070U /*!< DMAMUX CORDIC WRITE request*/
252 #define LL_DMAMUX_REQ_CORDIC_READ 0x00000071U /*!< DMAMUX CORDIC READ request */
253 #define LL_DMAMUX_REQ_UCPD1_RX 0x00000072U /*!< DMAMUX USBPD1_RX request */
254 #define LL_DMAMUX_REQ_UCPD1_TX 0x00000073U /*!< DMAMUX USBPD1_TX request */
255
256 /**
257 * @}
258 */
259
260 /** @defgroup DMAMUX_LL_EC_CHANNEL DMAMUX Channel
261 * @{
262 */
263 #define LL_DMAMUX_CHANNEL_0 0x00000000U /*!< DMAMUX Channel 0 connected to DMA1 Channel 1 */
264 #define LL_DMAMUX_CHANNEL_1 0x00000001U /*!< DMAMUX Channel 1 connected to DMA1 Channel 2 */
265 #define LL_DMAMUX_CHANNEL_2 0x00000002U /*!< DMAMUX Channel 2 connected to DMA1 Channel 3 */
266 #define LL_DMAMUX_CHANNEL_3 0x00000003U /*!< DMAMUX Channel 3 connected to DMA1 Channel 4 */
267 #define LL_DMAMUX_CHANNEL_4 0x00000004U /*!< DMAMUX Channel 4 connected to DMA1 Channel 5 */
268 #define LL_DMAMUX_CHANNEL_5 0x00000005U /*!< DMAMUX Channel 5 connected to DMA1 Channel 6 */
269 #define LL_DMAMUX_CHANNEL_6 0x00000006U /*!< DMAMUX Channel 6 connected to DMA1 Channel 7 */
270 #define LL_DMAMUX_CHANNEL_7 0x00000007U /*!< DMAMUX Channel 7 connected to DMA1 Channel 8 */
271 #define LL_DMAMUX_CHANNEL_8 0x00000008U /*!< DMAMUX Channel 8 connected to DMA2 Channel 1 */
272 #define LL_DMAMUX_CHANNEL_9 0x00000009U /*!< DMAMUX Channel 9 connected to DMA2 Channel 2 */
273 #define LL_DMAMUX_CHANNEL_10 0x0000000AU /*!< DMAMUX Channel 10 connected to DMA2 Channel 3 */
274 #define LL_DMAMUX_CHANNEL_11 0x0000000BU /*!< DMAMUX Channel 11 connected to DMA2 Channel 4 */
275 #define LL_DMAMUX_CHANNEL_12 0x0000000CU /*!< DMAMUX Channel 12 connected to DMA2 Channel 5 */
276 #define LL_DMAMUX_CHANNEL_13 0x0000000DU /*!< DMAMUX Channel 13 connected to DMA2 Channel 6 */
277 #define LL_DMAMUX_CHANNEL_14 0x0000000EU /*!< DMAMUX Channel 13 connected to DMA2 Channel 7 */
278 #define LL_DMAMUX_CHANNEL_15 0x0000000FU /*!< DMAMUX Channel 13 connected to DMA2 Channel 8 */
279 /**
280 * @}
281 */
282
283 /** @defgroup DMAMUX_LL_EC_SYNC_NO Synchronization Signal Polarity
284 * @{
285 */
286 #define LL_DMAMUX_SYNC_NO_EVENT 0x00000000U /*!< All requests are blocked */
287 #define LL_DMAMUX_SYNC_POL_RISING DMAMUX_CxCR_SPOL_0 /*!< Synchronization on event on rising edge */
288 #define LL_DMAMUX_SYNC_POL_FALLING DMAMUX_CxCR_SPOL_1 /*!< Synchronization on event on falling edge */
289 #define LL_DMAMUX_SYNC_POL_RISING_FALLING (DMAMUX_CxCR_SPOL_0 | DMAMUX_CxCR_SPOL_1) /*!< Synchronization on event on rising and falling edge */
290 /**
291 * @}
292 */
293
294 /** @defgroup DMAMUX_LL_EC_SYNC_EVT Synchronization Signal Event
295 * @{
296 */
297 #define LL_DMAMUX_SYNC_EXTI_LINE0 0x00000000U /*!< Synchronization signal from EXTI Line0 */
298 #define LL_DMAMUX_SYNC_EXTI_LINE1 DMAMUX_CxCR_SYNC_ID_0 /*!< Synchronization signal from EXTI Line1 */
299 #define LL_DMAMUX_SYNC_EXTI_LINE2 DMAMUX_CxCR_SYNC_ID_1 /*!< Synchronization signal from EXTI Line2 */
300 #define LL_DMAMUX_SYNC_EXTI_LINE3 (DMAMUX_CxCR_SYNC_ID_1 |DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line3 */
301 #define LL_DMAMUX_SYNC_EXTI_LINE4 DMAMUX_CxCR_SYNC_ID_2 /*!< Synchronization signal from EXTI Line4 */
302 #define LL_DMAMUX_SYNC_EXTI_LINE5 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line5 */
303 #define LL_DMAMUX_SYNC_EXTI_LINE6 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line6 */
304 #define LL_DMAMUX_SYNC_EXTI_LINE7 (DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line7 */
305 #define LL_DMAMUX_SYNC_EXTI_LINE8 DMAMUX_CxCR_SYNC_ID_3 /*!< Synchronization signal from EXTI Line8 */
306 #define LL_DMAMUX_SYNC_EXTI_LINE9 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line9 */
307 #define LL_DMAMUX_SYNC_EXTI_LINE10 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line10 */
308 #define LL_DMAMUX_SYNC_EXTI_LINE11 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line11 */
309 #define LL_DMAMUX_SYNC_EXTI_LINE12 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from EXTI Line12 */
310 #define LL_DMAMUX_SYNC_EXTI_LINE13 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line13 */
311 #define LL_DMAMUX_SYNC_EXTI_LINE14 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from EXTI Line14 */
312 #define LL_DMAMUX_SYNC_EXTI_LINE15 (DMAMUX_CxCR_SYNC_ID_3 | DMAMUX_CxCR_SYNC_ID_2 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from EXTI Line15 */
313 #define LL_DMAMUX_SYNC_DMAMUX_CH0 DMAMUX_CxCR_SYNC_ID_4 /*!< Synchronization signal from DMAMUX channel0 Event */
314 #define LL_DMAMUX_SYNC_DMAMUX_CH1 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DMAMUX channel1 Event */
315 #define LL_DMAMUX_SYNC_DMAMUX_CH2 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1) /*!< Synchronization signal from DMAMUX channel2 Event */
316 #define LL_DMAMUX_SYNC_DMAMUX_CH3 (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_1 | DMAMUX_CxCR_SYNC_ID_0) /*!< Synchronization signal from DMAMUX channel3 Event */
317 #define LL_DMAMUX_SYNC_LPTIM1_OUT (DMAMUX_CxCR_SYNC_ID_4 | DMAMUX_CxCR_SYNC_ID_2) /*!< Synchronization signal from LPTIM1 Ouput */
318 /**
319 * @}
320 */
321
322 /** @defgroup DMAMUX_LL_EC_REQUEST_GENERATOR Request Generator Channel
323 * @{
324 */
325 #define LL_DMAMUX_REQ_GEN_0 0x00000000U
326 #define LL_DMAMUX_REQ_GEN_1 0x00000001U
327 #define LL_DMAMUX_REQ_GEN_2 0x00000002U
328 #define LL_DMAMUX_REQ_GEN_3 0x00000003U
329 /**
330 * @}
331 */
332
333 /** @defgroup DMAMUX_LL_EC_REQUEST_GEN_POLARITY External Request Signal Generation Polarity
334 * @{
335 */
336 #define LL_DMAMUX_REQ_GEN_NO_EVENT 0x00000000U /*!< No external DMA request generation */
337 #define LL_DMAMUX_REQ_GEN_POL_RISING DMAMUX_RGxCR_GPOL_0 /*!< External DMA request generation on event on rising edge */
338 #define LL_DMAMUX_REQ_GEN_POL_FALLING DMAMUX_RGxCR_GPOL_1 /*!< External DMA request generation on event on falling edge */
339 #define LL_DMAMUX_REQ_GEN_POL_RISING_FALLING (DMAMUX_RGxCR_GPOL_0 | DMAMUX_RGxCR_GPOL_1) /*!< External DMA request generation on rising and falling edge */
340 /**
341 * @}
342 */
343
344 /** @defgroup DMAMUX_LL_EC_REQUEST_GEN External Request Signal Generation
345 * @{
346 */
347 #define LL_DMAMUX_REQ_GEN_EXTI_LINE0 0x00000000U /*!< Request signal generation from EXTI Line0 */
348 #define LL_DMAMUX_REQ_GEN_EXTI_LINE1 DMAMUX_RGxCR_SIG_ID_0 /*!< Request signal generation from EXTI Line1 */
349 #define LL_DMAMUX_REQ_GEN_EXTI_LINE2 DMAMUX_RGxCR_SIG_ID_1 /*!< Request signal generation from EXTI Line2 */
350 #define LL_DMAMUX_REQ_GEN_EXTI_LINE3 (DMAMUX_RGxCR_SIG_ID_1 |DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line3 */
351 #define LL_DMAMUX_REQ_GEN_EXTI_LINE4 DMAMUX_RGxCR_SIG_ID_2 /*!< Request signal generation from EXTI Line4 */
352 #define LL_DMAMUX_REQ_GEN_EXTI_LINE5 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line5 */
353 #define LL_DMAMUX_REQ_GEN_EXTI_LINE6 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line6 */
354 #define LL_DMAMUX_REQ_GEN_EXTI_LINE7 (DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line7 */
355 #define LL_DMAMUX_REQ_GEN_EXTI_LINE8 DMAMUX_RGxCR_SIG_ID_3 /*!< Request signal generation from EXTI Line8 */
356 #define LL_DMAMUX_REQ_GEN_EXTI_LINE9 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line9 */
357 #define LL_DMAMUX_REQ_GEN_EXTI_LINE10 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line10 */
358 #define LL_DMAMUX_REQ_GEN_EXTI_LINE11 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line11 */
359 #define LL_DMAMUX_REQ_GEN_EXTI_LINE12 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from EXTI Line12 */
360 #define LL_DMAMUX_REQ_GEN_EXTI_LINE13 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line13 */
361 #define LL_DMAMUX_REQ_GEN_EXTI_LINE14 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from EXTI Line14 */
362 #define LL_DMAMUX_REQ_GEN_EXTI_LINE15 (DMAMUX_RGxCR_SIG_ID_3 | DMAMUX_RGxCR_SIG_ID_2 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from EXTI Line15 */
363 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH0 DMAMUX_RGxCR_SIG_ID_4 /*!< Request signal generation from DMAMUX channel0 Event */
364 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH1 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DMAMUX channel1 Event */
365 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH2 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1) /*!< Request signal generation from DMAMUX channel2 Event */
366 #define LL_DMAMUX_REQ_GEN_DMAMUX_CH3 (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_1 | DMAMUX_RGxCR_SIG_ID_0) /*!< Request signal generation from DMAMUX channel3 Event */
367 #define LL_DMAMUX_REQ_GEN_LPTIM1_OUT (DMAMUX_RGxCR_SIG_ID_4 | DMAMUX_RGxCR_SIG_ID_2) /*!< Request signal generation from LPTIM1 Ouput */
368 /**
369 * @}
370 */
371
372 /**
373 * @}
374 */
375
376 /* Exported macro ------------------------------------------------------------*/
377 /** @defgroup DMAMUX_LL_Exported_Macros DMAMUX Exported Macros
378 * @{
379 */
380 /** @defgroup DMAMUX_LL_EM_WRITE_READ Common Write and read registers macros
381 * @{
382 */
383 /**
384 * @brief Write a value in DMAMUX register
385 * @param __INSTANCE__ DMAMUX Instance
386 * @param __REG__ Register to be written
387 * @param __VALUE__ Value to be written in the register
388 * @retval None
389 */
390 #define LL_DMAMUX_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
391
392 /**
393 * @brief Read a value in DMAMUX register
394 * @param __INSTANCE__ DMAMUX Instance
395 * @param __REG__ Register to be read
396 * @retval Register value
397 */
398 #define LL_DMAMUX_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
399 /**
400 * @}
401 */
402
403 /**
404 * @}
405 */
406
407 /* Exported functions --------------------------------------------------------*/
408 /** @defgroup DMAMUX_LL_Exported_Functions DMAMUX Exported Functions
409 * @{
410 */
411
412 /** @defgroup DMAMUX_LL_EF_Configuration Configuration
413 * @{
414 */
415 /**
416 * @brief Set DMAMUX request ID for DMAMUX Channel x.
417 * @note DMAMUX channel 0 to 7 are mapped to DMA1 channel 1 to 8.
418 * DMAMUX channel 8 to 15 are mapped to DMA2 channel 1 to 8.
419 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_SetRequestID
420 * @param DMAMUXx DMAMUXx Instance
421 * @param Channel This parameter can be one of the following values:
422 * @arg @ref LL_DMAMUX_CHANNEL_0
423 * @arg @ref LL_DMAMUX_CHANNEL_1
424 * @arg @ref LL_DMAMUX_CHANNEL_2
425 * @arg @ref LL_DMAMUX_CHANNEL_3
426 * @arg @ref LL_DMAMUX_CHANNEL_4
427 * @arg @ref LL_DMAMUX_CHANNEL_5
428 * @arg @ref LL_DMAMUX_CHANNEL_6
429 * @arg @ref LL_DMAMUX_CHANNEL_7
430 * @arg @ref LL_DMAMUX_CHANNEL_8
431 * @arg @ref LL_DMAMUX_CHANNEL_9
432 * @arg @ref LL_DMAMUX_CHANNEL_10
433 * @arg @ref LL_DMAMUX_CHANNEL_11
434 * @arg @ref LL_DMAMUX_CHANNEL_12
435 * @arg @ref LL_DMAMUX_CHANNEL_13
436 * @arg @ref LL_DMAMUX_CHANNEL_14
437 * @arg @ref LL_DMAMUX_CHANNEL_15
438 * @param Request This parameter can be one of the following values:
439 * @arg @ref LL_DMAMUX_REQ_GENERATOR0
440 * @arg @ref LL_DMAMUX_REQ_GENERATOR1
441 * @arg @ref LL_DMAMUX_REQ_GENERATOR2
442 * @arg @ref LL_DMAMUX_REQ_GENERATOR3
443 * @arg @ref LL_DMAMUX_REQ_ADC1
444 * @arg @ref LL_DMAMUX_REQ_DAC1_CH1
445 * @arg @ref LL_DMAMUX_REQ_DAC1_CH2
446 * @arg @ref LL_DMAMUX_REQ_TIM6_UP
447 * @arg @ref LL_DMAMUX_REQ_TIM7_UP
448 * @arg @ref LL_DMAMUX_REQ_SPI1_RX
449 * @arg @ref LL_DMAMUX_REQ_SPI1_TX
450 * @arg @ref LL_DMAMUX_REQ_SPI2_RX
451 * @arg @ref LL_DMAMUX_REQ_SPI2_TX
452 * @arg @ref LL_DMAMUX_REQ_SPI3_RX
453 * @arg @ref LL_DMAMUX_REQ_SPI3_TX
454 * @arg @ref LL_DMAMUX_REQ_I2C1_RX
455 * @arg @ref LL_DMAMUX_REQ_I2C1_TX
456 * @arg @ref LL_DMAMUX_REQ_I2C2_RX
457 * @arg @ref LL_DMAMUX_REQ_I2C2_TX
458 * @arg @ref LL_DMAMUX_REQ_I2C3_RX
459 * @arg @ref LL_DMAMUX_REQ_I2C3_TX (*)
460 * @arg @ref LL_DMAMUX_REQ_I2C4_RX (*)
461 * @arg @ref LL_DMAMUX_REQ_I2C4_TX
462 * @arg @ref LL_DMAMUX_REQ_USART1_RX
463 * @arg @ref LL_DMAMUX_REQ_USART1_TX
464 * @arg @ref LL_DMAMUX_REQ_USART2_RX
465 * @arg @ref LL_DMAMUX_REQ_USART2_TX
466 * @arg @ref LL_DMAMUX_REQ_USART3_RX
467 * @arg @ref LL_DMAMUX_REQ_USART3_TX
468 * @arg @ref LL_DMAMUX_REQ_UART4_RX
469 * @arg @ref LL_DMAMUX_REQ_UART4_TX
470 * @arg @ref LL_DMAMUX_REQ_UART5_RX (*)
471 * @arg @ref LL_DMAMUX_REQ_UART5_TX (*)
472 * @arg @ref LL_DMAMUX_REQ_LPUART1_RX
473 * @arg @ref LL_DMAMUX_REQ_LPUART1_TX
474 * @arg @ref LL_DMAMUX_REQ_ADC2
475 * @arg @ref LL_DMAMUX_REQ_ADC3 (*)
476 * @arg @ref LL_DMAMUX_REQ_ADC4 (*)
477 * @arg @ref LL_DMAMUX_REQ_ADC5 (*)
478 * @arg @ref LL_DMAMUX_REQ_QSPI (*)
479 * @arg @ref LL_DMAMUX_REQ_DAC2_CH1 (*)
480 * @arg @ref LL_DMAMUX_REQ_TIM1_CH1
481 * @arg @ref LL_DMAMUX_REQ_TIM1_CH2
482 * @arg @ref LL_DMAMUX_REQ_TIM1_CH3
483 * @arg @ref LL_DMAMUX_REQ_TIM1_CH4
484 * @arg @ref LL_DMAMUX_REQ_TIM1_UP
485 * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG
486 * @arg @ref LL_DMAMUX_REQ_TIM1_COM
487 * @arg @ref LL_DMAMUX_REQ_TIM8_CH1
488 * @arg @ref LL_DMAMUX_REQ_TIM8_CH2
489 * @arg @ref LL_DMAMUX_REQ_TIM8_CH3
490 * @arg @ref LL_DMAMUX_REQ_TIM8_CH4
491 * @arg @ref LL_DMAMUX_REQ_TIM8_UP
492 * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG
493 * @arg @ref LL_DMAMUX_REQ_TIM8_COM
494 * @arg @ref LL_DMAMUX_REQ_TIM2_CH1
495 * @arg @ref LL_DMAMUX_REQ_TIM2_CH2
496 * @arg @ref LL_DMAMUX_REQ_TIM2_CH3
497 * @arg @ref LL_DMAMUX_REQ_TIM2_CH4
498 * @arg @ref LL_DMAMUX_REQ_TIM2_UP
499 * @arg @ref LL_DMAMUX_REQ_TIM3_CH1
500 * @arg @ref LL_DMAMUX_REQ_TIM3_CH2
501 * @arg @ref LL_DMAMUX_REQ_TIM3_CH3
502 * @arg @ref LL_DMAMUX_REQ_TIM3_CH4
503 * @arg @ref LL_DMAMUX_REQ_TIM3_UP
504 * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG
505 * @arg @ref LL_DMAMUX_REQ_TIM4_CH1
506 * @arg @ref LL_DMAMUX_REQ_TIM4_CH2
507 * @arg @ref LL_DMAMUX_REQ_TIM4_CH3
508 * @arg @ref LL_DMAMUX_REQ_TIM4_CH4
509 * @arg @ref LL_DMAMUX_REQ_TIM4_UP
510 * @arg @ref LL_DMAMUX_REQ_TIM5_CH1 (*)
511 * @arg @ref LL_DMAMUX_REQ_TIM5_CH2 (*)
512 * @arg @ref LL_DMAMUX_REQ_TIM5_CH3 (*)
513 * @arg @ref LL_DMAMUX_REQ_TIM5_CH4 (*)
514 * @arg @ref LL_DMAMUX_REQ_TIM5_UP (*)
515 * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG (*)
516 * @arg @ref LL_DMAMUX_REQ_TIM15_CH1
517 * @arg @ref LL_DMAMUX_REQ_TIM15_UP
518 * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG
519 * @arg @ref LL_DMAMUX_REQ_TIM15_COM
520 * @arg @ref LL_DMAMUX_REQ_TIM16_CH1
521 * @arg @ref LL_DMAMUX_REQ_TIM16_UP
522 * @arg @ref LL_DMAMUX_REQ_TIM17_CH1
523 * @arg @ref LL_DMAMUX_REQ_TIM17_UP
524 * @arg @ref LL_DMAMUX_REQ_TIM20_CH1 (*)
525 * @arg @ref LL_DMAMUX_REQ_TIM20_CH2 (*)
526 * @arg @ref LL_DMAMUX_REQ_TIM20_CH3 (*)
527 * @arg @ref LL_DMAMUX_REQ_TIM20_CH4 (*)
528 * @arg @ref LL_DMAMUX_REQ_TIM20_UP (*)
529 * @arg @ref LL_DMAMUX_REQ_AES_IN
530 * @arg @ref LL_DMAMUX_REQ_AES_OUT
531 * @arg @ref LL_DMAMUX_REQ_TIM20_TRIG (*)
532 * @arg @ref LL_DMAMUX_REQ_TIM20_COM (*)
533 * @arg @ref LL_DMAMUX_REQ_HRTIM1_M (*)
534 * @arg @ref LL_DMAMUX_REQ_HRTIM1_A (*)
535 * @arg @ref LL_DMAMUX_REQ_HRTIM1_B (*)
536 * @arg @ref LL_DMAMUX_REQ_HRTIM1_C (*)
537 * @arg @ref LL_DMAMUX_REQ_HRTIM1_D (*)
538 * @arg @ref LL_DMAMUX_REQ_HRTIM1_E (*)
539 * @arg @ref LL_DMAMUX_REQ_HRTIM1_F (*)
540 * @arg @ref LL_DMAMUX_REQ_DAC3_CH1
541 * @arg @ref LL_DMAMUX_REQ_DAC3_CH2
542 * @arg @ref LL_DMAMUX_REQ_DAC4_CH1 (*)
543 * @arg @ref LL_DMAMUX_REQ_DAC4_CH2 (*)
544 * @arg @ref LL_DMAMUX_REQ_SPI4_RX (*)
545 * @arg @ref LL_DMAMUX_REQ_SPI4_TX (*)
546 * @arg @ref LL_DMAMUX_REQ_SAI1_A
547 * @arg @ref LL_DMAMUX_REQ_SAI1_B
548 * @arg @ref LL_DMAMUX_REQ_FMAC_WRITE
549 * @arg @ref LL_DMAMUX_REQ_FMAC_WRITE
550 * @arg @ref LL_DMAMUX_REQ_CORDIC_WRITE
551 * @arg @ref LL_DMAMUX_REQ_CORDIC_READ
552 * @arg @ref LL_DMAMUX_REQ_UCPD1_RX
553 * @arg @ref LL_DMAMUX_REQ_UCPD1_TX
554 * (*) Not on all G4 devices
555 * @retval None
556 */
557 __STATIC_INLINE void LL_DMAMUX_SetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Request)
558 {
559 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
560
561 MODIFY_REG(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
562 DMAMUX_CxCR_DMAREQ_ID, Request);
563 }
564
565 /**
566 * @brief Get DMAMUX request ID for DMAMUX Channel x.
567 * @note DMAMUX channel 1 to 7 are mapped to DMA1 channel 1 to 8.
568 * DMAMUX channel 8 to 15 are mapped to DMA2 channel 1 to 8.
569 * @rmtoll CxCR DMAREQ_ID LL_DMAMUX_GetRequestID
570 * @param DMAMUXx DMAMUXx Instance
571 * @param Channel This parameter can be one of the following values:
572 * @arg @ref LL_DMAMUX_CHANNEL_0
573 * @arg @ref LL_DMAMUX_CHANNEL_1
574 * @arg @ref LL_DMAMUX_CHANNEL_2
575 * @arg @ref LL_DMAMUX_CHANNEL_3
576 * @arg @ref LL_DMAMUX_CHANNEL_4
577 * @arg @ref LL_DMAMUX_CHANNEL_5
578 * @arg @ref LL_DMAMUX_CHANNEL_6
579 * @arg @ref LL_DMAMUX_CHANNEL_7
580 * @arg @ref LL_DMAMUX_CHANNEL_8
581 * @arg @ref LL_DMAMUX_CHANNEL_9
582 * @arg @ref LL_DMAMUX_CHANNEL_10
583 * @arg @ref LL_DMAMUX_CHANNEL_11
584 * @arg @ref LL_DMAMUX_CHANNEL_12
585 * @arg @ref LL_DMAMUX_CHANNEL_13
586 * @arg @ref LL_DMAMUX_CHANNEL_14
587 * @arg @ref LL_DMAMUX_CHANNEL_15
588 * (*) Not on all G4 devices
589 * @retval Returned value can be one of the following values:
590 * @arg @ref LL_DMAMUX_REQ_GENERATOR0
591 * @arg @ref LL_DMAMUX_REQ_GENERATOR1
592 * @arg @ref LL_DMAMUX_REQ_GENERATOR2
593 * @arg @ref LL_DMAMUX_REQ_GENERATOR3
594 * @arg @ref LL_DMAMUX_REQ_ADC1
595 * @arg @ref LL_DMAMUX_REQ_DAC1_CH1
596 * @arg @ref LL_DMAMUX_REQ_DAC1_CH2
597 * @arg @ref LL_DMAMUX_REQ_TIM6_UP
598 * @arg @ref LL_DMAMUX_REQ_TIM7_UP
599 * @arg @ref LL_DMAMUX_REQ_SPI1_RX
600 * @arg @ref LL_DMAMUX_REQ_SPI1_TX
601 * @arg @ref LL_DMAMUX_REQ_SPI2_RX
602 * @arg @ref LL_DMAMUX_REQ_SPI2_TX
603 * @arg @ref LL_DMAMUX_REQ_SPI3_RX
604 * @arg @ref LL_DMAMUX_REQ_SPI3_TX
605 * @arg @ref LL_DMAMUX_REQ_I2C1_RX
606 * @arg @ref LL_DMAMUX_REQ_I2C1_TX
607 * @arg @ref LL_DMAMUX_REQ_I2C2_RX
608 * @arg @ref LL_DMAMUX_REQ_I2C2_TX
609 * @arg @ref LL_DMAMUX_REQ_I2C3_RX
610 * @arg @ref LL_DMAMUX_REQ_I2C3_TX (*)
611 * @arg @ref LL_DMAMUX_REQ_I2C4_RX (*)
612 * @arg @ref LL_DMAMUX_REQ_I2C4_TX
613 * @arg @ref LL_DMAMUX_REQ_USART1_RX
614 * @arg @ref LL_DMAMUX_REQ_USART1_TX
615 * @arg @ref LL_DMAMUX_REQ_USART2_RX
616 * @arg @ref LL_DMAMUX_REQ_USART2_TX
617 * @arg @ref LL_DMAMUX_REQ_USART3_RX
618 * @arg @ref LL_DMAMUX_REQ_USART3_TX
619 * @arg @ref LL_DMAMUX_REQ_UART4_RX
620 * @arg @ref LL_DMAMUX_REQ_UART4_TX
621 * @arg @ref LL_DMAMUX_REQ_UART5_RX (*)
622 * @arg @ref LL_DMAMUX_REQ_UART5_TX (*)
623 * @arg @ref LL_DMAMUX_REQ_LPUART1_RX
624 * @arg @ref LL_DMAMUX_REQ_LPUART1_TX
625 * @arg @ref LL_DMAMUX_REQ_ADC2
626 * @arg @ref LL_DMAMUX_REQ_ADC3 (*)
627 * @arg @ref LL_DMAMUX_REQ_ADC4 (*)
628 * @arg @ref LL_DMAMUX_REQ_ADC5 (*)
629 * @arg @ref LL_DMAMUX_REQ_QSPI (*)
630 * @arg @ref LL_DMAMUX_REQ_DAC2_CH1 (*)
631 * @arg @ref LL_DMAMUX_REQ_TIM1_CH1
632 * @arg @ref LL_DMAMUX_REQ_TIM1_CH2
633 * @arg @ref LL_DMAMUX_REQ_TIM1_CH3
634 * @arg @ref LL_DMAMUX_REQ_TIM1_CH4
635 * @arg @ref LL_DMAMUX_REQ_TIM1_UP
636 * @arg @ref LL_DMAMUX_REQ_TIM1_TRIG
637 * @arg @ref LL_DMAMUX_REQ_TIM1_COM
638 * @arg @ref LL_DMAMUX_REQ_TIM8_CH1
639 * @arg @ref LL_DMAMUX_REQ_TIM8_CH2
640 * @arg @ref LL_DMAMUX_REQ_TIM8_CH3
641 * @arg @ref LL_DMAMUX_REQ_TIM8_CH4
642 * @arg @ref LL_DMAMUX_REQ_TIM8_UP
643 * @arg @ref LL_DMAMUX_REQ_TIM8_TRIG
644 * @arg @ref LL_DMAMUX_REQ_TIM8_COM
645 * @arg @ref LL_DMAMUX_REQ_TIM2_CH1
646 * @arg @ref LL_DMAMUX_REQ_TIM2_CH2
647 * @arg @ref LL_DMAMUX_REQ_TIM2_CH3
648 * @arg @ref LL_DMAMUX_REQ_TIM2_CH4
649 * @arg @ref LL_DMAMUX_REQ_TIM2_UP
650 * @arg @ref LL_DMAMUX_REQ_TIM3_CH1
651 * @arg @ref LL_DMAMUX_REQ_TIM3_CH2
652 * @arg @ref LL_DMAMUX_REQ_TIM3_CH3
653 * @arg @ref LL_DMAMUX_REQ_TIM3_CH4
654 * @arg @ref LL_DMAMUX_REQ_TIM3_UP
655 * @arg @ref LL_DMAMUX_REQ_TIM3_TRIG
656 * @arg @ref LL_DMAMUX_REQ_TIM4_CH1
657 * @arg @ref LL_DMAMUX_REQ_TIM4_CH2
658 * @arg @ref LL_DMAMUX_REQ_TIM4_CH3
659 * @arg @ref LL_DMAMUX_REQ_TIM4_CH4
660 * @arg @ref LL_DMAMUX_REQ_TIM4_UP
661 * @arg @ref LL_DMAMUX_REQ_TIM5_CH1 (*)
662 * @arg @ref LL_DMAMUX_REQ_TIM5_CH2 (*)
663 * @arg @ref LL_DMAMUX_REQ_TIM5_CH3 (*)
664 * @arg @ref LL_DMAMUX_REQ_TIM5_CH4 (*)
665 * @arg @ref LL_DMAMUX_REQ_TIM5_UP (*)
666 * @arg @ref LL_DMAMUX_REQ_TIM5_TRIG (*)
667 * @arg @ref LL_DMAMUX_REQ_TIM15_CH1
668 * @arg @ref LL_DMAMUX_REQ_TIM15_UP
669 * @arg @ref LL_DMAMUX_REQ_TIM15_TRIG
670 * @arg @ref LL_DMAMUX_REQ_TIM15_COM
671 * @arg @ref LL_DMAMUX_REQ_TIM16_CH1
672 * @arg @ref LL_DMAMUX_REQ_TIM16_UP
673 * @arg @ref LL_DMAMUX_REQ_TIM17_CH1
674 * @arg @ref LL_DMAMUX_REQ_TIM17_UP
675 * @arg @ref LL_DMAMUX_REQ_TIM20_CH1 (*)
676 * @arg @ref LL_DMAMUX_REQ_TIM20_CH2 (*)
677 * @arg @ref LL_DMAMUX_REQ_TIM20_CH3 (*)
678 * @arg @ref LL_DMAMUX_REQ_TIM20_CH4 (*)
679 * @arg @ref LL_DMAMUX_REQ_TIM20_UP (*)
680 * @arg @ref LL_DMAMUX_REQ_AES_IN
681 * @arg @ref LL_DMAMUX_REQ_AES_OUT
682 * @arg @ref LL_DMAMUX_REQ_TIM20_TRIG (*)
683 * @arg @ref LL_DMAMUX_REQ_TIM20_COM (*)
684 * @arg @ref LL_DMAMUX_REQ_HRTIM1_M (*)
685 * @arg @ref LL_DMAMUX_REQ_HRTIM1_A (*)
686 * @arg @ref LL_DMAMUX_REQ_HRTIM1_B (*)
687 * @arg @ref LL_DMAMUX_REQ_HRTIM1_C (*)
688 * @arg @ref LL_DMAMUX_REQ_HRTIM1_D (*)
689 * @arg @ref LL_DMAMUX_REQ_HRTIM1_E (*)
690 * @arg @ref LL_DMAMUX_REQ_HRTIM1_F (*)
691 * @arg @ref LL_DMAMUX_REQ_DAC3_CH1
692 * @arg @ref LL_DMAMUX_REQ_DAC3_CH2
693 * @arg @ref LL_DMAMUX_REQ_DAC4_CH1 (*)
694 * @arg @ref LL_DMAMUX_REQ_DAC4_CH2 (*)
695 * @arg @ref LL_DMAMUX_REQ_SPI4_RX (*)
696 * @arg @ref LL_DMAMUX_REQ_SPI4_TX (*)
697 * @arg @ref LL_DMAMUX_REQ_SAI1_A
698 * @arg @ref LL_DMAMUX_REQ_SAI1_B
699 * @arg @ref LL_DMAMUX_REQ_FMAC_WRITE
700 * @arg @ref LL_DMAMUX_REQ_FMAC_WRITE
701 * @arg @ref LL_DMAMUX_REQ_CORDIC_WRITE
702 * @arg @ref LL_DMAMUX_REQ_CORDIC_READ
703 * @arg @ref LL_DMAMUX_REQ_UCPD1_RX
704 * @arg @ref LL_DMAMUX_REQ_UCPD1_TX
705 * (*) Not on all G4 devices
706 */
707 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
708 {
709 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
710
711 return (READ_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel - 1U)))))->CCR,
712 DMAMUX_CxCR_DMAREQ_ID));
713 }
714
715 /**
716 * @brief Set the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event.
717 * @rmtoll CxCR NBREQ LL_DMAMUX_SetSyncRequestNb
718 * @param DMAMUXx DMAMUXx Instance
719 * @param Channel This parameter can be one of the following values:
720 * @arg @ref LL_DMAMUX_CHANNEL_0
721 * @arg @ref LL_DMAMUX_CHANNEL_1
722 * @arg @ref LL_DMAMUX_CHANNEL_2
723 * @arg @ref LL_DMAMUX_CHANNEL_3
724 * @arg @ref LL_DMAMUX_CHANNEL_4
725 * @arg @ref LL_DMAMUX_CHANNEL_5
726 * @arg @ref LL_DMAMUX_CHANNEL_6
727 * @arg @ref LL_DMAMUX_CHANNEL_7
728 * @arg @ref LL_DMAMUX_CHANNEL_8
729 * @arg @ref LL_DMAMUX_CHANNEL_9
730 * @arg @ref LL_DMAMUX_CHANNEL_10
731 * @arg @ref LL_DMAMUX_CHANNEL_11
732 * @arg @ref LL_DMAMUX_CHANNEL_12
733 * @arg @ref LL_DMAMUX_CHANNEL_13
734 * @arg @ref LL_DMAMUX_CHANNEL_14
735 * @arg @ref LL_DMAMUX_CHANNEL_15
736 * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32.
737 * @retval None
738 */
739 __STATIC_INLINE void LL_DMAMUX_SetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t RequestNb)
740 {
741 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
742
743 MODIFY_REG(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
744 DMAMUX_CxCR_NBREQ, RequestNb - 1U);
745 }
746
747 /**
748 * @brief Get the number of DMA request that will be autorized after a synchronization event and/or the number of DMA request needed to generate an event.
749 * @rmtoll CxCR NBREQ LL_DMAMUX_GetSyncRequestNb
750 * @param DMAMUXx DMAMUXx Instance
751 * @param Channel This parameter can be one of the following values:
752 * @arg @ref LL_DMAMUX_CHANNEL_0
753 * @arg @ref LL_DMAMUX_CHANNEL_1
754 * @arg @ref LL_DMAMUX_CHANNEL_2
755 * @arg @ref LL_DMAMUX_CHANNEL_3
756 * @arg @ref LL_DMAMUX_CHANNEL_4
757 * @arg @ref LL_DMAMUX_CHANNEL_5
758 * @arg @ref LL_DMAMUX_CHANNEL_6
759 * @arg @ref LL_DMAMUX_CHANNEL_7
760 * @arg @ref LL_DMAMUX_CHANNEL_8
761 * @arg @ref LL_DMAMUX_CHANNEL_9
762 * @arg @ref LL_DMAMUX_CHANNEL_10
763 * @arg @ref LL_DMAMUX_CHANNEL_11
764 * @arg @ref LL_DMAMUX_CHANNEL_12
765 * @arg @ref LL_DMAMUX_CHANNEL_13
766 * @arg @ref LL_DMAMUX_CHANNEL_14
767 * @arg @ref LL_DMAMUX_CHANNEL_15
768 * @retval Between Min_Data = 1 and Max_Data = 32
769 */
770 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
771 {
772 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
773
774 return (uint32_t)(READ_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
775 DMAMUX_CxCR_NBREQ) + 1U);
776 }
777
778 /**
779 * @brief Set the polarity of the signal on which the DMA request is synchronized.
780 * @rmtoll CxCR SPOL LL_DMAMUX_SetSyncPolarity
781 * @param DMAMUXx DMAMUXx Instance
782 * @param Channel This parameter can be one of the following values:
783 * @arg @ref LL_DMAMUX_CHANNEL_0
784 * @arg @ref LL_DMAMUX_CHANNEL_1
785 * @arg @ref LL_DMAMUX_CHANNEL_2
786 * @arg @ref LL_DMAMUX_CHANNEL_3
787 * @arg @ref LL_DMAMUX_CHANNEL_4
788 * @arg @ref LL_DMAMUX_CHANNEL_5
789 * @arg @ref LL_DMAMUX_CHANNEL_6
790 * @arg @ref LL_DMAMUX_CHANNEL_7
791 * @arg @ref LL_DMAMUX_CHANNEL_8
792 * @arg @ref LL_DMAMUX_CHANNEL_9
793 * @arg @ref LL_DMAMUX_CHANNEL_10
794 * @arg @ref LL_DMAMUX_CHANNEL_11
795 * @arg @ref LL_DMAMUX_CHANNEL_12
796 * @arg @ref LL_DMAMUX_CHANNEL_13
797 * @arg @ref LL_DMAMUX_CHANNEL_14
798 * @arg @ref LL_DMAMUX_CHANNEL_15
799 * @param Polarity This parameter can be one of the following values:
800 * @arg @ref LL_DMAMUX_SYNC_NO_EVENT
801 * @arg @ref LL_DMAMUX_SYNC_POL_RISING
802 * @arg @ref LL_DMAMUX_SYNC_POL_FALLING
803 * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING
804 * @retval None
805 */
806 __STATIC_INLINE void LL_DMAMUX_SetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t Polarity)
807 {
808 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
809
810 MODIFY_REG(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
811 DMAMUX_CxCR_SPOL, Polarity);
812 }
813
814 /**
815 * @brief Get the polarity of the signal on which the DMA request is synchronized.
816 * @rmtoll CxCR SPOL LL_DMAMUX_GetSyncPolarity
817 * @param DMAMUXx DMAMUXx Instance
818 * @param Channel This parameter can be one of the following values:
819 * @arg @ref LL_DMAMUX_CHANNEL_0
820 * @arg @ref LL_DMAMUX_CHANNEL_1
821 * @arg @ref LL_DMAMUX_CHANNEL_2
822 * @arg @ref LL_DMAMUX_CHANNEL_3
823 * @arg @ref LL_DMAMUX_CHANNEL_4
824 * @arg @ref LL_DMAMUX_CHANNEL_5
825 * @arg @ref LL_DMAMUX_CHANNEL_6
826 * @arg @ref LL_DMAMUX_CHANNEL_7
827 * @arg @ref LL_DMAMUX_CHANNEL_8
828 * @arg @ref LL_DMAMUX_CHANNEL_9
829 * @arg @ref LL_DMAMUX_CHANNEL_10
830 * @arg @ref LL_DMAMUX_CHANNEL_11
831 * @arg @ref LL_DMAMUX_CHANNEL_12
832 * @arg @ref LL_DMAMUX_CHANNEL_13
833 * @arg @ref LL_DMAMUX_CHANNEL_14
834 * @arg @ref LL_DMAMUX_CHANNEL_15
835 * @retval Returned value can be one of the following values:
836 * @arg @ref LL_DMAMUX_SYNC_NO_EVENT
837 * @arg @ref LL_DMAMUX_SYNC_POL_RISING
838 * @arg @ref LL_DMAMUX_SYNC_POL_FALLING
839 * @arg @ref LL_DMAMUX_SYNC_POL_RISING_FALLING
840 */
841 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
842 {
843 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
844
845 return (uint32_t)(READ_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
846 DMAMUX_CxCR_SPOL));
847 }
848
849 /**
850 * @brief Enable the Event Generation on DMAMUX channel x.
851 * @rmtoll CxCR EGE LL_DMAMUX_EnableEventGeneration
852 * @param DMAMUXx DMAMUXx Instance
853 * @param Channel This parameter can be one of the following values:
854 * @arg @ref LL_DMAMUX_CHANNEL_0
855 * @arg @ref LL_DMAMUX_CHANNEL_1
856 * @arg @ref LL_DMAMUX_CHANNEL_2
857 * @arg @ref LL_DMAMUX_CHANNEL_3
858 * @arg @ref LL_DMAMUX_CHANNEL_4
859 * @arg @ref LL_DMAMUX_CHANNEL_5
860 * @arg @ref LL_DMAMUX_CHANNEL_6
861 * @arg @ref LL_DMAMUX_CHANNEL_7
862 * @arg @ref LL_DMAMUX_CHANNEL_8
863 * @arg @ref LL_DMAMUX_CHANNEL_9
864 * @arg @ref LL_DMAMUX_CHANNEL_10
865 * @arg @ref LL_DMAMUX_CHANNEL_11
866 * @arg @ref LL_DMAMUX_CHANNEL_12
867 * @arg @ref LL_DMAMUX_CHANNEL_13
868 * @arg @ref LL_DMAMUX_CHANNEL_14
869 * @arg @ref LL_DMAMUX_CHANNEL_15
870 * @retval None
871 */
872 __STATIC_INLINE void LL_DMAMUX_EnableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
873 {
874 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
875
876 SET_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR, DMAMUX_CxCR_EGE);
877 }
878
879 /**
880 * @brief Disable the Event Generation on DMAMUX channel x.
881 * @rmtoll CxCR EGE LL_DMAMUX_DisableEventGeneration
882 * @param DMAMUXx DMAMUXx Instance
883 * @param Channel This parameter can be one of the following values:
884 * @arg @ref LL_DMAMUX_CHANNEL_0
885 * @arg @ref LL_DMAMUX_CHANNEL_1
886 * @arg @ref LL_DMAMUX_CHANNEL_2
887 * @arg @ref LL_DMAMUX_CHANNEL_3
888 * @arg @ref LL_DMAMUX_CHANNEL_4
889 * @arg @ref LL_DMAMUX_CHANNEL_5
890 * @arg @ref LL_DMAMUX_CHANNEL_6
891 * @arg @ref LL_DMAMUX_CHANNEL_7
892 * @arg @ref LL_DMAMUX_CHANNEL_8
893 * @arg @ref LL_DMAMUX_CHANNEL_9
894 * @arg @ref LL_DMAMUX_CHANNEL_10
895 * @arg @ref LL_DMAMUX_CHANNEL_11
896 * @arg @ref LL_DMAMUX_CHANNEL_12
897 * @arg @ref LL_DMAMUX_CHANNEL_13
898 * @arg @ref LL_DMAMUX_CHANNEL_14
899 * @arg @ref LL_DMAMUX_CHANNEL_15
900 * @retval None
901 */
902 __STATIC_INLINE void LL_DMAMUX_DisableEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
903 {
904 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
905
906 CLEAR_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
907 DMAMUX_CxCR_EGE);
908 }
909
910 /**
911 * @brief Check if the Event Generation on DMAMUX channel x is enabled or disabled.
912 * @rmtoll CxCR EGE LL_DMAMUX_IsEnabledEventGeneration
913 * @param DMAMUXx DMAMUXx Instance
914 * @param Channel This parameter can be one of the following values:
915 * @arg @ref LL_DMAMUX_CHANNEL_0
916 * @arg @ref LL_DMAMUX_CHANNEL_1
917 * @arg @ref LL_DMAMUX_CHANNEL_2
918 * @arg @ref LL_DMAMUX_CHANNEL_3
919 * @arg @ref LL_DMAMUX_CHANNEL_4
920 * @arg @ref LL_DMAMUX_CHANNEL_5
921 * @arg @ref LL_DMAMUX_CHANNEL_6
922 * @arg @ref LL_DMAMUX_CHANNEL_7
923 * @arg @ref LL_DMAMUX_CHANNEL_8
924 * @arg @ref LL_DMAMUX_CHANNEL_9
925 * @arg @ref LL_DMAMUX_CHANNEL_10
926 * @arg @ref LL_DMAMUX_CHANNEL_11
927 * @arg @ref LL_DMAMUX_CHANNEL_12
928 * @arg @ref LL_DMAMUX_CHANNEL_13
929 * @arg @ref LL_DMAMUX_CHANNEL_14
930 * @arg @ref LL_DMAMUX_CHANNEL_15
931 * @retval State of bit (1 or 0).
932 */
933 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledEventGeneration(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
934 {
935 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
936
937 return ((READ_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
938 DMAMUX_CxCR_EGE) == (DMAMUX_CxCR_EGE)) ? 1UL : 0UL);
939 }
940
941 /**
942 * @brief Enable the synchronization mode.
943 * @rmtoll CxCR SE LL_DMAMUX_EnableSync
944 * @param DMAMUXx DMAMUXx Instance
945 * @param Channel This parameter can be one of the following values:
946 * @arg @ref LL_DMAMUX_CHANNEL_0
947 * @arg @ref LL_DMAMUX_CHANNEL_1
948 * @arg @ref LL_DMAMUX_CHANNEL_2
949 * @arg @ref LL_DMAMUX_CHANNEL_3
950 * @arg @ref LL_DMAMUX_CHANNEL_4
951 * @arg @ref LL_DMAMUX_CHANNEL_5
952 * @arg @ref LL_DMAMUX_CHANNEL_6
953 * @arg @ref LL_DMAMUX_CHANNEL_7
954 * @arg @ref LL_DMAMUX_CHANNEL_8
955 * @arg @ref LL_DMAMUX_CHANNEL_9
956 * @arg @ref LL_DMAMUX_CHANNEL_10
957 * @arg @ref LL_DMAMUX_CHANNEL_11
958 * @arg @ref LL_DMAMUX_CHANNEL_12
959 * @arg @ref LL_DMAMUX_CHANNEL_13
960 * @arg @ref LL_DMAMUX_CHANNEL_14
961 * @arg @ref LL_DMAMUX_CHANNEL_15
962 * @retval None
963 */
964 __STATIC_INLINE void LL_DMAMUX_EnableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
965 {
966 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
967
968 SET_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR, DMAMUX_CxCR_SE);
969 }
970
971 /**
972 * @brief Disable the synchronization mode.
973 * @rmtoll CxCR SE LL_DMAMUX_DisableSync
974 * @param DMAMUXx DMAMUXx Instance
975 * @param Channel This parameter can be one of the following values:
976 * @arg @ref LL_DMAMUX_CHANNEL_0
977 * @arg @ref LL_DMAMUX_CHANNEL_1
978 * @arg @ref LL_DMAMUX_CHANNEL_2
979 * @arg @ref LL_DMAMUX_CHANNEL_3
980 * @arg @ref LL_DMAMUX_CHANNEL_4
981 * @arg @ref LL_DMAMUX_CHANNEL_5
982 * @arg @ref LL_DMAMUX_CHANNEL_6
983 * @arg @ref LL_DMAMUX_CHANNEL_7
984 * @arg @ref LL_DMAMUX_CHANNEL_8
985 * @arg @ref LL_DMAMUX_CHANNEL_9
986 * @arg @ref LL_DMAMUX_CHANNEL_10
987 * @arg @ref LL_DMAMUX_CHANNEL_11
988 * @arg @ref LL_DMAMUX_CHANNEL_12
989 * @arg @ref LL_DMAMUX_CHANNEL_13
990 * @arg @ref LL_DMAMUX_CHANNEL_14
991 * @arg @ref LL_DMAMUX_CHANNEL_15
992 * @retval None
993 */
994 __STATIC_INLINE void LL_DMAMUX_DisableSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
995 {
996 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
997
998 CLEAR_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR, DMAMUX_CxCR_SE);
999 }
1000
1001 /**
1002 * @brief Check if the synchronization mode is enabled or disabled.
1003 * @rmtoll CxCR SE LL_DMAMUX_IsEnabledSync
1004 * @param DMAMUXx DMAMUXx Instance
1005 * @param Channel This parameter can be one of the following values:
1006 * @arg @ref LL_DMAMUX_CHANNEL_0
1007 * @arg @ref LL_DMAMUX_CHANNEL_1
1008 * @arg @ref LL_DMAMUX_CHANNEL_2
1009 * @arg @ref LL_DMAMUX_CHANNEL_3
1010 * @arg @ref LL_DMAMUX_CHANNEL_4
1011 * @arg @ref LL_DMAMUX_CHANNEL_5
1012 * @arg @ref LL_DMAMUX_CHANNEL_6
1013 * @arg @ref LL_DMAMUX_CHANNEL_7
1014 * @arg @ref LL_DMAMUX_CHANNEL_8
1015 * @arg @ref LL_DMAMUX_CHANNEL_9
1016 * @arg @ref LL_DMAMUX_CHANNEL_10
1017 * @arg @ref LL_DMAMUX_CHANNEL_11
1018 * @arg @ref LL_DMAMUX_CHANNEL_12
1019 * @arg @ref LL_DMAMUX_CHANNEL_13
1020 * @arg @ref LL_DMAMUX_CHANNEL_14
1021 * @arg @ref LL_DMAMUX_CHANNEL_15
1022 * @retval State of bit (1 or 0).
1023 */
1024 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledSync(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1025 {
1026 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
1027
1028 return ((READ_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
1029 DMAMUX_CxCR_SE) == (DMAMUX_CxCR_SE)) ? 1UL : 0UL);
1030 }
1031
1032 /**
1033 * @brief Set DMAMUX synchronization ID on DMAMUX Channel x.
1034 * @rmtoll CxCR SYNC_ID LL_DMAMUX_SetSyncID
1035 * @param DMAMUXx DMAMUXx Instance
1036 * @param Channel This parameter can be one of the following values:
1037 * @arg @ref LL_DMAMUX_CHANNEL_0
1038 * @arg @ref LL_DMAMUX_CHANNEL_1
1039 * @arg @ref LL_DMAMUX_CHANNEL_2
1040 * @arg @ref LL_DMAMUX_CHANNEL_3
1041 * @arg @ref LL_DMAMUX_CHANNEL_4
1042 * @arg @ref LL_DMAMUX_CHANNEL_5
1043 * @arg @ref LL_DMAMUX_CHANNEL_6
1044 * @arg @ref LL_DMAMUX_CHANNEL_7
1045 * @arg @ref LL_DMAMUX_CHANNEL_8
1046 * @arg @ref LL_DMAMUX_CHANNEL_9
1047 * @arg @ref LL_DMAMUX_CHANNEL_10
1048 * @arg @ref LL_DMAMUX_CHANNEL_11
1049 * @arg @ref LL_DMAMUX_CHANNEL_12
1050 * @arg @ref LL_DMAMUX_CHANNEL_13
1051 * @arg @ref LL_DMAMUX_CHANNEL_14
1052 * @arg @ref LL_DMAMUX_CHANNEL_15
1053 * @param SyncID This parameter can be one of the following values:
1054 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0
1055 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1
1056 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2
1057 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3
1058 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4
1059 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5
1060 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6
1061 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7
1062 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8
1063 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9
1064 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10
1065 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11
1066 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12
1067 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13
1068 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14
1069 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15
1070 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0
1071 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1
1072 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH2
1073 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH3
1074 * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT
1075 * @retval None
1076 */
1077 __STATIC_INLINE void LL_DMAMUX_SetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel, uint32_t SyncID)
1078 {
1079 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
1080
1081 MODIFY_REG(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
1082 DMAMUX_CxCR_SYNC_ID, SyncID);
1083 }
1084
1085 /**
1086 * @brief Get DMAMUX synchronization ID on DMAMUX Channel x.
1087 * @rmtoll CxCR SYNC_ID LL_DMAMUX_GetSyncID
1088 * @param DMAMUXx DMAMUXx Instance
1089 * @param Channel This parameter can be one of the following values:
1090 * @arg @ref LL_DMAMUX_CHANNEL_0
1091 * @arg @ref LL_DMAMUX_CHANNEL_1
1092 * @arg @ref LL_DMAMUX_CHANNEL_2
1093 * @arg @ref LL_DMAMUX_CHANNEL_3
1094 * @arg @ref LL_DMAMUX_CHANNEL_4
1095 * @arg @ref LL_DMAMUX_CHANNEL_5
1096 * @arg @ref LL_DMAMUX_CHANNEL_6
1097 * @arg @ref LL_DMAMUX_CHANNEL_7
1098 * @arg @ref LL_DMAMUX_CHANNEL_8
1099 * @arg @ref LL_DMAMUX_CHANNEL_9
1100 * @arg @ref LL_DMAMUX_CHANNEL_10
1101 * @arg @ref LL_DMAMUX_CHANNEL_11
1102 * @arg @ref LL_DMAMUX_CHANNEL_12
1103 * @arg @ref LL_DMAMUX_CHANNEL_13
1104 * @arg @ref LL_DMAMUX_CHANNEL_14
1105 * @arg @ref LL_DMAMUX_CHANNEL_15
1106 * @retval Returned value can be one of the following values:
1107 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE0
1108 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE1
1109 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE2
1110 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE3
1111 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE4
1112 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE5
1113 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE6
1114 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE7
1115 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE8
1116 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE9
1117 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE10
1118 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE11
1119 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE12
1120 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE13
1121 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE14
1122 * @arg @ref LL_DMAMUX_SYNC_EXTI_LINE15
1123 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH0
1124 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH1
1125 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH2
1126 * @arg @ref LL_DMAMUX_SYNC_DMAMUX_CH3
1127 * @arg @ref LL_DMAMUX_SYNC_LPTIM1_OUT
1128 */
1129 __STATIC_INLINE uint32_t LL_DMAMUX_GetSyncID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1130 {
1131 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
1132
1133 return (uint32_t)(READ_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
1134 DMAMUX_CxCR_SYNC_ID));
1135 }
1136
1137 /**
1138 * @brief Enable the Request Generator.
1139 * @rmtoll RGxCR GE LL_DMAMUX_EnableRequestGen
1140 * @param DMAMUXx DMAMUXx Instance
1141 * @param RequestGenChannel This parameter can be one of the following values:
1142 * @arg @ref LL_DMAMUX_REQ_GEN_0
1143 * @arg @ref LL_DMAMUX_REQ_GEN_1
1144 * @arg @ref LL_DMAMUX_REQ_GEN_2
1145 * @arg @ref LL_DMAMUX_REQ_GEN_3
1146 * @retval None
1147 */
1148 __STATIC_INLINE void LL_DMAMUX_EnableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1149 {
1150 UNUSED(DMAMUXx);
1151 SET_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
1152 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE);
1153 }
1154
1155 /**
1156 * @brief Disable the Request Generator.
1157 * @rmtoll RGxCR GE LL_DMAMUX_DisableRequestGen
1158 * @param DMAMUXx DMAMUXx Instance
1159 * @param RequestGenChannel This parameter can be one of the following values:
1160 * @arg @ref LL_DMAMUX_REQ_GEN_0
1161 * @arg @ref LL_DMAMUX_REQ_GEN_1
1162 * @arg @ref LL_DMAMUX_REQ_GEN_2
1163 * @arg @ref LL_DMAMUX_REQ_GEN_3
1164 * @retval None
1165 */
1166 __STATIC_INLINE void LL_DMAMUX_DisableRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1167 {
1168 UNUSED(DMAMUXx);
1169 CLEAR_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
1170 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE);
1171 }
1172
1173 /**
1174 * @brief Check if the Request Generator is enabled or disabled.
1175 * @rmtoll RGxCR GE LL_DMAMUX_IsEnabledRequestGen
1176 * @param DMAMUXx DMAMUXx Instance
1177 * @param RequestGenChannel This parameter can be one of the following values:
1178 * @arg @ref LL_DMAMUX_REQ_GEN_0
1179 * @arg @ref LL_DMAMUX_REQ_GEN_1
1180 * @arg @ref LL_DMAMUX_REQ_GEN_2
1181 * @arg @ref LL_DMAMUX_REQ_GEN_3
1182 * @retval State of bit (1 or 0).
1183 */
1184 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledRequestGen(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1185 {
1186 UNUSED(DMAMUXx);
1187 return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
1188 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GE) == (DMAMUX_RGxCR_GE)) ? 1UL : 0UL);
1189 }
1190
1191 /**
1192 * @brief Set the polarity of the signal on which the DMA request is generated.
1193 * @rmtoll RGxCR GPOL LL_DMAMUX_SetRequestGenPolarity
1194 * @param DMAMUXx DMAMUXx Instance
1195 * @param RequestGenChannel This parameter can be one of the following values:
1196 * @arg @ref LL_DMAMUX_REQ_GEN_0
1197 * @arg @ref LL_DMAMUX_REQ_GEN_1
1198 * @arg @ref LL_DMAMUX_REQ_GEN_2
1199 * @arg @ref LL_DMAMUX_REQ_GEN_3
1200 * @param Polarity This parameter can be one of the following values:
1201 * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT
1202 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING
1203 * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING
1204 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING
1205 * @retval None
1206 */
1207 __STATIC_INLINE void LL_DMAMUX_SetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
1208 uint32_t Polarity)
1209 {
1210 UNUSED(DMAMUXx);
1211 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
1212 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL, Polarity);
1213 }
1214
1215 /**
1216 * @brief Get the polarity of the signal on which the DMA request is generated.
1217 * @rmtoll RGxCR GPOL LL_DMAMUX_GetRequestGenPolarity
1218 * @param DMAMUXx DMAMUXx Instance
1219 * @param RequestGenChannel This parameter can be one of the following values:
1220 * @arg @ref LL_DMAMUX_REQ_GEN_0
1221 * @arg @ref LL_DMAMUX_REQ_GEN_1
1222 * @arg @ref LL_DMAMUX_REQ_GEN_2
1223 * @arg @ref LL_DMAMUX_REQ_GEN_3
1224 * @retval Returned value can be one of the following values:
1225 * @arg @ref LL_DMAMUX_REQ_GEN_NO_EVENT
1226 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING
1227 * @arg @ref LL_DMAMUX_REQ_GEN_POL_FALLING
1228 * @arg @ref LL_DMAMUX_REQ_GEN_POL_RISING_FALLING
1229 */
1230 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestGenPolarity(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1231 {
1232 UNUSED(DMAMUXx);
1233 return (READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
1234 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GPOL));
1235 }
1236
1237 /**
1238 * @brief Set the number of DMA request that will be autorized after a generation event.
1239 * @note This field can only be written when Generator is disabled.
1240 * @rmtoll RGxCR GNBREQ LL_DMAMUX_SetGenRequestNb
1241 * @param DMAMUXx DMAMUXx Instance
1242 * @param RequestGenChannel This parameter can be one of the following values:
1243 * @arg @ref LL_DMAMUX_REQ_GEN_0
1244 * @arg @ref LL_DMAMUX_REQ_GEN_1
1245 * @arg @ref LL_DMAMUX_REQ_GEN_2
1246 * @arg @ref LL_DMAMUX_REQ_GEN_3
1247 * @param RequestNb This parameter must be a value between Min_Data = 1 and Max_Data = 32.
1248 * @retval None
1249 */
1250 __STATIC_INLINE void LL_DMAMUX_SetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
1251 uint32_t RequestNb)
1252 {
1253 UNUSED(DMAMUXx);
1254 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
1255 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ, (RequestNb - 1U) << DMAMUX_RGxCR_GNBREQ_Pos);
1256 }
1257
1258 /**
1259 * @brief Get the number of DMA request that will be autorized after a generation event.
1260 * @rmtoll RGxCR GNBREQ LL_DMAMUX_GetGenRequestNb
1261 * @param DMAMUXx DMAMUXx Instance
1262 * @param RequestGenChannel This parameter can be one of the following values:
1263 * @arg @ref LL_DMAMUX_REQ_GEN_0
1264 * @arg @ref LL_DMAMUX_REQ_GEN_1
1265 * @arg @ref LL_DMAMUX_REQ_GEN_2
1266 * @arg @ref LL_DMAMUX_REQ_GEN_3
1267 * @retval Between Min_Data = 1 and Max_Data = 32
1268 */
1269 __STATIC_INLINE uint32_t LL_DMAMUX_GetGenRequestNb(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1270 {
1271 UNUSED(DMAMUXx);
1272 return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
1273 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_GNBREQ) >> DMAMUX_RGxCR_GNBREQ_Pos) + 1U);
1274 }
1275
1276 /**
1277 * @brief Set DMAMUX external Request Signal ID on DMAMUX Request Generation Trigger Event Channel x.
1278 * @rmtoll RGxCR SIG_ID LL_DMAMUX_SetRequestSignalID
1279 * @param DMAMUXx DMAMUXx Instance
1280 * @param RequestGenChannel This parameter can be one of the following values:
1281 * @arg @ref LL_DMAMUX_REQ_GEN_0
1282 * @arg @ref LL_DMAMUX_REQ_GEN_1
1283 * @arg @ref LL_DMAMUX_REQ_GEN_2
1284 * @arg @ref LL_DMAMUX_REQ_GEN_3
1285 * @param RequestSignalID This parameter can be one of the following values:
1286 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0
1287 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1
1288 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2
1289 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3
1290 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4
1291 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5
1292 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6
1293 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7
1294 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8
1295 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9
1296 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10
1297 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11
1298 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12
1299 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13
1300 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14
1301 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15
1302 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0
1303 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1
1304 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH2
1305 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH3
1306 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT
1307 * @retval None
1308 */
1309 __STATIC_INLINE void LL_DMAMUX_SetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel,
1310 uint32_t RequestSignalID)
1311 {
1312 UNUSED(DMAMUXx);
1313 MODIFY_REG(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
1314 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID, RequestSignalID);
1315 }
1316
1317 /**
1318 * @brief Get DMAMUX external Request Signal ID set on DMAMUX Channel x.
1319 * @rmtoll RGxCR SIG_ID LL_DMAMUX_GetRequestSignalID
1320 * @param DMAMUXx DMAMUXx Instance
1321 * @param RequestGenChannel This parameter can be one of the following values:
1322 * @arg @ref LL_DMAMUX_REQ_GEN_0
1323 * @arg @ref LL_DMAMUX_REQ_GEN_1
1324 * @arg @ref LL_DMAMUX_REQ_GEN_2
1325 * @arg @ref LL_DMAMUX_REQ_GEN_3
1326 * @retval Returned value can be one of the following values:
1327 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE0
1328 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE1
1329 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE2
1330 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE3
1331 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE4
1332 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE5
1333 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE6
1334 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE7
1335 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE8
1336 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE9
1337 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE10
1338 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE11
1339 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE12
1340 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE13
1341 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE14
1342 * @arg @ref LL_DMAMUX_REQ_GEN_EXTI_LINE15
1343 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH0
1344 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH1
1345 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH2
1346 * @arg @ref LL_DMAMUX_REQ_GEN_DMAMUX_CH3
1347 * @arg @ref LL_DMAMUX_REQ_GEN_LPTIM1_OUT
1348 */
1349 __STATIC_INLINE uint32_t LL_DMAMUX_GetRequestSignalID(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1350 {
1351 UNUSED(DMAMUXx);
1352 return (READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
1353 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_SIG_ID));
1354 }
1355
1356 /**
1357 * @}
1358 */
1359
1360 /** @defgroup DMAMUX_LL_EF_FLAG_Management FLAG_Management
1361 * @{
1362 */
1363
1364 /**
1365 * @brief Get Synchronization Event Overrun Flag Channel 0.
1366 * @rmtoll CSR SOF0 LL_DMAMUX_IsActiveFlag_SO0
1367 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1368 * @retval State of bit (1 or 0).
1369 */
1370 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1371 {
1372 UNUSED(DMAMUXx);
1373 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF0) == (DMAMUX_CSR_SOF0)) ? 1UL : 0UL);
1374 }
1375
1376 /**
1377 * @brief Get Synchronization Event Overrun Flag Channel 1.
1378 * @rmtoll CSR SOF1 LL_DMAMUX_IsActiveFlag_SO1
1379 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1380 * @retval State of bit (1 or 0).
1381 */
1382 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1383 {
1384 UNUSED(DMAMUXx);
1385 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF1) == (DMAMUX_CSR_SOF1)) ? 1UL : 0UL);
1386 }
1387
1388 /**
1389 * @brief Get Synchronization Event Overrun Flag Channel 2.
1390 * @rmtoll CSR SOF2 LL_DMAMUX_IsActiveFlag_SO2
1391 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1392 * @retval State of bit (1 or 0).
1393 */
1394 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1395 {
1396 UNUSED(DMAMUXx);
1397 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF2) == (DMAMUX_CSR_SOF2)) ? 1UL : 0UL);
1398 }
1399
1400 /**
1401 * @brief Get Synchronization Event Overrun Flag Channel 3.
1402 * @rmtoll CSR SOF3 LL_DMAMUX_IsActiveFlag_SO3
1403 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1404 * @retval State of bit (1 or 0).
1405 */
1406 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1407 {
1408 UNUSED(DMAMUXx);
1409 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF3) == (DMAMUX_CSR_SOF3)) ? 1UL : 0UL);
1410 }
1411
1412 /**
1413 * @brief Get Synchronization Event Overrun Flag Channel 4.
1414 * @rmtoll CSR SOF4 LL_DMAMUX_IsActiveFlag_SO4
1415 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1416 * @retval State of bit (1 or 0).
1417 */
1418 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
1419 {
1420 UNUSED(DMAMUXx);
1421 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF4) == (DMAMUX_CSR_SOF4)) ? 1UL : 0UL);
1422 }
1423
1424 /**
1425 * @brief Get Synchronization Event Overrun Flag Channel 5.
1426 * @rmtoll CSR SOF5 LL_DMAMUX_IsActiveFlag_SO5
1427 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1428 * @retval State of bit (1 or 0).
1429 */
1430 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
1431 {
1432 UNUSED(DMAMUXx);
1433 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF5) == (DMAMUX_CSR_SOF5)) ? 1UL : 0UL);
1434 }
1435
1436 /**
1437 * @brief Get Synchronization Event Overrun Flag Channel 6.
1438 * @rmtoll CSR SOF6 LL_DMAMUX_IsActiveFlag_SO6
1439 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1440 * @retval State of bit (1 or 0).
1441 */
1442 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
1443 {
1444 UNUSED(DMAMUXx);
1445 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF6) == (DMAMUX_CSR_SOF6)) ? 1UL : 0UL);
1446 }
1447
1448 /**
1449 * @brief Get Synchronization Event Overrun Flag Channel 7.
1450 * @rmtoll CSR SOF7 LL_DMAMUX_IsActiveFlag_SO7
1451 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1452 * @retval State of bit (1 or 0).
1453 */
1454 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
1455 {
1456 UNUSED(DMAMUXx);
1457 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF7) == (DMAMUX_CSR_SOF7)) ? 1UL : 0UL);
1458 }
1459
1460 /**
1461 * @brief Get Synchronization Event Overrun Flag Channel 8.
1462 * @rmtoll CSR SOF8 LL_DMAMUX_IsActiveFlag_SO8
1463 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1464 * @retval State of bit (1 or 0).
1465 */
1466 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
1467 {
1468 UNUSED(DMAMUXx);
1469 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF8) == (DMAMUX_CSR_SOF8)) ? 1UL : 0UL);
1470 }
1471
1472 /**
1473 * @brief Get Synchronization Event Overrun Flag Channel 9.
1474 * @rmtoll CSR SOF9 LL_DMAMUX_IsActiveFlag_SO9
1475 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1476 * @retval State of bit (1 or 0).
1477 */
1478 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
1479 {
1480 UNUSED(DMAMUXx);
1481 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF9) == (DMAMUX_CSR_SOF9)) ? 1UL : 0UL);
1482 }
1483
1484 /**
1485 * @brief Get Synchronization Event Overrun Flag Channel 10.
1486 * @rmtoll CSR SOF10 LL_DMAMUX_IsActiveFlag_SO10
1487 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1488 * @retval State of bit (1 or 0).
1489 */
1490 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
1491 {
1492 UNUSED(DMAMUXx);
1493 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF10) == (DMAMUX_CSR_SOF10)) ? 1UL : 0UL);
1494 }
1495
1496 /**
1497 * @brief Get Synchronization Event Overrun Flag Channel 11.
1498 * @rmtoll CSR SOF11 LL_DMAMUX_IsActiveFlag_SO11
1499 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1500 * @retval State of bit (1 or 0).
1501 */
1502 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
1503 {
1504 UNUSED(DMAMUXx);
1505 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF11) == (DMAMUX_CSR_SOF11)) ? 1UL : 0UL);
1506 }
1507
1508 #if defined (DMAMUX_CSR_SOF12)
1509 /**
1510 * @brief Get Synchronization Event Overrun Flag Channel 12.
1511 * @rmtoll CSR SOF12 LL_DMAMUX_IsActiveFlag_SO12
1512 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1513 * @retval State of bit (1 or 0).
1514 */
1515 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
1516 {
1517 UNUSED(DMAMUXx);
1518 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF12) == (DMAMUX_CSR_SOF12)) ? 1UL : 0UL);
1519 }
1520 #endif /* DMAMUX_CSR_SOF12 */
1521
1522 #if defined (DMAMUX_CSR_SOF13)
1523 /**
1524 * @brief Get Synchronization Event Overrun Flag Channel 13.
1525 * @rmtoll CSR SOF13 LL_DMAMUX_IsActiveFlag_SO13
1526 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1527 * @retval State of bit (1 or 0).
1528 */
1529 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
1530 {
1531 UNUSED(DMAMUXx);
1532 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF13) == (DMAMUX_CSR_SOF13)) ? 1UL : 0UL);
1533 }
1534 #endif /* DMAMUX_CSR_SOF13 */
1535
1536 #if defined (DMAMUX_CSR_SOF14)
1537 /**
1538 * @brief Get Synchronization Event Overrun Flag Channel 14.
1539 * @rmtoll CSR SOF13 LL_DMAMUX_IsActiveFlag_SO14
1540 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1541 * @retval State of bit (1 or 0).
1542 */
1543 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO14(DMAMUX_Channel_TypeDef *DMAMUXx)
1544 {
1545 UNUSED(DMAMUXx);
1546 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF14) == (DMAMUX_CSR_SOF14)) ? 1UL : 0UL);
1547 }
1548 #endif /* DMAMUX_CSR_SOF14 */
1549
1550 #if defined (DMAMUX_CSR_SOF15)
1551 /**
1552 * @brief Get Synchronization Event Overrun Flag Channel 15.
1553 * @rmtoll CSR SOF13 LL_DMAMUX_IsActiveFlag_SO15
1554 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1555 * @retval State of bit (1 or 0).
1556 */
1557 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_SO15(DMAMUX_Channel_TypeDef *DMAMUXx)
1558 {
1559 UNUSED(DMAMUXx);
1560 return ((READ_BIT(DMAMUX1_ChannelStatus->CSR, DMAMUX_CSR_SOF15) == (DMAMUX_CSR_SOF15)) ? 1UL : 0UL);
1561 }
1562 #endif /* DMAMUX_CSR_SOF15 */
1563
1564 /**
1565 * @brief Get Request Generator 0 Trigger Event Overrun Flag.
1566 * @rmtoll RGSR OF0 LL_DMAMUX_IsActiveFlag_RGO0
1567 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1568 * @retval State of bit (1 or 0).
1569 */
1570 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1571 {
1572 UNUSED(DMAMUXx);
1573 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF0) == (DMAMUX_RGSR_OF0)) ? 1UL : 0UL);
1574 }
1575
1576 /**
1577 * @brief Get Request Generator 1 Trigger Event Overrun Flag.
1578 * @rmtoll RGSR OF1 LL_DMAMUX_IsActiveFlag_RGO1
1579 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1580 * @retval State of bit (1 or 0).
1581 */
1582 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1583 {
1584 UNUSED(DMAMUXx);
1585 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF1) == (DMAMUX_RGSR_OF1)) ? 1UL : 0UL);
1586 }
1587
1588 /**
1589 * @brief Get Request Generator 2 Trigger Event Overrun Flag.
1590 * @rmtoll RGSR OF2 LL_DMAMUX_IsActiveFlag_RGO2
1591 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1592 * @retval State of bit (1 or 0).
1593 */
1594 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1595 {
1596 UNUSED(DMAMUXx);
1597 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF2) == (DMAMUX_RGSR_OF2)) ? 1UL : 0UL);
1598 }
1599
1600 /**
1601 * @brief Get Request Generator 3 Trigger Event Overrun Flag.
1602 * @rmtoll RGSR OF3 LL_DMAMUX_IsActiveFlag_RGO3
1603 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1604 * @retval State of bit (1 or 0).
1605 */
1606 __STATIC_INLINE uint32_t LL_DMAMUX_IsActiveFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1607 {
1608 UNUSED(DMAMUXx);
1609 return ((READ_BIT(DMAMUX1_RequestGenStatus->RGSR, DMAMUX_RGSR_OF3) == (DMAMUX_RGSR_OF3)) ? 1UL : 0UL);
1610 }
1611
1612 /**
1613 * @brief Clear Synchronization Event Overrun Flag Channel 0.
1614 * @rmtoll CFR CSOF0 LL_DMAMUX_ClearFlag_SO0
1615 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1616 * @retval None
1617 */
1618 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1619 {
1620 UNUSED(DMAMUXx);
1621 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF0);
1622 }
1623
1624 /**
1625 * @brief Clear Synchronization Event Overrun Flag Channel 1.
1626 * @rmtoll CFR CSOF1 LL_DMAMUX_ClearFlag_SO1
1627 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1628 * @retval None
1629 */
1630 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1631 {
1632 UNUSED(DMAMUXx);
1633 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF1);
1634 }
1635
1636 /**
1637 * @brief Clear Synchronization Event Overrun Flag Channel 2.
1638 * @rmtoll CFR CSOF2 LL_DMAMUX_ClearFlag_SO2
1639 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1640 * @retval None
1641 */
1642 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1643 {
1644 UNUSED(DMAMUXx);
1645 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF2);
1646 }
1647
1648 /**
1649 * @brief Clear Synchronization Event Overrun Flag Channel 3.
1650 * @rmtoll CFR CSOF3 LL_DMAMUX_ClearFlag_SO3
1651 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1652 * @retval None
1653 */
1654 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1655 {
1656 UNUSED(DMAMUXx);
1657 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF3);
1658 }
1659
1660 /**
1661 * @brief Clear Synchronization Event Overrun Flag Channel 4.
1662 * @rmtoll CFR CSOF4 LL_DMAMUX_ClearFlag_SO4
1663 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1664 * @retval None
1665 */
1666 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO4(DMAMUX_Channel_TypeDef *DMAMUXx)
1667 {
1668 UNUSED(DMAMUXx);
1669 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF4);
1670 }
1671
1672 /**
1673 * @brief Clear Synchronization Event Overrun Flag Channel 5.
1674 * @rmtoll CFR CSOF5 LL_DMAMUX_ClearFlag_SO5
1675 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1676 * @retval None
1677 */
1678 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO5(DMAMUX_Channel_TypeDef *DMAMUXx)
1679 {
1680 UNUSED(DMAMUXx);
1681 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF5);
1682 }
1683
1684 /**
1685 * @brief Clear Synchronization Event Overrun Flag Channel 6.
1686 * @rmtoll CFR CSOF6 LL_DMAMUX_ClearFlag_SO6
1687 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1688 * @retval None
1689 */
1690 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO6(DMAMUX_Channel_TypeDef *DMAMUXx)
1691 {
1692 UNUSED(DMAMUXx);
1693 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF6);
1694 }
1695
1696 /**
1697 * @brief Clear Synchronization Event Overrun Flag Channel 7.
1698 * @rmtoll CFR CSOF7 LL_DMAMUX_ClearFlag_SO7
1699 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1700 * @retval None
1701 */
1702 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO7(DMAMUX_Channel_TypeDef *DMAMUXx)
1703 {
1704 UNUSED(DMAMUXx);
1705 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF7);
1706 }
1707
1708 /**
1709 * @brief Clear Synchronization Event Overrun Flag Channel 8.
1710 * @rmtoll CFR CSOF8 LL_DMAMUX_ClearFlag_SO8
1711 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1712 * @retval None
1713 */
1714 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO8(DMAMUX_Channel_TypeDef *DMAMUXx)
1715 {
1716 UNUSED(DMAMUXx);
1717 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF8);
1718 }
1719
1720 /**
1721 * @brief Clear Synchronization Event Overrun Flag Channel 9.
1722 * @rmtoll CFR CSOF9 LL_DMAMUX_ClearFlag_SO9
1723 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1724 * @retval None
1725 */
1726 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO9(DMAMUX_Channel_TypeDef *DMAMUXx)
1727 {
1728 UNUSED(DMAMUXx);
1729 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF9);
1730 }
1731
1732 /**
1733 * @brief Clear Synchronization Event Overrun Flag Channel 10.
1734 * @rmtoll CFR CSOF10 LL_DMAMUX_ClearFlag_SO10
1735 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1736 * @retval None
1737 */
1738 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO10(DMAMUX_Channel_TypeDef *DMAMUXx)
1739 {
1740 UNUSED(DMAMUXx);
1741 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF10);
1742 }
1743
1744 /**
1745 * @brief Clear Synchronization Event Overrun Flag Channel 11.
1746 * @rmtoll CFR CSOF11 LL_DMAMUX_ClearFlag_SO11
1747 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1748 * @retval None
1749 */
1750 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO11(DMAMUX_Channel_TypeDef *DMAMUXx)
1751 {
1752 UNUSED(DMAMUXx);
1753 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF11);
1754 }
1755
1756 #if defined (DMAMUX_CFR_CSOF12)
1757 /**
1758 * @brief Clear Synchronization Event Overrun Flag Channel 12.
1759 * @rmtoll CFR CSOF12 LL_DMAMUX_ClearFlag_SO12
1760 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1761 * @retval None
1762 */
1763 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO12(DMAMUX_Channel_TypeDef *DMAMUXx)
1764 {
1765 UNUSED(DMAMUXx);
1766 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF12);
1767 }
1768 #endif /* DMAMUX_CFR_CSOF12 */
1769
1770 #if defined (DMAMUX_CFR_CSOF13)
1771 /**
1772 * @brief Clear Synchronization Event Overrun Flag Channel 13.
1773 * @rmtoll CFR CSOF13 LL_DMAMUX_ClearFlag_SO13
1774 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1775 * @retval None
1776 */
1777 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO13(DMAMUX_Channel_TypeDef *DMAMUXx)
1778 {
1779 UNUSED(DMAMUXx);
1780 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF13);
1781 }
1782 #endif /* DMAMUX_CFR_CSOF13 */
1783
1784 #if defined (DMAMUX_CFR_CSOF14)
1785 /**
1786 * @brief Clear Synchronization Event Overrun Flag Channel 14.
1787 * @rmtoll CFR CSOF14 LL_DMAMUX_ClearFlag_SO14
1788 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1789 * @retval None
1790 */
1791 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO14(DMAMUX_Channel_TypeDef *DMAMUXx)
1792 {
1793 UNUSED(DMAMUXx);
1794 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF14);
1795 }
1796 #endif /* DMAMUX_CFR_CSOF14 */
1797
1798 #if defined (DMAMUX_CFR_CSOF15)
1799 /**
1800 * @brief Clear Synchronization Event Overrun Flag Channel 15.
1801 * @rmtoll CFR CSOF15 LL_DMAMUX_ClearFlag_SO15
1802 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1803 * @retval None
1804 */
1805 __STATIC_INLINE void LL_DMAMUX_ClearFlag_SO15(DMAMUX_Channel_TypeDef *DMAMUXx)
1806 {
1807 UNUSED(DMAMUXx);
1808 SET_BIT(DMAMUX1_ChannelStatus->CFR, DMAMUX_CFR_CSOF15);
1809 }
1810 #endif /* DMAMUX_CFR_CSOF15 */
1811
1812 /**
1813 * @brief Clear Request Generator 0 Trigger Event Overrun Flag.
1814 * @rmtoll RGCFR COF0 LL_DMAMUX_ClearFlag_RGO0
1815 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1816 * @retval None
1817 */
1818 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO0(DMAMUX_Channel_TypeDef *DMAMUXx)
1819 {
1820 UNUSED(DMAMUXx);
1821 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF0);
1822 }
1823
1824 /**
1825 * @brief Clear Request Generator 1 Trigger Event Overrun Flag.
1826 * @rmtoll RGCFR COF1 LL_DMAMUX_ClearFlag_RGO1
1827 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1828 * @retval None
1829 */
1830 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO1(DMAMUX_Channel_TypeDef *DMAMUXx)
1831 {
1832 UNUSED(DMAMUXx);
1833 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF1);
1834 }
1835
1836 /**
1837 * @brief Clear Request Generator 2 Trigger Event Overrun Flag.
1838 * @rmtoll RGCFR COF2 LL_DMAMUX_ClearFlag_RGO2
1839 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1840 * @retval None
1841 */
1842 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO2(DMAMUX_Channel_TypeDef *DMAMUXx)
1843 {
1844 UNUSED(DMAMUXx);
1845 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF2);
1846 }
1847
1848 /**
1849 * @brief Clear Request Generator 3 Trigger Event Overrun Flag.
1850 * @rmtoll RGCFR COF3 LL_DMAMUX_ClearFlag_RGO3
1851 * @param DMAMUXx DMAMUXx DMAMUXx Instance
1852 * @retval None
1853 */
1854 __STATIC_INLINE void LL_DMAMUX_ClearFlag_RGO3(DMAMUX_Channel_TypeDef *DMAMUXx)
1855 {
1856 UNUSED(DMAMUXx);
1857 SET_BIT(DMAMUX1_RequestGenStatus->RGCFR, DMAMUX_RGCFR_COF3);
1858 }
1859
1860 /**
1861 * @}
1862 */
1863
1864 /** @defgroup DMAMUX_LL_EF_IT_Management IT_Management
1865 * @{
1866 */
1867
1868 /**
1869 * @brief Enable the Synchronization Event Overrun Interrupt on DMAMUX channel x.
1870 * @rmtoll CxCR SOIE LL_DMAMUX_EnableIT_SO
1871 * @param DMAMUXx DMAMUXx Instance
1872 * @param Channel This parameter can be one of the following values:
1873 * @arg @ref LL_DMAMUX_CHANNEL_0
1874 * @arg @ref LL_DMAMUX_CHANNEL_1
1875 * @arg @ref LL_DMAMUX_CHANNEL_2
1876 * @arg @ref LL_DMAMUX_CHANNEL_3
1877 * @arg @ref LL_DMAMUX_CHANNEL_4
1878 * @arg @ref LL_DMAMUX_CHANNEL_5
1879 * @arg @ref LL_DMAMUX_CHANNEL_6
1880 * @arg @ref LL_DMAMUX_CHANNEL_7
1881 * @arg @ref LL_DMAMUX_CHANNEL_8
1882 * @arg @ref LL_DMAMUX_CHANNEL_9
1883 * @arg @ref LL_DMAMUX_CHANNEL_10
1884 * @arg @ref LL_DMAMUX_CHANNEL_11
1885 * @arg @ref LL_DMAMUX_CHANNEL_12
1886 * @arg @ref LL_DMAMUX_CHANNEL_13
1887 * @arg @ref LL_DMAMUX_CHANNEL_14
1888 * @arg @ref LL_DMAMUX_CHANNEL_15
1889 * @retval None
1890 */
1891 __STATIC_INLINE void LL_DMAMUX_EnableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1892 {
1893 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
1894
1895 SET_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR, DMAMUX_CxCR_SOIE);
1896 }
1897
1898 /**
1899 * @brief Disable the Synchronization Event Overrun Interrupt on DMAMUX channel x.
1900 * @rmtoll CxCR SOIE LL_DMAMUX_DisableIT_SO
1901 * @param DMAMUXx DMAMUXx Instance
1902 * @param Channel This parameter can be one of the following values:
1903 * @arg @ref LL_DMAMUX_CHANNEL_0
1904 * @arg @ref LL_DMAMUX_CHANNEL_1
1905 * @arg @ref LL_DMAMUX_CHANNEL_2
1906 * @arg @ref LL_DMAMUX_CHANNEL_3
1907 * @arg @ref LL_DMAMUX_CHANNEL_4
1908 * @arg @ref LL_DMAMUX_CHANNEL_5
1909 * @arg @ref LL_DMAMUX_CHANNEL_6
1910 * @arg @ref LL_DMAMUX_CHANNEL_7
1911 * @arg @ref LL_DMAMUX_CHANNEL_8
1912 * @arg @ref LL_DMAMUX_CHANNEL_9
1913 * @arg @ref LL_DMAMUX_CHANNEL_10
1914 * @arg @ref LL_DMAMUX_CHANNEL_11
1915 * @arg @ref LL_DMAMUX_CHANNEL_12
1916 * @arg @ref LL_DMAMUX_CHANNEL_13
1917 * @arg @ref LL_DMAMUX_CHANNEL_14
1918 * @arg @ref LL_DMAMUX_CHANNEL_15
1919 * @retval None
1920 */
1921 __STATIC_INLINE void LL_DMAMUX_DisableIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1922 {
1923 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
1924
1925 CLEAR_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
1926 DMAMUX_CxCR_SOIE);
1927 }
1928
1929 /**
1930 * @brief Check if the Synchronization Event Overrun Interrupt on DMAMUX channel x is enabled or disabled.
1931 * @rmtoll CxCR SOIE LL_DMAMUX_IsEnabledIT_SO
1932 * @param DMAMUXx DMAMUXx Instance
1933 * @param Channel This parameter can be one of the following values:
1934 * @arg @ref LL_DMAMUX_CHANNEL_0
1935 * @arg @ref LL_DMAMUX_CHANNEL_1
1936 * @arg @ref LL_DMAMUX_CHANNEL_2
1937 * @arg @ref LL_DMAMUX_CHANNEL_3
1938 * @arg @ref LL_DMAMUX_CHANNEL_4
1939 * @arg @ref LL_DMAMUX_CHANNEL_5
1940 * @arg @ref LL_DMAMUX_CHANNEL_6
1941 * @arg @ref LL_DMAMUX_CHANNEL_7
1942 * @arg @ref LL_DMAMUX_CHANNEL_8
1943 * @arg @ref LL_DMAMUX_CHANNEL_9
1944 * @arg @ref LL_DMAMUX_CHANNEL_10
1945 * @arg @ref LL_DMAMUX_CHANNEL_11
1946 * @arg @ref LL_DMAMUX_CHANNEL_12
1947 * @arg @ref LL_DMAMUX_CHANNEL_13
1948 * @arg @ref LL_DMAMUX_CHANNEL_14
1949 * @arg @ref LL_DMAMUX_CHANNEL_15
1950 * @retval State of bit (1 or 0).
1951 */
1952 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_SO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t Channel)
1953 {
1954 register uint32_t dma_base_addr = (uint32_t)DMAMUXx;
1955
1956 return (READ_BIT(((DMAMUX_Channel_TypeDef *)((uint32_t)(dma_base_addr + (DMAMUX_CCR_SIZE * (Channel)))))->CCR,
1957 DMAMUX_CxCR_SOIE));
1958 }
1959
1960 /**
1961 * @brief Enable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x.
1962 * @rmtoll RGxCR OIE LL_DMAMUX_EnableIT_RGO
1963 * @param DMAMUXx DMAMUXx Instance
1964 * @param RequestGenChannel This parameter can be one of the following values:
1965 * @arg @ref LL_DMAMUX_REQ_GEN_0
1966 * @arg @ref LL_DMAMUX_REQ_GEN_1
1967 * @arg @ref LL_DMAMUX_REQ_GEN_2
1968 * @arg @ref LL_DMAMUX_REQ_GEN_3
1969 * @retval None
1970 */
1971 __STATIC_INLINE void LL_DMAMUX_EnableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1972 {
1973 UNUSED(DMAMUXx);
1974 SET_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
1975 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_OIE);
1976 }
1977
1978 /**
1979 * @brief Disable the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x.
1980 * @rmtoll RGxCR OIE LL_DMAMUX_DisableIT_RGO
1981 * @param DMAMUXx DMAMUXx Instance
1982 * @param RequestGenChannel This parameter can be one of the following values:
1983 * @arg @ref LL_DMAMUX_REQ_GEN_0
1984 * @arg @ref LL_DMAMUX_REQ_GEN_1
1985 * @arg @ref LL_DMAMUX_REQ_GEN_2
1986 * @arg @ref LL_DMAMUX_REQ_GEN_3
1987 * @retval None
1988 */
1989 __STATIC_INLINE void LL_DMAMUX_DisableIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
1990 {
1991 UNUSED(DMAMUXx);
1992 CLEAR_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
1993 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_OIE);
1994 }
1995
1996 /**
1997 * @brief Check if the Request Generation Trigger Event Overrun Interrupt on DMAMUX channel x is enabled or disabled.
1998 * @rmtoll RGxCR OIE LL_DMAMUX_IsEnabledIT_RGO
1999 * @param DMAMUXx DMAMUXx Instance
2000 * @param RequestGenChannel This parameter can be one of the following values:
2001 * @arg @ref LL_DMAMUX_REQ_GEN_0
2002 * @arg @ref LL_DMAMUX_REQ_GEN_1
2003 * @arg @ref LL_DMAMUX_REQ_GEN_2
2004 * @arg @ref LL_DMAMUX_REQ_GEN_3
2005 * @retval State of bit (1 or 0).
2006 */
2007 __STATIC_INLINE uint32_t LL_DMAMUX_IsEnabledIT_RGO(DMAMUX_Channel_TypeDef *DMAMUXx, uint32_t RequestGenChannel)
2008 {
2009 UNUSED(DMAMUXx);
2010 return ((READ_BIT(((DMAMUX_RequestGen_TypeDef *)((uint32_t)((uint32_t)DMAMUX1_RequestGenerator0 + (DMAMUX_RGCR_SIZE *
2011 (RequestGenChannel)))))->RGCR, DMAMUX_RGxCR_OIE) == (DMAMUX_RGxCR_OIE)) ? 1UL : 0UL);
2012 }
2013
2014 /**
2015 * @}
2016 */
2017
2018 /**
2019 * @}
2020 */
2021
2022 /**
2023 * @}
2024 */
2025
2026 #endif /* DMAMUX1 */
2027
2028 /**
2029 * @}
2030 */
2031
2032 #ifdef __cplusplus
2033 }
2034 #endif
2035
2036 #endif /* __STM32G4xx_LL_DMAMUX_H */
2037
2038 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/