2 ******************************************************************************
3 * @file stm32g4xx_ll_utils.h
4 * @author MCD Application Team
5 * @brief Header file of UTILS LL module.
7 ==============================================================================
8 ##### How to use this driver #####
9 ==============================================================================
11 The LL UTILS driver contains a set of generic APIs that can be
13 (+) Device electronic signature
15 (+) PLL configuration functions
18 ******************************************************************************
21 * <h2><center>© Copyright (c) 2017 STMicroelectronics.
22 * All rights reserved.</center></h2>
24 * This software component is licensed by ST under BSD 3-Clause license,
25 * the "License"; You may not use this file except in compliance with the
26 * License. You may obtain a copy of the License at:
27 * opensource.org/licenses/BSD-3-Clause
29 ******************************************************************************
32 /* Define to prevent recursive inclusion -------------------------------------*/
33 #ifndef STM32G4xx_LL_UTILS_H
34 #define STM32G4xx_LL_UTILS_H
40 /* Includes ------------------------------------------------------------------*/
41 #include "stm32g4xx.h"
43 /** @addtogroup STM32G4xx_LL_Driver
47 /** @defgroup UTILS_LL UTILS
51 /* Private types -------------------------------------------------------------*/
52 /* Private variables ---------------------------------------------------------*/
54 /* Private constants ---------------------------------------------------------*/
55 /** @defgroup UTILS_LL_Private_Constants UTILS Private Constants
59 /* Max delay can be used in LL_mDelay */
60 #define LL_MAX_DELAY 0xFFFFFFFFU
63 * @brief Unique device ID register base address
65 #define UID_BASE_ADDRESS UID_BASE
68 * @brief Flash size data register base address
70 #define FLASHSIZE_BASE_ADDRESS FLASHSIZE_BASE
73 * @brief Package data register base address
75 #define PACKAGE_BASE_ADDRESS PACKAGE_BASE
81 /* Private macros ------------------------------------------------------------*/
82 /** @defgroup UTILS_LL_Private_Macros UTILS Private Macros
88 /* Exported types ------------------------------------------------------------*/
89 /** @defgroup UTILS_LL_ES_INIT UTILS Exported structures
93 * @brief UTILS PLL structure definition
97 uint32_t PLLM
; /*!< Division factor for PLL VCO input clock.
98 This parameter can be a value of @ref RCC_LL_EC_PLLM_DIV
100 This feature can be modified afterwards using unitary function
101 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
103 uint32_t PLLN
; /*!< Multiplication factor for PLL VCO output clock.
104 This parameter must be a number between Min_Data = 8 and Max_Data = 86
106 This feature can be modified afterwards using unitary function
107 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
109 uint32_t PLLR
; /*!< Division for the main system clock.
110 This parameter can be a value of @ref RCC_LL_EC_PLLR_DIV
112 This feature can be modified afterwards using unitary function
113 @ref LL_RCC_PLL_ConfigDomain_SYS(). */
114 } LL_UTILS_PLLInitTypeDef
;
117 * @brief UTILS System, AHB and APB buses clock configuration structure definition
121 uint32_t AHBCLKDivider
; /*!< The AHB clock (HCLK) divider. This clock is derived from the system clock (SYSCLK).
122 This parameter can be a value of @ref RCC_LL_EC_SYSCLK_DIV
124 This feature can be modified afterwards using unitary function
125 @ref LL_RCC_SetAHBPrescaler(). */
127 uint32_t APB1CLKDivider
; /*!< The APB1 clock (PCLK1) divider. This clock is derived from the AHB clock (HCLK).
128 This parameter can be a value of @ref RCC_LL_EC_APB1_DIV
130 This feature can be modified afterwards using unitary function
131 @ref LL_RCC_SetAPB1Prescaler(). */
133 uint32_t APB2CLKDivider
; /*!< The APB2 clock (PCLK2) divider. This clock is derived from the AHB clock (HCLK).
134 This parameter can be a value of @ref RCC_LL_EC_APB2_DIV
136 This feature can be modified afterwards using unitary function
137 @ref LL_RCC_SetAPB2Prescaler(). */
139 } LL_UTILS_ClkInitTypeDef
;
145 /* Exported constants --------------------------------------------------------*/
146 /** @defgroup UTILS_LL_Exported_Constants UTILS Exported Constants
150 /** @defgroup UTILS_EC_HSE_BYPASS HSE Bypass activation
153 #define LL_UTILS_HSEBYPASS_OFF 0x00000000U /*!< HSE Bypass is not enabled */
154 #define LL_UTILS_HSEBYPASS_ON 0x00000001U /*!< HSE Bypass is enabled */
159 /** @defgroup UTILS_EC_PACKAGETYPE PACKAGE TYPE
162 #define LL_UTILS_PACKAGETYPE_LQFP64 0x00000000U /*!< LQFP64 package type */
163 #define LL_UTILS_PACKAGETYPE_LQFP100 0x00000002U /*!< LQFP100 package type */
164 #define LL_UTILS_PACKAGETYPE_WLCSP81 0x00000005U /*!< WLCSP81 package type */
165 #define LL_UTILS_PACKAGETYPE_LQFP128 0x00000007U /*!< LQFP128 package type */
166 #define LL_UTILS_PACKAGETYPE_UFQFPN32 0x00000008U /*!< UFQFPN32 package type */
167 #define LL_UTILS_PACKAGETYPE_LQFP32 0x00000009U /*!< LQFP32 package type */
168 #define LL_UTILS_PACKAGETYPE_UFQFPN48 0x0000000AU /*!< UFQFPN48 package type */
169 #define LL_UTILS_PACKAGETYPE_LQFP48 0x0000000BU /*!< LQFP48 package type */
170 #define LL_UTILS_PACKAGETYPE_WLCSP49 0x0000000CU /*!< WLCSP49 package type */
171 #define LL_UTILS_PACKAGETYPE_UFBGA64 0x0000000DU /*!< UFBGA64 package type */
172 #define LL_UTILS_PACKAGETYPE_UFBGA100 0x0000000EU /*!< UFBGA100 package type */
173 #define LL_UTILS_PACKAGETYPE_LQFP48_EBIKE 0x00000010U /*!< LQFP48 EBIKE package type */
183 /* Exported macro ------------------------------------------------------------*/
185 /* Exported functions --------------------------------------------------------*/
186 /** @defgroup UTILS_LL_Exported_Functions UTILS Exported Functions
190 /** @defgroup UTILS_EF_DEVICE_ELECTRONIC_SIGNATURE DEVICE ELECTRONIC SIGNATURE
195 * @brief Get Word0 of the unique device identifier (UID based on 96 bits)
196 * @retval UID[31:0]: X and Y coordinates on the wafer expressed in BCD format
198 __STATIC_INLINE
uint32_t LL_GetUID_Word0(void)
200 return (uint32_t)(READ_REG(*((uint32_t *)UID_BASE_ADDRESS
)));
204 * @brief Get Word1 of the unique device identifier (UID based on 96 bits)
205 * @retval UID[63:32]: Wafer number (UID[39:32]) & LOT_NUM[23:0] (UID[63:40])
207 __STATIC_INLINE
uint32_t LL_GetUID_Word1(void)
209 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS
+ 4U))));
213 * @brief Get Word2 of the unique device identifier (UID based on 96 bits)
214 * @retval UID[95:64]: Lot number (ASCII encoded) - LOT_NUM[55:24]
216 __STATIC_INLINE
uint32_t LL_GetUID_Word2(void)
218 return (uint32_t)(READ_REG(*((uint32_t *)(UID_BASE_ADDRESS
+ 8U))));
222 * @brief Get Flash memory size
223 * @note This bitfield indicates the size of the device Flash memory expressed in
224 * Kbytes. As an example, 0x040 corresponds to 64 Kbytes.
225 * @retval FLASH_SIZE[15:0]: Flash memory size
227 __STATIC_INLINE
uint32_t LL_GetFlashSize(void)
229 return (uint32_t)(READ_REG(*((uint32_t *)FLASHSIZE_BASE_ADDRESS
)) & 0x0000FFFFUL
);
233 * @brief Get Package type
234 * @retval Returned value can be one of the following values:
235 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP64
236 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP100
237 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP81
238 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP128
239 * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN32
240 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP32
241 * @arg @ref LL_UTILS_PACKAGETYPE_UFQFPN48
242 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP48
243 * @arg @ref LL_UTILS_PACKAGETYPE_WLCSP49
244 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA64
245 * @arg @ref LL_UTILS_PACKAGETYPE_UFBGA100
246 * @arg @ref LL_UTILS_PACKAGETYPE_LQFP48_EBIKE
249 __STATIC_INLINE
uint32_t LL_GetPackageType(void)
251 return (uint32_t)(READ_REG(*((uint32_t *)PACKAGE_BASE_ADDRESS
)) & 0x1FU
);
258 /** @defgroup UTILS_LL_EF_DELAY DELAY
263 * @brief This function configures the Cortex-M SysTick source of the time base.
264 * @param HCLKFrequency HCLK frequency in Hz (can be calculated thanks to RCC helper macro)
265 * @note When a RTOS is used, it is recommended to avoid changing the SysTick
266 * configuration by calling this function, for a delay use rather osDelay RTOS service.
267 * @param Ticks Number of ticks
270 __STATIC_INLINE
void LL_InitTick(uint32_t HCLKFrequency
, uint32_t Ticks
)
272 /* Configure the SysTick to have interrupt in 1ms time base */
273 SysTick
->LOAD
= (uint32_t)((HCLKFrequency
/ Ticks
) - 1UL); /* set reload register */
274 SysTick
->VAL
= 0UL; /* Load the SysTick Counter Value */
275 SysTick
->CTRL
= SysTick_CTRL_CLKSOURCE_Msk
|
276 SysTick_CTRL_ENABLE_Msk
; /* Enable the Systick Timer */
279 void LL_Init1msTick(uint32_t HCLKFrequency
);
280 void LL_mDelay(uint32_t Delay
);
286 /** @defgroup UTILS_EF_SYSTEM SYSTEM
290 void LL_SetSystemCoreClock(uint32_t HCLKFrequency
);
291 ErrorStatus
LL_PLL_ConfigSystemClock_HSI(LL_UTILS_PLLInitTypeDef
*UTILS_PLLInitStruct
,
292 LL_UTILS_ClkInitTypeDef
*UTILS_ClkInitStruct
);
293 ErrorStatus
LL_PLL_ConfigSystemClock_HSE(uint32_t HSEFrequency
, uint32_t HSEBypass
,
294 LL_UTILS_PLLInitTypeDef
*UTILS_PLLInitStruct
, LL_UTILS_ClkInitTypeDef
*UTILS_ClkInitStruct
);
316 #endif /* STM32G4xx_LL_UTILS_H */
318 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/