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Merge pull request #11189 from klutvott123/move-telemetry-displayport-init
[betaflight.git] / lib / main / STM32G4 / Drivers / STM32G4xx_HAL_Driver / Src / stm32g4xx_hal_dac.c
blobf2b5731188023250ba1041a86d466d935f4b82f2
1 /**
2 ******************************************************************************
3 * @file stm32g4xx_hal_dac.c
4 * @author MCD Application Team
5 * @brief DAC HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Digital to Analog Converter (DAC) peripheral:
8 * + Initialization and de-initialization functions
9 * + IO operation functions
10 * + Peripheral Control functions
11 * + Peripheral State and Errors functions
12 *
13 *
14 @verbatim
15 ==============================================================================
16 ##### DAC Peripheral features #####
17 ==============================================================================
18 [..]
19 *** DAC Channels ***
20 ====================
21 [..]
22 STM32G4 devices integrate up to seven 12-bit Digital Analog Converters,
23 up to six of them grouped by pair forming a DAC instance.
24
25 The 2 converters of an single instance (i.e. channel1 & channel2)
26 can be used independently or simultaneously (dual mode):
27 (#) DAC channel1 with DAC_OUT1 as output (not for all) or connected to on-chip
28 peripherals (ex. comparators, operational amplifier).
29 (#) DAC channel2 with DAC_OUT2 as output (not for all) or connected to on-chip
30 peripherals (ex. comparators, operational amplifier).
31 Note: when an instance only includes one converter, only independent mode is
32 supported by this converter.
33
34 STM32G4 instances & converters availability and output PIO mapping (DAC_OUTx):
35 ----------------------------------------------------------------------------
36 | DAC1 | DAC2 | DAC3 | DAC4 |
37 ----------------------------------------------------------------------------
38 Channel 1 | | YES | YES | YES | YES
39 | DAC_OUT1 | PA4 | PA6 | - | -
40 ----------------------------------------------------------------------------
41 Channel 2 | | YES | NO | YES | YES
42 | DAC_OUT2 | PA5 | - | - | -
43 ----------------------------------------------------------------------------
44 Note: On this STM32 serie, all devices do not include each DAC instances listed
45 above. Refer to device datasheet for DACx instance availability.
46
47 *** DAC Triggers ***
48 ====================
49 [..]
50 Digital to Analog conversion can be non-triggered using DAC_TRIGGER_NONE
51 and DAC_OUT1/DAC_OUT2 is available once writing to DHRx register.
52 [..]
53 Digital to Analog conversion can be triggered by:
54 (#) External event: EXTI Line 9 (any GPIOx_PIN_9) using DAC_TRIGGER_EXT_IT9.
55 The used pin (GPIOx_PIN_9) must be configured in input mode.
56
57 (#) Timers TRGO: TIM1, TIM2, TIM3, TIM4, TIM6, TIM7, TIM8 and TIM15
58 (DAC_TRIGGER_T2_TRGO, DAC_TRIGGER_T3_TRGO...)
59
60 (#) Software using DAC_TRIGGER_SOFTWARE
61
62 (#) HRTimer TRGO: HRTIM1 (1)
63 (DAC_TRIGGER_HRTIM_TRG01, DAC_TRIGGER_HRTIM_TRG02...)
64
65 [..]
66 Specific triggers for sawtooth generation:
67 (#) External event: EXTI Line 10 (any GPIOx_PIN_10) using DAC_TRIGGER_EXT_IT10.
68 The used pin (GPIOx_PIN_10) must be configured in input mode.
69
70 (#) HRTimer Step & Reset: HRTIM1 (1)
71 (DAC_TRIGGER_HRTIM_RST_TRG1, DAC_TRIGGER_HRTIM_STEP_TRG1...)
72
73 Note: On this STM32 serie, parameter only available if HRTIM feature is
74 supported (refer to device datasheet for supported features list)
75
76 *** DAC Buffer mode feature ***
77 ===============================
78 [..]
79 Each DAC channel integrates an output buffer that can be used to
80 reduce the output impedance, and to drive external loads directly
81 without having to add an external operational amplifier.
82 To enable, the output buffer use
83 sConfig.DAC_OutputBuffer = DAC_OUTPUTBUFFER_ENABLE;
84 [..]
85 (@) Refer to the device datasheet for more details about output
86 impedance value with and without output buffer.
87
88 *** DAC connect feature ***
89 ===============================
90 [..]
91 Each DAC channel can be connected internally.
92 To connect, use
93 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_INTERNAL;
94 or
95 sConfig.DAC_ConnectOnChipPeripheral = DAC_CHIPCONNECT_BOTH;
96
97 *** GPIO configurations guidelines ***
98 =====================
99 [..]
100 When a DAC channel is used (ex channel1 on PA4) and the other is not
101 (ex channel2 on PA5 is configured in Analog and disabled).
102 Channel1 may disturb channel2 as coupling effect.
103 Note that there is no coupling on channel2 as soon as channel2 is turned on.
104 Coupling on adjacent channel could be avoided as follows:
105 when unused PA5 is configured as INPUT PULL-UP or DOWN.
106 PA5 is configured in ANALOG just before it is turned on.
107
108 *** DAC Sample and Hold feature ***
109 ========================
110 [..]
111 For each converter, 2 modes are supported: normal mode and
112 "sample and hold" mode (i.e. low power mode).
113 In the sample and hold mode, the DAC core converts data, then holds the
114 converted voltage on a capacitor. When not converting, the DAC cores and
115 buffer are completely turned off between samples and the DAC output is
116 tri-stated, therefore reducing the overall power consumption. A new
117 stabilization period is needed before each new conversion.
118
119 The sample and hold allow setting internal or external voltage @
120 low power consumption cost (output value can be at any given rate either
121 by CPU or DMA).
122
123 The Sample and hold block and registers uses either LSI & run in
124 several power modes: run mode, sleep mode, low power run, low power sleep
125 mode & stop1 mode.
126
127 Low power stop1 mode allows only static conversion.
128
129 To enable Sample and Hold mode
130 Enable LSI using HAL_RCC_OscConfig with RCC_OSCILLATORTYPE_LSI &
131 RCC_LSI_ON parameters.
132
133 Use DAC_InitStructure.DAC_SampleAndHold = DAC_SAMPLEANDHOLD_ENABLE;
134 & DAC_ChannelConfTypeDef.DAC_SampleAndHoldConfig.DAC_SampleTime,
135 DAC_HoldTime & DAC_RefreshTime;
136
137
138
139 *** DAC calibration feature ***
140 ===================================
141 [..]
142 (#) The 2 converters (channel1 & channel2) provide calibration capabilities.
143 (++) Calibration aims at correcting some offset of output buffer.
144 (++) The DAC uses either factory calibration settings OR user defined
145 calibration (trimming) settings (i.e. trimming mode).
146 (++) The user defined settings can be figured out using self calibration
147 handled by HAL_DACEx_SelfCalibrate.
148 (++) HAL_DACEx_SelfCalibrate:
149 (+++) Runs automatically the calibration.
150 (+++) Enables the user trimming mode
151 (+++) Updates a structure with trimming values with fresh calibration
152 results.
153 The user may store the calibration results for larger
154 (ex monitoring the trimming as a function of temperature
155 for instance)
156
157 *** DAC wave generation feature ***
158 ===================================
159 [..]
160 Both DAC channels can be used to generate
161 (#) Noise wave
162 (#) Triangle wave
163 (#) Sawtooth wave
164
165 *** DAC data format ***
166 =======================
167 [..]
168 The DAC data format can be:
169 (#) 8-bit right alignment using DAC_ALIGN_8B_R
170 (#) 12-bit left alignment using DAC_ALIGN_12B_L
171 (#) 12-bit right alignment using DAC_ALIGN_12B_R
172
173 *** DAC data value to voltage correspondence ***
174 ================================================
175 [..]
176 The analog output voltage on each DAC channel pin is determined
177 by the following equation:
178 [..]
179 DAC_OUTx = VREF+ * DOR / 4095
180 (+) with DOR is the Data Output Register
181 [..]
182 VEF+ is the input voltage reference (refer to the device datasheet)
183 [..]
184 e.g. To set DAC_OUT1 to 0.7V, use
185 (+) Assuming that VREF+ = 3.3V, DAC_OUT1 = (3.3 * 868) / 4095 = 0.7V
186
187 *** DMA requests ***
188 =====================
189 [..]
190 A DMAMUX request can be generated when an external trigger (but not a software trigger)
191 occurs if DMAMUX requests are enabled using HAL_DAC_Start_DMA().
192 DMAMUX requests are mapped as following:
193 ----------------------------------------------------------------------------
194 | DAC1 | DAC2 | DAC3 | DAC4 |
195 ----------------------------------------------------------------------------
196 Channel 1 | | 6 | 41 | 102 | 104
197 ----------------------------------------------------------------------------
198 Channel 2 | | 7 | - | 103 | 105
199 ----------------------------------------------------------------------------
200 Note: On this STM32 serie, all devices do not include each DAC instances listed
201 above. Refer to device datasheet for DACx instance availability.
202
203 *** High frequency interface mode ***
204 =====================================
205 [..]
206 The high frequency interface informs DAC instance about the bus frequency in use.
207 It is mandatory information for DAC (as internal timing of DAC is bus frequency dependent)
208 provided thanks to parameter DAC_HighFrequency handled in HAL_DAC_ConfigChannel () function.
209 Use of DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC value of DAC_HighFrequency is recommended
210 function figured out the correct setting.
211 The high frequency mode is same for all converters of a same DAC instance. Either same
212 parameter DAC_HighFrequency is used for all DAC converters or again self
213 DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC detection parameter.
214
215 [..]
216 (@) For Dual mode and specific signal (Sawtooth, triangle and noise) generation
217 please refer to Extended Features Driver description
218
219 ##### How to use this driver #####
220 ==============================================================================
221 [..]
222 (+) DAC APB clock must be enabled to get write access to DAC
223 registers using HAL_DAC_Init()
224 (+) If available & needed, configure DAC_OUTx (DAC_OUT1, DAC_OUT2) in analog mode.
225 (+) Configure the DAC channel using HAL_DAC_ConfigChannel() function.
226 (+) Enable the DAC channel using HAL_DAC_Start() or HAL_DAC_Start_DMA() functions.
227
228 *** Calibration mode IO operation ***
229 ======================================
230 [..]
231 (+) Retrieve the factory trimming (calibration settings) using HAL_DACEx_GetTrimOffset()
232 (+) Run the calibration using HAL_DACEx_SelfCalibrate()
233 (+) Update the trimming while DAC running using HAL_DACEx_SetUserTrimming()
234
235 *** Polling mode IO operation ***
236 =================================
237 [..]
238 (+) Start the DAC peripheral using HAL_DAC_Start()
239 (+) To read the DAC last data output value, use the HAL_DAC_GetValue() function.
240 (+) Stop the DAC peripheral using HAL_DAC_Stop()
241
242 *** DMA mode IO operation ***
243 ==============================
244 [..]
245 (+) Start the DAC peripheral using HAL_DAC_Start_DMA(), at this stage the user specify the length
246 of data to be transferred at each end of conversion
247 First issued trigger will start the conversion of the value previously set by HAL_DAC_SetValue().
248 (+) At the middle of data transfer HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
249 function is executed and user can add his own code by customization of function pointer
250 HAL_DAC_ConvHalfCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
251 (+) At The end of data transfer HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
252 function is executed and user can add his own code by customization of function pointer
253 HAL_DAC_ConvCpltCallbackCh1() or HAL_DACEx_ConvHalfCpltCallbackCh2()
254 (+) In case of transfer Error, HAL_DAC_ErrorCallbackCh1() function is executed and user can
255 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1
256 (+) In case of DMA underrun, DAC interruption triggers and execute internal function HAL_DAC_IRQHandler.
257 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2()
258 function is executed and user can add his own code by customization of function pointer
259 HAL_DAC_DMAUnderrunCallbackCh1() or HAL_DACEx_DMAUnderrunCallbackCh2() and
260 add his own code by customization of function pointer HAL_DAC_ErrorCallbackCh1()
261 (+) Stop the DAC peripheral using HAL_DAC_Stop_DMA()
262
263 *** Callback registration ***
264 =============================================
265 [..]
266 The compilation define USE_HAL_DAC_REGISTER_CALLBACKS when set to 1
267 allows the user to configure dynamically the driver callbacks.
268
269 Use Functions @ref HAL_DAC_RegisterCallback() to register a user callback,
270 it allows to register following callbacks:
271 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
272 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
273 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
274 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
275 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
276 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
277 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
278 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
279 (+) MspInitCallback : DAC MspInit.
280 (+) MspDeInitCallback : DAC MspdeInit.
281 This function takes as parameters the HAL peripheral handle, the Callback ID
282 and a pointer to the user callback function.
283
284 Use function @ref HAL_DAC_UnRegisterCallback() to reset a callback to the default
285 weak (surcharged) function. It allows to reset following callbacks:
286 (+) ConvCpltCallbackCh1 : callback when a half transfer is completed on Ch1.
287 (+) ConvHalfCpltCallbackCh1 : callback when a transfer is completed on Ch1.
288 (+) ErrorCallbackCh1 : callback when an error occurs on Ch1.
289 (+) DMAUnderrunCallbackCh1 : callback when an underrun error occurs on Ch1.
290 (+) ConvCpltCallbackCh2 : callback when a half transfer is completed on Ch2.
291 (+) ConvHalfCpltCallbackCh2 : callback when a transfer is completed on Ch2.
292 (+) ErrorCallbackCh2 : callback when an error occurs on Ch2.
293 (+) DMAUnderrunCallbackCh2 : callback when an underrun error occurs on Ch2.
294 (+) MspInitCallback : DAC MspInit.
295 (+) MspDeInitCallback : DAC MspdeInit.
296 (+) All Callbacks
297 This function) takes as parameters the HAL peripheral handle and the Callback ID.
298
299 By default, after the @ref HAL_DAC_Init and if the state is HAL_DAC_STATE_RESET
300 all callbacks are reset to the corresponding legacy weak (surcharged) functions.
301 Exception done for MspInit and MspDeInit callbacks that are respectively
302 reset to the legacy weak (surcharged) functions in the @ref HAL_DAC_Init
303 and @ref HAL_DAC_DeInit only when these callbacks are null (not registered beforehand).
304 If not, MspInit or MspDeInit are not null, the @ref HAL_DAC_Init and @ref HAL_DAC_DeInit
305 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
306
307 Callbacks can be registered/unregistered in READY state only.
308 Exception done for MspInit/MspDeInit callbacks that can be registered/unregistered
309 in READY or RESET state, thus registered (user) MspInit/DeInit callbacks can be used
310 during the Init/DeInit.
311 In that case first register the MspInit/MspDeInit user callbacks
312 using @ref HAL_DAC_RegisterCallback before calling @ref HAL_DAC_DeInit
313 or @ref HAL_DAC_Init function.
314
315 When The compilation define USE_HAL_DAC_REGISTER_CALLBACKS is set to 0 or
316 not defined, the callback registering feature is not available
317 and weak (surcharged) callbacks are used.
318
319
320
321 *** DAC HAL driver macros list ***
322 =============================================
323 [..]
324 Below the list of most used macros in DAC HAL driver.
325
326 (+) __HAL_DAC_ENABLE : Enable the DAC peripheral
327 (+) __HAL_DAC_DISABLE : Disable the DAC peripheral
328 (+) __HAL_DAC_CLEAR_FLAG: Clear the DAC's pending flags
329 (+) __HAL_DAC_GET_FLAG: Get the selected DAC's flag status
330
331 [..]
332 (@) You can refer to the DAC HAL driver header file for more useful macros
333
334 @endverbatim
335 ******************************************************************************
336 * @attention
337 *
338 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
339 * All rights reserved.</center></h2>
340 *
341 * This software component is licensed by ST under BSD 3-Clause license,
342 * the "License"; You may not use this file except in compliance with the
343 * License. You may obtain a copy of the License at:
344 * opensource.org/licenses/BSD-3-Clause
345 *
346 ******************************************************************************
347 */
348
349 /* Includes ------------------------------------------------------------------*/
350 #include "stm32g4xx_hal.h"
351
352 /** @addtogroup STM32G4xx_HAL_Driver
353 * @{
354 */
355
356 #ifdef HAL_DAC_MODULE_ENABLED
357 #if defined(DAC1) || defined(DAC2) || defined(DAC3) ||defined (DAC4)
358
359 /** @defgroup DAC DAC
360 * @brief DAC driver modules
361 * @{
362 */
363
364 /* Private typedef -----------------------------------------------------------*/
365 /* Private define ------------------------------------------------------------*/
366 /* Private constants ---------------------------------------------------------*/
367 /** @addtogroup DAC_Private_Constants DAC Private Constants
368 * @{
369 */
370 #define TIMEOUT_DAC_CALIBCONFIG 1U /* 1 ms */
371 #define HFSEL_ENABLE_THRESHOLD_80MHZ 80000000U /* 80 MHz */
372 #define HFSEL_ENABLE_THRESHOLD_160MHZ 160000000U /* 160 MHz */
373
374 /**
375 * @}
376 */
377
378 /* Private macro -------------------------------------------------------------*/
379 /* Private macro -------------------------------------------------------------*/
380 /* Private variables ---------------------------------------------------------*/
381 /* Private function prototypes -----------------------------------------------*/
382 /* Exported functions -------------------------------------------------------*/
383
384 /** @defgroup DAC_Exported_Functions DAC Exported Functions
385 * @{
386 */
387
388 /** @defgroup DAC_Exported_Functions_Group1 Initialization and de-initialization functions
389 * @brief Initialization and Configuration functions
390 *
391 @verbatim
392 ==============================================================================
393 ##### Initialization and de-initialization functions #####
394 ==============================================================================
395 [..] This section provides functions allowing to:
396 (+) Initialize and configure the DAC.
397 (+) De-initialize the DAC.
398
399 @endverbatim
400 * @{
401 */
402
403 /**
404 * @brief Initialize the DAC peripheral according to the specified parameters
405 * in the DAC_InitStruct and initialize the associated handle.
406 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
407 * the configuration information for the specified DAC.
408 * @retval HAL status
409 */
410 HAL_StatusTypeDef HAL_DAC_Init(DAC_HandleTypeDef *hdac)
411 {
412 /* Check DAC handle */
413 if (hdac == NULL)
414 {
415 return HAL_ERROR;
416 }
417 /* Check the parameters */
418 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
419
420 if (hdac->State == HAL_DAC_STATE_RESET)
421 {
422 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
423 /* Init the DAC Callback settings */
424 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
425 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
426 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
427 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
428
429 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
430 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
431 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
432 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
433
434 if (hdac->MspInitCallback == NULL)
435 {
436 hdac->MspInitCallback = HAL_DAC_MspInit;
437 }
438 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
439
440 /* Allocate lock resource and initialize it */
441 hdac->Lock = HAL_UNLOCKED;
442
443 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
444 /* Init the low level hardware */
445 hdac->MspInitCallback(hdac);
446 #else
447 /* Init the low level hardware */
448 HAL_DAC_MspInit(hdac);
449 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
450 }
451
452 /* Initialize the DAC state*/
453 hdac->State = HAL_DAC_STATE_BUSY;
454
455 /* Set DAC error code to none */
456 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
457
458 /* Initialize the DAC state*/
459 hdac->State = HAL_DAC_STATE_READY;
460
461 /* Return function status */
462 return HAL_OK;
463 }
464
465 /**
466 * @brief Deinitialize the DAC peripheral registers to their default reset values.
467 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
468 * the configuration information for the specified DAC.
469 * @retval HAL status
470 */
471 HAL_StatusTypeDef HAL_DAC_DeInit(DAC_HandleTypeDef *hdac)
472 {
473 /* Check DAC handle */
474 if (hdac == NULL)
475 {
476 return HAL_ERROR;
477 }
478
479 /* Check the parameters */
480 assert_param(IS_DAC_ALL_INSTANCE(hdac->Instance));
481
482 /* Change DAC state */
483 hdac->State = HAL_DAC_STATE_BUSY;
484
485 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
486 if (hdac->MspDeInitCallback == NULL)
487 {
488 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
489 }
490 /* DeInit the low level hardware */
491 hdac->MspDeInitCallback(hdac);
492 #else
493 /* DeInit the low level hardware */
494 HAL_DAC_MspDeInit(hdac);
495 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
496
497 /* Set DAC error code to none */
498 hdac->ErrorCode = HAL_DAC_ERROR_NONE;
499
500 /* Change DAC state */
501 hdac->State = HAL_DAC_STATE_RESET;
502
503 /* Release Lock */
504 __HAL_UNLOCK(hdac);
505
506 /* Return function status */
507 return HAL_OK;
508 }
509
510 /**
511 * @brief Initialize the DAC MSP.
512 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
513 * the configuration information for the specified DAC.
514 * @retval None
515 */
516 __weak void HAL_DAC_MspInit(DAC_HandleTypeDef *hdac)
517 {
518 /* Prevent unused argument(s) compilation warning */
519 UNUSED(hdac);
520
521 /* NOTE : This function should not be modified, when the callback is needed,
522 the HAL_DAC_MspInit could be implemented in the user file
523 */
524 }
525
526 /**
527 * @brief DeInitialize the DAC MSP.
528 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
529 * the configuration information for the specified DAC.
530 * @retval None
531 */
532 __weak void HAL_DAC_MspDeInit(DAC_HandleTypeDef *hdac)
533 {
534 /* Prevent unused argument(s) compilation warning */
535 UNUSED(hdac);
536
537 /* NOTE : This function should not be modified, when the callback is needed,
538 the HAL_DAC_MspDeInit could be implemented in the user file
539 */
540 }
541
542 /**
543 * @}
544 */
545
546 /** @defgroup DAC_Exported_Functions_Group2 IO operation functions
547 * @brief IO operation functions
548 *
549 @verbatim
550 ==============================================================================
551 ##### IO operation functions #####
552 ==============================================================================
553 [..] This section provides functions allowing to:
554 (+) Start conversion.
555 (+) Stop conversion.
556 (+) Start conversion and enable DMA transfer.
557 (+) Stop conversion and disable DMA transfer.
558 (+) Get result of conversion.
559
560 @endverbatim
561 * @{
562 */
563
564 /**
565 * @brief Enables DAC and starts conversion of channel.
566 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
567 * the configuration information for the specified DAC.
568 * @param Channel The selected DAC channel.
569 * This parameter can be one of the following values:
570 * @arg DAC_CHANNEL_1: DAC Channel1 selected
571 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
572 *
573 * (1) On this STM32 serie, parameter not available on all instances.
574 * Refer to device datasheet for channels availability.
575 * @retval HAL status
576 */
577 HAL_StatusTypeDef HAL_DAC_Start(DAC_HandleTypeDef *hdac, uint32_t Channel)
578 {
579 /* Check the parameters */
580 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
581
582 /* Process locked */
583 __HAL_LOCK(hdac);
584
585 /* Change DAC state */
586 hdac->State = HAL_DAC_STATE_BUSY;
587
588 /* Enable the Peripheral */
589 __HAL_DAC_ENABLE(hdac, Channel);
590 /* Ensure minimum wait before using peripheral after enabling it */
591 HAL_Delay(1);
592
593 if (Channel == DAC_CHANNEL_1)
594 {
595 /* Check if software trigger enabled */
596 if ((hdac->Instance->CR & (DAC_CR_TEN1 | DAC_CR_TSEL1)) == DAC_CR_TEN1)
597 {
598 /* Enable the selected DAC software conversion */
599 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG1);
600 }
601 }
602 else
603 {
604 /* Check if software trigger enabled */
605 if ((hdac->Instance->CR & (DAC_CR_TEN2 | DAC_CR_TSEL2)) == DAC_CR_TEN2)
606 {
607 /* Enable the selected DAC software conversion*/
608 SET_BIT(hdac->Instance->SWTRIGR, DAC_SWTRIGR_SWTRIG2);
609 }
610 }
611
612 /* Change DAC state */
613 hdac->State = HAL_DAC_STATE_READY;
614
615 /* Process unlocked */
616 __HAL_UNLOCK(hdac);
617
618 /* Return function status */
619 return HAL_OK;
620 }
621
622 /**
623 * @brief Disables DAC and stop conversion of channel.
624 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
625 * the configuration information for the specified DAC.
626 * @param Channel The selected DAC channel.
627 * This parameter can be one of the following values:
628 * @arg DAC_CHANNEL_1: DAC Channel1 selected
629 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
630 *
631 * (1) On this STM32 serie, parameter not available on all instances.
632 * Refer to device datasheet for channels availability.
633 * @retval HAL status
634 */
635 HAL_StatusTypeDef HAL_DAC_Stop(DAC_HandleTypeDef *hdac, uint32_t Channel)
636 {
637 /* Check the parameters */
638 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
639
640 /* Disable the Peripheral */
641 __HAL_DAC_DISABLE(hdac, Channel);
642 /* Ensure minimum wait before enabling peripheral after disabling it */
643 HAL_Delay(1);
644
645 /* Change DAC state */
646 hdac->State = HAL_DAC_STATE_READY;
647
648 /* Return function status */
649 return HAL_OK;
650 }
651
652 /**
653 * @brief Enables DAC and starts conversion of channel.
654 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
655 * the configuration information for the specified DAC.
656 * @param Channel The selected DAC channel.
657 * This parameter can be one of the following values:
658 * @arg DAC_CHANNEL_1: DAC Channel1 selected
659 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
660 *
661 * (1) On this STM32 serie, parameter not available on all instances.
662 * Refer to device datasheet for channels availability.
663 * @param pData The destination peripheral Buffer address.
664 * @param Length The length of data to be transferred from memory to DAC peripheral
665 * @param Alignment Specifies the data alignment for DAC channel.
666 * This parameter can be one of the following values:
667 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
668 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
669 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
670 * @retval HAL status
671 */
672 HAL_StatusTypeDef HAL_DAC_Start_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t *pData, uint32_t Length,
673 uint32_t Alignment)
674 {
675 HAL_StatusTypeDef status;
676 uint32_t tmpreg = 0U;
677
678 /* Check the parameters */
679 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
680 assert_param(IS_DAC_ALIGN(Alignment));
681
682 /* Process locked */
683 __HAL_LOCK(hdac);
684
685 /* Change DAC state */
686 hdac->State = HAL_DAC_STATE_BUSY;
687
688 if (Channel == DAC_CHANNEL_1)
689 {
690 /* Set the DMA transfer complete callback for channel1 */
691 hdac->DMA_Handle1->XferCpltCallback = DAC_DMAConvCpltCh1;
692
693 /* Set the DMA half transfer complete callback for channel1 */
694 hdac->DMA_Handle1->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh1;
695
696 /* Set the DMA error callback for channel1 */
697 hdac->DMA_Handle1->XferErrorCallback = DAC_DMAErrorCh1;
698
699 /* Enable the selected DAC channel1 DMA request */
700 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
701
702 /* Case of use of channel 1 */
703 switch (Alignment)
704 {
705 case DAC_ALIGN_12B_R:
706 /* Get DHR12R1 address */
707 tmpreg = (uint32_t)&hdac->Instance->DHR12R1;
708 break;
709 case DAC_ALIGN_12B_L:
710 /* Get DHR12L1 address */
711 tmpreg = (uint32_t)&hdac->Instance->DHR12L1;
712 break;
713 case DAC_ALIGN_8B_R:
714 /* Get DHR8R1 address */
715 tmpreg = (uint32_t)&hdac->Instance->DHR8R1;
716 break;
717 default:
718 break;
719 }
720 }
721 else
722 {
723 /* Set the DMA transfer complete callback for channel2 */
724 hdac->DMA_Handle2->XferCpltCallback = DAC_DMAConvCpltCh2;
725
726 /* Set the DMA half transfer complete callback for channel2 */
727 hdac->DMA_Handle2->XferHalfCpltCallback = DAC_DMAHalfConvCpltCh2;
728
729 /* Set the DMA error callback for channel2 */
730 hdac->DMA_Handle2->XferErrorCallback = DAC_DMAErrorCh2;
731
732 /* Enable the selected DAC channel2 DMA request */
733 SET_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
734
735 /* Case of use of channel 2 */
736 switch (Alignment)
737 {
738 case DAC_ALIGN_12B_R:
739 /* Get DHR12R2 address */
740 tmpreg = (uint32_t)&hdac->Instance->DHR12R2;
741 break;
742 case DAC_ALIGN_12B_L:
743 /* Get DHR12L2 address */
744 tmpreg = (uint32_t)&hdac->Instance->DHR12L2;
745 break;
746 case DAC_ALIGN_8B_R:
747 /* Get DHR8R2 address */
748 tmpreg = (uint32_t)&hdac->Instance->DHR8R2;
749 break;
750 default:
751 break;
752 }
753 }
754
755 /* Enable the DMA channel */
756 if (Channel == DAC_CHANNEL_1)
757 {
758 /* Enable the DAC DMA underrun interrupt */
759 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR1);
760
761 /* Enable the DMA channel */
762 status = HAL_DMA_Start_IT(hdac->DMA_Handle1, (uint32_t)pData, tmpreg, Length);
763 }
764 else
765 {
766 /* Enable the DAC DMA underrun interrupt */
767 __HAL_DAC_ENABLE_IT(hdac, DAC_IT_DMAUDR2);
768
769 /* Enable the DMA channel */
770 status = HAL_DMA_Start_IT(hdac->DMA_Handle2, (uint32_t)pData, tmpreg, Length);
771 }
772
773 /* Process Unlocked */
774 __HAL_UNLOCK(hdac);
775
776 if (status == HAL_OK)
777 {
778 /* Enable the Peripheral */
779 __HAL_DAC_ENABLE(hdac, Channel);
780 /* Ensure minimum wait before using peripheral after enabling it */
781 HAL_Delay(1);
782 }
783 else
784 {
785 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
786 }
787
788 /* Return function status */
789 return status;
790 }
791
792 /**
793 * @brief Disables DAC and stop conversion of channel.
794 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
795 * the configuration information for the specified DAC.
796 * @param Channel The selected DAC channel.
797 * This parameter can be one of the following values:
798 * @arg DAC_CHANNEL_1: DAC Channel1 selected
799 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
800 *
801 * (1) On this STM32 serie, parameter not available on all instances.
802 * Refer to device datasheet for channels availability.
803 * @retval HAL status
804 */
805 HAL_StatusTypeDef HAL_DAC_Stop_DMA(DAC_HandleTypeDef *hdac, uint32_t Channel)
806 {
807 HAL_StatusTypeDef status;
808
809 /* Check the parameters */
810 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
811
812 /* Disable the selected DAC channel DMA request */
813 hdac->Instance->CR &= ~(DAC_CR_DMAEN1 << (Channel & 0x10UL));
814
815 /* Disable the Peripheral */
816 __HAL_DAC_DISABLE(hdac, Channel);
817 /* Ensure minimum wait before enabling peripheral after disabling it */
818 HAL_Delay(1);
819
820 /* Disable the DMA channel */
821
822 /* Channel1 is used */
823 if (Channel == DAC_CHANNEL_1)
824 {
825 /* Disable the DMA channel */
826 status = HAL_DMA_Abort(hdac->DMA_Handle1);
827
828 /* Disable the DAC DMA underrun interrupt */
829 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR1);
830 }
831 else /* Channel2 is used for */
832 {
833 /* Disable the DMA channel */
834 status = HAL_DMA_Abort(hdac->DMA_Handle2);
835
836 /* Disable the DAC DMA underrun interrupt */
837 __HAL_DAC_DISABLE_IT(hdac, DAC_IT_DMAUDR2);
838 }
839
840 /* Check if DMA Channel effectively disabled */
841 if (status != HAL_OK)
842 {
843 /* Update DAC state machine to error */
844 hdac->State = HAL_DAC_STATE_ERROR;
845 }
846 else
847 {
848 /* Change DAC state */
849 hdac->State = HAL_DAC_STATE_READY;
850 }
851
852 /* Return function status */
853 return status;
854 }
855
856 /**
857 * @brief Handles DAC interrupt request
858 * This function uses the interruption of DMA
859 * underrun.
860 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
861 * the configuration information for the specified DAC.
862 * @retval None
863 */
864 void HAL_DAC_IRQHandler(DAC_HandleTypeDef *hdac)
865 {
866 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR1))
867 {
868 /* Check underrun flag of DAC channel 1 */
869 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR1))
870 {
871 /* Change DAC state to error state */
872 hdac->State = HAL_DAC_STATE_ERROR;
873
874 /* Set DAC error code to chanel1 DMA underrun error */
875 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH1);
876
877 /* Clear the underrun flag */
878 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR1);
879
880 /* Disable the selected DAC channel1 DMA request */
881 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN1);
882
883 /* Error callback */
884 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
885 hdac->DMAUnderrunCallbackCh1(hdac);
886 #else
887 HAL_DAC_DMAUnderrunCallbackCh1(hdac);
888 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
889 }
890 }
891
892 if (__HAL_DAC_GET_IT_SOURCE(hdac, DAC_IT_DMAUDR2))
893 {
894 /* Check underrun flag of DAC channel 2 */
895 if (__HAL_DAC_GET_FLAG(hdac, DAC_FLAG_DMAUDR2))
896 {
897 /* Change DAC state to error state */
898 hdac->State = HAL_DAC_STATE_ERROR;
899
900 /* Set DAC error code to channel2 DMA underrun error */
901 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_DMAUNDERRUNCH2);
902
903 /* Clear the underrun flag */
904 __HAL_DAC_CLEAR_FLAG(hdac, DAC_FLAG_DMAUDR2);
905
906 /* Disable the selected DAC channel2 DMA request */
907 CLEAR_BIT(hdac->Instance->CR, DAC_CR_DMAEN2);
908
909 /* Error callback */
910 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
911 hdac->DMAUnderrunCallbackCh2(hdac);
912 #else
913 HAL_DACEx_DMAUnderrunCallbackCh2(hdac);
914 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
915 }
916 }
917 }
918
919 /**
920 * @brief Set the specified data holding register value for DAC channel.
921 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
922 * the configuration information for the specified DAC.
923 * @param Channel The selected DAC channel.
924 * This parameter can be one of the following values:
925 * @arg DAC_CHANNEL_1: DAC Channel1 selected
926 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
927 *
928 * (1) On this STM32 serie, parameter not available on all instances.
929 * Refer to device datasheet for channels availability.
930 * @param Alignment Specifies the data alignment.
931 * This parameter can be one of the following values:
932 * @arg DAC_ALIGN_8B_R: 8bit right data alignment selected
933 * @arg DAC_ALIGN_12B_L: 12bit left data alignment selected
934 * @arg DAC_ALIGN_12B_R: 12bit right data alignment selected
935 * @param Data Data to be loaded in the selected data holding register.
936 * @retval HAL status
937 */
938 HAL_StatusTypeDef HAL_DAC_SetValue(DAC_HandleTypeDef *hdac, uint32_t Channel, uint32_t Alignment, uint32_t Data)
939 {
940 __IO uint32_t tmp = 0;
941
942 /* Check the parameters */
943 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
944 assert_param(IS_DAC_ALIGN(Alignment));
945 /* In case DMA Double data mode is activated, DATA range is almost full uin32_t one: no check */
946 if ((hdac->Instance->MCR & (DAC_MCR_DMADOUBLE1 << (Channel & 0x10UL))) == 0UL)
947 {
948 assert_param(IS_DAC_DATA(Data));
949 }
950
951 tmp = (uint32_t)hdac->Instance;
952 if (Channel == DAC_CHANNEL_1)
953 {
954 tmp += DAC_DHR12R1_ALIGNMENT(Alignment);
955 }
956 else
957 {
958 tmp += DAC_DHR12R2_ALIGNMENT(Alignment);
959 }
960
961 /* Set the DAC channel selected data holding register */
962 *(__IO uint32_t *) tmp = Data;
963
964 /* Return function status */
965 return HAL_OK;
966 }
967
968 /**
969 * @brief Conversion complete callback in non-blocking mode for Channel1
970 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
971 * the configuration information for the specified DAC.
972 * @retval None
973 */
974 __weak void HAL_DAC_ConvCpltCallbackCh1(DAC_HandleTypeDef *hdac)
975 {
976 /* Prevent unused argument(s) compilation warning */
977 UNUSED(hdac);
978
979 /* NOTE : This function should not be modified, when the callback is needed,
980 the HAL_DAC_ConvCpltCallbackCh1 could be implemented in the user file
981 */
982 }
983
984 /**
985 * @brief Conversion half DMA transfer callback in non-blocking mode for Channel1
986 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
987 * the configuration information for the specified DAC.
988 * @retval None
989 */
990 __weak void HAL_DAC_ConvHalfCpltCallbackCh1(DAC_HandleTypeDef *hdac)
991 {
992 /* Prevent unused argument(s) compilation warning */
993 UNUSED(hdac);
994
995 /* NOTE : This function should not be modified, when the callback is needed,
996 the HAL_DAC_ConvHalfCpltCallbackCh1 could be implemented in the user file
997 */
998 }
999
1000 /**
1001 * @brief Error DAC callback for Channel1.
1002 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1003 * the configuration information for the specified DAC.
1004 * @retval None
1005 */
1006 __weak void HAL_DAC_ErrorCallbackCh1(DAC_HandleTypeDef *hdac)
1007 {
1008 /* Prevent unused argument(s) compilation warning */
1009 UNUSED(hdac);
1010
1011 /* NOTE : This function should not be modified, when the callback is needed,
1012 the HAL_DAC_ErrorCallbackCh1 could be implemented in the user file
1013 */
1014 }
1015
1016 /**
1017 * @brief DMA underrun DAC callback for channel1.
1018 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1019 * the configuration information for the specified DAC.
1020 * @retval None
1021 */
1022 __weak void HAL_DAC_DMAUnderrunCallbackCh1(DAC_HandleTypeDef *hdac)
1023 {
1024 /* Prevent unused argument(s) compilation warning */
1025 UNUSED(hdac);
1026
1027 /* NOTE : This function should not be modified, when the callback is needed,
1028 the HAL_DAC_DMAUnderrunCallbackCh1 could be implemented in the user file
1029 */
1030 }
1031
1032 /**
1033 * @}
1034 */
1035
1036 /** @defgroup DAC_Exported_Functions_Group3 Peripheral Control functions
1037 * @brief Peripheral Control functions
1038 *
1039 @verbatim
1040 ==============================================================================
1041 ##### Peripheral Control functions #####
1042 ==============================================================================
1043 [..] This section provides functions allowing to:
1044 (+) Configure channels.
1045 (+) Set the specified data holding register value for DAC channel.
1046
1047 @endverbatim
1048 * @{
1049 */
1050
1051 /**
1052 * @brief Returns the last data output value of the selected DAC channel.
1053 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1054 * the configuration information for the specified DAC.
1055 * @param Channel The selected DAC channel.
1056 * This parameter can be one of the following values:
1057 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1058 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
1059 *
1060 * (1) On this STM32 serie, parameter not available on all instances.
1061 * Refer to device datasheet for channels availability.
1062 * @retval The selected DAC channel data output value.
1063 */
1064 uint32_t HAL_DAC_GetValue(DAC_HandleTypeDef *hdac, uint32_t Channel)
1065 {
1066 /* Check the parameters */
1067 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
1068
1069 /* Returns the DAC channel data output register value */
1070 if (Channel == DAC_CHANNEL_1)
1071 {
1072 return hdac->Instance->DOR1;
1073 }
1074 else
1075 {
1076 return hdac->Instance->DOR2;
1077 }
1078 }
1079
1080 /**
1081 * @brief Configures the selected DAC channel.
1082 * @note By calling this function, the high frequency interface mode (HFSEL bits)
1083 * will be set. This parameter scope is the DAC instance. As the function
1084 * is called for each channel, the @ref DAC_HighFrequency of @arg sConfig
1085 * must be the same at each call.
1086 * (or DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC self detect).
1087 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1088 * the configuration information for the specified DAC.
1089 * @param sConfig DAC configuration structure.
1090 * @param Channel The selected DAC channel.
1091 * This parameter can be one of the following values:
1092 * @arg DAC_CHANNEL_1: DAC Channel1 selected
1093 * @arg DAC_CHANNEL_2: DAC Channel2 selected (1)
1094 *
1095 * (1) On this STM32 serie, parameter not available on all instances.
1096 * Refer to device datasheet for channels availability.
1097 * @retval HAL status
1098 */
1099 HAL_StatusTypeDef HAL_DAC_ConfigChannel(DAC_HandleTypeDef *hdac, DAC_ChannelConfTypeDef *sConfig, uint32_t Channel)
1100 {
1101 uint32_t tmpreg1;
1102 uint32_t tmpreg2;
1103 uint32_t tickstart = 0U;
1104 uint32_t hclkfreq;
1105 uint32_t connectOnChip;
1106
1107 /* Check the DAC parameters */
1108 assert_param(IS_DAC_HIGH_FREQUENCY_MODE(sConfig->DAC_HighFrequency));
1109 assert_param(IS_DAC_TRIGGER(hdac->Instance, sConfig->DAC_Trigger));
1110 assert_param(IS_DAC_TRIGGER(hdac->Instance, sConfig->DAC_Trigger2));
1111 assert_param(IS_DAC_OUTPUT_BUFFER_STATE(sConfig->DAC_OutputBuffer));
1112 assert_param(IS_DAC_CHIP_CONNECTION(sConfig->DAC_ConnectOnChipPeripheral));
1113 assert_param(IS_DAC_TRIMMING(sConfig->DAC_UserTrimming));
1114 if ((sConfig->DAC_UserTrimming) == DAC_TRIMMING_USER)
1115 {
1116 assert_param(IS_DAC_TRIMMINGVALUE(sConfig->DAC_TrimmingValue));
1117 }
1118 assert_param(IS_DAC_SAMPLEANDHOLD(sConfig->DAC_SampleAndHold));
1119 if ((sConfig->DAC_SampleAndHold) == DAC_SAMPLEANDHOLD_ENABLE)
1120 {
1121 assert_param(IS_DAC_SAMPLETIME(sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime));
1122 assert_param(IS_DAC_HOLDTIME(sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime));
1123 assert_param(IS_DAC_REFRESHTIME(sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime));
1124 }
1125 assert_param(IS_DAC_CHANNEL(hdac->Instance, Channel));
1126 assert_param(IS_FUNCTIONAL_STATE(sConfig->DAC_DMADoubleDataMode));
1127 assert_param(IS_FUNCTIONAL_STATE(sConfig->DAC_SignedFormat));
1128
1129 /* Process locked */
1130 __HAL_LOCK(hdac);
1131
1132 /* Change DAC state */
1133 hdac->State = HAL_DAC_STATE_BUSY;
1134
1135 if (sConfig->DAC_SampleAndHold == DAC_SAMPLEANDHOLD_ENABLE)
1136 /* Sample on old configuration */
1137 {
1138 /* SampleTime */
1139 if (Channel == DAC_CHANNEL_1)
1140 {
1141 /* Get timeout */
1142 tickstart = HAL_GetTick();
1143
1144 /* SHSR1 can be written when BWST1 is cleared */
1145 while (((hdac->Instance->SR) & DAC_SR_BWST1) != 0UL)
1146 {
1147 /* Check for the Timeout */
1148 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1149 {
1150 /* Update error code */
1151 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1152
1153 /* Change the DMA state */
1154 hdac->State = HAL_DAC_STATE_TIMEOUT;
1155
1156 return HAL_TIMEOUT;
1157 }
1158 }
1159 HAL_Delay(1);
1160 hdac->Instance->SHSR1 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1161 }
1162 else /* Channel 2 */
1163 {
1164 /* SHSR2 can be written when BWST2 is cleared */
1165
1166 while (((hdac->Instance->SR) & DAC_SR_BWST2) != 0UL)
1167 {
1168 /* Check for the Timeout */
1169 if ((HAL_GetTick() - tickstart) > TIMEOUT_DAC_CALIBCONFIG)
1170 {
1171 /* Update error code */
1172 SET_BIT(hdac->ErrorCode, HAL_DAC_ERROR_TIMEOUT);
1173
1174 /* Change the DMA state */
1175 hdac->State = HAL_DAC_STATE_TIMEOUT;
1176
1177 return HAL_TIMEOUT;
1178 }
1179 }
1180 HAL_Delay(1U);
1181 hdac->Instance->SHSR2 = sConfig->DAC_SampleAndHoldConfig.DAC_SampleTime;
1182 }
1183
1184 /* HoldTime */
1185 MODIFY_REG(hdac->Instance->SHHR, DAC_SHHR_THOLD1 << (Channel & 0x10UL), (sConfig->DAC_SampleAndHoldConfig.DAC_HoldTime) << (Channel & 0x10UL));
1186 /* RefreshTime */
1187 MODIFY_REG(hdac->Instance->SHRR, DAC_SHRR_TREFRESH1 << (Channel & 0x10UL), (sConfig->DAC_SampleAndHoldConfig.DAC_RefreshTime) << (Channel & 0x10UL));
1188 }
1189
1190 if (sConfig->DAC_UserTrimming == DAC_TRIMMING_USER)
1191 /* USER TRIMMING */
1192 {
1193 /* Get the DAC CCR value */
1194 tmpreg1 = hdac->Instance->CCR;
1195 /* Clear trimming value */
1196 tmpreg1 &= ~(((uint32_t)(DAC_CCR_OTRIM1)) << (Channel & 0x10UL));
1197 /* Configure for the selected trimming offset */
1198 tmpreg2 = sConfig->DAC_TrimmingValue;
1199 /* Calculate CCR register value depending on DAC_Channel */
1200 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1201 /* Write to DAC CCR */
1202 hdac->Instance->CCR = tmpreg1;
1203 }
1204 /* else factory trimming is used (factory setting are available at reset)*/
1205 /* SW Nothing has nothing to do */
1206
1207 /* Get the DAC MCR value */
1208 tmpreg1 = hdac->Instance->MCR;
1209 /* Clear DAC_MCR_MODEx bits */
1210 tmpreg1 &= ~(((uint32_t)(DAC_MCR_MODE1)) << (Channel & 0x10UL));
1211 /* Configure for the selected DAC channel: mode, buffer output & on chip peripheral connect */
1212 if ((sConfig->DAC_ConnectOnChipPeripheral & DAC_CHIPCONNECT_EXTERNAL) == DAC_CHIPCONNECT_EXTERNAL)
1213 {
1214 connectOnChip = 0x00000000UL;
1215 }
1216 else if ((sConfig->DAC_ConnectOnChipPeripheral & DAC_CHIPCONNECT_INTERNAL) == DAC_CHIPCONNECT_INTERNAL)
1217 {
1218 connectOnChip = DAC_MCR_MODE1_0;
1219 }
1220 else /* (sConfig->DAC_ConnectOnChipPeripheral & DAC_CHIPCONNECT_BOTH) == DAC_CHIPCONNECT_BOTH */
1221 {
1222 if (sConfig->DAC_OutputBuffer == DAC_OUTPUTBUFFER_ENABLE)
1223 {
1224 connectOnChip = DAC_MCR_MODE1_0;
1225 }
1226 else
1227 {
1228 connectOnChip = 0x00000000UL;
1229 }
1230 }
1231 tmpreg2 = (sConfig->DAC_SampleAndHold | sConfig->DAC_OutputBuffer | connectOnChip);
1232 /* Clear DAC_MCR_DMADOUBLEx */
1233 tmpreg1 &= ~(((uint32_t)(DAC_MCR_DMADOUBLE1)) << (Channel & 0x10UL));
1234 /* Configure for the selected DAC channel: DMA double data mode */
1235 tmpreg2 |= (sConfig->DAC_DMADoubleDataMode == ENABLE) ? DAC_MCR_DMADOUBLE1 : 0UL;
1236 /* Clear DAC_MCR_SINFORMATx */
1237 tmpreg1 &= ~(((uint32_t)(DAC_MCR_SINFORMAT1)) << (Channel & 0x10UL));
1238 /* Configure for the selected DAC channel: Signed format */
1239 tmpreg2 |= (sConfig->DAC_SignedFormat == ENABLE) ? DAC_MCR_SINFORMAT1 : 0UL;
1240 /* Clear DAC_MCR_HFSEL bits */
1241 tmpreg1 &= ~(DAC_MCR_HFSEL);
1242 /* Configure for both DAC channels: high frequency mode */
1243 if (DAC_HIGH_FREQUENCY_INTERFACE_MODE_AUTOMATIC == sConfig->DAC_HighFrequency)
1244 {
1245 hclkfreq = HAL_RCC_GetHCLKFreq();
1246 if (hclkfreq > HFSEL_ENABLE_THRESHOLD_160MHZ)
1247 {
1248 tmpreg1 |= DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_160MHZ;
1249 }
1250 else if (hclkfreq > HFSEL_ENABLE_THRESHOLD_80MHZ)
1251 {
1252 tmpreg1 |= DAC_HIGH_FREQUENCY_INTERFACE_MODE_ABOVE_80MHZ;
1253 }
1254 else
1255 {
1256 tmpreg1 |= DAC_HIGH_FREQUENCY_INTERFACE_MODE_DISABLE;
1257 }
1258 }
1259 else
1260 {
1261 tmpreg1 |= sConfig->DAC_HighFrequency;
1262 }
1263 /* Calculate MCR register value depending on DAC_Channel */
1264 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1265 /* Write to DAC MCR */
1266 hdac->Instance->MCR = tmpreg1;
1267
1268 /* DAC in normal operating mode hence clear DAC_CR_CENx bit */
1269 CLEAR_BIT(hdac->Instance->CR, DAC_CR_CEN1 << (Channel & 0x10UL));
1270
1271 /* Get the DAC CR value */
1272 tmpreg1 = hdac->Instance->CR;
1273 /* Clear TENx, TSELx, WAVEx and MAMPx bits */
1274 tmpreg1 &= ~(((uint32_t)(DAC_CR_MAMP1 | DAC_CR_WAVE1 | DAC_CR_TSEL1 | DAC_CR_TEN1)) << (Channel & 0x10UL));
1275 /* Configure for the selected DAC channel: trigger */
1276 /* Set TSELx and TENx bits according to DAC_Trigger value */
1277 tmpreg2 = sConfig->DAC_Trigger;
1278 /* Calculate CR register value depending on DAC_Channel */
1279 tmpreg1 |= tmpreg2 << (Channel & 0x10UL);
1280 /* Write to DAC CR */
1281 hdac->Instance->CR = tmpreg1;
1282
1283 /* Disable wave generation */
1284 hdac->Instance->CR &= ~(DAC_CR_WAVE1 << (Channel & 0x10UL));
1285
1286 /* Set STRSTTRIGSELx and STINCTRIGSELx bits according to DAC_Trigger & DAC_Trigger2 values */
1287 tmpreg2 = ((sConfig->DAC_Trigger & DAC_CR_TSEL1) >> DAC_CR_TSEL1_Pos) << DAC_STMODR_STRSTTRIGSEL1_Pos;
1288 tmpreg2 |= ((sConfig->DAC_Trigger2 & DAC_CR_TSEL1) >> DAC_CR_TSEL1_Pos) << DAC_STMODR_STINCTRIGSEL1_Pos;
1289 /* Modify STMODR register value depending on DAC_Channel */
1290 MODIFY_REG(hdac->Instance->STMODR, (DAC_STMODR_STINCTRIGSEL1 | DAC_STMODR_STRSTTRIGSEL1) << (Channel & 0x10UL), tmpreg2 << (Channel & 0x10UL));
1291 /* Change DAC state */
1292 hdac->State = HAL_DAC_STATE_READY;
1293
1294 /* Process unlocked */
1295 __HAL_UNLOCK(hdac);
1296
1297 /* Return function status */
1298 return HAL_OK;
1299 }
1300
1301 /**
1302 * @}
1303 */
1304
1305 /** @defgroup DAC_Exported_Functions_Group4 Peripheral State and Errors functions
1306 * @brief Peripheral State and Errors functions
1307 *
1308 @verbatim
1309 ==============================================================================
1310 ##### Peripheral State and Errors functions #####
1311 ==============================================================================
1312 [..]
1313 This subsection provides functions allowing to
1314 (+) Check the DAC state.
1315 (+) Check the DAC Errors.
1316
1317 @endverbatim
1318 * @{
1319 */
1320
1321 /**
1322 * @brief return the DAC handle state
1323 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1324 * the configuration information for the specified DAC.
1325 * @retval HAL state
1326 */
1327 HAL_DAC_StateTypeDef HAL_DAC_GetState(DAC_HandleTypeDef *hdac)
1328 {
1329 /* Return DAC handle state */
1330 return hdac->State;
1331 }
1332
1333
1334 /**
1335 * @brief Return the DAC error code
1336 * @param hdac pointer to a DAC_HandleTypeDef structure that contains
1337 * the configuration information for the specified DAC.
1338 * @retval DAC Error Code
1339 */
1340 uint32_t HAL_DAC_GetError(DAC_HandleTypeDef *hdac)
1341 {
1342 return hdac->ErrorCode;
1343 }
1344
1345 /**
1346 * @}
1347 */
1348
1349 /**
1350 * @}
1351 */
1352
1353 /** @addtogroup DAC_Exported_Functions
1354 * @{
1355 */
1356
1357 /** @addtogroup DAC_Exported_Functions_Group1
1358 * @{
1359 */
1360 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1361 /**
1362 * @brief Register a User DAC Callback
1363 * To be used instead of the weak (surcharged) predefined callback
1364 * @param hdac DAC handle
1365 * @param CallbackID ID of the callback to be registered
1366 * This parameter can be one of the following values:
1367 * @arg @ref HAL_DAC_ERROR_INVALID_CALLBACK DAC Error Callback ID
1368 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 Complete Callback ID
1369 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1370 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1371 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1372 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1373 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1374 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1375 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1376 * @arg @ref HAL_DAC_MSP_INIT_CB_ID DAC MSP Init Callback ID
1377 * @arg @ref HAL_DAC_MSP_DEINIT_CB_ID DAC MSP DeInit Callback ID
1378 *
1379 * @param pCallback pointer to the Callback function
1380 * @retval status
1381 */
1382 HAL_StatusTypeDef HAL_DAC_RegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID,
1383 pDAC_CallbackTypeDef pCallback)
1384 {
1385 HAL_StatusTypeDef status = HAL_OK;
1386
1387 if (pCallback == NULL)
1388 {
1389 /* Update the error code */
1390 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1391 return HAL_ERROR;
1392 }
1393
1394 /* Process locked */
1395 __HAL_LOCK(hdac);
1396
1397 if (hdac->State == HAL_DAC_STATE_READY)
1398 {
1399 switch (CallbackID)
1400 {
1401 case HAL_DAC_CH1_COMPLETE_CB_ID :
1402 hdac->ConvCpltCallbackCh1 = pCallback;
1403 break;
1404 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1405 hdac->ConvHalfCpltCallbackCh1 = pCallback;
1406 break;
1407 case HAL_DAC_CH1_ERROR_ID :
1408 hdac->ErrorCallbackCh1 = pCallback;
1409 break;
1410 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1411 hdac->DMAUnderrunCallbackCh1 = pCallback;
1412 break;
1413 case HAL_DAC_CH2_COMPLETE_CB_ID :
1414 hdac->ConvCpltCallbackCh2 = pCallback;
1415 break;
1416 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1417 hdac->ConvHalfCpltCallbackCh2 = pCallback;
1418 break;
1419 case HAL_DAC_CH2_ERROR_ID :
1420 hdac->ErrorCallbackCh2 = pCallback;
1421 break;
1422 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1423 hdac->DMAUnderrunCallbackCh2 = pCallback;
1424 break;
1425 case HAL_DAC_MSP_INIT_CB_ID :
1426 hdac->MspInitCallback = pCallback;
1427 break;
1428 case HAL_DAC_MSP_DEINIT_CB_ID :
1429 hdac->MspDeInitCallback = pCallback;
1430 break;
1431 default :
1432 /* Update the error code */
1433 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1434 /* update return status */
1435 status = HAL_ERROR;
1436 break;
1437 }
1438 }
1439 else if (hdac->State == HAL_DAC_STATE_RESET)
1440 {
1441 switch (CallbackID)
1442 {
1443 case HAL_DAC_MSP_INIT_CB_ID :
1444 hdac->MspInitCallback = pCallback;
1445 break;
1446 case HAL_DAC_MSP_DEINIT_CB_ID :
1447 hdac->MspDeInitCallback = pCallback;
1448 break;
1449 default :
1450 /* Update the error code */
1451 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1452 /* update return status */
1453 status = HAL_ERROR;
1454 break;
1455 }
1456 }
1457 else
1458 {
1459 /* Update the error code */
1460 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1461 /* update return status */
1462 status = HAL_ERROR;
1463 }
1464
1465 /* Release Lock */
1466 __HAL_UNLOCK(hdac);
1467 return status;
1468 }
1469
1470 /**
1471 * @brief Unregister a User DAC Callback
1472 * DAC Callback is redirected to the weak (surcharged) predefined callback
1473 * @param hdac DAC handle
1474 * @param CallbackID ID of the callback to be unregistered
1475 * This parameter can be one of the following values:
1476 * @arg @ref HAL_DAC_CH1_COMPLETE_CB_ID DAC CH1 tranfer Complete Callback ID
1477 * @arg @ref HAL_DAC_CH1_HALF_COMPLETE_CB_ID DAC CH1 Half Complete Callback ID
1478 * @arg @ref HAL_DAC_CH1_ERROR_ID DAC CH1 Error Callback ID
1479 * @arg @ref HAL_DAC_CH1_UNDERRUN_CB_ID DAC CH1 UnderRun Callback ID
1480 * @arg @ref HAL_DAC_CH2_COMPLETE_CB_ID DAC CH2 Complete Callback ID
1481 * @arg @ref HAL_DAC_CH2_HALF_COMPLETE_CB_ID DAC CH2 Half Complete Callback ID
1482 * @arg @ref HAL_DAC_CH2_ERROR_ID DAC CH2 Error Callback ID
1483 * @arg @ref HAL_DAC_CH2_UNDERRUN_CB_ID DAC CH2 UnderRun Callback ID
1484 * @arg @ref HAL_DAC_MSP_INIT_CB_ID DAC MSP Init Callback ID
1485 * @arg @ref HAL_DAC_MSP_DEINIT_CB_ID DAC MSP DeInit Callback ID
1486 * @arg @ref HAL_DAC_ALL_CB_ID DAC All callbacks
1487 * @retval status
1488 */
1489 HAL_StatusTypeDef HAL_DAC_UnRegisterCallback(DAC_HandleTypeDef *hdac, HAL_DAC_CallbackIDTypeDef CallbackID)
1490 {
1491 HAL_StatusTypeDef status = HAL_OK;
1492
1493 /* Process locked */
1494 __HAL_LOCK(hdac);
1495
1496 if (hdac->State == HAL_DAC_STATE_READY)
1497 {
1498 switch (CallbackID)
1499 {
1500 case HAL_DAC_CH1_COMPLETE_CB_ID :
1501 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1502 break;
1503 case HAL_DAC_CH1_HALF_COMPLETE_CB_ID :
1504 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1505 break;
1506 case HAL_DAC_CH1_ERROR_ID :
1507 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1508 break;
1509 case HAL_DAC_CH1_UNDERRUN_CB_ID :
1510 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1511 break;
1512 case HAL_DAC_CH2_COMPLETE_CB_ID :
1513 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1514 break;
1515 case HAL_DAC_CH2_HALF_COMPLETE_CB_ID :
1516 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1517 break;
1518 case HAL_DAC_CH2_ERROR_ID :
1519 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1520 break;
1521 case HAL_DAC_CH2_UNDERRUN_CB_ID :
1522 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1523 break;
1524 case HAL_DAC_MSP_INIT_CB_ID :
1525 hdac->MspInitCallback = HAL_DAC_MspInit;
1526 break;
1527 case HAL_DAC_MSP_DEINIT_CB_ID :
1528 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1529 break;
1530 case HAL_DAC_ALL_CB_ID :
1531 hdac->ConvCpltCallbackCh1 = HAL_DAC_ConvCpltCallbackCh1;
1532 hdac->ConvHalfCpltCallbackCh1 = HAL_DAC_ConvHalfCpltCallbackCh1;
1533 hdac->ErrorCallbackCh1 = HAL_DAC_ErrorCallbackCh1;
1534 hdac->DMAUnderrunCallbackCh1 = HAL_DAC_DMAUnderrunCallbackCh1;
1535 hdac->ConvCpltCallbackCh2 = HAL_DACEx_ConvCpltCallbackCh2;
1536 hdac->ConvHalfCpltCallbackCh2 = HAL_DACEx_ConvHalfCpltCallbackCh2;
1537 hdac->ErrorCallbackCh2 = HAL_DACEx_ErrorCallbackCh2;
1538 hdac->DMAUnderrunCallbackCh2 = HAL_DACEx_DMAUnderrunCallbackCh2;
1539 hdac->MspInitCallback = HAL_DAC_MspInit;
1540 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1541 break;
1542 default :
1543 /* Update the error code */
1544 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1545 /* update return status */
1546 status = HAL_ERROR;
1547 break;
1548 }
1549 }
1550 else if (hdac->State == HAL_DAC_STATE_RESET)
1551 {
1552 switch (CallbackID)
1553 {
1554 case HAL_DAC_MSP_INIT_CB_ID :
1555 hdac->MspInitCallback = HAL_DAC_MspInit;
1556 break;
1557 case HAL_DAC_MSP_DEINIT_CB_ID :
1558 hdac->MspDeInitCallback = HAL_DAC_MspDeInit;
1559 break;
1560 default :
1561 /* Update the error code */
1562 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1563 /* update return status */
1564 status = HAL_ERROR;
1565 break;
1566 }
1567 }
1568 else
1569 {
1570 /* Update the error code */
1571 hdac->ErrorCode |= HAL_DAC_ERROR_INVALID_CALLBACK;
1572 /* update return status */
1573 status = HAL_ERROR;
1574 }
1575
1576 /* Release Lock */
1577 __HAL_UNLOCK(hdac);
1578 return status;
1579 }
1580 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1581
1582 /**
1583 * @}
1584 */
1585
1586 /**
1587 * @}
1588 */
1589
1590 /** @addtogroup DAC_Private_Functions
1591 * @{
1592 */
1593
1594 /**
1595 * @brief DMA conversion complete callback.
1596 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1597 * the configuration information for the specified DMA module.
1598 * @retval None
1599 */
1600 void DAC_DMAConvCpltCh1(DMA_HandleTypeDef *hdma)
1601 {
1602 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1603
1604 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1605 hdac->ConvCpltCallbackCh1(hdac);
1606 #else
1607 HAL_DAC_ConvCpltCallbackCh1(hdac);
1608 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1609
1610 hdac->State = HAL_DAC_STATE_READY;
1611 }
1612
1613 /**
1614 * @brief DMA half transfer complete callback.
1615 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1616 * the configuration information for the specified DMA module.
1617 * @retval None
1618 */
1619 void DAC_DMAHalfConvCpltCh1(DMA_HandleTypeDef *hdma)
1620 {
1621 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1622 /* Conversion complete callback */
1623 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1624 hdac->ConvHalfCpltCallbackCh1(hdac);
1625 #else
1626 HAL_DAC_ConvHalfCpltCallbackCh1(hdac);
1627 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1628 }
1629
1630 /**
1631 * @brief DMA error callback
1632 * @param hdma pointer to a DMA_HandleTypeDef structure that contains
1633 * the configuration information for the specified DMA module.
1634 * @retval None
1635 */
1636 void DAC_DMAErrorCh1(DMA_HandleTypeDef *hdma)
1637 {
1638 DAC_HandleTypeDef *hdac = (DAC_HandleTypeDef *)((DMA_HandleTypeDef *)hdma)->Parent;
1639
1640 /* Set DAC error code to DMA error */
1641 hdac->ErrorCode |= HAL_DAC_ERROR_DMA;
1642
1643 #if (USE_HAL_DAC_REGISTER_CALLBACKS == 1)
1644 hdac->ErrorCallbackCh1(hdac);
1645 #else
1646 HAL_DAC_ErrorCallbackCh1(hdac);
1647 #endif /* USE_HAL_DAC_REGISTER_CALLBACKS */
1648
1649 hdac->State = HAL_DAC_STATE_READY;
1650 }
1651
1652 /**
1653 * @}
1654 */
1655
1656 /**
1657 * @}
1658 */
1659
1660 #endif /* DAC1 || DAC2 || DAC3 || DAC4 */
1661
1662 #endif /* HAL_DAC_MODULE_ENABLED */
1663
1664 /**
1665 * @}
1666 */
1667
1668 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/