?  search:
summary | log | graphiclog1 | graphiclog2 | commit | commitdiff | tree | refs | edit | fork
blame | history | raw | HEAD
Merge pull request #11189 from klutvott123/move-telemetry-displayport-init
[betaflight.git] / lib / main / STM32G4 / Drivers / STM32G4xx_HAL_Driver / Src / stm32g4xx_hal_lptim.c
blobb608529ea8b5a8f714a37caa3da11d308f5c01b6
1 /**
2 ******************************************************************************
3 * @file stm32g4xx_hal_lptim.c
4 * @author MCD Application Team
5 * @brief LPTIM HAL module driver.
6 * This file provides firmware functions to manage the following
7 * functionalities of the Low Power Timer (LPTIM) peripheral:
8 * + Initialization and de-initialization functions.
9 * + Start/Stop operation functions in polling mode.
10 * + Start/Stop operation functions in interrupt mode.
11 * + Reading operation functions.
12 * + Peripheral State functions.
13 *
14 @verbatim
15 ==============================================================================
16 ##### How to use this driver #####
17 ==============================================================================
18 [..]
19 The LPTIM HAL driver can be used as follows:
20
21 (#)Initialize the LPTIM low level resources by implementing the
22 HAL_LPTIM_MspInit():
23 (++) Enable the LPTIM interface clock using __HAL_RCC_LPTIMx_CLK_ENABLE().
24 (++) In case of using interrupts (e.g. HAL_LPTIM_PWM_Start_IT()):
25 (+++) Configure the LPTIM interrupt priority using HAL_NVIC_SetPriority().
26 (+++) Enable the LPTIM IRQ handler using HAL_NVIC_EnableIRQ().
27 (+++) In LPTIM IRQ handler, call HAL_LPTIM_IRQHandler().
28
29 (#)Initialize the LPTIM HAL using HAL_LPTIM_Init(). This function
30 configures mainly:
31 (++) The instance: LPTIM1.
32 (++) Clock: the counter clock.
33 (+++) Source : it can be either the ULPTIM input (IN1) or one of
34 the internal clock; (APB, LSE or LSI).
35 (+++) Prescaler: select the clock divider.
36 (++) UltraLowPowerClock : To be used only if the ULPTIM is selected
37 as counter clock source.
38 (+++) Polarity: polarity of the active edge for the counter unit
39 if the ULPTIM input is selected.
40 (+++) SampleTime: clock sampling time to configure the clock glitch
41 filter.
42 (++) Trigger: How the counter start.
43 (+++) Source: trigger can be software or one of the hardware triggers.
44 (+++) ActiveEdge : only for hardware trigger.
45 (+++) SampleTime : trigger sampling time to configure the trigger
46 glitch filter.
47 (++) OutputPolarity : 2 opposite polarities are possible.
48 (++) UpdateMode: specifies whether the update of the autoreload and
49 the compare values is done immediately or after the end of current
50 period.
51 (++) Input1Source: Source selected for input1 (GPIO or comparator output).
52 (++) Input2Source: Source selected for input2 (GPIO or comparator output).
53 Input2 is used only for encoder feature so is used only for LPTIM1 instance.
54
55 (#)Six modes are available:
56
57 (++) PWM Mode: To generate a PWM signal with specified period and pulse,
58 call HAL_LPTIM_PWM_Start() or HAL_LPTIM_PWM_Start_IT() for interruption
59 mode.
60
61 (++) One Pulse Mode: To generate pulse with specified width in response
62 to a stimulus, call HAL_LPTIM_OnePulse_Start() or
63 HAL_LPTIM_OnePulse_Start_IT() for interruption mode.
64
65 (++) Set once Mode: In this mode, the output changes the level (from
66 low level to high level if the output polarity is configured high, else
67 the opposite) when a compare match occurs. To start this mode, call
68 HAL_LPTIM_SetOnce_Start() or HAL_LPTIM_SetOnce_Start_IT() for
69 interruption mode.
70
71 (++) Encoder Mode: To use the encoder interface call
72 HAL_LPTIM_Encoder_Start() or HAL_LPTIM_Encoder_Start_IT() for
73 interruption mode. Only available for LPTIM1 instance.
74
75 (++) Time out Mode: an active edge on one selected trigger input rests
76 the counter. The first trigger event will start the timer, any
77 successive trigger event will reset the counter and the timer will
78 restart. To start this mode call HAL_LPTIM_TimeOut_Start_IT() or
79 HAL_LPTIM_TimeOut_Start_IT() for interruption mode.
80
81 (++) Counter Mode: counter can be used to count external events on
82 the LPTIM Input1 or it can be used to count internal clock cycles.
83 To start this mode, call HAL_LPTIM_Counter_Start() or
84 HAL_LPTIM_Counter_Start_IT() for interruption mode.
85
86
87 (#) User can stop any process by calling the corresponding API:
88 HAL_LPTIM_Xxx_Stop() or HAL_LPTIM_Xxx_Stop_IT() if the process is
89 already started in interruption mode.
90
91 (#) De-initialize the LPTIM peripheral using HAL_LPTIM_DeInit().
92
93 *** Callback registration ***
94 =============================================
95
96 The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS when set to 1
97 allows the user to configure dynamically the driver callbacks.
98
99 Use Function @ref HAL_LPTIM_RegisterCallback() to register a callback.
100 @ref HAL_LPTIM_RegisterCallback() takes as parameters the HAL peripheral handle,
101 the Callback ID and a pointer to the user callback function.
102
103 Use function @ref HAL_LPTIM_UnRegisterCallback() to reset a callback to the
104 default weak function.
105 @ref HAL_LPTIM_UnRegisterCallback takes as parameters the HAL peripheral handle,
106 and the Callback ID.
107
108 These functions allow to register/unregister following callbacks:
109
110 (+) MspInitCallback : LPTIM Base Msp Init Callback.
111 (+) MspDeInitCallback : LPTIM Base Msp DeInit Callback.
112 (+) CompareMatchCallback : Compare match Callback.
113 (+) AutoReloadMatchCallback : Auto-reload match Callback.
114 (+) TriggerCallback : External trigger event detection Callback.
115 (+) CompareWriteCallback : Compare register write complete Callback.
116 (+) AutoReloadWriteCallback : Auto-reload register write complete Callback.
117 (+) DirectionUpCallback : Up-counting direction change Callback.
118 (+) DirectionDownCallback : Down-counting direction change Callback.
119
120 By default, after the Init and when the state is HAL_LPTIM_STATE_RESET
121 all interrupt callbacks are set to the corresponding weak functions:
122 examples @ref HAL_LPTIM_TriggerCallback(), @ref HAL_LPTIM_CompareMatchCallback().
123
124 Exception done for MspInit and MspDeInit functions that are reset to the legacy weak
125 functionalities in the Init/DeInit only when these callbacks are null
126 (not registered beforehand). If not, MspInit or MspDeInit are not null, the Init/DeInit
127 keep and use the user MspInit/MspDeInit callbacks (registered beforehand)
128
129 Callbacks can be registered/unregistered in HAL_LPTIM_STATE_READY state only.
130 Exception done MspInit/MspDeInit that can be registered/unregistered
131 in HAL_LPTIM_STATE_READY or HAL_LPTIM_STATE_RESET state,
132 thus registered (user) MspInit/DeInit callbacks can be used during the Init/DeInit.
133 In that case first register the MspInit/MspDeInit user callbacks
134 using @ref HAL_LPTIM_RegisterCallback() before calling DeInit or Init function.
135
136 When The compilation define USE_HAL_LPTIM_REGISTER_CALLBACKS is set to 0 or
137 not defined, the callback registration feature is not available and all callbacks
138 are set to the corresponding weak functions.
139
140 @endverbatim
141 ******************************************************************************
142 * @attention
143 *
144 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
145 * All rights reserved.</center></h2>
146 *
147 * This software component is licensed by ST under BSD 3-Clause license,
148 * the "License"; You may not use this file except in compliance with the
149 * License. You may obtain a copy of the License at:
150 * opensource.org/licenses/BSD-3-Clause
151 * ******************************************************************************
152 */
153
154 /* Includes ------------------------------------------------------------------*/
155 #include "stm32g4xx_hal.h"
156
157 /** @addtogroup STM32G4xx_HAL_Driver
158 * @{
159 */
160
161 /** @defgroup LPTIM LPTIM
162 * @brief LPTIM HAL module driver.
163 * @{
164 */
165
166 #ifdef HAL_LPTIM_MODULE_ENABLED
167
168
169
170 /* Private typedef -----------------------------------------------------------*/
171 /* Private define ------------------------------------------------------------*/
172 /* Private macro -------------------------------------------------------------*/
173 #define TIMEOUT 1000UL /* Timeout is 1s */
174 /* Private variables ---------------------------------------------------------*/
175 /* Private function prototypes -----------------------------------------------*/
176 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
177 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim);
178 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
179
180 /* Exported functions --------------------------------------------------------*/
181
182 /** @defgroup LPTIM_Exported_Functions LPTIM Exported Functions
183 * @{
184 */
185
186 /** @defgroup LPTIM_Exported_Functions_Group1 Initialization/de-initialization functions
187 * @brief Initialization and Configuration functions.
188 *
189 @verbatim
190 ==============================================================================
191 ##### Initialization and de-initialization functions #####
192 ==============================================================================
193 [..] This section provides functions allowing to:
194 (+) Initialize the LPTIM according to the specified parameters in the
195 LPTIM_InitTypeDef and initialize the associated handle.
196 (+) DeInitialize the LPTIM peripheral.
197 (+) Initialize the LPTIM MSP.
198 (+) DeInitialize the LPTIM MSP.
199
200 @endverbatim
201 * @{
202 */
203
204 /**
205 * @brief Initialize the LPTIM according to the specified parameters in the
206 * LPTIM_InitTypeDef and initialize the associated handle.
207 * @param hlptim LPTIM handle
208 * @retval HAL status
209 */
210 HAL_StatusTypeDef HAL_LPTIM_Init(LPTIM_HandleTypeDef *hlptim)
211 {
212 uint32_t tmpcfgr;
213
214 /* Check the LPTIM handle allocation */
215 if (hlptim == NULL)
216 {
217 return HAL_ERROR;
218 }
219
220 /* Check the parameters */
221 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
222
223 assert_param(IS_LPTIM_CLOCK_SOURCE(hlptim->Init.Clock.Source));
224 assert_param(IS_LPTIM_CLOCK_PRESCALER(hlptim->Init.Clock.Prescaler));
225 if ((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM)
226 {
227 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
228 assert_param(IS_LPTIM_CLOCK_SAMPLE_TIME(hlptim->Init.UltraLowPowerClock.SampleTime));
229 }
230 assert_param(IS_LPTIM_TRG_SOURCE(hlptim->Init.Trigger.Source));
231 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
232 {
233 assert_param(IS_LPTIM_TRIG_SAMPLE_TIME(hlptim->Init.Trigger.SampleTime));
234 assert_param(IS_LPTIM_EXT_TRG_POLARITY(hlptim->Init.Trigger.ActiveEdge));
235 }
236 assert_param(IS_LPTIM_OUTPUT_POLARITY(hlptim->Init.OutputPolarity));
237 assert_param(IS_LPTIM_UPDATE_MODE(hlptim->Init.UpdateMode));
238 assert_param(IS_LPTIM_COUNTER_SOURCE(hlptim->Init.CounterSource));
239
240 if (hlptim->State == HAL_LPTIM_STATE_RESET)
241 {
242 /* Allocate lock resource and initialize it */
243 hlptim->Lock = HAL_UNLOCKED;
244
245 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
246 /* Reset interrupt callbacks to legacy weak callbacks */
247 LPTIM_ResetCallback(hlptim);
248
249 if (hlptim->MspInitCallback == NULL)
250 {
251 hlptim->MspInitCallback = HAL_LPTIM_MspInit;
252 }
253
254 /* Init the low level hardware : GPIO, CLOCK, NVIC */
255 hlptim->MspInitCallback(hlptim);
256 #else
257 /* Init the low level hardware : GPIO, CLOCK, NVIC */
258 HAL_LPTIM_MspInit(hlptim);
259 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
260 }
261
262 /* Change the LPTIM state */
263 hlptim->State = HAL_LPTIM_STATE_BUSY;
264
265 /* Get the LPTIMx CFGR value */
266 tmpcfgr = hlptim->Instance->CFGR;
267
268 if (((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) || ((hlptim->Init.CounterSource) == LPTIM_COUNTERSOURCE_EXTERNAL))
269 {
270 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKPOL | LPTIM_CFGR_CKFLT));
271 }
272 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
273 {
274 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_TRGFLT | LPTIM_CFGR_TRIGSEL));
275 }
276
277 /* Clear CKSEL, CKPOL, PRESC, TRIGEN, TRGFLT, WAVPOL, PRELOAD & COUNTMODE bits */
278 tmpcfgr &= (uint32_t)(~(LPTIM_CFGR_CKSEL | LPTIM_CFGR_CKPOL | LPTIM_CFGR_TRIGEN | LPTIM_CFGR_PRELOAD |
279 LPTIM_CFGR_WAVPOL | LPTIM_CFGR_PRESC | LPTIM_CFGR_COUNTMODE));
280
281 /* Set initialization parameters */
282 tmpcfgr |= (hlptim->Init.Clock.Source |
283 hlptim->Init.Clock.Prescaler |
284 hlptim->Init.OutputPolarity |
285 hlptim->Init.UpdateMode |
286 hlptim->Init.CounterSource);
287
288 if (((hlptim->Init.Clock.Source) == LPTIM_CLOCKSOURCE_ULPTIM) || ((hlptim->Init.CounterSource) == LPTIM_COUNTERSOURCE_EXTERNAL))
289 {
290 tmpcfgr |= (hlptim->Init.UltraLowPowerClock.Polarity |
291 hlptim->Init.UltraLowPowerClock.SampleTime);
292 }
293
294 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
295 {
296 /* Enable External trigger and set the trigger source */
297 tmpcfgr |= (hlptim->Init.Trigger.Source |
298 hlptim->Init.Trigger.ActiveEdge |
299 hlptim->Init.Trigger.SampleTime);
300 }
301
302 /* Write to LPTIMx CFGR */
303 hlptim->Instance->CFGR = tmpcfgr;
304
305 /* Configure LPTIM input sources */
306 if (hlptim->Instance == LPTIM1)
307 {
308 /* Check LPTIM Input1 and Input2 sources */
309 assert_param(IS_LPTIM_INPUT1_SOURCE(hlptim->Instance, hlptim->Init.Input1Source));
310 assert_param(IS_LPTIM_INPUT2_SOURCE(hlptim->Instance, hlptim->Init.Input2Source));
311
312 /* Configure LPTIM Input1 and Input2 sources */
313 hlptim->Instance->OR = (hlptim->Init.Input1Source | hlptim->Init.Input2Source);
314 }
315
316 /* Change the LPTIM state */
317 hlptim->State = HAL_LPTIM_STATE_READY;
318
319 /* Return function status */
320 return HAL_OK;
321 }
322
323 /**
324 * @brief DeInitialize the LPTIM peripheral.
325 * @param hlptim LPTIM handle
326 * @retval HAL status
327 */
328 HAL_StatusTypeDef HAL_LPTIM_DeInit(LPTIM_HandleTypeDef *hlptim)
329 {
330 /* Check the LPTIM handle allocation */
331 if (hlptim == NULL)
332 {
333 return HAL_ERROR;
334 }
335
336 /* Change the LPTIM state */
337 hlptim->State = HAL_LPTIM_STATE_BUSY;
338
339 /* Disable the LPTIM Peripheral Clock */
340 __HAL_LPTIM_DISABLE(hlptim);
341
342 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
343 if (hlptim->MspDeInitCallback == NULL)
344 {
345 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit;
346 }
347
348 /* DeInit the low level hardware: CLOCK, NVIC.*/
349 hlptim->MspDeInitCallback(hlptim);
350 #else
351 /* DeInit the low level hardware: CLOCK, NVIC.*/
352 HAL_LPTIM_MspDeInit(hlptim);
353 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
354
355 /* Change the LPTIM state */
356 hlptim->State = HAL_LPTIM_STATE_RESET;
357
358 /* Release Lock */
359 __HAL_UNLOCK(hlptim);
360
361 /* Return function status */
362 return HAL_OK;
363 }
364
365 /**
366 * @brief Initialize the LPTIM MSP.
367 * @param hlptim LPTIM handle
368 * @retval None
369 */
370 __weak void HAL_LPTIM_MspInit(LPTIM_HandleTypeDef *hlptim)
371 {
372 /* Prevent unused argument(s) compilation warning */
373 UNUSED(hlptim);
374
375 /* NOTE : This function should not be modified, when the callback is needed,
376 the HAL_LPTIM_MspInit could be implemented in the user file
377 */
378 }
379
380 /**
381 * @brief DeInitialize LPTIM MSP.
382 * @param hlptim LPTIM handle
383 * @retval None
384 */
385 __weak void HAL_LPTIM_MspDeInit(LPTIM_HandleTypeDef *hlptim)
386 {
387 /* Prevent unused argument(s) compilation warning */
388 UNUSED(hlptim);
389
390 /* NOTE : This function should not be modified, when the callback is needed,
391 the HAL_LPTIM_MspDeInit could be implemented in the user file
392 */
393 }
394
395 /**
396 * @}
397 */
398
399 /** @defgroup LPTIM_Exported_Functions_Group2 LPTIM Start-Stop operation functions
400 * @brief Start-Stop operation functions.
401 *
402 @verbatim
403 ==============================================================================
404 ##### LPTIM Start Stop operation functions #####
405 ==============================================================================
406 [..] This section provides functions allowing to:
407 (+) Start the PWM mode.
408 (+) Stop the PWM mode.
409 (+) Start the One pulse mode.
410 (+) Stop the One pulse mode.
411 (+) Start the Set once mode.
412 (+) Stop the Set once mode.
413 (+) Start the Encoder mode.
414 (+) Stop the Encoder mode.
415 (+) Start the Timeout mode.
416 (+) Stop the Timeout mode.
417 (+) Start the Counter mode.
418 (+) Stop the Counter mode.
419
420
421 @endverbatim
422 * @{
423 */
424
425 /**
426 * @brief Start the LPTIM PWM generation.
427 * @param hlptim LPTIM handle
428 * @param Period Specifies the Autoreload value.
429 * This parameter must be a value between 0x0000 and 0xFFFF.
430 * @param Pulse Specifies the compare value.
431 * This parameter must be a value between 0x0000 and 0xFFFF.
432 * @retval HAL status
433 */
434 HAL_StatusTypeDef HAL_LPTIM_PWM_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
435 {
436 /* Check the parameters */
437 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
438 assert_param(IS_LPTIM_PERIOD(Period));
439 assert_param(IS_LPTIM_PULSE(Pulse));
440
441 /* Set the LPTIM state */
442 hlptim->State = HAL_LPTIM_STATE_BUSY;
443
444 /* Reset WAVE bit to set PWM mode */
445 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
446
447 /* Enable the Peripheral */
448 __HAL_LPTIM_ENABLE(hlptim);
449
450 /* Load the period value in the autoreload register */
451 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
452
453 /* Load the pulse value in the compare register */
454 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
455
456 /* Start timer in continuous mode */
457 __HAL_LPTIM_START_CONTINUOUS(hlptim);
458
459 /* Change the TIM state*/
460 hlptim->State = HAL_LPTIM_STATE_READY;
461
462 /* Return function status */
463 return HAL_OK;
464 }
465
466 /**
467 * @brief Stop the LPTIM PWM generation.
468 * @param hlptim LPTIM handle
469 * @retval HAL status
470 */
471 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop(LPTIM_HandleTypeDef *hlptim)
472 {
473 /* Check the parameters */
474 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
475
476 /* Set the LPTIM state */
477 hlptim->State = HAL_LPTIM_STATE_BUSY;
478
479 /* Disable the Peripheral */
480 __HAL_LPTIM_DISABLE(hlptim);
481
482 /* Change the TIM state*/
483 hlptim->State = HAL_LPTIM_STATE_READY;
484
485 /* Return function status */
486 return HAL_OK;
487 }
488
489 /**
490 * @brief Start the LPTIM PWM generation in interrupt mode.
491 * @param hlptim LPTIM handle
492 * @param Period Specifies the Autoreload value.
493 * This parameter must be a value between 0x0000 and 0xFFFF
494 * @param Pulse Specifies the compare value.
495 * This parameter must be a value between 0x0000 and 0xFFFF
496 * @retval HAL status
497 */
498 HAL_StatusTypeDef HAL_LPTIM_PWM_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
499 {
500 /* Check the parameters */
501 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
502 assert_param(IS_LPTIM_PERIOD(Period));
503 assert_param(IS_LPTIM_PULSE(Pulse));
504
505 /* Set the LPTIM state */
506 hlptim->State = HAL_LPTIM_STATE_BUSY;
507
508 /* Reset WAVE bit to set PWM mode */
509 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
510
511 /* Enable Autoreload write complete interrupt */
512 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
513
514 /* Enable Compare write complete interrupt */
515 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
516
517 /* Enable Autoreload match interrupt */
518 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
519
520 /* Enable Compare match interrupt */
521 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
522
523 /* If external trigger source is used, then enable external trigger interrupt */
524 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
525 {
526 /* Enable external trigger interrupt */
527 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
528 }
529
530 /* Enable the Peripheral */
531 __HAL_LPTIM_ENABLE(hlptim);
532
533 /* Load the period value in the autoreload register */
534 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
535
536 /* Load the pulse value in the compare register */
537 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
538
539 /* Start timer in continuous mode */
540 __HAL_LPTIM_START_CONTINUOUS(hlptim);
541
542 /* Change the TIM state*/
543 hlptim->State = HAL_LPTIM_STATE_READY;
544
545 /* Return function status */
546 return HAL_OK;
547 }
548
549 /**
550 * @brief Stop the LPTIM PWM generation in interrupt mode.
551 * @param hlptim LPTIM handle
552 * @retval HAL status
553 */
554 HAL_StatusTypeDef HAL_LPTIM_PWM_Stop_IT(LPTIM_HandleTypeDef *hlptim)
555 {
556 /* Check the parameters */
557 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
558
559 /* Set the LPTIM state */
560 hlptim->State = HAL_LPTIM_STATE_BUSY;
561
562 /* Disable the Peripheral */
563 __HAL_LPTIM_DISABLE(hlptim);
564
565 /* Disable Autoreload write complete interrupt */
566 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
567
568 /* Disable Compare write complete interrupt */
569 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
570
571 /* Disable Autoreload match interrupt */
572 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
573
574 /* Disable Compare match interrupt */
575 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
576
577 /* If external trigger source is used, then disable external trigger interrupt */
578 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
579 {
580 /* Disable external trigger interrupt */
581 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
582 }
583
584 /* Change the TIM state*/
585 hlptim->State = HAL_LPTIM_STATE_READY;
586
587 /* Return function status */
588 return HAL_OK;
589 }
590
591 /**
592 * @brief Start the LPTIM One pulse generation.
593 * @param hlptim LPTIM handle
594 * @param Period Specifies the Autoreload value.
595 * This parameter must be a value between 0x0000 and 0xFFFF.
596 * @param Pulse Specifies the compare value.
597 * This parameter must be a value between 0x0000 and 0xFFFF.
598 * @retval HAL status
599 */
600 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
601 {
602 /* Check the parameters */
603 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
604 assert_param(IS_LPTIM_PERIOD(Period));
605 assert_param(IS_LPTIM_PULSE(Pulse));
606
607 /* Set the LPTIM state */
608 hlptim->State = HAL_LPTIM_STATE_BUSY;
609
610 /* Reset WAVE bit to set one pulse mode */
611 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
612
613 /* Enable the Peripheral */
614 __HAL_LPTIM_ENABLE(hlptim);
615
616 /* Load the period value in the autoreload register */
617 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
618
619 /* Load the pulse value in the compare register */
620 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
621
622 /* Start timer in single (one shot) mode */
623 __HAL_LPTIM_START_SINGLE(hlptim);
624
625 /* Change the TIM state*/
626 hlptim->State = HAL_LPTIM_STATE_READY;
627
628 /* Return function status */
629 return HAL_OK;
630 }
631
632 /**
633 * @brief Stop the LPTIM One pulse generation.
634 * @param hlptim LPTIM handle
635 * @retval HAL status
636 */
637 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop(LPTIM_HandleTypeDef *hlptim)
638 {
639 /* Check the parameters */
640 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
641
642 /* Set the LPTIM state */
643 hlptim->State = HAL_LPTIM_STATE_BUSY;
644
645 /* Disable the Peripheral */
646 __HAL_LPTIM_DISABLE(hlptim);
647
648 /* Change the TIM state*/
649 hlptim->State = HAL_LPTIM_STATE_READY;
650
651 /* Return function status */
652 return HAL_OK;
653 }
654
655 /**
656 * @brief Start the LPTIM One pulse generation in interrupt mode.
657 * @param hlptim LPTIM handle
658 * @param Period Specifies the Autoreload value.
659 * This parameter must be a value between 0x0000 and 0xFFFF.
660 * @param Pulse Specifies the compare value.
661 * This parameter must be a value between 0x0000 and 0xFFFF.
662 * @retval HAL status
663 */
664 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
665 {
666 /* Check the parameters */
667 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
668 assert_param(IS_LPTIM_PERIOD(Period));
669 assert_param(IS_LPTIM_PULSE(Pulse));
670
671 /* Set the LPTIM state */
672 hlptim->State = HAL_LPTIM_STATE_BUSY;
673
674 /* Reset WAVE bit to set one pulse mode */
675 hlptim->Instance->CFGR &= ~LPTIM_CFGR_WAVE;
676
677 /* Enable Autoreload write complete interrupt */
678 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
679
680 /* Enable Compare write complete interrupt */
681 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
682
683 /* Enable Autoreload match interrupt */
684 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
685
686 /* Enable Compare match interrupt */
687 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
688
689 /* If external trigger source is used, then enable external trigger interrupt */
690 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
691 {
692 /* Enable external trigger interrupt */
693 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
694 }
695
696 /* Enable the Peripheral */
697 __HAL_LPTIM_ENABLE(hlptim);
698
699 /* Load the period value in the autoreload register */
700 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
701
702 /* Load the pulse value in the compare register */
703 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
704
705 /* Start timer in single (one shot) mode */
706 __HAL_LPTIM_START_SINGLE(hlptim);
707
708 /* Change the TIM state*/
709 hlptim->State = HAL_LPTIM_STATE_READY;
710
711 /* Return function status */
712 return HAL_OK;
713 }
714
715 /**
716 * @brief Stop the LPTIM One pulse generation in interrupt mode.
717 * @param hlptim LPTIM handle
718 * @retval HAL status
719 */
720 HAL_StatusTypeDef HAL_LPTIM_OnePulse_Stop_IT(LPTIM_HandleTypeDef *hlptim)
721 {
722 /* Check the parameters */
723 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
724
725 /* Set the LPTIM state */
726 hlptim->State = HAL_LPTIM_STATE_BUSY;
727
728 /* Disable the Peripheral */
729 __HAL_LPTIM_DISABLE(hlptim);
730
731 /* Disable Autoreload write complete interrupt */
732 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
733
734 /* Disable Compare write complete interrupt */
735 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
736
737 /* Disable Autoreload match interrupt */
738 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
739
740 /* Disable Compare match interrupt */
741 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
742
743 /* If external trigger source is used, then disable external trigger interrupt */
744 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
745 {
746 /* Disable external trigger interrupt */
747 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
748 }
749
750 /* Change the TIM state*/
751 hlptim->State = HAL_LPTIM_STATE_READY;
752
753 /* Return function status */
754 return HAL_OK;
755 }
756
757 /**
758 * @brief Start the LPTIM in Set once mode.
759 * @param hlptim LPTIM handle
760 * @param Period Specifies the Autoreload value.
761 * This parameter must be a value between 0x0000 and 0xFFFF.
762 * @param Pulse Specifies the compare value.
763 * This parameter must be a value between 0x0000 and 0xFFFF.
764 * @retval HAL status
765 */
766 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
767 {
768 /* Check the parameters */
769 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
770 assert_param(IS_LPTIM_PERIOD(Period));
771 assert_param(IS_LPTIM_PULSE(Pulse));
772
773 /* Set the LPTIM state */
774 hlptim->State = HAL_LPTIM_STATE_BUSY;
775
776 /* Set WAVE bit to enable the set once mode */
777 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
778
779 /* Enable the Peripheral */
780 __HAL_LPTIM_ENABLE(hlptim);
781
782 /* Load the period value in the autoreload register */
783 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
784
785 /* Load the pulse value in the compare register */
786 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
787
788 /* Start timer in single (one shot) mode */
789 __HAL_LPTIM_START_SINGLE(hlptim);
790
791 /* Change the TIM state*/
792 hlptim->State = HAL_LPTIM_STATE_READY;
793
794 /* Return function status */
795 return HAL_OK;
796 }
797
798 /**
799 * @brief Stop the LPTIM Set once mode.
800 * @param hlptim LPTIM handle
801 * @retval HAL status
802 */
803 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop(LPTIM_HandleTypeDef *hlptim)
804 {
805 /* Check the parameters */
806 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
807
808 /* Set the LPTIM state */
809 hlptim->State = HAL_LPTIM_STATE_BUSY;
810
811 /* Disable the Peripheral */
812 __HAL_LPTIM_DISABLE(hlptim);
813
814 /* Change the TIM state*/
815 hlptim->State = HAL_LPTIM_STATE_READY;
816
817 /* Return function status */
818 return HAL_OK;
819 }
820
821 /**
822 * @brief Start the LPTIM Set once mode in interrupt mode.
823 * @param hlptim LPTIM handle
824 * @param Period Specifies the Autoreload value.
825 * This parameter must be a value between 0x0000 and 0xFFFF.
826 * @param Pulse Specifies the compare value.
827 * This parameter must be a value between 0x0000 and 0xFFFF.
828 * @retval HAL status
829 */
830 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Pulse)
831 {
832 /* Check the parameters */
833 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
834 assert_param(IS_LPTIM_PERIOD(Period));
835 assert_param(IS_LPTIM_PULSE(Pulse));
836
837 /* Set the LPTIM state */
838 hlptim->State = HAL_LPTIM_STATE_BUSY;
839
840 /* Set WAVE bit to enable the set once mode */
841 hlptim->Instance->CFGR |= LPTIM_CFGR_WAVE;
842
843 /* Enable Autoreload write complete interrupt */
844 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
845
846 /* Enable Compare write complete interrupt */
847 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPOK);
848
849 /* Enable Autoreload match interrupt */
850 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
851
852 /* Enable Compare match interrupt */
853 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
854
855 /* If external trigger source is used, then enable external trigger interrupt */
856 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
857 {
858 /* Enable external trigger interrupt */
859 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
860 }
861
862 /* Enable the Peripheral */
863 __HAL_LPTIM_ENABLE(hlptim);
864
865 /* Load the period value in the autoreload register */
866 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
867
868 /* Load the pulse value in the compare register */
869 __HAL_LPTIM_COMPARE_SET(hlptim, Pulse);
870
871 /* Start timer in single (one shot) mode */
872 __HAL_LPTIM_START_SINGLE(hlptim);
873
874 /* Change the TIM state*/
875 hlptim->State = HAL_LPTIM_STATE_READY;
876
877 /* Return function status */
878 return HAL_OK;
879 }
880
881 /**
882 * @brief Stop the LPTIM Set once mode in interrupt mode.
883 * @param hlptim LPTIM handle
884 * @retval HAL status
885 */
886 HAL_StatusTypeDef HAL_LPTIM_SetOnce_Stop_IT(LPTIM_HandleTypeDef *hlptim)
887 {
888 /* Check the parameters */
889 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
890
891 /* Set the LPTIM state */
892 hlptim->State = HAL_LPTIM_STATE_BUSY;
893
894 /* Disable the Peripheral */
895 __HAL_LPTIM_DISABLE(hlptim);
896
897 /* Disable Autoreload write complete interrupt */
898 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
899
900 /* Disable Compare write complete interrupt */
901 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPOK);
902
903 /* Disable Autoreload match interrupt */
904 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
905
906 /* Disable Compare match interrupt */
907 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
908
909 /* If external trigger source is used, then disable external trigger interrupt */
910 if ((hlptim->Init.Trigger.Source) != LPTIM_TRIGSOURCE_SOFTWARE)
911 {
912 /* Disable external trigger interrupt */
913 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_EXTTRIG);
914 }
915
916 /* Change the TIM state*/
917 hlptim->State = HAL_LPTIM_STATE_READY;
918
919 /* Return function status */
920 return HAL_OK;
921 }
922
923 /**
924 * @brief Start the Encoder interface.
925 * @param hlptim LPTIM handle
926 * @param Period Specifies the Autoreload value.
927 * This parameter must be a value between 0x0000 and 0xFFFF.
928 * @retval HAL status
929 */
930 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
931 {
932 uint32_t tmpcfgr;
933
934 /* Check the parameters */
935 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
936 assert_param(IS_LPTIM_PERIOD(Period));
937 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
938 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
939 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
940
941 /* Set the LPTIM state */
942 hlptim->State = HAL_LPTIM_STATE_BUSY;
943
944 /* Get the LPTIMx CFGR value */
945 tmpcfgr = hlptim->Instance->CFGR;
946
947 /* Clear CKPOL bits */
948 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
949
950 /* Set Input polarity */
951 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
952
953 /* Write to LPTIMx CFGR */
954 hlptim->Instance->CFGR = tmpcfgr;
955
956 /* Set ENC bit to enable the encoder interface */
957 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
958
959 /* Enable the Peripheral */
960 __HAL_LPTIM_ENABLE(hlptim);
961
962 /* Load the period value in the autoreload register */
963 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
964
965 /* Start timer in continuous mode */
966 __HAL_LPTIM_START_CONTINUOUS(hlptim);
967
968 /* Change the TIM state*/
969 hlptim->State = HAL_LPTIM_STATE_READY;
970
971 /* Return function status */
972 return HAL_OK;
973 }
974
975 /**
976 * @brief Stop the Encoder interface.
977 * @param hlptim LPTIM handle
978 * @retval HAL status
979 */
980 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop(LPTIM_HandleTypeDef *hlptim)
981 {
982 /* Check the parameters */
983 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
984
985 /* Set the LPTIM state */
986 hlptim->State = HAL_LPTIM_STATE_BUSY;
987
988 /* Disable the Peripheral */
989 __HAL_LPTIM_DISABLE(hlptim);
990
991 /* Reset ENC bit to disable the encoder interface */
992 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
993
994 /* Change the TIM state*/
995 hlptim->State = HAL_LPTIM_STATE_READY;
996
997 /* Return function status */
998 return HAL_OK;
999 }
1000
1001 /**
1002 * @brief Start the Encoder interface in interrupt mode.
1003 * @param hlptim LPTIM handle
1004 * @param Period Specifies the Autoreload value.
1005 * This parameter must be a value between 0x0000 and 0xFFFF.
1006 * @retval HAL status
1007 */
1008 HAL_StatusTypeDef HAL_LPTIM_Encoder_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1009 {
1010 uint32_t tmpcfgr;
1011
1012 /* Check the parameters */
1013 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1014 assert_param(IS_LPTIM_PERIOD(Period));
1015 assert_param(hlptim->Init.Clock.Source == LPTIM_CLOCKSOURCE_APBCLOCK_LPOSC);
1016 assert_param(hlptim->Init.Clock.Prescaler == LPTIM_PRESCALER_DIV1);
1017 assert_param(IS_LPTIM_CLOCK_POLARITY(hlptim->Init.UltraLowPowerClock.Polarity));
1018
1019 /* Set the LPTIM state */
1020 hlptim->State = HAL_LPTIM_STATE_BUSY;
1021
1022 /* Configure edge sensitivity for encoder mode */
1023 /* Get the LPTIMx CFGR value */
1024 tmpcfgr = hlptim->Instance->CFGR;
1025
1026 /* Clear CKPOL bits */
1027 tmpcfgr &= (uint32_t)(~LPTIM_CFGR_CKPOL);
1028
1029 /* Set Input polarity */
1030 tmpcfgr |= hlptim->Init.UltraLowPowerClock.Polarity;
1031
1032 /* Write to LPTIMx CFGR */
1033 hlptim->Instance->CFGR = tmpcfgr;
1034
1035 /* Set ENC bit to enable the encoder interface */
1036 hlptim->Instance->CFGR |= LPTIM_CFGR_ENC;
1037
1038 /* Enable "switch to down direction" interrupt */
1039 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_DOWN);
1040
1041 /* Enable "switch to up direction" interrupt */
1042 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_UP);
1043
1044 /* Enable the Peripheral */
1045 __HAL_LPTIM_ENABLE(hlptim);
1046
1047 /* Load the period value in the autoreload register */
1048 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1049
1050 /* Start timer in continuous mode */
1051 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1052
1053 /* Change the TIM state*/
1054 hlptim->State = HAL_LPTIM_STATE_READY;
1055
1056 /* Return function status */
1057 return HAL_OK;
1058 }
1059
1060 /**
1061 * @brief Stop the Encoder interface in interrupt mode.
1062 * @param hlptim LPTIM handle
1063 * @retval HAL status
1064 */
1065 HAL_StatusTypeDef HAL_LPTIM_Encoder_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1066 {
1067 /* Check the parameters */
1068 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1069
1070 /* Set the LPTIM state */
1071 hlptim->State = HAL_LPTIM_STATE_BUSY;
1072
1073 /* Disable the Peripheral */
1074 __HAL_LPTIM_DISABLE(hlptim);
1075
1076 /* Reset ENC bit to disable the encoder interface */
1077 hlptim->Instance->CFGR &= ~LPTIM_CFGR_ENC;
1078
1079 /* Disable "switch to down direction" interrupt */
1080 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_DOWN);
1081
1082 /* Disable "switch to up direction" interrupt */
1083 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_UP);
1084
1085 /* Change the TIM state*/
1086 hlptim->State = HAL_LPTIM_STATE_READY;
1087
1088 /* Return function status */
1089 return HAL_OK;
1090 }
1091
1092 /**
1093 * @brief Start the Timeout function.
1094 * @note The first trigger event will start the timer, any successive
1095 * trigger event will reset the counter and the timer restarts.
1096 * @param hlptim LPTIM handle
1097 * @param Period Specifies the Autoreload value.
1098 * This parameter must be a value between 0x0000 and 0xFFFF.
1099 * @param Timeout Specifies the TimeOut value to reset the counter.
1100 * This parameter must be a value between 0x0000 and 0xFFFF.
1101 * @retval HAL status
1102 */
1103 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1104 {
1105 /* Check the parameters */
1106 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1107 assert_param(IS_LPTIM_PERIOD(Period));
1108 assert_param(IS_LPTIM_PULSE(Timeout));
1109
1110 /* Set the LPTIM state */
1111 hlptim->State = HAL_LPTIM_STATE_BUSY;
1112
1113 /* Set TIMOUT bit to enable the timeout function */
1114 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1115
1116 /* Enable the Peripheral */
1117 __HAL_LPTIM_ENABLE(hlptim);
1118
1119 /* Load the period value in the autoreload register */
1120 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1121
1122 /* Load the Timeout value in the compare register */
1123 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1124
1125 /* Start timer in continuous mode */
1126 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1127
1128 /* Change the TIM state*/
1129 hlptim->State = HAL_LPTIM_STATE_READY;
1130
1131 /* Return function status */
1132 return HAL_OK;
1133 }
1134
1135 /**
1136 * @brief Stop the Timeout function.
1137 * @param hlptim LPTIM handle
1138 * @retval HAL status
1139 */
1140 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop(LPTIM_HandleTypeDef *hlptim)
1141 {
1142 /* Check the parameters */
1143 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1144
1145 /* Set the LPTIM state */
1146 hlptim->State = HAL_LPTIM_STATE_BUSY;
1147
1148 /* Disable the Peripheral */
1149 __HAL_LPTIM_DISABLE(hlptim);
1150
1151 /* Reset TIMOUT bit to enable the timeout function */
1152 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1153
1154 /* Change the TIM state*/
1155 hlptim->State = HAL_LPTIM_STATE_READY;
1156
1157 /* Return function status */
1158 return HAL_OK;
1159 }
1160
1161 /**
1162 * @brief Start the Timeout function in interrupt mode.
1163 * @note The first trigger event will start the timer, any successive
1164 * trigger event will reset the counter and the timer restarts.
1165 * @param hlptim LPTIM handle
1166 * @param Period Specifies the Autoreload value.
1167 * This parameter must be a value between 0x0000 and 0xFFFF.
1168 * @param Timeout Specifies the TimeOut value to reset the counter.
1169 * This parameter must be a value between 0x0000 and 0xFFFF.
1170 * @retval HAL status
1171 */
1172 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period, uint32_t Timeout)
1173 {
1174 /* Check the parameters */
1175 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1176 assert_param(IS_LPTIM_PERIOD(Period));
1177 assert_param(IS_LPTIM_PULSE(Timeout));
1178
1179 /* Set the LPTIM state */
1180 hlptim->State = HAL_LPTIM_STATE_BUSY;
1181
1182 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1183 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1184
1185 /* Set TIMOUT bit to enable the timeout function */
1186 hlptim->Instance->CFGR |= LPTIM_CFGR_TIMOUT;
1187
1188 /* Enable Compare match interrupt */
1189 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_CMPM);
1190
1191 /* Enable the Peripheral */
1192 __HAL_LPTIM_ENABLE(hlptim);
1193
1194 /* Load the period value in the autoreload register */
1195 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1196
1197 /* Load the Timeout value in the compare register */
1198 __HAL_LPTIM_COMPARE_SET(hlptim, Timeout);
1199
1200 /* Start timer in continuous mode */
1201 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1202
1203 /* Change the TIM state*/
1204 hlptim->State = HAL_LPTIM_STATE_READY;
1205
1206 /* Return function status */
1207 return HAL_OK;
1208 }
1209
1210 /**
1211 * @brief Stop the Timeout function in interrupt mode.
1212 * @param hlptim LPTIM handle
1213 * @retval HAL status
1214 */
1215 HAL_StatusTypeDef HAL_LPTIM_TimeOut_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1216 {
1217 /* Check the parameters */
1218 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1219
1220 /* Set the LPTIM state */
1221 hlptim->State = HAL_LPTIM_STATE_BUSY;
1222
1223 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1224 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1225
1226 /* Disable the Peripheral */
1227 __HAL_LPTIM_DISABLE(hlptim);
1228
1229 /* Reset TIMOUT bit to enable the timeout function */
1230 hlptim->Instance->CFGR &= ~LPTIM_CFGR_TIMOUT;
1231
1232 /* Disable Compare match interrupt */
1233 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_CMPM);
1234
1235 /* Change the TIM state*/
1236 hlptim->State = HAL_LPTIM_STATE_READY;
1237
1238 /* Return function status */
1239 return HAL_OK;
1240 }
1241
1242 /**
1243 * @brief Start the Counter mode.
1244 * @param hlptim LPTIM handle
1245 * @param Period Specifies the Autoreload value.
1246 * This parameter must be a value between 0x0000 and 0xFFFF.
1247 * @retval HAL status
1248 */
1249 HAL_StatusTypeDef HAL_LPTIM_Counter_Start(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1250 {
1251 /* Check the parameters */
1252 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1253 assert_param(IS_LPTIM_PERIOD(Period));
1254
1255 /* Set the LPTIM state */
1256 hlptim->State = HAL_LPTIM_STATE_BUSY;
1257
1258 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1259 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1260 {
1261 /* Check if clock is prescaled */
1262 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1263 /* Set clock prescaler to 0 */
1264 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1265 }
1266
1267 /* Enable the Peripheral */
1268 __HAL_LPTIM_ENABLE(hlptim);
1269
1270 /* Load the period value in the autoreload register */
1271 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1272
1273 /* Start timer in continuous mode */
1274 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1275
1276 /* Change the TIM state*/
1277 hlptim->State = HAL_LPTIM_STATE_READY;
1278
1279 /* Return function status */
1280 return HAL_OK;
1281 }
1282
1283 /**
1284 * @brief Stop the Counter mode.
1285 * @param hlptim LPTIM handle
1286 * @retval HAL status
1287 */
1288 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop(LPTIM_HandleTypeDef *hlptim)
1289 {
1290 /* Check the parameters */
1291 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1292
1293 /* Set the LPTIM state */
1294 hlptim->State = HAL_LPTIM_STATE_BUSY;
1295
1296 /* Disable the Peripheral */
1297 __HAL_LPTIM_DISABLE(hlptim);
1298
1299 /* Change the TIM state*/
1300 hlptim->State = HAL_LPTIM_STATE_READY;
1301
1302 /* Return function status */
1303 return HAL_OK;
1304 }
1305
1306 /**
1307 * @brief Start the Counter mode in interrupt mode.
1308 * @param hlptim LPTIM handle
1309 * @param Period Specifies the Autoreload value.
1310 * This parameter must be a value between 0x0000 and 0xFFFF.
1311 * @retval HAL status
1312 */
1313 HAL_StatusTypeDef HAL_LPTIM_Counter_Start_IT(LPTIM_HandleTypeDef *hlptim, uint32_t Period)
1314 {
1315 /* Check the parameters */
1316 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1317 assert_param(IS_LPTIM_PERIOD(Period));
1318
1319 /* Set the LPTIM state */
1320 hlptim->State = HAL_LPTIM_STATE_BUSY;
1321
1322 /* Enable EXTI Line interrupt on the LPTIM Wake-up Timer */
1323 __HAL_LPTIM_WAKEUPTIMER_EXTI_ENABLE_IT();
1324
1325 /* If clock source is not ULPTIM clock and counter source is external, then it must not be prescaled */
1326 if ((hlptim->Init.Clock.Source != LPTIM_CLOCKSOURCE_ULPTIM) && (hlptim->Init.CounterSource == LPTIM_COUNTERSOURCE_EXTERNAL))
1327 {
1328 /* Check if clock is prescaled */
1329 assert_param(IS_LPTIM_CLOCK_PRESCALERDIV1(hlptim->Init.Clock.Prescaler));
1330 /* Set clock prescaler to 0 */
1331 hlptim->Instance->CFGR &= ~LPTIM_CFGR_PRESC;
1332 }
1333
1334 /* Enable Autoreload write complete interrupt */
1335 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARROK);
1336
1337 /* Enable Autoreload match interrupt */
1338 __HAL_LPTIM_ENABLE_IT(hlptim, LPTIM_IT_ARRM);
1339
1340 /* Enable the Peripheral */
1341 __HAL_LPTIM_ENABLE(hlptim);
1342
1343 /* Load the period value in the autoreload register */
1344 __HAL_LPTIM_AUTORELOAD_SET(hlptim, Period);
1345
1346 /* Start timer in continuous mode */
1347 __HAL_LPTIM_START_CONTINUOUS(hlptim);
1348
1349 /* Change the TIM state*/
1350 hlptim->State = HAL_LPTIM_STATE_READY;
1351
1352 /* Return function status */
1353 return HAL_OK;
1354 }
1355
1356 /**
1357 * @brief Stop the Counter mode in interrupt mode.
1358 * @param hlptim LPTIM handle
1359 * @retval HAL status
1360 */
1361 HAL_StatusTypeDef HAL_LPTIM_Counter_Stop_IT(LPTIM_HandleTypeDef *hlptim)
1362 {
1363 /* Check the parameters */
1364 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1365
1366 /* Set the LPTIM state */
1367 hlptim->State = HAL_LPTIM_STATE_BUSY;
1368
1369 /* Disable EXTI Line interrupt on the LPTIM Wake-up Timer */
1370 __HAL_LPTIM_WAKEUPTIMER_EXTI_DISABLE_IT();
1371
1372 /* Disable the Peripheral */
1373 __HAL_LPTIM_DISABLE(hlptim);
1374
1375 /* Disable Autoreload write complete interrupt */
1376 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARROK);
1377
1378 /* Disable Autoreload match interrupt */
1379 __HAL_LPTIM_DISABLE_IT(hlptim, LPTIM_IT_ARRM);
1380
1381 /* Change the TIM state*/
1382 hlptim->State = HAL_LPTIM_STATE_READY;
1383
1384 /* Return function status */
1385 return HAL_OK;
1386 }
1387
1388 /**
1389 * @}
1390 */
1391
1392 /** @defgroup LPTIM_Exported_Functions_Group3 LPTIM Read operation functions
1393 * @brief Read operation functions.
1394 *
1395 @verbatim
1396 ==============================================================================
1397 ##### LPTIM Read operation functions #####
1398 ==============================================================================
1399 [..] This section provides LPTIM Reading functions.
1400 (+) Read the counter value.
1401 (+) Read the period (Auto-reload) value.
1402 (+) Read the pulse (Compare)value.
1403 @endverbatim
1404 * @{
1405 */
1406
1407 /**
1408 * @brief Return the current counter value.
1409 * @param hlptim LPTIM handle
1410 * @retval Counter value.
1411 */
1412 uint32_t HAL_LPTIM_ReadCounter(LPTIM_HandleTypeDef *hlptim)
1413 {
1414 /* Check the parameters */
1415 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1416
1417 return (hlptim->Instance->CNT);
1418 }
1419
1420 /**
1421 * @brief Return the current Autoreload (Period) value.
1422 * @param hlptim LPTIM handle
1423 * @retval Autoreload value.
1424 */
1425 uint32_t HAL_LPTIM_ReadAutoReload(LPTIM_HandleTypeDef *hlptim)
1426 {
1427 /* Check the parameters */
1428 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1429
1430 return (hlptim->Instance->ARR);
1431 }
1432
1433 /**
1434 * @brief Return the current Compare (Pulse) value.
1435 * @param hlptim LPTIM handle
1436 * @retval Compare value.
1437 */
1438 uint32_t HAL_LPTIM_ReadCompare(LPTIM_HandleTypeDef *hlptim)
1439 {
1440 /* Check the parameters */
1441 assert_param(IS_LPTIM_INSTANCE(hlptim->Instance));
1442
1443 return (hlptim->Instance->CMP);
1444 }
1445
1446 /**
1447 * @}
1448 */
1449
1450 /** @defgroup LPTIM_Exported_Functions_Group4 LPTIM IRQ handler and callbacks
1451 * @brief LPTIM IRQ handler.
1452 *
1453 @verbatim
1454 ==============================================================================
1455 ##### LPTIM IRQ handler and callbacks #####
1456 ==============================================================================
1457 [..] This section provides LPTIM IRQ handler and callback functions called within
1458 the IRQ handler:
1459 (+) LPTIM interrupt request handler
1460 (+) Compare match Callback
1461 (+) Auto-reload match Callback
1462 (+) External trigger event detection Callback
1463 (+) Compare register write complete Callback
1464 (+) Auto-reload register write complete Callback
1465 (+) Up-counting direction change Callback
1466 (+) Down-counting direction change Callback
1467
1468 @endverbatim
1469 * @{
1470 */
1471
1472 /**
1473 * @brief Handle LPTIM interrupt request.
1474 * @param hlptim LPTIM handle
1475 * @retval None
1476 */
1477 void HAL_LPTIM_IRQHandler(LPTIM_HandleTypeDef *hlptim)
1478 {
1479 /* Compare match interrupt */
1480 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPM) != RESET)
1481 {
1482 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPM) != RESET)
1483 {
1484 /* Clear Compare match flag */
1485 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPM);
1486
1487 /* Compare match Callback */
1488 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1489 hlptim->CompareMatchCallback(hlptim);
1490 #else
1491 HAL_LPTIM_CompareMatchCallback(hlptim);
1492 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1493 }
1494 }
1495
1496 /* Autoreload match interrupt */
1497 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARRM) != RESET)
1498 {
1499 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARRM) != RESET)
1500 {
1501 /* Clear Autoreload match flag */
1502 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARRM);
1503
1504 /* Autoreload match Callback */
1505 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1506 hlptim->AutoReloadMatchCallback(hlptim);
1507 #else
1508 HAL_LPTIM_AutoReloadMatchCallback(hlptim);
1509 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1510 }
1511 }
1512
1513 /* Trigger detected interrupt */
1514 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_EXTTRIG) != RESET)
1515 {
1516 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_EXTTRIG) != RESET)
1517 {
1518 /* Clear Trigger detected flag */
1519 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_EXTTRIG);
1520
1521 /* Trigger detected callback */
1522 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1523 hlptim->TriggerCallback(hlptim);
1524 #else
1525 HAL_LPTIM_TriggerCallback(hlptim);
1526 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1527 }
1528 }
1529
1530 /* Compare write interrupt */
1531 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_CMPOK) != RESET)
1532 {
1533 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_CMPOK) != RESET)
1534 {
1535 /* Clear Compare write flag */
1536 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_CMPOK);
1537
1538 /* Compare write Callback */
1539 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1540 hlptim->CompareWriteCallback(hlptim);
1541 #else
1542 HAL_LPTIM_CompareWriteCallback(hlptim);
1543 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1544 }
1545 }
1546
1547 /* Autoreload write interrupt */
1548 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_ARROK) != RESET)
1549 {
1550 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_ARROK) != RESET)
1551 {
1552 /* Clear Autoreload write flag */
1553 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_ARROK);
1554
1555 /* Autoreload write Callback */
1556 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1557 hlptim->AutoReloadWriteCallback(hlptim);
1558 #else
1559 HAL_LPTIM_AutoReloadWriteCallback(hlptim);
1560 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1561 }
1562 }
1563
1564 /* Direction counter changed from Down to Up interrupt */
1565 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_UP) != RESET)
1566 {
1567 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_UP) != RESET)
1568 {
1569 /* Clear Direction counter changed from Down to Up flag */
1570 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_UP);
1571
1572 /* Direction counter changed from Down to Up Callback */
1573 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1574 hlptim->DirectionUpCallback(hlptim);
1575 #else
1576 HAL_LPTIM_DirectionUpCallback(hlptim);
1577 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1578 }
1579 }
1580
1581 /* Direction counter changed from Up to Down interrupt */
1582 if (__HAL_LPTIM_GET_FLAG(hlptim, LPTIM_FLAG_DOWN) != RESET)
1583 {
1584 if (__HAL_LPTIM_GET_IT_SOURCE(hlptim, LPTIM_IT_DOWN) != RESET)
1585 {
1586 /* Clear Direction counter changed from Up to Down flag */
1587 __HAL_LPTIM_CLEAR_FLAG(hlptim, LPTIM_FLAG_DOWN);
1588
1589 /* Direction counter changed from Up to Down Callback */
1590 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1591 hlptim->DirectionDownCallback(hlptim);
1592 #else
1593 HAL_LPTIM_DirectionDownCallback(hlptim);
1594 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1595 }
1596 }
1597 }
1598
1599 /**
1600 * @brief Compare match callback in non-blocking mode.
1601 * @param hlptim LPTIM handle
1602 * @retval None
1603 */
1604 __weak void HAL_LPTIM_CompareMatchCallback(LPTIM_HandleTypeDef *hlptim)
1605 {
1606 /* Prevent unused argument(s) compilation warning */
1607 UNUSED(hlptim);
1608
1609 /* NOTE : This function should not be modified, when the callback is needed,
1610 the HAL_LPTIM_CompareMatchCallback could be implemented in the user file
1611 */
1612 }
1613
1614 /**
1615 * @brief Autoreload match callback in non-blocking mode.
1616 * @param hlptim LPTIM handle
1617 * @retval None
1618 */
1619 __weak void HAL_LPTIM_AutoReloadMatchCallback(LPTIM_HandleTypeDef *hlptim)
1620 {
1621 /* Prevent unused argument(s) compilation warning */
1622 UNUSED(hlptim);
1623
1624 /* NOTE : This function should not be modified, when the callback is needed,
1625 the HAL_LPTIM_AutoReloadMatchCallback could be implemented in the user file
1626 */
1627 }
1628
1629 /**
1630 * @brief Trigger detected callback in non-blocking mode.
1631 * @param hlptim LPTIM handle
1632 * @retval None
1633 */
1634 __weak void HAL_LPTIM_TriggerCallback(LPTIM_HandleTypeDef *hlptim)
1635 {
1636 /* Prevent unused argument(s) compilation warning */
1637 UNUSED(hlptim);
1638
1639 /* NOTE : This function should not be modified, when the callback is needed,
1640 the HAL_LPTIM_TriggerCallback could be implemented in the user file
1641 */
1642 }
1643
1644 /**
1645 * @brief Compare write callback in non-blocking mode.
1646 * @param hlptim LPTIM handle
1647 * @retval None
1648 */
1649 __weak void HAL_LPTIM_CompareWriteCallback(LPTIM_HandleTypeDef *hlptim)
1650 {
1651 /* Prevent unused argument(s) compilation warning */
1652 UNUSED(hlptim);
1653
1654 /* NOTE : This function should not be modified, when the callback is needed,
1655 the HAL_LPTIM_CompareWriteCallback could be implemented in the user file
1656 */
1657 }
1658
1659 /**
1660 * @brief Autoreload write callback in non-blocking mode.
1661 * @param hlptim LPTIM handle
1662 * @retval None
1663 */
1664 __weak void HAL_LPTIM_AutoReloadWriteCallback(LPTIM_HandleTypeDef *hlptim)
1665 {
1666 /* Prevent unused argument(s) compilation warning */
1667 UNUSED(hlptim);
1668
1669 /* NOTE : This function should not be modified, when the callback is needed,
1670 the HAL_LPTIM_AutoReloadWriteCallback could be implemented in the user file
1671 */
1672 }
1673
1674 /**
1675 * @brief Direction counter changed from Down to Up callback in non-blocking mode.
1676 * @param hlptim LPTIM handle
1677 * @retval None
1678 */
1679 __weak void HAL_LPTIM_DirectionUpCallback(LPTIM_HandleTypeDef *hlptim)
1680 {
1681 /* Prevent unused argument(s) compilation warning */
1682 UNUSED(hlptim);
1683
1684 /* NOTE : This function should not be modified, when the callback is needed,
1685 the HAL_LPTIM_DirectionUpCallback could be implemented in the user file
1686 */
1687 }
1688
1689 /**
1690 * @brief Direction counter changed from Up to Down callback in non-blocking mode.
1691 * @param hlptim LPTIM handle
1692 * @retval None
1693 */
1694 __weak void HAL_LPTIM_DirectionDownCallback(LPTIM_HandleTypeDef *hlptim)
1695 {
1696 /* Prevent unused argument(s) compilation warning */
1697 UNUSED(hlptim);
1698
1699 /* NOTE : This function should not be modified, when the callback is needed,
1700 the HAL_LPTIM_DirectionDownCallback could be implemented in the user file
1701 */
1702 }
1703
1704 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1705 /**
1706 * @brief Register a User LPTIM callback to be used instead of the weak predefined callback
1707 * @param hlptim LPTIM handle
1708 * @param CallbackID ID of the callback to be registered
1709 * This parameter can be one of the following values:
1710 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
1711 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
1712 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
1713 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
1714 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
1715 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
1716 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
1717 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
1718 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
1719 * @param pCallback pointer to the callback function
1720 * @retval status
1721 */
1722 HAL_StatusTypeDef HAL_LPTIM_RegisterCallback(LPTIM_HandleTypeDef *hlptim,
1723 HAL_LPTIM_CallbackIDTypeDef CallbackID,
1724 pLPTIM_CallbackTypeDef pCallback)
1725 {
1726 HAL_StatusTypeDef status = HAL_OK;
1727
1728 if (pCallback == NULL)
1729 {
1730 return HAL_ERROR;
1731 }
1732
1733 /* Process locked */
1734 __HAL_LOCK(hlptim);
1735
1736 if (hlptim->State == HAL_LPTIM_STATE_READY)
1737 {
1738 switch (CallbackID)
1739 {
1740 case HAL_LPTIM_MSPINIT_CB_ID :
1741 hlptim->MspInitCallback = pCallback;
1742 break;
1743
1744 case HAL_LPTIM_MSPDEINIT_CB_ID :
1745 hlptim->MspDeInitCallback = pCallback;
1746 break;
1747
1748 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
1749 hlptim->CompareMatchCallback = pCallback;
1750 break;
1751
1752 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
1753 hlptim->AutoReloadMatchCallback = pCallback;
1754 break;
1755
1756 case HAL_LPTIM_TRIGGER_CB_ID :
1757 hlptim->TriggerCallback = pCallback;
1758 break;
1759
1760 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
1761 hlptim->CompareWriteCallback = pCallback;
1762 break;
1763
1764 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
1765 hlptim->AutoReloadWriteCallback = pCallback;
1766 break;
1767
1768 case HAL_LPTIM_DIRECTION_UP_CB_ID :
1769 hlptim->DirectionUpCallback = pCallback;
1770 break;
1771
1772 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
1773 hlptim->DirectionDownCallback = pCallback;
1774 break;
1775
1776 default :
1777 /* Return error status */
1778 status = HAL_ERROR;
1779 break;
1780 }
1781 }
1782 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
1783 {
1784 switch (CallbackID)
1785 {
1786 case HAL_LPTIM_MSPINIT_CB_ID :
1787 hlptim->MspInitCallback = pCallback;
1788 break;
1789
1790 case HAL_LPTIM_MSPDEINIT_CB_ID :
1791 hlptim->MspDeInitCallback = pCallback;
1792 break;
1793
1794 default :
1795 /* Return error status */
1796 status = HAL_ERROR;
1797 break;
1798 }
1799 }
1800 else
1801 {
1802 /* Return error status */
1803 status = HAL_ERROR;
1804 }
1805
1806 /* Release Lock */
1807 __HAL_UNLOCK(hlptim);
1808
1809 return status;
1810 }
1811
1812 /**
1813 * @brief Unregister a LPTIM callback
1814 * LLPTIM callback is redirected to the weak predefined callback
1815 * @param hlptim LPTIM handle
1816 * @param CallbackID ID of the callback to be unregistered
1817 * This parameter can be one of the following values:
1818 * @arg @ref HAL_LPTIM_MSPINIT_CB_ID LPTIM Base Msp Init Callback ID
1819 * @arg @ref HAL_LPTIM_MSPDEINIT_CB_ID LPTIM Base Msp DeInit Callback ID
1820 * @arg @ref HAL_LPTIM_COMPARE_MATCH_CB_ID Compare match Callback ID
1821 * @arg @ref HAL_LPTIM_AUTORELOAD_MATCH_CB_ID Auto-reload match Callback ID
1822 * @arg @ref HAL_LPTIM_TRIGGER_CB_ID External trigger event detection Callback ID
1823 * @arg @ref HAL_LPTIM_COMPARE_WRITE_CB_ID Compare register write complete Callback ID
1824 * @arg @ref HAL_LPTIM_AUTORELOAD_WRITE_CB_ID Auto-reload register write complete Callback ID
1825 * @arg @ref HAL_LPTIM_DIRECTION_UP_CB_ID Up-counting direction change Callback ID
1826 * @arg @ref HAL_LPTIM_DIRECTION_DOWN_CB_ID Down-counting direction change Callback ID
1827 * @retval status
1828 */
1829 HAL_StatusTypeDef HAL_LPTIM_UnRegisterCallback(LPTIM_HandleTypeDef *hlptim,
1830 HAL_LPTIM_CallbackIDTypeDef CallbackID)
1831 {
1832 HAL_StatusTypeDef status = HAL_OK;
1833
1834 /* Process locked */
1835 __HAL_LOCK(hlptim);
1836
1837 if (hlptim->State == HAL_LPTIM_STATE_READY)
1838 {
1839 switch (CallbackID)
1840 {
1841 case HAL_LPTIM_MSPINIT_CB_ID :
1842 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
1843 break;
1844
1845 case HAL_LPTIM_MSPDEINIT_CB_ID :
1846 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
1847 break;
1848
1849 case HAL_LPTIM_COMPARE_MATCH_CB_ID :
1850 hlptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Legacy weak Compare match Callback */
1851 break;
1852
1853 case HAL_LPTIM_AUTORELOAD_MATCH_CB_ID :
1854 hlptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Legacy weak Auto-reload match Callback */
1855 break;
1856
1857 case HAL_LPTIM_TRIGGER_CB_ID :
1858 hlptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* Legacy weak External trigger event detection Callback */
1859 break;
1860
1861 case HAL_LPTIM_COMPARE_WRITE_CB_ID :
1862 hlptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Legacy weak Compare register write complete Callback */
1863 break;
1864
1865 case HAL_LPTIM_AUTORELOAD_WRITE_CB_ID :
1866 hlptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Legacy weak Auto-reload register write complete Callback */
1867 break;
1868
1869 case HAL_LPTIM_DIRECTION_UP_CB_ID :
1870 hlptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Legacy weak Up-counting direction change Callback */
1871 break;
1872
1873 case HAL_LPTIM_DIRECTION_DOWN_CB_ID :
1874 hlptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Legacy weak Down-counting direction change Callback */
1875 break;
1876
1877 default :
1878 /* Return error status */
1879 status = HAL_ERROR;
1880 break;
1881 }
1882 }
1883 else if (hlptim->State == HAL_LPTIM_STATE_RESET)
1884 {
1885 switch (CallbackID)
1886 {
1887 case HAL_LPTIM_MSPINIT_CB_ID :
1888 hlptim->MspInitCallback = HAL_LPTIM_MspInit; /* Legacy weak MspInit Callback */
1889 break;
1890
1891 case HAL_LPTIM_MSPDEINIT_CB_ID :
1892 hlptim->MspDeInitCallback = HAL_LPTIM_MspDeInit; /* Legacy weak Msp DeInit Callback */
1893 break;
1894
1895 default :
1896 /* Return error status */
1897 status = HAL_ERROR;
1898 break;
1899 }
1900 }
1901 else
1902 {
1903 /* Return error status */
1904 status = HAL_ERROR;
1905 }
1906
1907 /* Release Lock */
1908 __HAL_UNLOCK(hlptim);
1909
1910 return status;
1911 }
1912 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1913
1914 /**
1915 * @}
1916 */
1917
1918 /** @defgroup LPTIM_Group5 Peripheral State functions
1919 * @brief Peripheral State functions.
1920 *
1921 @verbatim
1922 ==============================================================================
1923 ##### Peripheral State functions #####
1924 ==============================================================================
1925 [..]
1926 This subsection permits to get in run-time the status of the peripheral.
1927
1928 @endverbatim
1929 * @{
1930 */
1931
1932 /**
1933 * @brief Return the LPTIM handle state.
1934 * @param hlptim LPTIM handle
1935 * @retval HAL state
1936 */
1937 HAL_LPTIM_StateTypeDef HAL_LPTIM_GetState(LPTIM_HandleTypeDef *hlptim)
1938 {
1939 /* Return LPTIM handle state */
1940 return hlptim->State;
1941 }
1942
1943 /**
1944 * @}
1945 */
1946
1947
1948 /**
1949 * @}
1950 */
1951
1952 /* Private functions ---------------------------------------------------------*/
1953
1954 /** @defgroup LPTIM_Private_Functions LPTIM Private Functions
1955 * @{
1956 */
1957 #if (USE_HAL_LPTIM_REGISTER_CALLBACKS == 1)
1958 /**
1959 * @brief Reset interrupt callbacks to the legacy weak callbacks.
1960 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
1961 * the configuration information for LPTIM module.
1962 * @retval None
1963 */
1964 static void LPTIM_ResetCallback(LPTIM_HandleTypeDef *lptim)
1965 {
1966 /* Reset the LPTIM callback to the legacy weak callbacks */
1967 lptim->CompareMatchCallback = HAL_LPTIM_CompareMatchCallback; /* Compare match Callback */
1968 lptim->AutoReloadMatchCallback = HAL_LPTIM_AutoReloadMatchCallback; /* Auto-reload match Callback */
1969 lptim->TriggerCallback = HAL_LPTIM_TriggerCallback; /* External trigger event detection Callback */
1970 lptim->CompareWriteCallback = HAL_LPTIM_CompareWriteCallback; /* Compare register write complete Callback */
1971 lptim->AutoReloadWriteCallback = HAL_LPTIM_AutoReloadWriteCallback; /* Auto-reload register write complete Callback */
1972 lptim->DirectionUpCallback = HAL_LPTIM_DirectionUpCallback; /* Up-counting direction change Callback */
1973 lptim->DirectionDownCallback = HAL_LPTIM_DirectionDownCallback; /* Down-counting direction change Callback */
1974 }
1975 #endif /* USE_HAL_LPTIM_REGISTER_CALLBACKS */
1976
1977 /**
1978 * @brief Disable LPTIM HW instance.
1979 * @param lptim pointer to a LPTIM_HandleTypeDef structure that contains
1980 * the configuration information for LPTIM module.
1981 * @note The following sequence is required to solve LPTIM disable HW limitation.
1982 * Please check Errata Sheet ES0335 for more details under "MCU may remain
1983 * stuck in LPTIM interrupt when entering Stop mode" section.
1984 * @retval None
1985 */
1986 void LPTIM_Disable(LPTIM_HandleTypeDef *lptim)
1987 {
1988 uint32_t tmpclksource = 0;
1989 uint32_t tmpIER;
1990 uint32_t tmpCFGR;
1991 uint32_t tmpCMP;
1992 uint32_t tmpARR;
1993 uint32_t tmpOR;
1994
1995 __disable_irq();
1996
1997 /*********** Save LPTIM Config ***********/
1998 /* Save LPTIM source clock */
1999 switch ((uint32_t)lptim->Instance)
2000 {
2001 case LPTIM1_BASE:
2002 tmpclksource = __HAL_RCC_GET_LPTIM1_SOURCE();
2003 break;
2004 default:
2005 break;
2006 }
2007
2008 /* Save LPTIM configuration registers */
2009 tmpIER = lptim->Instance->IER;
2010 tmpCFGR = lptim->Instance->CFGR;
2011 tmpCMP = lptim->Instance->CMP;
2012 tmpARR = lptim->Instance->ARR;
2013 tmpOR = lptim->Instance->OR;
2014
2015 /*********** Reset LPTIM ***********/
2016 switch ((uint32_t)lptim->Instance)
2017 {
2018 case LPTIM1_BASE:
2019 __HAL_RCC_LPTIM1_FORCE_RESET();
2020 __HAL_RCC_LPTIM1_RELEASE_RESET();
2021 break;
2022 default:
2023 break;
2024 }
2025
2026 /*********** Restore LPTIM Config ***********/
2027 uint32_t Ref_Time;
2028 uint32_t Time_Elapsed;
2029
2030 if ((tmpCMP != 0UL) || (tmpARR != 0UL))
2031 {
2032 /* Force LPTIM source kernel clock from APB */
2033 switch ((uint32_t)lptim->Instance)
2034 {
2035 case LPTIM1_BASE:
2036 __HAL_RCC_LPTIM1_CONFIG(RCC_LPTIM1CLKSOURCE_PCLK1);
2037 break;
2038 default:
2039 break;
2040 }
2041
2042 if (tmpCMP != 0UL)
2043 {
2044 /* Restore CMP register (LPTIM should be enabled first) */
2045 lptim->Instance->CR |= LPTIM_CR_ENABLE;
2046 lptim->Instance->CMP = tmpCMP;
2047 /* Polling on CMP write ok status after above restore operation */
2048 Ref_Time = HAL_GetTick();
2049 do
2050 {
2051 Time_Elapsed = HAL_GetTick() - Ref_Time;
2052 } while ((!(__HAL_LPTIM_GET_FLAG(lptim, LPTIM_FLAG_CMPOK))) && (Time_Elapsed <= TIMEOUT));
2053
2054 __HAL_LPTIM_CLEAR_FLAG(lptim, LPTIM_FLAG_CMPOK);
2055 }
2056
2057 if (tmpARR != 0UL)
2058 {
2059 /* Restore ARR register (LPTIM should be enabled first) */
2060 lptim->Instance->CR |= LPTIM_CR_ENABLE;
2061 lptim->Instance->ARR = tmpARR;
2062 /* Polling on ARR write ok status after above restore operation */
2063 Ref_Time = HAL_GetTick();
2064 do
2065 {
2066 Time_Elapsed = HAL_GetTick() - Ref_Time;
2067 } while ((!(__HAL_LPTIM_GET_FLAG(lptim, LPTIM_FLAG_ARROK))) && (Time_Elapsed <= TIMEOUT));
2068
2069 __HAL_LPTIM_CLEAR_FLAG(lptim, LPTIM_FLAG_ARROK);
2070 }
2071
2072 /* Restore LPTIM source kernel clock */
2073 switch ((uint32_t)lptim->Instance)
2074 {
2075 case LPTIM1_BASE:
2076 __HAL_RCC_LPTIM1_CONFIG(tmpclksource);
2077 break;
2078 default:
2079 break;
2080 }
2081 }
2082
2083 /* Restore configuration registers (LPTIM should be disabled first) */
2084 lptim->Instance->CR &= ~(LPTIM_CR_ENABLE);
2085 lptim->Instance->IER = tmpIER;
2086 lptim->Instance->CFGR = tmpCFGR;
2087 lptim->Instance->OR = tmpOR;
2088
2089 __enable_irq();
2090 }
2091 /**
2092 * @}
2093 */
2094
2095
2096 #endif /* HAL_LPTIM_MODULE_ENABLED */
2097 /**
2098 * @}
2099 */
2100
2101 /**
2102 * @}
2103 */
2104
2105 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/