lib/main/STM32G4/Drivers/STM32G4xx_HAL_Driver/Src/stm32g4xx_ll_usart.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32g4xx_ll_usart.c
   4   * @author  MCD Application Team
   5   * @brief   USART LL module driver.
   6   ******************************************************************************
   7   * @attention
   8   *
   9   * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
  10   * All rights reserved.</center></h2>
  11   *
  12   * This software component is licensed by ST under BSD 3-Clause license,
  13   * the "License"; You may not use this file except in compliance with the
  14   * License. You may obtain a copy of the License at:
  15   *                        opensource.org/licenses/BSD-3-Clause
  16   *
  17   ******************************************************************************
  18   */
  19 #if defined(USE_FULL_LL_DRIVER)
  20
  21 /* Includes ------------------------------------------------------------------*/
  22 #include "stm32g4xx_ll_usart.h"
  23 #include "stm32g4xx_ll_rcc.h"
  24 #include "stm32g4xx_ll_bus.h"
  25 #ifdef USE_FULL_ASSERT
  26 #include "stm32_assert.h"
  27 #else
  28 #define assert_param(expr) ((void)0U)
  29 #endif /* USE_FULL_ASSERT */
  30
  31 /** @addtogroup STM32G4xx_LL_Driver
  32   * @{
  33   */
  34
  35 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (UART4) || defined (UART5)
  36
  37 /** @addtogroup USART_LL
  38   * @{
  39   */
  40
  41 /* Private types -------------------------------------------------------------*/
  42 /* Private variables ---------------------------------------------------------*/
  43 /* Private constants ---------------------------------------------------------*/
  44 /** @addtogroup USART_LL_Private_Constants
  45   * @{
  46   */
  47
  48 /**
  49   * @}
  50   */
  51
  52 /* Private macros ------------------------------------------------------------*/
  53 /** @addtogroup USART_LL_Private_Macros
  54   * @{
  55   */
  56
  57 #define IS_LL_USART_PRESCALER(__VALUE__)  (((__VALUE__) == LL_USART_PRESCALER_DIV1) \
  58                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV2) \
  59                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV4) \
  60                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV6) \
  61                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV8) \
  62                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV10) \
  63                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV12) \
  64                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV16) \
  65                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV32) \
  66                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV64) \
  67                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV128) \
  68                                            || ((__VALUE__) == LL_USART_PRESCALER_DIV256))
  69
  70 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
  71  *              divided by the smallest oversampling used on the USART (i.e. 8)    */
  72 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 18750000U)
  73
  74 /* __VALUE__ In case of oversampling by 16 and 8, BRR content must be greater than or equal to 16d. */
  75 #define IS_LL_USART_BRR_MIN(__VALUE__) ((__VALUE__) >= 16U)
  76
  77 /* __VALUE__ BRR content must be lower than or equal to 0xFFFF. */
  78 #define IS_LL_USART_BRR_MAX(__VALUE__) ((__VALUE__) <= 0x0000FFFFU)
  79
  80 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
  81                                           || ((__VALUE__) == LL_USART_DIRECTION_RX) \
  82                                           || ((__VALUE__) == LL_USART_DIRECTION_TX) \
  83                                           || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
  84
  85 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
  86                                        || ((__VALUE__) == LL_USART_PARITY_EVEN) \
  87                                        || ((__VALUE__) == LL_USART_PARITY_ODD))
  88
  89 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_7B) \
  90                                           || ((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  91                                           || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
  92
  93 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
  94                                              || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
  95
  96 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
  97                                                  || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
  98
  99 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
 100                                            || ((__VALUE__) == LL_USART_PHASE_2EDGE))
 101
 102 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
 103                                               || ((__VALUE__) == LL_USART_POLARITY_HIGH))
 104
 105 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
 106                                             || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
 107
 108 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
 109                                          || ((__VALUE__) == LL_USART_STOPBITS_1) \
 110                                          || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
 111                                          || ((__VALUE__) == LL_USART_STOPBITS_2))
 112
 113 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
 114                                           || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
 115                                           || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
 116                                           || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
 117
 118 /**
 119   * @}
 120   */
 121
 122 /* Private function prototypes -----------------------------------------------*/
 123
 124 /* Exported functions --------------------------------------------------------*/
 125 /** @addtogroup USART_LL_Exported_Functions
 126   * @{
 127   */
 128
 129 /** @addtogroup USART_LL_EF_Init
 130   * @{
 131   */
 132
 133 /**
 134   * @brief  De-initialize USART registers (Registers restored to their default values).
 135   * @param  USARTx USART Instance
 136   * @retval An ErrorStatus enumeration value:
 137   *          - SUCCESS: USART registers are de-initialized
 138   *          - ERROR: USART registers are not de-initialized
 139   */
 140 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
 141 {
 142   ErrorStatus status = SUCCESS;
 143
 144   /* Check the parameters */
 145   assert_param(IS_UART_INSTANCE(USARTx));
 146
 147   if (USARTx == USART1)
 148   {
 149     /* Force reset of USART clock */
 150     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
 151
 152     /* Release reset of USART clock */
 153     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
 154   }
 155   else if (USARTx == USART2)
 156   {
 157     /* Force reset of USART clock */
 158     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
 159
 160     /* Release reset of USART clock */
 161     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
 162   }
 163   else if (USARTx == USART3)
 164   {
 165     /* Force reset of USART clock */
 166     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
 167
 168     /* Release reset of USART clock */
 169     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
 170   }
 171 #if defined(UART4)
 172   else if (USARTx == UART4)
 173   {
 174     /* Force reset of UART clock */
 175     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
 176
 177     /* Release reset of UART clock */
 178     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
 179   }
 180 #endif /* UART4 */
 181 #if defined(UART5)
 182   else if (USARTx == UART5)
 183   {
 184     /* Force reset of UART clock */
 185     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
 186
 187     /* Release reset of UART clock */
 188     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
 189   }
 190 #endif /* UART5 */
 191   else
 192   {
 193     status = ERROR;
 194   }
 195
 196   return (status);
 197 }
 198
 199 /**
 200   * @brief  Initialize USART registers according to the specified
 201   *         parameters in USART_InitStruct.
 202   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 203   *         USART Peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 204   * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
 205   * @param  USARTx USART Instance
 206   * @param  USART_InitStruct pointer to a LL_USART_InitTypeDef structure
 207   *         that contains the configuration information for the specified USART peripheral.
 208   * @retval An ErrorStatus enumeration value:
 209   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
 210   *          - ERROR: Problem occurred during USART Registers initialization
 211   */
 212 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
 213 {
 214   ErrorStatus status = ERROR;
 215   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
 216
 217   /* Check the parameters */
 218   assert_param(IS_UART_INSTANCE(USARTx));
 219   assert_param(IS_LL_USART_PRESCALER(USART_InitStruct->PrescalerValue));
 220   assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
 221   assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
 222   assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
 223   assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
 224   assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
 225   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
 226   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
 227
 228   /* USART needs to be in disabled state, in order to be able to configure some bits in
 229      CRx registers */
 230   if (LL_USART_IsEnabled(USARTx) == 0U)
 231   {
 232     /*---------------------------- USART CR1 Configuration ---------------------
 233      * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
 234      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
 235      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
 236      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
 237      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
 238      */
 239     MODIFY_REG(USARTx->CR1,
 240                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
 241                 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
 242                (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
 243                 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
 244
 245     /*---------------------------- USART CR2 Configuration ---------------------
 246      * Configure USARTx CR2 (Stop bits) with parameters:
 247      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
 248      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
 249      */
 250     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
 251
 252     /*---------------------------- USART CR3 Configuration ---------------------
 253      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
 254      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
 255      */
 256     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
 257
 258     /*---------------------------- USART BRR Configuration ---------------------
 259      * Retrieve Clock frequency used for USART Peripheral
 260      */
 261     if (USARTx == USART1)
 262     {
 263       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART1_CLKSOURCE);
 264     }
 265     else if (USARTx == USART2)
 266     {
 267       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART2_CLKSOURCE);
 268     }
 269     else if (USARTx == USART3)
 270     {
 271       periphclk = LL_RCC_GetUSARTClockFreq(LL_RCC_USART3_CLKSOURCE);
 272     }
 273 #if defined(UART4)
 274     else if (USARTx == UART4)
 275     {
 276       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART4_CLKSOURCE);
 277     }
 278 #endif /* UART4 */
 279 #if defined(UART5)
 280     else if (USARTx == UART5)
 281     {
 282       periphclk = LL_RCC_GetUARTClockFreq(LL_RCC_UART5_CLKSOURCE);
 283     }
 284 #endif /* UART5 */
 285     else
 286     {
 287       /* Nothing to do, as error code is already assigned to ERROR value */
 288     }
 289
 290     /* Configure the USART Baud Rate :
 291        - prescaler value is required
 292        - valid baud rate value (different from 0) is required
 293        - Peripheral clock as returned by RCC service, should be valid (different from 0).
 294     */
 295     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
 296         && (USART_InitStruct->BaudRate != 0U))
 297     {
 298       status = SUCCESS;
 299       LL_USART_SetBaudRate(USARTx,
 300                            periphclk,
 301                            USART_InitStruct->PrescalerValue,
 302                            USART_InitStruct->OverSampling,
 303                            USART_InitStruct->BaudRate);
 304
 305       /* Check BRR is greater than or equal to 16d */
 306       assert_param(IS_LL_USART_BRR_MIN(USARTx->BRR));
 307
 308       /* Check BRR is lower than or equal to 0xFFFF */
 309       assert_param(IS_LL_USART_BRR_MAX(USARTx->BRR));
 310     }
 311
 312     /*---------------------------- USART PRESC Configuration -----------------------
 313      * Configure USARTx PRESC (Prescaler) with parameters:
 314      * - PrescalerValue: USART_PRESC_PRESCALER bits according to USART_InitStruct->PrescalerValue value.
 315      */
 316     LL_USART_SetPrescaler(USARTx, USART_InitStruct->PrescalerValue);
 317   }
 318   /* Endif (=> USART not in Disabled state => return ERROR) */
 319
 320   return (status);
 321 }
 322
 323 /**
 324   * @brief Set each @ref LL_USART_InitTypeDef field to default value.
 325   * @param USART_InitStruct pointer to a @ref LL_USART_InitTypeDef structure
 326   *                         whose fields will be set to default values.
 327   * @retval None
 328   */
 329
 330 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
 331 {
 332   /* Set USART_InitStruct fields to default values */
 333   USART_InitStruct->PrescalerValue      = LL_USART_PRESCALER_DIV1;
 334   USART_InitStruct->BaudRate            = 9600U;
 335   USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
 336   USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
 337   USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
 338   USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
 339   USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
 340   USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
 341 }
 342
 343 /**
 344   * @brief  Initialize USART Clock related settings according to the
 345   *         specified parameters in the USART_ClockInitStruct.
 346   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 347   *         USART Peripheral should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 348   * @param  USARTx USART Instance
 349   * @param  USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
 350   *         that contains the Clock configuration information for the specified USART peripheral.
 351   * @retval An ErrorStatus enumeration value:
 352   *          - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
 353   *          - ERROR: Problem occurred during USART Registers initialization
 354   */
 355 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 356 {
 357   ErrorStatus status = SUCCESS;
 358
 359   /* Check USART Instance and Clock signal output parameters */
 360   assert_param(IS_UART_INSTANCE(USARTx));
 361   assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
 362
 363   /* USART needs to be in disabled state, in order to be able to configure some bits in
 364      CRx registers */
 365   if (LL_USART_IsEnabled(USARTx) == 0U)
 366   {
 367     /*---------------------------- USART CR2 Configuration -----------------------*/
 368     /* If Clock signal has to be output */
 369     if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
 370     {
 371       /* Deactivate Clock signal delivery :
 372        * - Disable Clock Output:        USART_CR2_CLKEN cleared
 373        */
 374       LL_USART_DisableSCLKOutput(USARTx);
 375     }
 376     else
 377     {
 378       /* Ensure USART instance is USART capable */
 379       assert_param(IS_USART_INSTANCE(USARTx));
 380
 381       /* Check clock related parameters */
 382       assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
 383       assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
 384       assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
 385
 386       /*---------------------------- USART CR2 Configuration -----------------------
 387        * Configure USARTx CR2 (Clock signal related bits) with parameters:
 388        * - Enable Clock Output:         USART_CR2_CLKEN set
 389        * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
 390        * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
 391        * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
 392        */
 393       MODIFY_REG(USARTx->CR2,
 394                  USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
 395                  USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
 396                  USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
 397     }
 398   }
 399   /* Else (USART not in Disabled state => return ERROR */
 400   else
 401   {
 402     status = ERROR;
 403   }
 404
 405   return (status);
 406 }
 407
 408 /**
 409   * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
 410   * @param USART_ClockInitStruct pointer to a @ref LL_USART_ClockInitTypeDef structure
 411   *                              whose fields will be set to default values.
 412   * @retval None
 413   */
 414 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 415 {
 416   /* Set LL_USART_ClockInitStruct fields with default values */
 417   USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
 418   USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 419   USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 420   USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 421 }
 422
 423 /**
 424   * @}
 425   */
 426
 427 /**
 428   * @}
 429   */
 430
 431 /**
 432   * @}
 433   */
 434
 435 #endif /* USART1 || USART2 || USART3 || UART4 || UART5 */
 436
 437 /**
 438   * @}
 439   */
 440
 441 #endif /* USE_FULL_LL_DRIVER */
 442
 443 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 444