lib/main/STM32_USB_OTG_Driver/inc/usb_conf_template.h

   1 /**
   2   ******************************************************************************
   3   * @file    usb_conf.h
   4   * @author  MCD Application Team
   5   * @version V2.2.0
   6   * @date    09-November-2015
   7   * @brief   General low level driver configuration
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT 2015 STMicroelectronics</center></h2>
  12   *
  13   * Licensed under MCD-ST Liberty SW License Agreement V2, (the "License");
  14   * You may not use this file except in compliance with the License.
  15   * You may obtain a copy of the License at:
  16   *
  17   *        http://www.st.com/software_license_agreement_liberty_v2
  18   *
  19   * Unless required by applicable law or agreed to in writing, software
  20   * distributed under the License is distributed on an "AS IS" BASIS,
  21   * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
  22   * See the License for the specific language governing permissions and
  23   * limitations under the License.
  24   *
  25   ******************************************************************************
  26   */
  27
  28 /* Define to prevent recursive inclusion -------------------------------------*/
  29 #ifndef __USB_CONF__H__
  30 #define __USB_CONF__H__
  31
  32 /* Includes ------------------------------------------------------------------*/
  33 #include "usb_conf.h"
  34
  35 /** @addtogroup USB_OTG_DRIVER
  36   * @{
  37   */
  38
  39 /** @defgroup USB_CONF
  40   * @brief USB low level driver configuration file
  41   * @{
  42   */
  43
  44 /** @defgroup USB_CONF_Exported_Defines
  45   * @{
  46   */
  47
  48 /* USB Core and PHY interface configuration.
  49    Tip: To avoid modifying these defines each time you need to change the USB
  50         configuration, you can declare the needed define in your toolchain
  51         compiler preprocessor.
  52    */
  53 /****************** USB OTG FS PHY CONFIGURATION *******************************
  54 *  The USB OTG FS Core supports one on-chip Full Speed PHY.
  55 *
  56 *  The USE_EMBEDDED_PHY symbol is defined in the project compiler preprocessor
  57 *  when FS core is used.
  58 *******************************************************************************/
  59 #ifndef USE_USB_OTG_FS
  60  //#define USE_USB_OTG_FS
  61 #endif /* USE_USB_OTG_FS */
  62
  63 #ifdef USE_USB_OTG_FS
  64  #define USB_OTG_FS_CORE
  65 #endif
  66
  67 /****************** USB OTG HS PHY CONFIGURATION *******************************
  68 *  The USB OTG HS Core supports two PHY interfaces:
  69 *   (i)  An ULPI interface for the external High Speed PHY: the USB HS Core will
  70 *        operate in High speed mode
  71 *   (ii) An on-chip Full Speed PHY: the USB HS Core will operate in Full speed mode
  72 *
  73 *  You can select the PHY to be used using one of these two defines:
  74 *   (i)  USE_ULPI_PHY: if the USB OTG HS Core is to be used in High speed mode
  75 *   (ii) USE_EMBEDDED_PHY: if the USB OTG HS Core is to be used in Full speed mode
  76 *
  77 *  Notes:
  78 *   - The USE_ULPI_PHY symbol is defined in the project compiler preprocessor as
  79 *     default PHY when HS core is used.
  80 *   - On STM322xG-EVAL and STM324xG-EVAL boards, only configuration(i) is available.
  81 *     Configuration (ii) need a different hardware, for more details refer to your
  82 *     STM32 device datasheet.
  83 *******************************************************************************/
  84 #ifndef USE_USB_OTG_HS
  85  //#define USE_USB_OTG_HS
  86 #endif /* USE_USB_OTG_HS */
  87
  88 #ifndef USE_ULPI_PHY
  89  //#define USE_ULPI_PHY
  90 #endif /* USE_ULPI_PHY */
  91
  92 #ifndef USE_EMBEDDED_PHY
  93  //#define USE_EMBEDDED_PHY
  94 #endif /* USE_EMBEDDED_PHY */
  95
  96 #ifdef USE_USB_OTG_HS
  97  #define USB_OTG_HS_CORE
  98 #endif
  99
 100 /*******************************************************************************
 101 *                      FIFO Size Configuration in Device mode
 102 *
 103 *  (i) Receive data FIFO size = RAM for setup packets +
 104 *                   OUT endpoint control information +
 105 *                   data OUT packets + miscellaneous
 106 *      Space = ONE 32-bits words
 107 *     --> RAM for setup packets = 10 spaces
 108 *        (n is the nbr of CTRL EPs the device core supports)
 109 *     --> OUT EP CTRL info      = 1 space
 110 *        (one space for status information written to the FIFO along with each
 111 *        received packet)
 112 *     --> data OUT packets      = (Largest Packet Size / 4) + 1 spaces
 113 *        (MINIMUM to receive packets)
 114 *     --> OR data OUT packets  = at least 2*(Largest Packet Size / 4) + 1 spaces
 115 *        (if high-bandwidth EP is enabled or multiple isochronous EPs)
 116 *     --> miscellaneous = 1 space per OUT EP
 117 *        (one space for transfer complete status information also pushed to the
 118 *        FIFO with each endpoint's last packet)
 119 *
 120 *  (ii)MINIMUM RAM space required for each IN EP Tx FIFO = MAX packet size for
 121 *       that particular IN EP. More space allocated in the IN EP Tx FIFO results
 122 *       in a better performance on the USB and can hide latencies on the AHB.
 123 *
 124 *  (iii) TXn min size = 16 words. (n  : Transmit FIFO index)
 125 *   (iv) When a TxFIFO is not used, the Configuration should be as follows:
 126 *       case 1 :  n > m    and Txn is not used    (n,m  : Transmit FIFO indexes)
 127 *       --> Txm can use the space allocated for Txn.
 128 *       case2  :  n < m    and Txn is not used    (n,m  : Transmit FIFO indexes)
 129 *       --> Txn should be configured with the minimum space of 16 words
 130 *  (v) The FIFO is used optimally when used TxFIFOs are allocated in the top
 131 *       of the FIFO.Ex: use EP1 and EP2 as IN instead of EP1 and EP3 as IN ones.
 132 *******************************************************************************/
 133
 134 /*******************************************************************************
 135 *                     FIFO Size Configuration in Host mode
 136 *
 137 *  (i) Receive data FIFO size = (Largest Packet Size / 4) + 1 or
 138 *                             2x (Largest Packet Size / 4) + 1,  If a
 139 *                             high-bandwidth channel or multiple isochronous
 140 *                             channels are enabled
 141 *
 142 *  (ii) For the host nonperiodic Transmit FIFO is the largest maximum packet size
 143 *      for all supported nonperiodic OUT channels. Typically, a space
 144 *      corresponding to two Largest Packet Size is recommended.
 145 *
 146 *  (iii) The minimum amount of RAM required for Host periodic Transmit FIFO is
 147 *        the largest maximum packet size for all supported periodic OUT channels.
 148 *        If there is at least one High Bandwidth Isochronous OUT endpoint,
 149 *        then the space must be at least two times the maximum packet size for
 150 *        that channel.
 151 *******************************************************************************/
 152
 153 /****************** USB OTG HS CONFIGURATION **********************************/
 154 #ifdef USB_OTG_HS_CORE
 155  #define RX_FIFO_HS_SIZE                          512
 156  #define TX0_FIFO_HS_SIZE                         512
 157  #define TX1_FIFO_HS_SIZE                         512
 158  #define TX2_FIFO_HS_SIZE                          0
 159  #define TX3_FIFO_HS_SIZE                          0
 160  #define TX4_FIFO_HS_SIZE                          0
 161  #define TX5_FIFO_HS_SIZE                          0
 162  #define TXH_NP_HS_FIFOSIZ                         96
 163  #define TXH_P_HS_FIFOSIZ                          96
 164
 165 // #define USB_OTG_HS_LOW_PWR_MGMT_SUPPORT
 166 // #define USB_OTG_HS_SOF_OUTPUT_ENABLED
 167
 168 // #define USB_OTG_INTERNAL_VBUS_ENABLED
 169  #define USB_OTG_EXTERNAL_VBUS_ENABLED
 170
 171  #ifdef USE_ULPI_PHY
 172   #define USB_OTG_ULPI_PHY_ENABLED
 173  #endif
 174  #ifdef USE_EMBEDDED_PHY
 175    #define USB_OTG_EMBEDDED_PHY_ENABLED
 176  #endif
 177  #define USB_OTG_HS_INTERNAL_DMA_ENABLED
 178  #define USB_OTG_HS_DEDICATED_EP1_ENABLED
 179 #endif
 180
 181 /****************** USB OTG FS CONFIGURATION **********************************/
 182 #ifdef USB_OTG_FS_CORE
 183  #define RX_FIFO_FS_SIZE                          128
 184  #define TX0_FIFO_FS_SIZE                          64
 185  #define TX1_FIFO_FS_SIZE                         128
 186  #define TX2_FIFO_FS_SIZE                          0
 187  #define TX3_FIFO_FS_SIZE                          0
 188  #define TXH_NP_HS_FIFOSIZ                         96
 189  #define TXH_P_HS_FIFOSIZ                          96
 190
 191 // #define USB_OTG_FS_LOW_PWR_MGMT_SUPPORT
 192 // #define USB_OTG_FS_SOF_OUTPUT_ENABLED
 193 #endif
 194
 195 /****************** USB OTG MISC CONFIGURATION ********************************/
 196 //#define VBUS_SENSING_ENABLED
 197
 198 /****************** USB OTG MODE CONFIGURATION ********************************/
 199 //#define USE_HOST_MODE
 200 #define USE_DEVICE_MODE
 201 //#define USE_OTG_MODE
 202
 203 #ifndef USB_OTG_FS_CORE
 204  #ifndef USB_OTG_HS_CORE
 205     #error  "USB_OTG_HS_CORE or USB_OTG_FS_CORE should be defined"
 206  #endif
 207 #endif
 208
 209 #ifndef USE_DEVICE_MODE
 210  #ifndef USE_HOST_MODE
 211     #error  "USE_DEVICE_MODE or USE_HOST_MODE should be defined"
 212  #endif
 213 #endif
 214
 215 #ifndef USE_USB_OTG_HS
 216  #ifndef USE_USB_OTG_FS
 217     #error  "USE_USB_OTG_HS or USE_USB_OTG_FS should be defined"
 218  #endif
 219 #else //USE_USB_OTG_HS
 220  #ifndef USE_ULPI_PHY
 221   #ifndef USE_EMBEDDED_PHY
 222      #error  "USE_ULPI_PHY or USE_EMBEDDED_PHY should be defined"
 223   #endif
 224  #endif
 225 #endif
 226
 227 /****************** C Compilers dependant keywords ****************************/
 228 /* In HS mode and when the DMA is used, all variables and data structures dealing
 229    with the DMA during the transaction process should be 4-bytes aligned */
 230 #ifdef USB_OTG_HS_INTERNAL_DMA_ENABLED
 231   #if defined   (__GNUC__)        /* GNU Compiler */
 232     #define __ALIGN_END    __attribute__ ((aligned (4)))
 233     #define __ALIGN_BEGIN
 234   #else
 235     #define __ALIGN_END
 236     #if defined   (__CC_ARM)      /* ARM Compiler */
 237       #define __ALIGN_BEGIN    __align(4)
 238     #elif defined (__ICCARM__)    /* IAR Compiler */
 239       #define __ALIGN_BEGIN
 240     #elif defined  (__TASKING__)  /* TASKING Compiler */
 241       #define __ALIGN_BEGIN    __align(4)
 242     #endif /* __CC_ARM */
 243   #endif /* __GNUC__ */
 244 #else
 245   #define __ALIGN_BEGIN
 246   #define __ALIGN_END
 247 #endif /* USB_OTG_HS_INTERNAL_DMA_ENABLED */
 248
 249 /* __packed keyword used to decrease the data type alignment to 1-byte */
 250 #if defined (__CC_ARM)         /* ARM Compiler */
 251   #define __packed    __packed
 252 #elif defined (__ICCARM__)     /* IAR Compiler */
 253   #define __packed    __packed
 254 #elif defined   ( __GNUC__ )   /* GNU Compiler */
 255   #define __packed    __attribute__ ((__packed__))
 256 #elif defined   (__TASKING__)  /* TASKING Compiler */
 257   #define __packed    __unaligned
 258 #endif /* __CC_ARM */
 259
 260 /**
 261   * @}
 262   */
 263
 264
 265 /** @defgroup USB_CONF_Exported_Types
 266   * @{
 267   */
 268 /**
 269   * @}
 270   */
 271
 272
 273 /** @defgroup USB_CONF_Exported_Macros
 274   * @{
 275   */
 276 /**
 277   * @}
 278   */
 279
 280 /** @defgroup USB_CONF_Exported_Variables
 281   * @{
 282   */
 283 /**
 284   * @}
 285   */
 286
 287 /** @defgroup USB_CONF_Exported_FunctionsPrototype
 288   * @{
 289   */
 290 /**
 291   * @}
 292   */
 293
 294
 295 #endif //__USB_CONF__H__
 296
 297
 298 /**
 299   * @}
 300   */
 301
 302 /**
 303   * @}
 304   */
 305 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 306