src/platform/AT32/io_at32.c

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include "platform.h"
  22
  23 #include "drivers/io.h"
  24 #include "drivers/io_impl.h"
  25 #include "drivers/rcc.h"
  26
  27 #include "common/utils.h"
  28
  29 // io ports defs are stored in array by index now
  30 struct ioPortDef_s {
  31     rccPeriphTag_t rcc;
  32 };
  33
  34 const struct ioPortDef_s ioPortDefs[] = {
  35     { RCC_AHB1(GPIOA) },
  36     { RCC_AHB1(GPIOB) },
  37     { RCC_AHB1(GPIOC) },
  38     { RCC_AHB1(GPIOD) },
  39     { RCC_AHB1(GPIOE) },
  40     { RCC_AHB1(GPIOF) },
  41     { RCC_AHB1(GPIOG) },
  42     { RCC_AHB1(GPIOH) }
  43 };
  44
  45 uint32_t IO_EXTI_Line(IO_t io)
  46 {
  47     if (!io) {
  48         return 0;
  49     }
  50     return 1 << IO_GPIOPinIdx(io);
  51 }
  52
  53 bool IORead(IO_t io)
  54 {
  55     if (!io) {
  56         return false;
  57     }
  58     return (IO_GPIO(io)->idt & IO_Pin(io));
  59 }
  60
  61 void IOWrite(IO_t io, bool hi)
  62 {
  63     if (!io) {
  64         return;
  65     }
  66     IO_GPIO(io)->scr = IO_Pin(io) << (hi ? 0 : 16);
  67 }
  68
  69 void IOHi(IO_t io)
  70 {
  71     if (!io) {
  72         return;
  73     }
  74     IO_GPIO(io)->scr = IO_Pin(io);
  75 }
  76
  77 void IOLo(IO_t io)
  78 {
  79     if (!io) {
  80         return;
  81     }
  82     IO_GPIO(io)->clr = IO_Pin(io);
  83 }
  84
  85 void IOToggle(IO_t io)
  86 {
  87     if (!io) {
  88         return;
  89     }
  90
  91     uint32_t mask = IO_Pin(io);
  92
  93     if (IO_GPIO(io)->odt & mask) {
  94         mask <<= 16; // bit is set, shift mask to reset half
  95     }
  96     IO_GPIO(io)->scr = mask;
  97 }
  98
  99 void IOConfigGPIO(IO_t io, ioConfig_t cfg)
 100 {
 101     if (!io) {
 102         return;
 103     }
 104
 105     const rccPeriphTag_t rcc = ioPortDefs[IO_GPIOPortIdx(io)].rcc;
 106     RCC_ClockCmd(rcc, ENABLE);
 107
 108     gpio_init_type init = {
 109         .gpio_pins = IO_Pin(io),
 110         .gpio_mode = (cfg >> 0) & 0x03,
 111         .gpio_drive_strength = (cfg >> 2) & 0x03,
 112         .gpio_out_type = (cfg >> 4) & 0x01,
 113         .gpio_pull = (cfg >> 5) & 0x03,
 114     };
 115     gpio_init(IO_GPIO(io), &init);
 116 }
 117
 118 void IOConfigGPIOAF(IO_t io, ioConfig_t cfg, uint8_t af)
 119 {
 120     if (!io) {
 121         return;
 122     }
 123
 124     const rccPeriphTag_t rcc = ioPortDefs[IO_GPIOPortIdx(io)].rcc;
 125     RCC_ClockCmd(rcc, ENABLE);
 126
 127     gpio_init_type init = {
 128         .gpio_pins = IO_Pin(io),
 129         .gpio_mode = (cfg >> 0) & 0x03,
 130         .gpio_drive_strength = (cfg >> 2) & 0x03,
 131         .gpio_out_type = (cfg >> 4) & 0x01,
 132         .gpio_pull = (cfg >> 5) & 0x03,
 133     };
 134     gpio_init(IO_GPIO(io), &init);
 135     gpio_pin_mux_config(IO_GPIO(io), IO_GPIO_PinSource(io), af);
 136 }