src/main/drivers/accgyro/accgyro_mpu.h

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #pragma once
  22
  23 #include "drivers/bus.h"
  24 #include "drivers/exti.h"
  25 #include "drivers/sensor.h"
  26
  27 #if defined(USE_GYRO_SPI_MPU6500) || defined(USE_GYRO_SPI_MPU6000) ||  defined(USE_GYRO_SPI_MPU9250) || defined(USE_GYRO_SPI_ICM20649) \
  28  || defined(USE_GYRO_SPI_ICM20689)
  29 #define GYRO_USES_SPI
  30 #endif
  31
  32 // MPU6050
  33 #define MPU_RA_WHO_AM_I         0x75
  34 #define MPU_RA_WHO_AM_I_LEGACY  0x00
  35
  36 #define MPUx0x0_WHO_AM_I_CONST              (0x68) // MPU3050, 6000 and 6050
  37 #define MPU6000_WHO_AM_I_CONST              (0x68)
  38 #define MPU6500_WHO_AM_I_CONST              (0x70)
  39 #define MPU9250_WHO_AM_I_CONST              (0x71)
  40 #define MPU9255_WHO_AM_I_CONST              (0x73)
  41 #define ICM20601_WHO_AM_I_CONST             (0xAC)
  42 #define ICM20602_WHO_AM_I_CONST             (0x12)
  43 #define ICM20608G_WHO_AM_I_CONST            (0xAF)
  44 #define ICM20649_WHO_AM_I_CONST             (0xE1)
  45 #define ICM20689_WHO_AM_I_CONST             (0x98)
  46 #define ICM42605_WHO_AM_I_CONST             (0x42)
  47 #define ICM42688P_WHO_AM_I_CONST            (0x47)
  48
  49 // RA = Register Address
  50
  51 #define MPU_RA_XG_OFFS_TC       0x00    //[7] PWR_MODE, [6:1] XG_OFFS_TC, [0] OTP_BNK_VLD
  52 #define MPU_RA_YG_OFFS_TC       0x01    //[7] PWR_MODE, [6:1] YG_OFFS_TC, [0] OTP_BNK_VLD
  53 #define MPU_RA_ZG_OFFS_TC       0x02    //[7] PWR_MODE, [6:1] ZG_OFFS_TC, [0] OTP_BNK_VLD
  54 #define MPU_RA_X_FINE_GAIN      0x03    //[7:0] X_FINE_GAIN
  55 #define MPU_RA_Y_FINE_GAIN      0x04    //[7:0] Y_FINE_GAIN
  56 #define MPU_RA_Z_FINE_GAIN      0x05    //[7:0] Z_FINE_GAIN
  57 #define MPU_RA_XA_OFFS_H        0x06    //[15:0] XA_OFFS
  58 #define MPU_RA_XA_OFFS_L_TC     0x07
  59 #define MPU_RA_YA_OFFS_H        0x08    //[15:0] YA_OFFS
  60 #define MPU_RA_YA_OFFS_L_TC     0x09
  61 #define MPU_RA_ZA_OFFS_H        0x0A    //[15:0] ZA_OFFS
  62 #define MPU_RA_ZA_OFFS_L_TC     0x0B
  63 #define MPU_RA_PRODUCT_ID       0x0C    // Product ID Register
  64 #define MPU_RA_XG_OFFS_USRH     0x13    //[15:0] XG_OFFS_USR
  65 #define MPU_RA_XG_OFFS_USRL     0x14
  66 #define MPU_RA_YG_OFFS_USRH     0x15    //[15:0] YG_OFFS_USR
  67 #define MPU_RA_YG_OFFS_USRL     0x16
  68 #define MPU_RA_ZG_OFFS_USRH     0x17    //[15:0] ZG_OFFS_USR
  69 #define MPU_RA_ZG_OFFS_USRL     0x18
  70 #define MPU_RA_SMPLRT_DIV       0x19
  71 #define MPU_RA_CONFIG           0x1A
  72 #define MPU_RA_GYRO_CONFIG      0x1B
  73 #define MPU_RA_ACCEL_CONFIG     0x1C
  74 #define MPU_RA_FF_THR           0x1D
  75 #define MPU_RA_FF_DUR           0x1E
  76 #define MPU_RA_MOT_THR          0x1F
  77 #define MPU_RA_MOT_DUR          0x20
  78 #define MPU_RA_ZRMOT_THR        0x21
  79 #define MPU_RA_ZRMOT_DUR        0x22
  80 #define MPU_RA_FIFO_EN          0x23
  81 #define MPU_RA_I2C_MST_CTRL     0x24
  82 #define MPU_RA_I2C_SLV0_ADDR    0x25
  83 #define MPU_RA_I2C_SLV0_REG     0x26
  84 #define MPU_RA_I2C_SLV0_CTRL    0x27
  85 #define MPU_RA_I2C_SLV1_ADDR    0x28
  86 #define MPU_RA_I2C_SLV1_REG     0x29
  87 #define MPU_RA_I2C_SLV1_CTRL    0x2A
  88 #define MPU_RA_I2C_SLV2_ADDR    0x2B
  89 #define MPU_RA_I2C_SLV2_REG     0x2C
  90 #define MPU_RA_I2C_SLV2_CTRL    0x2D
  91 #define MPU_RA_I2C_SLV3_ADDR    0x2E
  92 #define MPU_RA_I2C_SLV3_REG     0x2F
  93 #define MPU_RA_I2C_SLV3_CTRL    0x30
  94 #define MPU_RA_I2C_SLV4_ADDR    0x31
  95 #define MPU_RA_I2C_SLV4_REG     0x32
  96 #define MPU_RA_I2C_SLV4_DO      0x33
  97 #define MPU_RA_I2C_SLV4_CTRL    0x34
  98 #define MPU_RA_I2C_SLV4_DI      0x35
  99 #define MPU_RA_I2C_MST_STATUS   0x36
 100 #define MPU_RA_INT_PIN_CFG      0x37
 101 #define MPU_RA_INT_ENABLE       0x38
 102 #define MPU_RA_DMP_INT_STATUS   0x39
 103 #define MPU_RA_INT_STATUS       0x3A
 104 #define MPU_RA_ACCEL_XOUT_H     0x3B
 105 #define MPU_RA_ACCEL_XOUT_L     0x3C
 106 #define MPU_RA_ACCEL_YOUT_H     0x3D
 107 #define MPU_RA_ACCEL_YOUT_L     0x3E
 108 #define MPU_RA_ACCEL_ZOUT_H     0x3F
 109 #define MPU_RA_ACCEL_ZOUT_L     0x40
 110 #define MPU_RA_TEMP_OUT_H       0x41
 111 #define MPU_RA_TEMP_OUT_L       0x42
 112 #define MPU_RA_GYRO_XOUT_H      0x43
 113 #define MPU_RA_GYRO_XOUT_L      0x44
 114 #define MPU_RA_GYRO_YOUT_H      0x45
 115 #define MPU_RA_GYRO_YOUT_L      0x46
 116 #define MPU_RA_GYRO_ZOUT_H      0x47
 117 #define MPU_RA_GYRO_ZOUT_L      0x48
 118 #define MPU_RA_EXT_SENS_DATA_00 0x49
 119 #define MPU_RA_MOT_DETECT_STATUS    0x61
 120 #define MPU_RA_I2C_SLV0_DO      0x63
 121 #define MPU_RA_I2C_SLV1_DO      0x64
 122 #define MPU_RA_I2C_SLV2_DO      0x65
 123 #define MPU_RA_I2C_SLV3_DO      0x66
 124 #define MPU_RA_I2C_MST_DELAY_CTRL   0x67
 125 #define MPU_RA_SIGNAL_PATH_RESET    0x68
 126 #define MPU_RA_MOT_DETECT_CTRL      0x69
 127 #define MPU_RA_USER_CTRL        0x6A
 128 #define MPU_RA_PWR_MGMT_1       0x6B
 129 #define MPU_RA_PWR_MGMT_2       0x6C
 130 #define MPU_RA_BANK_SEL         0x6D
 131 #define MPU_RA_MEM_START_ADDR   0x6E
 132 #define MPU_RA_MEM_R_W          0x6F
 133 #define MPU_RA_DMP_CFG_1        0x70
 134 #define MPU_RA_DMP_CFG_2        0x71
 135 #define MPU_RA_FIFO_COUNTH      0x72
 136 #define MPU_RA_FIFO_COUNTL      0x73
 137 #define MPU_RA_FIFO_R_W         0x74
 138 #define MPU_RA_WHO_AM_I         0x75
 139
 140 // RF = Register Flag
 141 #define MPU_RF_DATA_RDY_EN (1 << 0)
 142
 143 enum gyro_fsr_e {
 144     INV_FSR_250DPS = 0,
 145     INV_FSR_500DPS,
 146     INV_FSR_1000DPS,
 147     INV_FSR_2000DPS,
 148     NUM_GYRO_FSR
 149 };
 150
 151 enum icm_high_range_gyro_fsr_e {
 152     ICM_HIGH_RANGE_FSR_500DPS = 0,
 153     ICM_HIGH_RANGE_FSR_1000DPS,
 154     ICM_HIGH_RANGE_FSR_2000DPS,
 155     ICM_HIGH_RANGE_FSR_4000DPS,
 156     NUM_ICM_HIGH_RANGE_GYRO_FSR
 157 };
 158
 159 enum clock_sel_e {
 160     INV_CLK_INTERNAL = 0,
 161     INV_CLK_PLL,
 162     NUM_CLK
 163 };
 164
 165 enum accel_fsr_e {
 166     INV_FSR_2G = 0,
 167     INV_FSR_4G,
 168     INV_FSR_8G,
 169     INV_FSR_16G,
 170     NUM_ACCEL_FSR
 171 };
 172
 173 enum icm_high_range_accel_fsr_e {
 174     ICM_HIGH_RANGE_FSR_4G = 0,
 175     ICM_HIGH_RANGE_FSR_8G,
 176     ICM_HIGH_RANGE_FSR_16G,
 177     ICM_HIGH_RANGE_FSR_32G,
 178     NUM_ICM_HIGH_RANGE_ACCEL_FSR
 179 };
 180
 181 typedef enum {
 182     GYRO_OVERFLOW_NONE = 0x00,
 183     GYRO_OVERFLOW_X = 0x01,
 184     GYRO_OVERFLOW_Y = 0x02,
 185     GYRO_OVERFLOW_Z = 0x04
 186 } gyroOverflow_e;
 187
 188 typedef enum {
 189     MPU_NONE,
 190     MPU_3050,
 191     MPU_60x0,
 192     MPU_60x0_SPI,
 193     MPU_65xx_I2C,
 194     MPU_65xx_SPI,
 195     MPU_9250_SPI,
 196     ICM_20601_SPI,
 197     ICM_20602_SPI,
 198     ICM_20608_SPI,
 199     ICM_20649_SPI,
 200     ICM_20689_SPI,
 201     ICM_42605_SPI,
 202     ICM_42688P_SPI,
 203     BMI_160_SPI,
 204     BMI_270_SPI,
 205     LSM6DSO_SPI,
 206     L3GD20_SPI,
 207 } mpuSensor_e;
 208
 209 typedef enum {
 210     MPU_HALF_RESOLUTION,
 211     MPU_FULL_RESOLUTION
 212 } mpu6050Resolution_e;
 213
 214 typedef struct mpuDetectionResult_s {
 215     mpuSensor_e sensor;
 216     mpu6050Resolution_e resolution;
 217 } mpuDetectionResult_t;
 218
 219 struct gyroDev_s;
 220 struct gyroDeviceConfig_s;
 221 void mpuGyroInit(struct gyroDev_s *gyro);
 222 bool mpuGyroRead(struct gyroDev_s *gyro);
 223 bool mpuGyroReadSPI(struct gyroDev_s *gyro);
 224 void mpuPreInit(const struct gyroDeviceConfig_s *config);
 225 bool mpuDetect(struct gyroDev_s *gyro, const struct gyroDeviceConfig_s *config);
 226 uint8_t mpuGyroDLPF(struct gyroDev_s *gyro);
 227 uint8_t mpuGyroReadRegister(const extDevice_t *dev, uint8_t reg);
 228
 229 struct accDev_s;
 230 bool mpuAccRead(struct accDev_s *acc);
 231 bool mpuAccReadSPI(struct accDev_s *acc);