src/main/drivers/max7456.c

   1 /*
   2  * This file is part of Cleanflight and Betaflight.
   3  *
   4  * Cleanflight and Betaflight are free software. You can redistribute
   5  * this software and/or modify this software under the terms of the
   6  * GNU General Public License as published by the Free Software
   7  * Foundation, either version 3 of the License, or (at your option)
   8  * any later version.
   9  *
  10  * Cleanflight and Betaflight are distributed in the hope that they
  11  * will be useful, but WITHOUT ANY WARRANTY; without even the implied
  12  * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
  13  * See the GNU General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License
  16  * along with this software.
  17  *
  18  * If not, see <http://www.gnu.org/licenses/>.
  19  */
  20
  21 #include <stdbool.h>
  22 #include <stdint.h>
  23 #include <string.h>
  24
  25 #include "platform.h"
  26
  27 #ifdef USE_MAX7456
  28
  29 #include "build/debug.h"
  30
  31 #include "pg/max7456.h"
  32 #include "pg/vcd.h"
  33
  34 #include "drivers/bus_spi.h"
  35 #include "drivers/dma.h"
  36 #include "drivers/io.h"
  37 #include "drivers/light_led.h"
  38 #include "drivers/max7456.h"
  39 #include "drivers/nvic.h"
  40 #include "drivers/osd.h"
  41 #include "drivers/osd_symbols.h"
  42 #include "drivers/time.h"
  43
  44
  45 // 10 MHz max SPI frequency
  46 #define MAX7456_MAX_SPI_CLK_HZ 10000000
  47 #define MAX7456_INIT_MAX_SPI_CLK_HZ 5000000
  48
  49 // DEBUG_MAX7456_SIGNAL
  50 #define DEBUG_MAX7456_SIGNAL_MODEREG       0
  51 #define DEBUG_MAX7456_SIGNAL_SENSE         1
  52 #define DEBUG_MAX7456_SIGNAL_REINIT        2
  53 #define DEBUG_MAX7456_SIGNAL_ROWS          3
  54
  55 // DEBUG_MAX7456_SPICLOCK
  56 #define DEBUG_MAX7456_SPICLOCK_OVERCLOCK   0
  57 #define DEBUG_MAX7456_SPICLOCK_DEVTYPE     1
  58 #define DEBUG_MAX7456_SPICLOCK_DIVISOR     2
  59 #define DEBUG_MAX7456_SPICLOCK_X100        3
  60
  61 // VM0 bits
  62 #define VIDEO_BUFFER_DISABLE        0x01
  63 #define MAX7456_RESET               0x02
  64 #define VERTICAL_SYNC_NEXT_VSYNC    0x04
  65 #define OSD_ENABLE                  0x08
  66
  67 #define SYNC_MODE_AUTO              0x00
  68 #define SYNC_MODE_INTERNAL          0x30
  69 #define SYNC_MODE_EXTERNAL          0x20
  70
  71 #define VIDEO_MODE_PAL              0x40
  72 #define VIDEO_MODE_NTSC             0x00
  73 #define VIDEO_MODE_MASK             0x40
  74 #define VIDEO_MODE_IS_PAL(val)      (((val) & VIDEO_MODE_MASK) == VIDEO_MODE_PAL)
  75 #define VIDEO_MODE_IS_NTSC(val)     (((val) & VIDEO_MODE_MASK) == VIDEO_MODE_NTSC)
  76
  77 #define VIDEO_SIGNAL_DEBOUNCE_MS    100 // Time to wait for input to stabilize
  78
  79 // VM1 bits
  80
  81 // duty cycle is on_off
  82 #define BLINK_DUTY_CYCLE_50_50 0x00
  83 #define BLINK_DUTY_CYCLE_33_66 0x01
  84 #define BLINK_DUTY_CYCLE_25_75 0x02
  85 #define BLINK_DUTY_CYCLE_75_25 0x03
  86
  87 // blinking time
  88 #define BLINK_TIME_0 0x00
  89 #define BLINK_TIME_1 0x04
  90 #define BLINK_TIME_2 0x08
  91 #define BLINK_TIME_3 0x0C
  92
  93 // background mode brightness (percent)
  94 #define BACKGROUND_BRIGHTNESS_0 0x00
  95 #define BACKGROUND_BRIGHTNESS_7 0x01
  96 #define BACKGROUND_BRIGHTNESS_14 0x02
  97 #define BACKGROUND_BRIGHTNESS_21 0x03
  98 #define BACKGROUND_BRIGHTNESS_28 0x04
  99 #define BACKGROUND_BRIGHTNESS_35 0x05
 100 #define BACKGROUND_BRIGHTNESS_42 0x06
 101 #define BACKGROUND_BRIGHTNESS_49 0x07
 102
 103 #define BACKGROUND_MODE_GRAY 0x80
 104
 105 // STAT register bits
 106
 107 #define STAT_PAL      0x01
 108 #define STAT_NTSC     0x02
 109 #define STAT_LOS      0x04
 110 #define STAT_NVR_BUSY 0x20
 111
 112 #define STAT_IS_PAL(val)  ((val) & STAT_PAL)
 113 #define STAT_IS_NTSC(val) ((val) & STAT_NTSC)
 114 #define STAT_IS_LOS(val)  ((val) & STAT_LOS)
 115
 116 #define VIN_IS_PAL(val)  (!STAT_IS_LOS(val) && STAT_IS_PAL(val))
 117 #define VIN_IS_NTSC(val)  (!STAT_IS_LOS(val) && STAT_IS_NTSC(val))
 118
 119 // DMM register bits
 120 #define DMM_AUTO_INC 0x01
 121
 122 // Kluege warning!
 123 // There are occasions that NTSC is not detected even with !LOS (AB7456 specific?)
 124 // When this happens, lower 3 bits of STAT register is read as zero.
 125 // To cope with this case, this macro defines !LOS && !PAL as NTSC.
 126 // Should be compatible with MAX7456 and non-problematic case.
 127
 128 #define VIN_IS_NTSC_alt(val)  (!STAT_IS_LOS(val) && !STAT_IS_PAL(val))
 129
 130 #define MAX7456_SIGNAL_CHECK_INTERVAL_MS 1000 // msec
 131 #define MAX7456_STALL_CHECK_INTERVAL_MS  1000 // msec
 132
 133 // DMM special bits
 134 #define CLEAR_DISPLAY 0x04
 135 #define CLEAR_DISPLAY_VERT 0x06
 136 #define INVERT_PIXEL_COLOR 0x08
 137
 138 // Special address for terminating incremental write
 139 #define END_STRING 0xff
 140
 141 #define MAX7456ADD_READ         0x80
 142 #define MAX7456ADD_VM0          0x00  //0b0011100// 00 // 00             ,0011100
 143 #define MAX7456ADD_VM1          0x01
 144 #define MAX7456ADD_HOS          0x02
 145 #define MAX7456ADD_VOS          0x03
 146 #define MAX7456ADD_DMM          0x04
 147 #define MAX7456ADD_DMAH         0x05
 148 #define MAX7456ADD_DMAL         0x06
 149 #define MAX7456ADD_DMDI         0x07
 150 #define MAX7456ADD_CMM          0x08
 151 #define MAX7456ADD_CMAH         0x09
 152 #define MAX7456ADD_CMAL         0x0a
 153 #define MAX7456ADD_CMDI         0x0b
 154 #define MAX7456ADD_OSDM         0x0c
 155 #define MAX7456ADD_RB0          0x10
 156 #define MAX7456ADD_RB1          0x11
 157 #define MAX7456ADD_RB2          0x12
 158 #define MAX7456ADD_RB3          0x13
 159 #define MAX7456ADD_RB4          0x14
 160 #define MAX7456ADD_RB5          0x15
 161 #define MAX7456ADD_RB6          0x16
 162 #define MAX7456ADD_RB7          0x17
 163 #define MAX7456ADD_RB8          0x18
 164 #define MAX7456ADD_RB9          0x19
 165 #define MAX7456ADD_RB10         0x1a
 166 #define MAX7456ADD_RB11         0x1b
 167 #define MAX7456ADD_RB12         0x1c
 168 #define MAX7456ADD_RB13         0x1d
 169 #define MAX7456ADD_RB14         0x1e
 170 #define MAX7456ADD_RB15         0x1f
 171 #define MAX7456ADD_OSDBL        0x6c
 172 #define MAX7456ADD_STAT         0xA0
 173
 174 #define NVM_RAM_SIZE            54
 175 #define WRITE_NVR               0xA0
 176
 177 // Device type
 178 #define MAX7456_DEVICE_TYPE_MAX 0
 179 #define MAX7456_DEVICE_TYPE_AT  1
 180
 181 #define CHARS_PER_LINE      30 // XXX Should be related to VIDEO_BUFFER_CHARS_*?
 182
 183 #define MAX7456_SUPPORTED_LAYER_COUNT (DISPLAYPORT_LAYER_BACKGROUND + 1)
 184
 185 typedef struct max7456Layer_s {
 186     uint8_t buffer[VIDEO_BUFFER_CHARS_PAL];
 187 } max7456Layer_t;
 188
 189 static max7456Layer_t displayLayers[MAX7456_SUPPORTED_LAYER_COUNT];
 190 static displayPortLayer_e activeLayer = DISPLAYPORT_LAYER_FOREGROUND;
 191
 192 extDevice_t max7456Device;
 193 extDevice_t *dev = &max7456Device;
 194
 195 static bool max7456DeviceDetected = false;
 196 static uint16_t max7456SpiClockDiv;
 197
 198 uint16_t maxScreenSize = VIDEO_BUFFER_CHARS_PAL;
 199
 200 // We write everything to the active layer and then compare
 201 // it with shadowBuffer to update only changed chars.
 202 // This solution is faster then redrawing entire screen.
 203
 204 static uint8_t shadowBuffer[VIDEO_BUFFER_CHARS_PAL];
 205
 206 //Max bytes to update in one call to max7456DrawScreen()
 207
 208 #define MAX_BYTES2SEND          250
 209 #define MAX_BYTES2SEND_POLLED   20
 210
 211 static DMA_DATA uint8_t spiBuf[MAX_BYTES2SEND];
 212
 213 static uint8_t  videoSignalCfg;
 214 static uint8_t  videoSignalReg  = OSD_ENABLE; // OSD_ENABLE required to trigger first ReInit
 215 static uint8_t  displayMemoryModeReg = 0;
 216
 217 static uint8_t  hosRegValue; // HOS (Horizontal offset register) value
 218 static uint8_t  vosRegValue; // VOS (Vertical offset register) value
 219
 220 static bool fontIsLoading       = false;
 221
 222 static uint8_t max7456DeviceType;
 223
 224 static displayPortBackground_e deviceBackgroundType = DISPLAY_BACKGROUND_TRANSPARENT;
 225
 226 // previous states initialized outside the valid range to force update on first call
 227 #define INVALID_PREVIOUS_REGISTER_STATE 255
 228 static uint8_t previousBlackWhiteRegister = INVALID_PREVIOUS_REGISTER_STATE;
 229 static uint8_t previousInvertRegister = INVALID_PREVIOUS_REGISTER_STATE;
 230
 231 static uint8_t *getLayerBuffer(displayPortLayer_e layer)
 232 {
 233     return displayLayers[layer].buffer;
 234 }
 235
 236 static uint8_t *getActiveLayerBuffer(void)
 237 {
 238     return getLayerBuffer(activeLayer);
 239 }
 240
 241 static void max7456SetRegisterVM1(void)
 242 {
 243     uint8_t backgroundGray = BACKGROUND_BRIGHTNESS_28; // this is the device default background gray level
 244     uint8_t vm1Register = BLINK_TIME_1 | BLINK_DUTY_CYCLE_75_25; // device defaults
 245     if (deviceBackgroundType != DISPLAY_BACKGROUND_TRANSPARENT) {
 246         vm1Register |= BACKGROUND_MODE_GRAY;
 247         switch (deviceBackgroundType) {
 248         case DISPLAY_BACKGROUND_BLACK:
 249             backgroundGray = BACKGROUND_BRIGHTNESS_0;
 250             break;
 251         case DISPLAY_BACKGROUND_LTGRAY:
 252             backgroundGray = BACKGROUND_BRIGHTNESS_49;
 253             break;
 254         case DISPLAY_BACKGROUND_GRAY:
 255         default:
 256             backgroundGray = BACKGROUND_BRIGHTNESS_28;
 257             break;
 258         }
 259     }
 260     vm1Register |= (backgroundGray << 4);
 261     spiWriteReg(dev, MAX7456ADD_VM1, vm1Register);
 262 }
 263
 264 uint8_t max7456GetRowsCount(void)
 265 {
 266     return (videoSignalReg & VIDEO_MODE_PAL) ? VIDEO_LINES_PAL : VIDEO_LINES_NTSC;
 267 }
 268
 269 // When clearing the shadow buffer we fill with 0 so that the characters will
 270 // be flagged as changed when compared to the 0x20 used in the layer buffers.
 271 static void max7456ClearShadowBuffer(void)
 272 {
 273     memset(shadowBuffer, 0, maxScreenSize);
 274 }
 275
 276 // Buffer is filled with the whitespace character (0x20)
 277 static void max7456ClearLayer(displayPortLayer_e layer)
 278 {
 279     memset(getLayerBuffer(layer), 0x20, VIDEO_BUFFER_CHARS_PAL);
 280 }
 281
 282 void max7456ReInit(void)
 283 {
 284     uint8_t srdata = 0;
 285
 286     switch (videoSignalCfg) {
 287     case VIDEO_SYSTEM_PAL:
 288         videoSignalReg = VIDEO_MODE_PAL | OSD_ENABLE;
 289         break;
 290
 291     case VIDEO_SYSTEM_NTSC:
 292         videoSignalReg = VIDEO_MODE_NTSC | OSD_ENABLE;
 293         break;
 294
 295     case VIDEO_SYSTEM_AUTO:
 296         srdata = spiReadRegMsk(dev, MAX7456ADD_STAT);
 297
 298         if (VIN_IS_NTSC(srdata)) {
 299             videoSignalReg = VIDEO_MODE_NTSC | OSD_ENABLE;
 300         } else if (VIN_IS_PAL(srdata)) {
 301             videoSignalReg = VIDEO_MODE_PAL | OSD_ENABLE;
 302         } else {
 303             // No valid input signal, fallback to default (XXX NTSC for now)
 304             videoSignalReg = VIDEO_MODE_NTSC | OSD_ENABLE;
 305         }
 306         break;
 307     }
 308
 309     if (videoSignalReg & VIDEO_MODE_PAL) { //PAL
 310         maxScreenSize = VIDEO_BUFFER_CHARS_PAL;
 311     } else {              // NTSC
 312         maxScreenSize = VIDEO_BUFFER_CHARS_NTSC;
 313     }
 314
 315     // Set all rows to same charactor black/white level
 316     previousBlackWhiteRegister = INVALID_PREVIOUS_REGISTER_STATE;
 317     max7456Brightness(0, 2);
 318     // Re-enable MAX7456 (last function call disables it)
 319
 320     // Make sure the Max7456 is enabled
 321     spiWriteReg(dev, MAX7456ADD_VM0, videoSignalReg);
 322     spiWriteReg(dev, MAX7456ADD_HOS, hosRegValue);
 323     spiWriteReg(dev, MAX7456ADD_VOS, vosRegValue);
 324
 325     max7456SetRegisterVM1();
 326
 327     // Clear shadow to force redraw all screen
 328     max7456ClearShadowBuffer();
 329 }
 330
 331 void max7456PreInit(const max7456Config_t *max7456Config)
 332 {
 333     spiPreinitRegister(max7456Config->csTag, max7456Config->preInitOPU ? IOCFG_OUT_PP : IOCFG_IPU, 1);
 334 }
 335
 336 // Here we init only CS and try to init MAX for first time.
 337 // Also detect device type (MAX v.s. AT)
 338
 339 max7456InitStatus_e max7456Init(const max7456Config_t *max7456Config, const vcdProfile_t *pVcdProfile, bool cpuOverclock)
 340 {
 341     max7456DeviceDetected = false;
 342     deviceBackgroundType = DISPLAY_BACKGROUND_TRANSPARENT;
 343
 344     // initialize all layers
 345     for (unsigned i = 0; i < MAX7456_SUPPORTED_LAYER_COUNT; i++) {
 346         max7456ClearLayer(i);
 347     }
 348
 349     max7456HardwareReset();
 350
 351     if (!max7456Config->csTag || !spiSetBusInstance(dev, max7456Config->spiDevice)) {
 352         return MAX7456_INIT_NOT_CONFIGURED;
 353     }
 354
 355     dev->busType_u.spi.csnPin = IOGetByTag(max7456Config->csTag);
 356
 357     if (!IOIsFreeOrPreinit(dev->busType_u.spi.csnPin)) {
 358         return MAX7456_INIT_NOT_CONFIGURED;
 359     }
 360
 361     IOInit(dev->busType_u.spi.csnPin, OWNER_OSD_CS, 0);
 362     IOConfigGPIO(dev->busType_u.spi.csnPin, SPI_IO_CS_CFG);
 363     IOHi(dev->busType_u.spi.csnPin);
 364
 365     // Detect MAX7456 existence and device type. Do this at half the speed for safety.
 366
 367     // Detect MAX7456 and compatible device by reading OSDM (OSD Insertion MUX) register.
 368     // This register is not modified in this driver, therefore ensured to remain at its default value (0x1B).
 369
 370     spiSetClkDivisor(dev, spiCalculateDivider(MAX7456_INIT_MAX_SPI_CLK_HZ));
 371
 372     // Write 0xff to conclude any current SPI transaction the MAX7456 is expecting
 373     spiWrite(dev, END_STRING);
 374
 375     uint8_t osdm = spiReadRegMsk(dev, MAX7456ADD_OSDM);
 376
 377     if (osdm != 0x1B) {
 378         IOConfigGPIO(dev->busType_u.spi.csnPin, IOCFG_IPU);
 379         return MAX7456_INIT_NOT_FOUND;
 380     }
 381
 382     // At this point, we can claim the ownership of the CS pin
 383     max7456DeviceDetected = true;
 384     IOInit(dev->busType_u.spi.csnPin, OWNER_OSD_CS, 0);
 385
 386     // Detect device type by writing and reading CA[8] bit at CMAL[6].
 387     // This is a bit for accessing second half of character glyph storage, supported only by AT variant.
 388
 389     spiWriteReg(dev, MAX7456ADD_CMAL, (1 << 6)); // CA[8] bit
 390
 391     if (spiReadRegMsk(dev, MAX7456ADD_CMAL) & (1 << 6)) {
 392         max7456DeviceType = MAX7456_DEVICE_TYPE_AT;
 393     } else {
 394         max7456DeviceType = MAX7456_DEVICE_TYPE_MAX;
 395     }
 396
 397 #if defined(USE_OVERCLOCK)
 398     // Determine SPI clock divisor based on config and the device type.
 399
 400     switch (max7456Config->clockConfig) {
 401     case MAX7456_CLOCK_CONFIG_HALF:
 402         max7456SpiClockDiv = spiCalculateDivider(MAX7456_MAX_SPI_CLK_HZ / 2);
 403         break;
 404
 405     case MAX7456_CLOCK_CONFIG_NOMINAL:
 406     default:
 407         max7456SpiClockDiv = spiCalculateDivider(MAX7456_MAX_SPI_CLK_HZ);
 408         break;
 409
 410     case MAX7456_CLOCK_CONFIG_DOUBLE:
 411         max7456SpiClockDiv = spiCalculateDivider(MAX7456_MAX_SPI_CLK_HZ * 2);
 412         break;
 413     }
 414
 415     DEBUG_SET(DEBUG_MAX7456_SPICLOCK, DEBUG_MAX7456_SPICLOCK_OVERCLOCK, cpuOverclock);
 416     DEBUG_SET(DEBUG_MAX7456_SPICLOCK, DEBUG_MAX7456_SPICLOCK_DEVTYPE, max7456DeviceType);
 417     DEBUG_SET(DEBUG_MAX7456_SPICLOCK, DEBUG_MAX7456_SPICLOCK_DIVISOR, max7456SpiClockDiv);
 418     DEBUG_SET(DEBUG_MAX7456_SPICLOCK, DEBUG_MAX7456_SPICLOCK_X100, spiCalculateClock(max7456SpiClockDiv) / 10000);
 419 #else
 420     UNUSED(max7456Config);
 421     UNUSED(cpuOverclock);
 422     max7456SpiClockDiv = spiCalculateDivider(MAX7456_MAX_SPI_CLK_HZ);
 423 #endif
 424
 425     spiSetClkDivisor(dev, max7456SpiClockDiv);
 426
 427     // force soft reset on Max7456
 428     spiWriteReg(dev, MAX7456ADD_VM0, MAX7456_RESET);
 429
 430     // Wait for 200us before polling for completion of reset
 431     delayMicroseconds(200);
 432
 433     // Wait for reset to complete
 434     while ((spiReadRegMsk(dev, MAX7456ADD_VM0) & MAX7456_RESET) != 0x00);
 435
 436     // Setup values to write to registers
 437     videoSignalCfg = pVcdProfile->video_system;
 438     hosRegValue = 32 - pVcdProfile->h_offset;
 439     vosRegValue = 16 - pVcdProfile->v_offset;
 440
 441     // Real init will be made later when driver detect idle.
 442     return MAX7456_INIT_OK;
 443 }
 444
 445 /**
 446  * Sets inversion of black and white pixels.
 447  */
 448 void max7456Invert(bool invert)
 449 {
 450     if (invert) {
 451         displayMemoryModeReg |= INVERT_PIXEL_COLOR;
 452     } else {
 453         displayMemoryModeReg &= ~INVERT_PIXEL_COLOR;
 454     }
 455
 456     if (displayMemoryModeReg != previousInvertRegister) {
 457         // clear the shadow buffer so all characters will be
 458         // redrawn with the proper invert state
 459         max7456ClearShadowBuffer();
 460         previousInvertRegister = displayMemoryModeReg;
 461         spiWriteReg(dev, MAX7456ADD_DMM, displayMemoryModeReg);
 462     }
 463 }
 464
 465 /**
 466  * Sets the brightness of black and white pixels.
 467  *
 468  * @param black Black brightness (0-3, 0 is darkest)
 469  * @param white White brightness (0-3, 0 is darkest)
 470  */
 471 void max7456Brightness(uint8_t black, uint8_t white)
 472 {
 473     const uint8_t reg = (black << 2) | (3 - white);
 474
 475     if (reg != previousBlackWhiteRegister) {
 476         previousBlackWhiteRegister = reg;
 477         STATIC_DMA_DATA_AUTO uint8_t buf[32];
 478         for (int i = MAX7456ADD_RB0, j = 0; i <= MAX7456ADD_RB15; i++) {
 479             buf[j++] = i;
 480             buf[j++] = reg;
 481         }
 482         spiReadWriteBuf(dev, buf, NULL, sizeof(buf));
 483     }
 484 }
 485
 486 void max7456ClearScreen(void)
 487 {
 488     max7456ClearLayer(activeLayer);
 489 }
 490
 491 void max7456WriteChar(uint8_t x, uint8_t y, uint8_t c)
 492 {
 493     uint8_t *buffer = getActiveLayerBuffer();
 494     if (x < CHARS_PER_LINE && y < VIDEO_LINES_PAL) {
 495         buffer[y * CHARS_PER_LINE + x] = c;
 496     }
 497 }
 498
 499 void max7456Write(uint8_t x, uint8_t y, const char *buff)
 500 {
 501     if (y < VIDEO_LINES_PAL) {
 502         uint8_t *buffer = getActiveLayerBuffer();
 503         for (int i = 0; buff[i] && x + i < CHARS_PER_LINE; i++) {
 504             buffer[y * CHARS_PER_LINE + x + i] = buff[i];
 505         }
 506     }
 507 }
 508
 509 bool max7456LayerSupported(displayPortLayer_e layer)
 510 {
 511     if (layer == DISPLAYPORT_LAYER_FOREGROUND || layer == DISPLAYPORT_LAYER_BACKGROUND) {
 512         return true;
 513     } else {
 514         return false;
 515     }
 516 }
 517
 518 bool max7456LayerSelect(displayPortLayer_e layer)
 519 {
 520     if (max7456LayerSupported(layer)) {
 521         activeLayer = layer;
 522         return true;
 523     } else {
 524         return false;
 525     }
 526 }
 527
 528 bool max7456LayerCopy(displayPortLayer_e destLayer, displayPortLayer_e sourceLayer)
 529 {
 530     if ((sourceLayer != destLayer) && max7456LayerSupported(sourceLayer) && max7456LayerSupported(destLayer)) {
 531         memcpy(getLayerBuffer(destLayer), getLayerBuffer(sourceLayer), VIDEO_BUFFER_CHARS_PAL);
 532         return true;
 533     } else {
 534         return false;
 535     }
 536 }
 537
 538 bool max7456DmaInProgress(void)
 539 {
 540     return spiIsBusy(dev);
 541 }
 542
 543 bool max7456BuffersSynced(void)
 544 {
 545     for (int i = 0; i < maxScreenSize; i++) {
 546         if (displayLayers[DISPLAYPORT_LAYER_FOREGROUND].buffer[i] != shadowBuffer[i]) {
 547             return false;
 548         }
 549     }
 550     return true;
 551 }
 552
 553 bool max7456ReInitIfRequired(bool forceStallCheck)
 554 {
 555     static timeMs_t lastSigCheckMs = 0;
 556     static timeMs_t videoDetectTimeMs = 0;
 557     static uint16_t reInitCount = 0;
 558     static timeMs_t lastStallCheckMs = MAX7456_STALL_CHECK_INTERVAL_MS / 2; // offset so that it doesn't coincide with the signal check
 559
 560     const timeMs_t nowMs = millis();
 561
 562     bool stalled = false;
 563     if (forceStallCheck || (lastStallCheckMs + MAX7456_STALL_CHECK_INTERVAL_MS < nowMs)) {
 564         lastStallCheckMs = nowMs;
 565
 566         // Write 0xff to conclude any current SPI transaction the MAX7456 is expecting
 567         spiWrite(dev, END_STRING);
 568
 569         stalled = (spiReadRegMsk(dev, MAX7456ADD_VM0) != videoSignalReg);
 570     }
 571
 572     if (stalled) {
 573         max7456ReInit();
 574     } else if ((videoSignalCfg == VIDEO_SYSTEM_AUTO)
 575               && ((nowMs - lastSigCheckMs) > MAX7456_SIGNAL_CHECK_INTERVAL_MS)) {
 576
 577         // Write 0xff to conclude any current SPI transaction the MAX7456 is expecting
 578         spiWrite(dev, END_STRING);
 579
 580         // Adjust output format based on the current input format.
 581
 582         const uint8_t videoSense = spiReadRegMsk(dev, MAX7456ADD_STAT);
 583
 584         DEBUG_SET(DEBUG_MAX7456_SIGNAL, DEBUG_MAX7456_SIGNAL_MODEREG, videoSignalReg & VIDEO_MODE_MASK);
 585         DEBUG_SET(DEBUG_MAX7456_SIGNAL, DEBUG_MAX7456_SIGNAL_SENSE, videoSense & 0x7);
 586         DEBUG_SET(DEBUG_MAX7456_SIGNAL, DEBUG_MAX7456_SIGNAL_ROWS, max7456GetRowsCount());
 587
 588         if (videoSense & STAT_LOS) {
 589             videoDetectTimeMs = 0;
 590         } else {
 591             if ((VIN_IS_PAL(videoSense) && VIDEO_MODE_IS_NTSC(videoSignalReg))
 592               || (VIN_IS_NTSC_alt(videoSense) && VIDEO_MODE_IS_PAL(videoSignalReg))) {
 593                 if (videoDetectTimeMs) {
 594                     if (millis() - videoDetectTimeMs > VIDEO_SIGNAL_DEBOUNCE_MS) {
 595                         max7456ReInit();
 596                         DEBUG_SET(DEBUG_MAX7456_SIGNAL, DEBUG_MAX7456_SIGNAL_REINIT, ++reInitCount);
 597                     }
 598                 } else {
 599                     // Wait for signal to stabilize
 600                     videoDetectTimeMs = millis();
 601                 }
 602             }
 603         }
 604
 605         lastSigCheckMs = nowMs;
 606     }
 607
 608     return stalled;
 609 }
 610
 611 // Return true if screen still being transferred
 612 bool max7456DrawScreen(void)
 613 {
 614     static uint16_t pos = 0;
 615     // This routine doesn't block so need to use static data
 616     static busSegment_t segments[] = {
 617             {.u.buffers = {NULL, NULL}, 0, true, NULL},
 618             {.u.buffers = {NULL, NULL}, 0, true, NULL},
 619     };
 620
 621     if (!fontIsLoading) {
 622         uint8_t *buffer = getActiveLayerBuffer();
 623         int spiBufIndex = 0;
 624         int maxSpiBufStartIndex;
 625         bool setAddress = true;
 626         bool autoInc = false;
 627         int posLimit = pos + (maxScreenSize / 2);
 628
 629         maxSpiBufStartIndex = spiUseMOSI_DMA(dev) ? MAX_BYTES2SEND : MAX_BYTES2SEND_POLLED;
 630
 631         // Abort for now if the bus is still busy
 632         if (spiIsBusy(dev)) {
 633             // Not finished yet
 634             return true;
 635         }
 636
 637         // Allow for 8 bytes followed by an ESCAPE and reset of DMM at end of buffer
 638         maxSpiBufStartIndex -= 12;
 639
 640         // Initialise the transfer buffer
 641         while ((spiBufIndex < maxSpiBufStartIndex) && (pos < posLimit)) {
 642             if (buffer[pos] != shadowBuffer[pos]) {
 643                 if (buffer[pos] == 0xff) {
 644                     buffer[pos] = ' ';
 645                 }
 646
 647                 if (setAddress || !autoInc) {
 648                     if (buffer[pos + 1] != shadowBuffer[pos + 1]) {
 649                         // It's worth auto incrementing
 650                         spiBuf[spiBufIndex++] = MAX7456ADD_DMM;
 651                         spiBuf[spiBufIndex++] = displayMemoryModeReg | DMM_AUTO_INC;
 652                         autoInc = true;
 653                     } else {
 654                         // It's not worth auto incrementing
 655                         spiBuf[spiBufIndex++] = MAX7456ADD_DMM;
 656                         spiBuf[spiBufIndex++] = displayMemoryModeReg;
 657                         autoInc = false;
 658                     }
 659
 660                     spiBuf[spiBufIndex++] = MAX7456ADD_DMAH;
 661                     spiBuf[spiBufIndex++] = pos >> 8;
 662                     spiBuf[spiBufIndex++] = MAX7456ADD_DMAL;
 663                     spiBuf[spiBufIndex++] = pos & 0xff;
 664
 665                     setAddress = false;
 666                 }
 667
 668                 spiBuf[spiBufIndex++] = MAX7456ADD_DMDI;
 669                 spiBuf[spiBufIndex++] = buffer[pos];
 670
 671                 shadowBuffer[pos] = buffer[pos];
 672             } else {
 673                 if (!setAddress) {
 674                     setAddress = true;
 675                     if (autoInc) {
 676                         spiBuf[spiBufIndex++] = MAX7456ADD_DMDI;
 677                         spiBuf[spiBufIndex++] = END_STRING;
 678                     }
 679                 }
 680             }
 681
 682             if (++pos >= maxScreenSize) {
 683                 pos = 0;
 684                 break;
 685             }
 686         }
 687
 688         if (autoInc) {
 689             if (!setAddress) {
 690                 spiBuf[spiBufIndex++] = MAX7456ADD_DMDI;
 691                 spiBuf[spiBufIndex++] = END_STRING;
 692             }
 693
 694             spiBuf[spiBufIndex++] = MAX7456ADD_DMM;
 695             spiBuf[spiBufIndex++] = displayMemoryModeReg;
 696         }
 697
 698         if (spiBufIndex) {
 699             segments[0].u.buffers.txData = spiBuf;
 700             segments[0].len = spiBufIndex;
 701
 702             spiSequence(dev, &segments[0]);
 703
 704             // Non-blocking, so transfer still in progress if using DMA
 705         }
 706     }
 707
 708     return (pos != 0);
 709 }
 710
 711 // should not be used when armed
 712 void max7456RefreshAll(void)
 713 {
 714     max7456ReInitIfRequired(true);
 715     while (max7456DrawScreen());
 716 }
 717
 718 bool max7456WriteNvm(uint8_t char_address, const uint8_t *font_data)
 719 {
 720     if (!max7456DeviceDetected) {
 721         return false;
 722     }
 723
 724     // Block pending completion of any prior SPI access
 725     spiWait(dev);
 726
 727     // disable display
 728     fontIsLoading = true;
 729     spiWriteReg(dev, MAX7456ADD_VM0, 0);
 730
 731     spiWriteReg(dev, MAX7456ADD_CMAH, char_address); // set start address high
 732
 733     for (int x = 0; x < 54; x++) {
 734         spiWriteReg(dev, MAX7456ADD_CMAL, x); //set start address low
 735         spiWriteReg(dev, MAX7456ADD_CMDI, font_data[x]);
 736 #ifdef LED0_TOGGLE
 737         LED0_TOGGLE;
 738 #else
 739         LED1_TOGGLE;
 740 #endif
 741     }
 742
 743     // Transfer 54 bytes from shadow ram to NVM
 744
 745     spiWriteReg(dev, MAX7456ADD_CMM, WRITE_NVR);
 746
 747     // Wait until bit 5 in the status register returns to 0 (12ms)
 748
 749     while ((spiReadRegMsk(dev, MAX7456ADD_STAT) & STAT_NVR_BUSY) != 0x00);
 750
 751     return true;
 752 }
 753
 754 #ifdef MAX7456_NRST_PIN
 755 static IO_t max7456ResetPin        = IO_NONE;
 756 #endif
 757
 758 void max7456HardwareReset(void)
 759 {
 760 #ifdef MAX7456_NRST_PIN
 761 #define IO_RESET_CFG      IO_CONFIG(GPIO_Mode_OUT, GPIO_Speed_2MHz, GPIO_OType_PP, GPIO_PuPd_DOWN)
 762
 763     max7456ResetPin = IOGetByTag(IO_TAG(MAX7456_NRST_PIN));
 764     IOInit(max7456ResetPin, OWNER_OSD, 0);
 765     IOConfigGPIO(max7456ResetPin, IO_RESET_CFG);
 766
 767     // RESET 50ms long pulse, followed by 100us pause
 768     IOLo(max7456ResetPin);
 769     delay(50);
 770     IOHi(max7456ResetPin);
 771     delayMicroseconds(100);
 772 #else
 773     // Allow device 50ms to powerup
 774     delay(50);
 775 #endif
 776 }
 777
 778 bool max7456IsDeviceDetected(void)
 779 {
 780     return max7456DeviceDetected;
 781 }
 782
 783 void max7456SetBackgroundType(displayPortBackground_e backgroundType)
 784 {
 785     deviceBackgroundType = backgroundType;
 786
 787     max7456SetRegisterVM1();
 788 }
 789
 790 #endif // USE_MAX7456