2 * This file is part of Cleanflight and Betaflight.
4 * Cleanflight and Betaflight are free software. You can redistribute
5 * this software and/or modify this software under the terms of the
6 * GNU General Public License as published by the Free Software
7 * Foundation, either version 3 of the License, or (at your option)
10 * Cleanflight and Betaflight are distributed in the hope that they
11 * will be useful, but WITHOUT ANY WARRANTY; without even the implied
12 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
13 * See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this software.
18 * If not, see <http://www.gnu.org/licenses/>.
23 /* A7105 states for strobe */
31 A7105_RST_WRPTR
= 0xE0,
32 A7105_RST_RDPTR
= 0xF0
35 /* Register addresses */
38 A7105_01_MODE_CONTROL
= 0x01,
40 A7105_03_FIFOI
= 0x03,
41 A7105_04_FIFOII
= 0x04,
42 A7105_05_FIFO_DATA
= 0x05,
43 A7105_06_ID_DATA
= 0x06,
44 A7105_07_RC_OSC_I
= 0x07,
45 A7105_08_RC_OSC_II
= 0x08,
46 A7105_09_RC_OSC_III
= 0x09,
47 A7105_0A_CK0_PIN
= 0x0A,
48 A7105_0B_GPIO1_PIN_I
= 0x0B,
49 A7105_0C_GPIO2_PIN_II
= 0x0C,
50 A7105_0D_CLOCK
= 0x0D,
51 A7105_0E_DATA_RATE
= 0x0E,
52 A7105_0F_PLL_I
= 0x0F,
53 A7105_0F_CHANNEL
= 0x0F,
54 A7105_10_PLL_II
= 0x10,
55 A7105_11_PLL_III
= 0x11,
56 A7105_12_PLL_IV
= 0x12,
57 A7105_13_PLL_V
= 0x13,
59 A7105_15_TX_II
= 0x15,
60 A7105_16_DELAY_I
= 0x16,
61 A7105_17_DELAY_II
= 0x17,
63 A7105_19_RX_GAIN_I
= 0x19,
64 A7105_1A_RX_GAIN_II
= 0x1A,
65 A7105_1B_RX_GAIN_III
= 0x1B,
66 A7105_1C_RX_GAIN_IV
= 0x1C,
67 A7105_1D_RSSI_THOLD
= 0x1D,
69 A7105_1F_CODE_I
= 0x1F,
70 A7105_20_CODE_II
= 0x20,
71 A7105_21_CODE_III
= 0x21,
72 A7105_22_IF_CALIB_I
= 0x22,
73 A7105_23_IF_CALIB_II
= 0x23,
74 A7105_24_VCO_CURCAL
= 0x24,
75 A7105_25_VCO_SBCAL_I
= 0x25,
76 A7105_26_VCO_SBCAL_II
= 0x26,
77 A7105_27_BATTERY_DET
= 0x27,
78 A7105_28_TX_TEST
= 0x28,
79 A7105_29_RX_DEM_TEST_I
= 0x29,
80 A7105_2A_RX_DEM_TEST_II
= 0x2A,
82 A7105_2C_XTAL_TEST
= 0x2C,
83 A7105_2D_PLL_TEST
= 0x2D,
84 A7105_2E_VCO_TEST_I
= 0x2E,
85 A7105_2F_VCO_TEST_II
= 0x2F,
87 A7105_31_RSCALE
= 0x31,
88 A7105_32_FILTER_TEST
= 0x32,
91 /* Register: A7105_00_MODE */
92 #define A7105_MODE_FECF 0x40 // [0]: FEC pass. [1]: FEC error. (FECF is read only, it is updated internally while receiving every packet.)
93 #define A7105_MODE_CRCF 0x20 // [0]: CRC pass. [1]: CRC error. (CRCF is read only, it is updated internally while receiving every packet.)
94 #define A7105_MODE_CER 0x10 // [0]: RF chip is disabled. [1]: RF chip is enabled.
95 #define A7105_MODE_XER 0x08 // [0]: Crystal oscillator is disabled. [1]: Crystal oscillator is enabled.
96 #define A7105_MODE_PLLER 0x04 // [0]: PLL is disabled. [1]: PLL is enabled.
97 #define A7105_MODE_TRSR 0x02 // [0]: RX state. [1]: TX state. Serviceable if TRER=1 (TRX is enable).
98 #define A7105_MODE_TRER 0x01 // [0]: TRX is disabled. [1]: TRX is enabled.
100 void A7105Init(uint32_t id
, IO_t txEnPin
);
101 void A7105SoftReset(void);
102 void A7105Config(const uint8_t *regsTable
, uint8_t size
);
104 uint8_t A7105ReadReg(A7105Reg_t reg
);
105 void A7105WriteReg(A7105Reg_t reg
, uint8_t data
);
106 void A7105Strobe(A7105State_t state
);
108 void A7105WriteID(uint32_t id
);
109 uint32_t A7105ReadID(void);
111 void A7105ReadFIFO(uint8_t *data
, uint8_t num
);
112 void A7105WriteFIFO(uint8_t *data
, uint8_t num
);
114 bool A7105RxTxFinished(uint32_t *timeStamp
);