Merge pull request #11297 from SteveCEvans/baro_state
[betaflight.git] / src / main / drivers / rx / rx_cyrf6936.h
blob60efaee8e9410f59161d1290e155504f5d9b18da
1 /*
2 * This file is part of Cleanflight and Betaflight.
4 * Cleanflight and Betaflight are free software. You can redistribute
5 * this software and/or modify this software under the terms of the
6 * GNU General Public License as published by the Free Software
7 * Foundation, either version 3 of the License, or (at your option)
8 * any later version.
10 * Cleanflight and Betaflight are distributed in the hope that they
11 * will be useful, but WITHOUT ANY WARRANTY; without even the implied
12 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
13 * See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this software.
18 * If not, see <http://www.gnu.org/licenses/>.
21 #pragma once
23 enum {
24 CYRF6936_CHANNEL = 0x00,
25 CYRF6936_TX_LENGTH = 0x01,
26 CYRF6936_TX_CTRL = 0x02,
27 CYRF6936_TX_CFG = 0x03,
28 CYRF6936_TX_IRQ_STATUS = 0x04,
29 CYRF6936_RX_CTRL = 0x05,
30 CYRF6936_RX_CFG = 0x06,
31 CYRF6936_RX_IRQ_STATUS = 0x07,
32 CYRF6936_RX_STATUS = 0x08,
33 CYRF6936_RX_COUNT = 0x09,
34 CYRF6936_RX_LENGTH = 0x0A,
35 CYRF6936_PWR_CTRL = 0x0B,
36 CYRF6936_XTAL_CTRL = 0x0C,
37 CYRF6936_IO_CFG = 0x0D,
38 CYRF6936_GPIO_CTRL = 0x0E,
39 CYRF6936_XACT_CFG = 0x0F,
40 CYRF6936_FRAMING_CFG = 0x10,
41 CYRF6936_DATA32_THOLD = 0x11,
42 CYRF6936_DATA64_THOLD = 0x12,
43 CYRF6936_RSSI = 0x13,
44 CYRF6936_EOP_CTRL = 0x14,
45 CYRF6936_CRC_SEED_LSB = 0x15,
46 CYRF6936_CRC_SEED_MSB = 0x16,
47 CYRF6936_TX_CRC_LSB = 0x17,
48 CYRF6936_TX_CRC_MSB = 0x18,
49 CYRF6936_RX_CRC_LSB = 0x19,
50 CYRF6936_RX_CRC_MSB = 0x1A,
51 CYRF6936_TX_OFFSET_LSB = 0x1B,
52 CYRF6936_TX_OFFSET_MSB = 0x1C,
53 CYRF6936_MODE_OVERRIDE = 0x1D,
54 CYRF6936_RX_OVERRIDE = 0x1E,
55 CYRF6936_TX_OVERRIDE = 0x1F,
56 CYRF6936_TX_BUFFER = 0x20,
57 CYRF6936_RX_BUFFER = 0x21,
58 CYRF6936_SOP_CODE = 0x22,
59 CYRF6936_DATA_CODE = 0x23,
60 CYRF6936_PREAMBLE = 0x24,
61 CYRF6936_MFG_ID = 0x25,
62 CYRF6936_XTAL_CFG = 0x26,
63 CYRF6936_CLK_OFFSET = 0x27,
64 CYRF6936_CLK_EN = 0x28,
65 CYRF6936_RX_ABORT = 0x29,
66 CYRF6936_AUTO_CAL_TIME = 0x32,
67 CYRF6936_AUTO_CAL_OFFSET = 0x35,
68 CYRF6936_ANALOG_CTRL = 0x39,
70 // ENABLE WRITING
71 #define CYRF6936_DIR (1<<7)
73 // CYRF6936_MODE_OVERRIDE
74 #define CYRF6936_RST (1<<0)
76 // CYRF6936_CLK_EN
77 #define CYRF6936_RXF (1<<1)
79 // CYRF6936_XACT_CFG
80 enum {
81 CYRF6936_MODE_SLEEP = (0x0 << 2),
82 CYRF6936_MODE_IDLE = (0x1 << 2),
83 CYRF6936_MODE_SYNTH_TX = (0x2 << 2),
84 CYRF6936_MODE_SYNTH_RX = (0x3 << 2),
85 CYRF6936_MODE_RX = (0x4 << 2),
87 #define CYRF6936_FRC_END (1<<5)
88 #define CYRF6936_ACK_EN (1<<7)
90 // CYRF6936_IO_CFG
91 #define CYRF6936_IRQ_GPIO (1<<0)
92 #define CYRF6936_SPI_3PIN (1<<1)
93 #define CYRF6936_PACTL_GPIO (1<<2)
94 #define CYRF6936_PACTL_OD (1<<3)
95 #define CYRF6936_XOUT_OD (1<<4)
96 #define CYRF6936_MISO_OD (1<<5)
97 #define CYRF6936_IRQ_POL (1<<6)
98 #define CYRF6936_IRQ_OD (1<<7)
100 // CYRF6936_FRAMING_CFG
101 #define CYRF6936_LEN_EN (1<<5)
102 #define CYRF6936_SOP_LEN (1<<6)
103 #define CYRF6936_SOP_EN (1<<7)
105 // CYRF6936_RX_STATUS
106 enum {
107 CYRF6936_RX_DATA_MODE_GFSK = 0x00,
108 CYRF6936_RX_DATA_MODE_8DR = 0x01,
109 CYRF6936_RX_DATA_MODE_DDR = 0x10,
110 CYRF6936_RX_DATA_MODE_NV = 0x11,
112 #define CYRF6936_RX_CODE (1<<2)
113 #define CYRF6936_BAD_CRC (1<<3)
114 #define CYRF6936_CRC0 (1<<4)
115 #define CYRF6936_EOP_ERR (1<<5)
116 #define CYRF6936_PKT_ERR (1<<6)
117 #define CYRF6936_RX_ACK (1<<7)
119 // CYRF6936_TX_IRQ_STATUS
120 #define CYRF6936_TXE_IRQ (1<<0)
121 #define CYRF6936_TXC_IRQ (1<<1)
122 #define CYRF6936_TXBERR_IRQ (1<<2)
123 #define CYRF6936_TXB0_IRQ (1<<3)
124 #define CYRF6936_TXB8_IRQ (1<<4)
125 #define CYRF6936_TXB15_IRQ (1<<5)
126 #define CYRF6936_LV_IRQ (1<<6)
127 #define CYRF6936_OS_IRQ (1<<7)
129 // CYRF6936_RX_IRQ_STATUS
130 #define CYRF6936_RXE_IRQ (1<<0)
131 #define CYRF6936_RXC_IRQ (1<<1)
132 #define CYRF6936_RXBERR_IRQ (1<<2)
133 #define CYRF6936_RXB1_IRQ (1<<3)
134 #define CYRF6936_RXB8_IRQ (1<<4)
135 #define CYRF6936_RXB16_IRQ (1<<5)
136 #define CYRF6936_SOPDET_IRQ (1<<6)
137 #define CYRF6936_RXOW_IRQ (1<<7)
139 // CYRF6936_TX_CTRL
140 #define CYRF6936_TXE_IRQEN (1<<0)
141 #define CYRF6936_TXC_IRQEN (1<<1)
142 #define CYRF6936_TXBERR_IRQEN (1<<2)
143 #define CYRF6936_TXB0_IRQEN (1<<3)
144 #define CYRF6936_TXB8_IRQEN (1<<4)
145 #define CYRF6936_TXB15_IRQEN (1<<5)
146 #define CYRF6936_TX_CLR (1<<6)
147 #define CYRF6936_TX_GO (1<<7)
149 // CYRF6936_RX_CTRL
150 #define CYRF6936_RXE_IRQEN (1<<0)
151 #define CYRF6936_RXC_IRQEN (1<<1)
152 #define CYRF6936_RXBERR_IRQEN (1<<2)
153 #define CYRF6936_RXB1_IRQEN (1<<3)
154 #define CYRF6936_RXB8_IRQEN (1<<4)
155 #define CYRF6936_RXB16_IRQEN (1<<5)
156 #define CYRF6936_RSVD (1<<6)
157 #define CYRF6936_RX_GO (1<<7)
159 // CYRF6936_RX_OVERRIDE
160 #define CYRF6936_ACE (1<<1)
161 #define CYRF6936_DIS_RXCRC (1<<2)
162 #define CYRF6936_DIS_CRC0 (1<<3)
163 #define CYRF6936_FRC_RXDR (1<<4)
164 #define CYRF6936_MAN_RXACK (1<<5)
165 #define CYRF6936_RXTX_DLY (1<<6)
166 #define CYRF6936_ACK_RX (1<<7)
168 // CYRF6936_TX_OVERRIDE
169 #define CYRF6936_TX_INV (1<<0)
170 #define CYRF6936_DIS_TXCRC (1<<2)
171 #define CYRF6936_OVRD_ACK (1<<3)
172 #define CYRF6936_MAN_TXACK (1<<4)
173 #define CYRF6936_FRC_PRE (1<<6)
174 #define CYRF6936_ACK_TX (1<<7)
176 // CYRF6936_RX_CFG
177 #define CYRF6936_VLD_EN (1<<0)
178 #define CYRF6936_RXOW_EN (1<<1)
179 #define CYRF6936_FAST_TURN_EN (1<<3)
180 #define CYRF6936_HILO (1<<4)
181 #define CYRF6936_ATT (1<<5)
182 #define CYRF6936_LNA (1<<6)
183 #define CYRF6936_AGC_EN (1<<7)
185 // CYRF6936_TX_CFG
186 enum {
187 CYRF6936_PA_M35 = 0x0,
188 CYRF6936_PA_M30 = 0x1,
189 CYRF6936_PA_M24 = 0x2,
190 CYRF6936_PA_M18 = 0x3,
191 CYRF6936_PA_M13 = 0x4,
192 CYRF6936_PA_M5 = 0x5,
193 CYRF6936_PA_0 = 0x6,
194 CYRF6936_PA_4 = 0x7,
196 enum {
197 CYRF6936_DATA_MODE_GFSK = (0x0 << 3),
198 CYRF6936_DATA_MODE_8DR = (0x1 << 3),
199 CYRF6936_DATA_MODE_DDR = (0x2 << 3),
200 CYRF6936_DATA_MODE_SDR = (0x3 << 3),
202 #define CYRF6936_DATA_CODE_LENGTH (1<<5)
204 extern bool isError;
206 bool cyrf6936Init(void);
208 bool cyrf6936RxFinished(uint32_t *timeStamp);
210 void cyrf6936WriteRegister(const uint8_t address, const uint8_t data);
211 void cyrf6936WriteBlock(const uint8_t address, const uint8_t *data, const uint8_t length);
212 uint8_t cyrf6936ReadRegister(const uint8_t address);
213 void cyrf6936ReadBlock(const uint8_t address, uint8_t *data, const uint8_t length);
215 uint8_t cyrf6936GetRssi(void);
216 uint8_t cyrf6936GetRxStatus(void);
217 void cyrf6936SetConfigLen(const uint8_t config[][2], const uint8_t length);
218 void cyrf6936SetChannel(const uint8_t chan);
219 void cyrf6936SetMode(const uint8_t mode, const bool force);
220 void cyrf6936SetCrcSeed(const uint16_t crc);
221 void cyrf6936SetSopCode(const uint8_t *sopcode);
222 void cyrf6936SetDataCode(const uint8_t *datacode);
224 void cyrf6936SendLen(const uint8_t *data, const uint8_t length);
225 void cyrf6936StartRecv(void);
226 void cyrf6936RecvLen(uint8_t *data, const uint8_t length);