Merge pull request #11297 from SteveCEvans/baro_state
[betaflight.git] / src / main / drivers / rx / rx_nrf24l01.h
blobd315d757b582b9cefc3061bc33628a4ceee94ff9
1 /*
2 * This file is part of Cleanflight and Betaflight.
4 * Cleanflight and Betaflight are free software. You can redistribute
5 * this software and/or modify this software under the terms of the
6 * GNU General Public License as published by the Free Software
7 * Foundation, either version 3 of the License, or (at your option)
8 * any later version.
10 * Cleanflight and Betaflight are distributed in the hope that they
11 * will be useful, but WITHOUT ANY WARRANTY; without even the implied
12 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
13 * See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this software.
18 * If not, see <http://www.gnu.org/licenses/>.
21 // This file is copied with modifications from project Deviation,
22 // see http://deviationtx.com, file iface_nrf24l01.h
24 #pragma once
26 #include <stdbool.h>
27 #include <stdint.h>
29 #include "rx/rx_spi.h"
31 #define NRF24L01_MAX_PAYLOAD_SIZE 32
33 // Register map of nRF24L01
34 enum {
35 NRF24L01_00_CONFIG = 0x00,
36 NRF24L01_01_EN_AA = 0x01, // Auto Acknowledge
37 NRF24L01_02_EN_RXADDR = 0x02,
38 NRF24L01_03_SETUP_AW = 0x03, // Address Width
39 NRF24L01_04_SETUP_RETR = 0x04, // automatic RETRansmission
40 NRF24L01_05_RF_CH = 0x05, // RF CHannel
41 NRF24L01_06_RF_SETUP = 0x06,
42 NRF24L01_07_STATUS = 0x07,
43 NRF24L01_08_OBSERVE_TX = 0x08,
44 NRF24L01_09_RPD = 0x09, //Received Power Detector in the nRF23L01+, called CD (Carrier Detect) in the nRF24L01
45 NRF24L01_0A_RX_ADDR_P0 = 0x0A,
46 NRF24L01_0B_RX_ADDR_P1 = 0x0B,
47 NRF24L01_0C_RX_ADDR_P2 = 0x0C,
48 NRF24L01_0D_RX_ADDR_P3 = 0x0D,
49 NRF24L01_0E_RX_ADDR_P4 = 0x0E,
50 NRF24L01_0F_RX_ADDR_P5 = 0x0F,
51 NRF24L01_10_TX_ADDR = 0x10,
52 NRF24L01_11_RX_PW_P0 = 0x11, // Payload Width
53 NRF24L01_12_RX_PW_P1 = 0x12,
54 NRF24L01_13_RX_PW_P2 = 0x13,
55 NRF24L01_14_RX_PW_P3 = 0x14,
56 NRF24L01_15_RX_PW_P4 = 0x15,
57 NRF24L01_16_RX_PW_P5 = 0x16,
58 NRF24L01_17_FIFO_STATUS = 0x17,
59 NRF24L01_1C_DYNPD = 0x1C, // DYNamic PayloaD
60 NRF24L01_1D_FEATURE = 0x1D
63 // Bit position mnemonics
64 enum {
65 NRF24L01_00_CONFIG_MASK_RX_DR = 6,
66 NRF24L01_00_CONFIG_MASK_TX_DS = 5,
67 NRF24L01_00_CONFIG_MASK_MAX_RT = 4,
68 NRF24L01_00_CONFIG_EN_CRC = 3,
69 NRF24L01_00_CONFIG_CRCO = 2,
70 NRF24L01_00_CONFIG_PWR_UP = 1,
71 NRF24L01_00_CONFIG_PRIM_RX = 0,
73 NRF24L01_01_EN_AA_ENAA_P5 = 5,
74 NRF24L01_01_EN_AA_ENAA_P4 = 4,
75 NRF24L01_01_EN_AA_ENAA_P3 = 3,
76 NRF24L01_01_EN_AA_ENAA_P2 = 2,
77 NRF24L01_01_EN_AA_ENAA_P1 = 1,
78 NRF24L01_01_EN_AA_ENAA_P0 = 0,
80 NRF24L01_02_EN_RXADDR_ERX_P5 = 5,
81 NRF24L01_02_EN_RXADDR_ERX_P4 = 4,
82 NRF24L01_02_EN_RXADDR_ERX_P3 = 3,
83 NRF24L01_02_EN_RXADDR_ERX_P2 = 2,
84 NRF24L01_02_EN_RXADDR_ERX_P1 = 1,
85 NRF24L01_02_EN_RXADDR_ERX_P0 = 0,
87 NRF24L01_06_RF_SETUP_RF_DR_LOW = 5,
88 NRF24L01_06_RF_SETUP_RF_DR_HIGH = 3,
89 NRF24L01_06_RF_SETUP_RF_PWR_HIGH = 2,
90 NRF24L01_06_RF_SETUP_RF_PWR_LOW = 1,
92 NRF24L01_07_STATUS_RX_DR = 6,
93 NRF24L01_07_STATUS_TX_DS = 5,
94 NRF24L01_07_STATUS_MAX_RT = 4,
96 NRF24L01_17_FIFO_STATUS_TX_FULL = 5,
97 NRF24L01_17_FIFO_STATUS_TX_EMPTY = 4,
98 NRF24L01_17_FIFO_STATUS_RX_FULL = 1,
99 NRF24L01_17_FIFO_STATUS_RX_EMPTY = 0,
101 NRF24L01_1C_DYNPD_DPL_P5 = 5,
102 NRF24L01_1C_DYNPD_DPL_P4 = 4,
103 NRF24L01_1C_DYNPD_DPL_P3 = 3,
104 NRF24L01_1C_DYNPD_DPL_P2 = 2,
105 NRF24L01_1C_DYNPD_DPL_P1 = 1,
106 NRF24L01_1C_DYNPD_DPL_P0 = 0,
108 NRF24L01_1D_FEATURE_EN_DPL = 2,
109 NRF24L01_1D_FEATURE_EN_ACK_PAY = 1,
110 NRF24L01_1D_FEATURE_EN_DYN_ACK = 0
113 // Pre-shifted and combined bits
114 enum {
115 NRF24L01_01_EN_AA_ALL_PIPES = 0x3F,
117 NRF24L01_02_EN_RXADDR_ERX_ALL_PIPES = 0x3F,
119 NRF24L01_03_SETUP_AW_3BYTES = 0x01,
120 NRF24L01_03_SETUP_AW_4BYTES = 0x02,
121 NRF24L01_03_SETUP_AW_5BYTES = 0x03,
123 NRF24L01_04_SETUP_RETR_ARD_250us = 0x00,
124 NRF24L01_04_SETUP_RETR_ARD_500us = 0x10,
125 NRF24L01_04_SETUP_RETR_ARD_750us = 0x20,
126 NRF24L01_04_SETUP_RETR_ARD_1000us = 0x30,
127 NRF24L01_04_SETUP_RETR_ARD_1250us = 0x40,
128 NRF24L01_04_SETUP_RETR_ARD_1500us = 0x50,
129 NRF24L01_04_SETUP_RETR_ARD_1750us = 0x60,
130 NRF24L01_04_SETUP_RETR_ARD_2000us = 0x70,
131 NRF24L01_04_SETUP_RETR_ARD_2250us = 0x80,
132 NRF24L01_04_SETUP_RETR_ARD_2500us = 0x90,
133 NRF24L01_04_SETUP_RETR_ARD_2750us = 0xa0,
134 NRF24L01_04_SETUP_RETR_ARD_3000us = 0xb0,
135 NRF24L01_04_SETUP_RETR_ARD_3250us = 0xc0,
136 NRF24L01_04_SETUP_RETR_ARD_3500us = 0xd0,
137 NRF24L01_04_SETUP_RETR_ARD_3750us = 0xe0,
138 NRF24L01_04_SETUP_RETR_ARD_4000us = 0xf0,
140 NRF24L01_04_SETUP_RETR_ARC_0 = 0x00,
141 NRF24L01_04_SETUP_RETR_ARC_1 = 0x01,
142 NRF24L01_04_SETUP_RETR_ARC_2 = 0x02,
143 NRF24L01_04_SETUP_RETR_ARC_3 = 0x03,
144 NRF24L01_04_SETUP_RETR_ARC_4 = 0x04,
145 NRF24L01_04_SETUP_RETR_ARC_5 = 0x05,
146 NRF24L01_04_SETUP_RETR_ARC_6 = 0x06,
147 NRF24L01_04_SETUP_RETR_ARC_7 = 0x07,
148 NRF24L01_04_SETUP_RETR_ARC_8 = 0x08,
149 NRF24L01_04_SETUP_RETR_ARC_9 = 0x09,
150 NRF24L01_04_SETUP_RETR_ARC_10 = 0x0a,
151 NRF24L01_04_SETUP_RETR_ARC_11 = 0x0b,
152 NRF24L01_04_SETUP_RETR_ARC_12 = 0x0c,
153 NRF24L01_04_SETUP_RETR_ARC_13 = 0x0d,
154 NRF24L01_04_SETUP_RETR_ARC_14 = 0x0e,
155 NRF24L01_04_SETUP_RETR_ARC_15 = 0x0f,
158 NRF24L01_06_RF_SETUP_RF_DR_2Mbps = 0x08,
159 NRF24L01_06_RF_SETUP_RF_DR_1Mbps = 0x00,
160 NRF24L01_06_RF_SETUP_RF_DR_250Kbps = 0x20,
161 NRF24L01_06_RF_SETUP_RF_PWR_n18dbm = 0x01,
162 NRF24L01_06_RF_SETUP_RF_PWR_n12dbm = 0x02,
163 NRF24L01_06_RF_SETUP_RF_PWR_n6dbm = 0x04,
164 NRF24L01_06_RF_SETUP_RF_PWR_0dbm = 0x06,
166 NRF24L01_1C_DYNPD_ALL_PIPES = 0x3F
169 // Pipes
170 enum {
171 NRF24L01_PIPE0 = 0,
172 NRF24L01_PIPE1 = 1,
173 NRF24L01_PIPE2 = 2,
174 NRF24L01_PIPE3 = 3,
175 NRF24L01_PIPE4 = 4,
176 NRF24L01_PIPE5 = 5
179 void NRF24L01_Initialize(uint8_t baseConfig);
180 void NRF24L01_WriteReg(uint8_t reg, uint8_t data);
181 void NRF24L01_WriteRegisterMulti(uint8_t reg, const uint8_t *data, uint8_t length);
182 void NRF24L01_WritePayload(const uint8_t *data, uint8_t length);
183 void NRF24L01_WriteAckPayload(const uint8_t *data, uint8_t length, uint8_t pipe);
184 uint8_t NRF24L01_ReadReg(uint8_t reg);
185 void NRF24L01_ReadRegisterMulti(uint8_t reg, uint8_t *data, uint8_t length);
186 void NRF24L01_ReadPayload(uint8_t *data, uint8_t length);
189 // Utility functions
191 void NRF24L01_FlushTx(void);
192 void NRF24L01_FlushRx(void);
193 void NRF24L01_Activate(uint8_t code);
195 void NRF24L01_SetupBasic(void);
196 void NRF24L01_SetStandbyMode(void);
197 void NRF24L01_SetRxMode(void);
198 void NRF24L01_SetTxMode(void);
199 void NRF24L01_ClearAllInterrupts(void);
200 void NRF24L01_SetChannel(uint8_t channel);
201 bool NRF24L01_ReadPayloadIfAvailable(uint8_t *data, uint8_t length);