Merge pull request #11297 from SteveCEvans/baro_state
[betaflight.git] / src / main / startup / startup_stm32g474xx.s
blob76a993713a8067180ea7619b0a93c2e40ea2c319
1 /**
2 ******************************************************************************
3 * @file startup_stm32g474xx.s
4 * @author MCD Application Team
5 * @brief STM32G474xx devices vector table GCC toolchain.
6 * This module performs:
7 * - Set the initial SP
8 * - Set the initial PC == Reset_Handler,
9 * - Set the vector table entries with the exceptions ISR address,
10 * - Configure the clock system
11 * - Branches to main in the C library (which eventually
12 * calls main()).
13 * After Reset the Cortex-M4 processor is in Thread mode,
14 * priority is Privileged, and the Stack is set to Main.
15 ******************************************************************************
16 * @attention
18 * <h2><center>&copy; Copyright (c) 2017 STMicroelectronics.
19 * All rights reserved.</center></h2>
21 * This software component is licensed by ST under BSD 3-Clause license,
22 * the "License"; You may not use this file except in compliance with the
23 * License. You may obtain a copy of the License at:
24 * opensource.org/licenses/BSD-3-Clause
26 ******************************************************************************
29 .syntax unified
30 .cpu cortex-m4
31 .fpu softvfp
32 .thumb
34 .global g_pfnVectors
35 .global Default_Handler
37 /* start address for the initialization values of the .data section.
38 defined in linker script */
39 .word _sidata
40 /* start address for the .data section. defined in linker script */
41 .word _sdata
42 /* end address for the .data section. defined in linker script */
43 .word _edata
44 /* start address for the .bss section. defined in linker script */
45 .word _sbss
46 /* end address for the .bss section. defined in linker script */
47 .word _ebss
49 .equ BootRAM, 0xF1E0F85F
50 /**
51 * @brief This is the code that gets called when the processor first
52 * starts execution following a reset event. Only the absolutely
53 * necessary set is performed, after which the application
54 * supplied main() routine is called.
55 * @param None
56 * @retval : None
59 .section .text.Reset_Handler
60 .weak Reset_Handler
61 .type Reset_Handler, %function
62 Reset_Handler:
63 ldr r0, =_estack
64 mov sp, r0 /* set stack pointer */
66 bl persistentObjectInit
68 /* Copy the data segment initializers from flash to SRAM */
69 ldr r0, =_sdata
70 ldr r1, =_edata
71 ldr r2, =_sidata
72 movs r3, #0
73 b LoopCopyDataInit
75 CopyDataInit:
76 ldr r4, [r2, r3]
77 str r4, [r0, r3]
78 adds r3, r3, #4
80 LoopCopyDataInit:
81 adds r4, r0, r3
82 cmp r4, r1
83 bcc CopyDataInit
85 /* Zero fill the bss segment. */
86 ldr r2, =_sbss
87 ldr r4, =_ebss
88 movs r3, #0
89 b LoopFillZerobss
91 FillZerobss:
92 str r3, [r2]
93 adds r2, r2, #4
95 LoopFillZerobss:
96 cmp r2, r4
97 bcc FillZerobss
99 /* Zero fill the sfastram_bss segment */
100 ldr r2, =_sfastram_bss
101 ldr r4, =_efastram_bss
102 movs r3, #0
103 b LoopFillZerofastram_bss
105 FillZerofastram_bss:
106 str r3, [r2]
107 adds r2, r2, #4
109 LoopFillZerofastram_bss:
110 cmp r2, r4
111 bcc FillZerofastram_bss
113 /* Call the clock system intitialization function.*/
114 bl SystemInit
115 /* Call static constructors */
116 /* bl __libc_init_array */
117 /* Call the application's entry point.*/
118 bl main
120 LoopForever:
121 b LoopForever
123 .size Reset_Handler, .-Reset_Handler
126 * @brief This is the code that gets called when the processor receives an
127 * unexpected interrupt. This simply enters an infinite loop, preserving
128 * the system state for examination by a debugger.
130 * @param None
131 * @retval : None
133 .section .text.Default_Handler,"ax",%progbits
134 Default_Handler:
135 Infinite_Loop:
136 b Infinite_Loop
137 .size Default_Handler, .-Default_Handler
138 /******************************************************************************
140 * The minimal vector table for a Cortex-M4. Note that the proper constructs
141 * must be placed on this to ensure that it ends up at physical address
142 * 0x0000.0000.
144 ******************************************************************************/
145 .section .isr_vector,"a",%progbits
146 .type g_pfnVectors, %object
147 .size g_pfnVectors, .-g_pfnVectors
150 g_pfnVectors:
151 .word _estack
152 .word Reset_Handler
153 .word NMI_Handler
154 .word HardFault_Handler
155 .word MemManage_Handler
156 .word BusFault_Handler
157 .word UsageFault_Handler
158 .word 0
159 .word 0
160 .word 0
161 .word 0
162 .word SVC_Handler
163 .word DebugMon_Handler
164 .word 0
165 .word PendSV_Handler
166 .word SysTick_Handler
167 .word WWDG_IRQHandler
168 .word PVD_PVM_IRQHandler
169 .word RTC_TAMP_LSECSS_IRQHandler
170 .word RTC_WKUP_IRQHandler
171 .word FLASH_IRQHandler
172 .word RCC_IRQHandler
173 .word EXTI0_IRQHandler
174 .word EXTI1_IRQHandler
175 .word EXTI2_IRQHandler
176 .word EXTI3_IRQHandler
177 .word EXTI4_IRQHandler
178 .word DMA1_Channel1_IRQHandler
179 .word DMA1_Channel2_IRQHandler
180 .word DMA1_Channel3_IRQHandler
181 .word DMA1_Channel4_IRQHandler
182 .word DMA1_Channel5_IRQHandler
183 .word DMA1_Channel6_IRQHandler
184 .word DMA1_Channel7_IRQHandler
185 .word ADC1_2_IRQHandler
186 .word USB_HP_IRQHandler
187 .word USB_LP_IRQHandler
188 .word FDCAN1_IT0_IRQHandler
189 .word FDCAN1_IT1_IRQHandler
190 .word EXTI9_5_IRQHandler
191 .word TIM1_BRK_TIM15_IRQHandler
192 .word TIM1_UP_TIM16_IRQHandler
193 .word TIM1_TRG_COM_TIM17_IRQHandler
194 .word TIM1_CC_IRQHandler
195 .word TIM2_IRQHandler
196 .word TIM3_IRQHandler
197 .word TIM4_IRQHandler
198 .word I2C1_EV_IRQHandler
199 .word I2C1_ER_IRQHandler
200 .word I2C2_EV_IRQHandler
201 .word I2C2_ER_IRQHandler
202 .word SPI1_IRQHandler
203 .word SPI2_IRQHandler
204 .word USART1_IRQHandler
205 .word USART2_IRQHandler
206 .word USART3_IRQHandler
207 .word EXTI15_10_IRQHandler
208 .word RTC_Alarm_IRQHandler
209 .word USBWakeUp_IRQHandler
210 .word TIM8_BRK_IRQHandler
211 .word TIM8_UP_IRQHandler
212 .word TIM8_TRG_COM_IRQHandler
213 .word TIM8_CC_IRQHandler
214 .word ADC3_IRQHandler
215 .word FMC_IRQHandler
216 .word LPTIM1_IRQHandler
217 .word TIM5_IRQHandler
218 .word SPI3_IRQHandler
219 .word UART4_IRQHandler
220 .word UART5_IRQHandler
221 .word TIM6_DAC_IRQHandler
222 .word TIM7_DAC_IRQHandler
223 .word DMA2_Channel1_IRQHandler
224 .word DMA2_Channel2_IRQHandler
225 .word DMA2_Channel3_IRQHandler
226 .word DMA2_Channel4_IRQHandler
227 .word DMA2_Channel5_IRQHandler
228 .word ADC4_IRQHandler
229 .word ADC5_IRQHandler
230 .word UCPD1_IRQHandler
231 .word COMP1_2_3_IRQHandler
232 .word COMP4_5_6_IRQHandler
233 .word COMP7_IRQHandler
234 .word HRTIM1_Master_IRQHandler
235 .word HRTIM1_TIMA_IRQHandler
236 .word HRTIM1_TIMB_IRQHandler
237 .word HRTIM1_TIMC_IRQHandler
238 .word HRTIM1_TIMD_IRQHandler
239 .word HRTIM1_TIME_IRQHandler
240 .word HRTIM1_FLT_IRQHandler
241 .word HRTIM1_TIMF_IRQHandler
242 .word CRS_IRQHandler
243 .word SAI1_IRQHandler
244 .word TIM20_BRK_IRQHandler
245 .word TIM20_UP_IRQHandler
246 .word TIM20_TRG_COM_IRQHandler
247 .word TIM20_CC_IRQHandler
248 .word FPU_IRQHandler
249 .word I2C4_EV_IRQHandler
250 .word I2C4_ER_IRQHandler
251 .word SPI4_IRQHandler
252 .word 0
253 .word FDCAN2_IT0_IRQHandler
254 .word FDCAN2_IT1_IRQHandler
255 .word FDCAN3_IT0_IRQHandler
256 .word FDCAN3_IT1_IRQHandler
257 .word RNG_IRQHandler
258 .word LPUART1_IRQHandler
259 .word I2C3_EV_IRQHandler
260 .word I2C3_ER_IRQHandler
261 .word DMAMUX_OVR_IRQHandler
262 .word QUADSPI_IRQHandler
263 .word DMA1_Channel8_IRQHandler
264 .word DMA2_Channel6_IRQHandler
265 .word DMA2_Channel7_IRQHandler
266 .word DMA2_Channel8_IRQHandler
267 .word CORDIC_IRQHandler
268 .word FMAC_IRQHandler
270 /*******************************************************************************
272 * Provide weak aliases for each Exception handler to the Default_Handler.
273 * As they are weak aliases, any function with the same name will override
274 * this definition.
276 *******************************************************************************/
278 .weak NMI_Handler
279 .thumb_set NMI_Handler,Default_Handler
281 .weak HardFault_Handler
282 .thumb_set HardFault_Handler,Default_Handler
284 .weak MemManage_Handler
285 .thumb_set MemManage_Handler,Default_Handler
287 .weak BusFault_Handler
288 .thumb_set BusFault_Handler,Default_Handler
290 .weak UsageFault_Handler
291 .thumb_set UsageFault_Handler,Default_Handler
293 .weak SVC_Handler
294 .thumb_set SVC_Handler,Default_Handler
296 .weak DebugMon_Handler
297 .thumb_set DebugMon_Handler,Default_Handler
299 .weak PendSV_Handler
300 .thumb_set PendSV_Handler,Default_Handler
302 .weak SysTick_Handler
303 .thumb_set SysTick_Handler,Default_Handler
305 .weak WWDG_IRQHandler
306 .thumb_set WWDG_IRQHandler,Default_Handler
308 .weak PVD_PVM_IRQHandler
309 .thumb_set PVD_PVM_IRQHandler,Default_Handler
311 .weak RTC_TAMP_LSECSS_IRQHandler
312 .thumb_set RTC_TAMP_LSECSS_IRQHandler,Default_Handler
314 .weak RTC_WKUP_IRQHandler
315 .thumb_set RTC_WKUP_IRQHandler,Default_Handler
317 .weak FLASH_IRQHandler
318 .thumb_set FLASH_IRQHandler,Default_Handler
320 .weak RCC_IRQHandler
321 .thumb_set RCC_IRQHandler,Default_Handler
323 .weak EXTI0_IRQHandler
324 .thumb_set EXTI0_IRQHandler,Default_Handler
326 .weak EXTI1_IRQHandler
327 .thumb_set EXTI1_IRQHandler,Default_Handler
329 .weak EXTI2_IRQHandler
330 .thumb_set EXTI2_IRQHandler,Default_Handler
332 .weak EXTI3_IRQHandler
333 .thumb_set EXTI3_IRQHandler,Default_Handler
335 .weak EXTI4_IRQHandler
336 .thumb_set EXTI4_IRQHandler,Default_Handler
338 .weak DMA1_Channel1_IRQHandler
339 .thumb_set DMA1_Channel1_IRQHandler,Default_Handler
341 .weak DMA1_Channel2_IRQHandler
342 .thumb_set DMA1_Channel2_IRQHandler,Default_Handler
344 .weak DMA1_Channel3_IRQHandler
345 .thumb_set DMA1_Channel3_IRQHandler,Default_Handler
347 .weak DMA1_Channel4_IRQHandler
348 .thumb_set DMA1_Channel4_IRQHandler,Default_Handler
350 .weak DMA1_Channel5_IRQHandler
351 .thumb_set DMA1_Channel5_IRQHandler,Default_Handler
353 .weak DMA1_Channel6_IRQHandler
354 .thumb_set DMA1_Channel6_IRQHandler,Default_Handler
356 .weak DMA1_Channel7_IRQHandler
357 .thumb_set DMA1_Channel7_IRQHandler,Default_Handler
359 .weak ADC1_2_IRQHandler
360 .thumb_set ADC1_2_IRQHandler,Default_Handler
362 .weak USB_HP_IRQHandler
363 .thumb_set USB_HP_IRQHandler,Default_Handler
365 .weak USB_LP_IRQHandler
366 .thumb_set USB_LP_IRQHandler,Default_Handler
368 .weak FDCAN1_IT0_IRQHandler
369 .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
371 .weak FDCAN1_IT1_IRQHandler
372 .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
374 .weak EXTI9_5_IRQHandler
375 .thumb_set EXTI9_5_IRQHandler,Default_Handler
377 .weak TIM1_BRK_TIM15_IRQHandler
378 .thumb_set TIM1_BRK_TIM15_IRQHandler,Default_Handler
380 .weak TIM1_UP_TIM16_IRQHandler
381 .thumb_set TIM1_UP_TIM16_IRQHandler,Default_Handler
383 .weak TIM1_TRG_COM_TIM17_IRQHandler
384 .thumb_set TIM1_TRG_COM_TIM17_IRQHandler,Default_Handler
386 .weak TIM1_CC_IRQHandler
387 .thumb_set TIM1_CC_IRQHandler,Default_Handler
389 .weak TIM2_IRQHandler
390 .thumb_set TIM2_IRQHandler,Default_Handler
392 .weak TIM3_IRQHandler
393 .thumb_set TIM3_IRQHandler,Default_Handler
395 .weak TIM4_IRQHandler
396 .thumb_set TIM4_IRQHandler,Default_Handler
398 .weak I2C1_EV_IRQHandler
399 .thumb_set I2C1_EV_IRQHandler,Default_Handler
401 .weak I2C1_ER_IRQHandler
402 .thumb_set I2C1_ER_IRQHandler,Default_Handler
404 .weak I2C2_EV_IRQHandler
405 .thumb_set I2C2_EV_IRQHandler,Default_Handler
407 .weak I2C2_ER_IRQHandler
408 .thumb_set I2C2_ER_IRQHandler,Default_Handler
410 .weak SPI1_IRQHandler
411 .thumb_set SPI1_IRQHandler,Default_Handler
413 .weak SPI2_IRQHandler
414 .thumb_set SPI2_IRQHandler,Default_Handler
416 .weak USART1_IRQHandler
417 .thumb_set USART1_IRQHandler,Default_Handler
419 .weak USART2_IRQHandler
420 .thumb_set USART2_IRQHandler,Default_Handler
422 .weak USART3_IRQHandler
423 .thumb_set USART3_IRQHandler,Default_Handler
425 .weak EXTI15_10_IRQHandler
426 .thumb_set EXTI15_10_IRQHandler,Default_Handler
428 .weak RTC_Alarm_IRQHandler
429 .thumb_set RTC_Alarm_IRQHandler,Default_Handler
431 .weak USBWakeUp_IRQHandler
432 .thumb_set USBWakeUp_IRQHandler,Default_Handler
434 .weak TIM8_BRK_IRQHandler
435 .thumb_set TIM8_BRK_IRQHandler,Default_Handler
437 .weak TIM8_UP_IRQHandler
438 .thumb_set TIM8_UP_IRQHandler,Default_Handler
440 .weak TIM8_TRG_COM_IRQHandler
441 .thumb_set TIM8_TRG_COM_IRQHandler,Default_Handler
443 .weak TIM8_CC_IRQHandler
444 .thumb_set TIM8_CC_IRQHandler,Default_Handler
446 .weak ADC3_IRQHandler
447 .thumb_set ADC3_IRQHandler,Default_Handler
449 .weak FMC_IRQHandler
450 .thumb_set FMC_IRQHandler,Default_Handler
452 .weak LPTIM1_IRQHandler
453 .thumb_set LPTIM1_IRQHandler,Default_Handler
455 .weak TIM5_IRQHandler
456 .thumb_set TIM5_IRQHandler,Default_Handler
458 .weak SPI3_IRQHandler
459 .thumb_set SPI3_IRQHandler,Default_Handler
461 .weak UART4_IRQHandler
462 .thumb_set UART4_IRQHandler,Default_Handler
464 .weak UART5_IRQHandler
465 .thumb_set UART5_IRQHandler,Default_Handler
467 .weak TIM6_DAC_IRQHandler
468 .thumb_set TIM6_DAC_IRQHandler,Default_Handler
470 .weak TIM7_DAC_IRQHandler
471 .thumb_set TIM7_DAC_IRQHandler,Default_Handler
473 .weak DMA2_Channel1_IRQHandler
474 .thumb_set DMA2_Channel1_IRQHandler,Default_Handler
476 .weak DMA2_Channel2_IRQHandler
477 .thumb_set DMA2_Channel2_IRQHandler,Default_Handler
479 .weak DMA2_Channel3_IRQHandler
480 .thumb_set DMA2_Channel3_IRQHandler,Default_Handler
482 .weak DMA2_Channel4_IRQHandler
483 .thumb_set DMA2_Channel4_IRQHandler,Default_Handler
485 .weak DMA2_Channel5_IRQHandler
486 .thumb_set DMA2_Channel5_IRQHandler,Default_Handler
488 .weak ADC4_IRQHandler
489 .thumb_set ADC4_IRQHandler,Default_Handler
491 .weak ADC5_IRQHandler
492 .thumb_set ADC5_IRQHandler,Default_Handler
494 .weak UCPD1_IRQHandler
495 .thumb_set UCPD1_IRQHandler,Default_Handler
497 .weak COMP1_2_3_IRQHandler
498 .thumb_set COMP1_2_3_IRQHandler,Default_Handler
500 .weak COMP4_5_6_IRQHandler
501 .thumb_set COMP4_5_6_IRQHandler,Default_Handler
503 .weak COMP7_IRQHandler
504 .thumb_set COMP7_IRQHandler,Default_Handler
506 .weak HRTIM1_Master_IRQHandler
507 .thumb_set HRTIM1_Master_IRQHandler,Default_Handler
509 .weak HRTIM1_TIMA_IRQHandler
510 .thumb_set HRTIM1_TIMA_IRQHandler,Default_Handler
512 .weak HRTIM1_TIMB_IRQHandler
513 .thumb_set HRTIM1_TIMB_IRQHandler,Default_Handler
515 .weak HRTIM1_TIMC_IRQHandler
516 .thumb_set HRTIM1_TIMC_IRQHandler,Default_Handler
518 .weak HRTIM1_TIMD_IRQHandler
519 .thumb_set HRTIM1_TIMD_IRQHandler,Default_Handler
521 .weak HRTIM1_TIME_IRQHandler
522 .thumb_set HRTIM1_TIME_IRQHandler,Default_Handler
524 .weak HRTIM1_FLT_IRQHandler
525 .thumb_set HRTIM1_FLT_IRQHandler,Default_Handler
527 .weak HRTIM1_TIMF_IRQHandler
528 .thumb_set HRTIM1_TIMF_IRQHandler,Default_Handler
530 .weak CRS_IRQHandler
531 .thumb_set CRS_IRQHandler,Default_Handler
533 .weak SAI1_IRQHandler
534 .thumb_set SAI1_IRQHandler,Default_Handler
536 .weak TIM20_BRK_IRQHandler
537 .thumb_set TIM20_BRK_IRQHandler,Default_Handler
539 .weak TIM20_UP_IRQHandler
540 .thumb_set TIM20_UP_IRQHandler,Default_Handler
542 .weak TIM20_TRG_COM_IRQHandler
543 .thumb_set TIM20_TRG_COM_IRQHandler,Default_Handler
545 .weak TIM20_CC_IRQHandler
546 .thumb_set TIM20_CC_IRQHandler,Default_Handler
548 .weak FPU_IRQHandler
549 .thumb_set FPU_IRQHandler,Default_Handler
551 .weak I2C4_EV_IRQHandler
552 .thumb_set I2C4_EV_IRQHandler,Default_Handler
554 .weak I2C4_ER_IRQHandler
555 .thumb_set I2C4_ER_IRQHandler,Default_Handler
557 .weak SPI4_IRQHandler
558 .thumb_set SPI4_IRQHandler,Default_Handler
560 .weak FDCAN2_IT0_IRQHandler
561 .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
563 .weak FDCAN2_IT1_IRQHandler
564 .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
566 .weak FDCAN3_IT0_IRQHandler
567 .thumb_set FDCAN3_IT0_IRQHandler,Default_Handler
569 .weak FDCAN3_IT1_IRQHandler
570 .thumb_set FDCAN3_IT1_IRQHandler,Default_Handler
572 .weak RNG_IRQHandler
573 .thumb_set RNG_IRQHandler,Default_Handler
575 .weak LPUART1_IRQHandler
576 .thumb_set LPUART1_IRQHandler,Default_Handler
578 .weak I2C3_EV_IRQHandler
579 .thumb_set I2C3_EV_IRQHandler,Default_Handler
581 .weak I2C3_ER_IRQHandler
582 .thumb_set I2C3_ER_IRQHandler,Default_Handler
584 .weak DMAMUX_OVR_IRQHandler
585 .thumb_set DMAMUX_OVR_IRQHandler,Default_Handler
587 .weak QUADSPI_IRQHandler
588 .thumb_set QUADSPI_IRQHandler,Default_Handler
590 .weak DMA1_Channel8_IRQHandler
591 .thumb_set DMA1_Channel8_IRQHandler,Default_Handler
593 .weak DMA2_Channel6_IRQHandler
594 .thumb_set DMA2_Channel6_IRQHandler,Default_Handler
596 .weak DMA2_Channel7_IRQHandler
597 .thumb_set DMA2_Channel7_IRQHandler,Default_Handler
599 .weak DMA2_Channel8_IRQHandler
600 .thumb_set DMA2_Channel8_IRQHandler,Default_Handler
602 .weak CORDIC_IRQHandler
603 .thumb_set CORDIC_IRQHandler,Default_Handler
605 .weak FMAC_IRQHandler
606 .thumb_set FMAC_IRQHandler,Default_Handler
608 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/