src/main/startup/startup_stm32h7a3xx.s

   1 /**
   2   ******************************************************************************
   3   * @file      startup_stm32h7a3xx.s
   4   * @author    MCD Application Team
   5   * @brief     STM32H7B3xx Devices vector table for GCC based toolchain.
   6   *            This module performs:
   7   *                - Set the initial SP
   8   *                - Set the initial PC == Reset_Handler,
   9   *                - Set the vector table entries with the exceptions ISR address
  10   *                - Branches to main in the C library (which eventually
  11   *                  calls main()).
  12   *            After Reset the Cortex-M processor is in Thread mode,
  13   *            priority is Privileged, and the Stack is set to Main.
  14   ******************************************************************************
  15   * @attention
  16   *
  17   * <h2><center>&copy; Copyright (c) 2019 STMicroelectronics.
  18   * All rights reserved.</center></h2>
  19   *
  20   * This software component is licensed by ST under BSD 3-Clause license,
  21   * the "License"; You may not use this file except in compliance with the
  22   * License. You may obtain a copy of the License at:
  23   *                        opensource.org/licenses/BSD-3-Clause
  24   *
  25   ******************************************************************************
  26   */
  27
  28   .syntax unified
  29   .cpu cortex-m7
  30   .fpu softvfp
  31   .thumb
  32
  33 .global  g_pfnVectors
  34 .global  Default_Handler
  35
  36 /* start address for the initialization values of the .data section.
  37 defined in linker script */
  38 .word  _sidata
  39 /* start address for the .data section. defined in linker script */
  40 .word  _sdata
  41 /* end address for the .data section. defined in linker script */
  42 .word  _edata
  43 /* start address for the .bss section. defined in linker script */
  44 .word  _sbss
  45 /* end address for the .bss section. defined in linker script */
  46 .word  _ebss
  47 /* stack used for SystemInit_ExtMemCtl; always internal RAM used */
  48
  49 /**
  50  * @brief  This is the code that gets called when the processor first
  51  *          starts execution following a reset event. Only the absolutely
  52  *          necessary set is performed, after which the application
  53  *          supplied main() routine is called.
  54  * @param  None
  55  * @retval : None
  56 */
  57
  58     .section  .text.Reset_Handler
  59   .weak  Reset_Handler
  60   .type  Reset_Handler, %function
  61 Reset_Handler:
  62   ldr   sp, =_estack      /* set stack pointer */
  63
  64   bl persistentObjectInit
  65
  66 /* Copy the data segment initializers from flash to SRAM */
  67
  68   movs  r1, #0
  69   b  LoopCopyDataInit
  70
  71 CopyDataInit:
  72   ldr  r3, =_sidata
  73   ldr  r3, [r3, r1]
  74   str  r3, [r0, r1]
  75   adds  r1, r1, #4
  76
  77 LoopCopyDataInit:
  78   ldr  r0, =_sdata
  79   ldr  r3, =_edata
  80   adds  r2, r0, r1
  81   cmp  r2, r3
  82   bcc  CopyDataInit
  83
  84 /* Zero fill the bss segment. */
  85
  86   ldr  r2, =_sbss
  87   b  LoopFillZerobss
  88
  89 FillZerobss:
  90   movs  r3, #0
  91   str  r3, [r2], #4
  92
  93 LoopFillZerobss:
  94   ldr  r3, = _ebss
  95   cmp  r2, r3
  96   bcc  FillZerobss
  97
  98 /* Zero fill the sram2 segment. */
  99
 100   ldr  r2, =_ssram2
 101   b  LoopFillZerosram2
 102
 103 FillZerosram2:
 104   movs  r3, #0
 105   str  r3, [r2], #4
 106
 107 LoopFillZerosram2:
 108   ldr  r3, = _esram2
 109   cmp  r2, r3
 110   bcc  FillZerosram2
 111
 112 /* Zero fill the fastram_bss segment. */
 113
 114   ldr  r2, =_sfastram_bss
 115   b  LoopFillZerofastram_bss
 116
 117 FillZerofastram_bss:
 118   movs  r3, #0
 119   str  r3, [r2], #4
 120
 121 LoopFillZerofastram_bss:
 122   ldr  r3, = _efastram_bss
 123   cmp  r2, r3
 124   bcc  FillZerofastram_bss
 125
 126 /* Call the clock system intitialization function.*/
 127
 128   bl  SystemInit
 129
 130 /* Call static constructors */
 131 /*  bl __libc_init_array */
 132
 133 /* Call the application's entry point.*/
 134
 135   bl  main
 136   bx  lr
 137 .size  Reset_Handler, .-Reset_Handler
 138
 139 /**
 140  * @brief  This is the code that gets called when the processor receives an
 141  *         unexpected interrupt.  This simply enters an infinite loop, preserving
 142  *         the system state for examination by a debugger.
 143  * @param  None
 144  * @retval None
 145 */
 146     .section  .text.Default_Handler,"ax",%progbits
 147 Default_Handler:
 148 Infinite_Loop:
 149   b  Infinite_Loop
 150   .size  Default_Handler, .-Default_Handler
 151 /******************************************************************************
 152 *
 153 * The minimal vector table for a Cortex M. Note that the proper constructs
 154 * must be placed on this to ensure that it ends up at physical address
 155 * 0x0000.0000.
 156 *
 157 *******************************************************************************/
 158    .section  .isr_vector,"a",%progbits
 159   .type  g_pfnVectors, %object
 160   .size  g_pfnVectors, .-g_pfnVectors
 161
 162
 163 g_pfnVectors:
 164   .word  _estack
 165   .word  Reset_Handler
 166
 167   .word  NMI_Handler
 168   .word  HardFault_Handler
 169   .word  MemManage_Handler
 170   .word  BusFault_Handler
 171   .word  UsageFault_Handler
 172   .word  0
 173   .word  0
 174   .word  0
 175   .word  0
 176   .word  SVC_Handler
 177   .word  DebugMon_Handler
 178   .word  0
 179   .word  PendSV_Handler
 180   .word  SysTick_Handler
 181
 182   /* External Interrupts */
 183   .word     WWDG_IRQHandler                   /* Window WatchDog              */
 184   .word     PVD_PVM_IRQHandler                /* PVD/PVM through EXTI Line detection */
 185   .word     RTC_TAMP_STAMP_CSS_LSE_IRQHandler /* Tamper and TimeStamps through the EXTI line */
 186   .word     RTC_WKUP_IRQHandler               /* RTC Wakeup through the EXTI line */
 187   .word     FLASH_IRQHandler                  /* FLASH                        */
 188   .word     RCC_IRQHandler                    /* RCC                          */
 189   .word     EXTI0_IRQHandler                  /* EXTI Line0                   */
 190   .word     EXTI1_IRQHandler                  /* EXTI Line1                   */
 191   .word     EXTI2_IRQHandler                  /* EXTI Line2                   */
 192   .word     EXTI3_IRQHandler                  /* EXTI Line3                   */
 193   .word     EXTI4_IRQHandler                  /* EXTI Line4                   */
 194   .word     DMA1_Stream0_IRQHandler           /* DMA1 Stream 0                */
 195   .word     DMA1_Stream1_IRQHandler           /* DMA1 Stream 1                */
 196   .word     DMA1_Stream2_IRQHandler           /* DMA1 Stream 2                */
 197   .word     DMA1_Stream3_IRQHandler           /* DMA1 Stream 3                */
 198   .word     DMA1_Stream4_IRQHandler           /* DMA1 Stream 4                */
 199   .word     DMA1_Stream5_IRQHandler           /* DMA1 Stream 5                */
 200   .word     DMA1_Stream6_IRQHandler           /* DMA1 Stream 6                */
 201   .word     ADC_IRQHandler                    /* ADC1, ADC2 and ADC3s         */
 202   .word     FDCAN1_IT0_IRQHandler             /* FDCAN1 interrupt line 0      */
 203   .word     FDCAN2_IT0_IRQHandler             /* FDCAN2 interrupt line 0      */
 204   .word     FDCAN1_IT1_IRQHandler             /* FDCAN1 interrupt line 1      */
 205   .word     FDCAN2_IT1_IRQHandler             /* FDCAN2 interrupt line 1      */
 206   .word     EXTI9_5_IRQHandler                /* External Line[9:5]s          */
 207   .word     TIM1_BRK_IRQHandler               /* TIM1 Break interrupt         */
 208   .word     TIM1_UP_IRQHandler                /* TIM1 Update interrupt        */
 209   .word     TIM1_TRG_COM_IRQHandler           /* TIM1 Trigger and Commutation interrupt */
 210   .word     TIM1_CC_IRQHandler                /* TIM1 Capture Compare         */
 211   .word     TIM2_IRQHandler                   /* TIM2                         */
 212   .word     TIM3_IRQHandler                   /* TIM3                         */
 213   .word     TIM4_IRQHandler                   /* TIM4                         */
 214   .word     I2C1_EV_IRQHandler                /* I2C1 Event                   */
 215   .word     I2C1_ER_IRQHandler                /* I2C1 Error                   */
 216   .word     I2C2_EV_IRQHandler                /* I2C2 Event                   */
 217   .word     I2C2_ER_IRQHandler                /* I2C2 Error                   */
 218   .word     SPI1_IRQHandler                   /* SPI1                         */
 219   .word     SPI2_IRQHandler                   /* SPI2                         */
 220   .word     USART1_IRQHandler                 /* USART1                       */
 221   .word     USART2_IRQHandler                 /* USART2                       */
 222   .word     USART3_IRQHandler                 /* USART3                       */
 223   .word     EXTI15_10_IRQHandler              /* External Line[15:10]s        */
 224   .word     RTC_Alarm_IRQHandler              /* RTC Alarm (A and B) through EXTI Line */
 225   .word     DFSDM2_IRQHandler                 /* DFSDM2 Interrupt             */
 226   .word     TIM8_BRK_TIM12_IRQHandler         /* TIM8 Break and TIM12         */
 227   .word     TIM8_UP_TIM13_IRQHandler          /* TIM8 Update and TIM13        */
 228   .word     TIM8_TRG_COM_TIM14_IRQHandler     /* TIM8 Trigger and Commutation and TIM14 */
 229   .word     TIM8_CC_IRQHandler                /* TIM8 Capture Compare         */
 230   .word     DMA1_Stream7_IRQHandler           /* DMA1 Stream7                 */
 231   .word     FMC_IRQHandler                    /* FMC                          */
 232   .word     SDMMC1_IRQHandler                 /* SDMMC1                       */
 233   .word     TIM5_IRQHandler                   /* TIM5                         */
 234   .word     SPI3_IRQHandler                   /* SPI3                         */
 235   .word     UART4_IRQHandler                  /* UART4                        */
 236   .word     UART5_IRQHandler                  /* UART5                        */
 237   .word     TIM6_DAC_IRQHandler               /* TIM6 and DAC1&2 underrun errors */
 238   .word     TIM7_IRQHandler                   /* TIM7                         */
 239   .word     DMA2_Stream0_IRQHandler           /* DMA2 Stream 0                */
 240   .word     DMA2_Stream1_IRQHandler           /* DMA2 Stream 1                */
 241   .word     DMA2_Stream2_IRQHandler           /* DMA2 Stream 2                */
 242   .word     DMA2_Stream3_IRQHandler           /* DMA2 Stream 3                */
 243   .word     DMA2_Stream4_IRQHandler           /* DMA2 Stream 4                */
 244   .word     0                                 /* Reserved                     */
 245   .word     0                                 /* Reserved                     */
 246   .word     FDCAN_CAL_IRQHandler              /* FDCAN calibration unit interrupt*/
 247   .word     DFSDM1_FLT4_IRQHandler            /* DFSDM Filter4 Interrupt      */
 248   .word     DFSDM1_FLT5_IRQHandler            /* DFSDM Filter5 Interrupt      */
 249   .word     DFSDM1_FLT6_IRQHandler            /* DFSDM Filter6 Interrupt      */
 250   .word     DFSDM1_FLT7_IRQHandler            /* DFSDM Filter7 Interrupt      */
 251   .word     DMA2_Stream5_IRQHandler           /* DMA2 Stream 5                */
 252   .word     DMA2_Stream6_IRQHandler           /* DMA2 Stream 6                */
 253   .word     DMA2_Stream7_IRQHandler           /* DMA2 Stream 7                */
 254   .word     USART6_IRQHandler                 /* USART6                       */
 255   .word     I2C3_EV_IRQHandler                /* I2C3 event                   */
 256   .word     I2C3_ER_IRQHandler                /* I2C3 error                   */
 257   .word     OTG_HS_EP1_OUT_IRQHandler         /* USB OTG HS End Point 1 Out   */
 258   .word     OTG_HS_EP1_IN_IRQHandler          /* USB OTG HS End Point 1 In    */
 259   .word     OTG_HS_WKUP_IRQHandler            /* USB OTG HS Wakeup through EXTI */
 260   .word     OTG_HS_IRQHandler                 /* USB OTG HS                   */
 261   .word     DCMI_PSSI_IRQHandler              /* DCMI, PSSI                   */
 262   .word     0                                 /* Reserved                     */
 263   .word     RNG_IRQHandler                    /* RNG                          */
 264   .word     FPU_IRQHandler                    /* FPU                          */
 265   .word     UART7_IRQHandler                  /* UART7                        */
 266   .word     UART8_IRQHandler                  /* UART8                        */
 267   .word     SPI4_IRQHandler                   /* SPI4                         */
 268   .word     SPI5_IRQHandler                   /* SPI5                         */
 269   .word     SPI6_IRQHandler                   /* SPI6                         */
 270   .word     SAI1_IRQHandler                   /* SAI1                         */
 271   .word     LTDC_IRQHandler                   /* LTDC                         */
 272   .word     LTDC_ER_IRQHandler                /* LTDC error                   */
 273   .word     DMA2D_IRQHandler                  /* DMA2D                        */
 274   .word     SAI2_IRQHandler                   /* SAI2                         */
 275   .word     OCTOSPI1_IRQHandler               /* OCTOSPI1                     */
 276   .word     LPTIM1_IRQHandler                 /* LPTIM1                       */
 277   .word     CEC_IRQHandler                    /* HDMI_CEC                     */
 278   .word     I2C4_EV_IRQHandler                /* I2C4 Event                   */
 279   .word     I2C4_ER_IRQHandler                /* I2C4 Error                   */
 280   .word     SPDIF_RX_IRQHandler               /* SPDIF_RX                     */
 281   .word     0                                 /* Reserved                     */
 282   .word     0                                 /* Reserved                     */
 283   .word     0                                 /* Reserved                     */
 284   .word     0                                 /* Reserved                     */
 285   .word     DMAMUX1_OVR_IRQHandler            /* DMAMUX1 Overrun interrupt    */
 286   .word     0                                 /* Reserved                     */
 287   .word     0                                 /* Reserved                     */
 288   .word     0                                 /* Reserved                     */
 289   .word     0                                 /* Reserved                     */
 290   .word     0                                 /* Reserved                     */
 291   .word     0                                 /* Reserved                     */
 292   .word     0                                 /* Reserved                     */
 293   .word     DFSDM1_FLT0_IRQHandler            /* DFSDM Filter0 Interrupt      */
 294   .word     DFSDM1_FLT1_IRQHandler            /* DFSDM Filter1 Interrupt      */
 295   .word     DFSDM1_FLT2_IRQHandler            /* DFSDM Filter2 Interrupt      */
 296   .word     DFSDM1_FLT3_IRQHandler            /* DFSDM Filter3 Interrupt      */
 297   .word     0                                 /* Reserved                     */
 298   .word     SWPMI1_IRQHandler                 /* Serial Wire Interface 1 global interrupt */
 299   .word     TIM15_IRQHandler                  /* TIM15 global Interrupt      */
 300   .word     TIM16_IRQHandler                  /* TIM16 global Interrupt      */
 301   .word     TIM17_IRQHandler                  /* TIM17 global Interrupt      */
 302   .word     MDIOS_WKUP_IRQHandler             /* MDIOS Wakeup  Interrupt     */
 303   .word     MDIOS_IRQHandler                  /* MDIOS global Interrupt      */
 304   .word     JPEG_IRQHandler                   /* JPEG global Interrupt       */
 305   .word     MDMA_IRQHandler                   /* MDMA global Interrupt       */
 306   .word     0                                 /* Reserved                    */
 307   .word     SDMMC2_IRQHandler                 /* SDMMC2 global Interrupt     */
 308   .word     HSEM1_IRQHandler                  /* HSEM1 global Interrupt      */
 309   .word     0                                 /* Reserved                    */
 310   .word     DAC2_IRQHandler                   /* DAC2 global Interrupt       */
 311   .word     DMAMUX2_OVR_IRQHandler            /* DMAMUX Overrun interrupt    */
 312   .word     BDMA2_Channel0_IRQHandler         /* BDMA2 Channel 0 global Interrupt */
 313   .word     BDMA2_Channel1_IRQHandler         /* BDMA2 Channel 1 global Interrupt */
 314   .word     BDMA2_Channel2_IRQHandler         /* BDMA2 Channel 2 global Interrupt */
 315   .word     BDMA2_Channel3_IRQHandler         /* BDMA2 Channel 3 global Interrupt */
 316   .word     BDMA2_Channel4_IRQHandler         /* BDMA2 Channel 4 global Interrupt */
 317   .word     BDMA2_Channel5_IRQHandler         /* BDMA2 Channel 5 global Interrupt */
 318   .word     BDMA2_Channel6_IRQHandler         /* BDMA2 Channel 6 global Interrupt */
 319   .word     BDMA2_Channel7_IRQHandler         /* BDMA2 Channel 7 global Interrupt */
 320   .word     COMP_IRQHandler                   /* COMP global Interrupt      */
 321   .word     LPTIM2_IRQHandler                 /* LP TIM2 global interrupt     */
 322   .word     LPTIM3_IRQHandler                 /* LP TIM3 global interrupt     */
 323   .word     UART9_IRQHandler                  /* UART9 global interrupt       */
 324   .word     USART10_IRQHandler                /* USART10 global interrupt     */
 325   .word     LPUART1_IRQHandler                /* LP UART1 interrupt           */
 326   .word     0                                 /* Reserved                     */
 327   .word     CRS_IRQHandler                    /* Clock Recovery Global Interrupt */
 328   .word     ECC_IRQHandler                    /* ECC diagnostic Global Interrupt */
 329   .word     0                                 /* Reserved                     */
 330   .word     DTS_IRQHandler                    /* DTS                          */
 331   .word     0                                 /* Reserved                     */
 332   .word     WAKEUP_PIN_IRQHandler             /* Interrupt for all 6 wake-up pins */
 333   .word     OCTOSPI2_IRQHandler               /* OCTOSPI2                     */
 334   .word     0                                 /* Reserved                     */
 335   .word     0                                 /* Reserved                     */
 336   .word     GFXMMU_IRQHandler                 /* GFXMMU                       */
 337   .word     BDMA1_IRQHandler                  /* BDMA1                        */
 338
 339 /*******************************************************************************
 340 *
 341 * Provide weak aliases for each Exception handler to the Default_Handler.
 342 * As they are weak aliases, any function with the same name will override
 343 * this definition.
 344 *
 345 *******************************************************************************/
 346    .weak      NMI_Handler
 347    .thumb_set NMI_Handler,Default_Handler
 348
 349    .weak      HardFault_Handler
 350    .thumb_set HardFault_Handler,Default_Handler
 351
 352    .weak      MemManage_Handler
 353    .thumb_set MemManage_Handler,Default_Handler
 354
 355    .weak      BusFault_Handler
 356    .thumb_set BusFault_Handler,Default_Handler
 357
 358    .weak      UsageFault_Handler
 359    .thumb_set UsageFault_Handler,Default_Handler
 360
 361    .weak      SVC_Handler
 362    .thumb_set SVC_Handler,Default_Handler
 363
 364    .weak      DebugMon_Handler
 365    .thumb_set DebugMon_Handler,Default_Handler
 366
 367    .weak      PendSV_Handler
 368    .thumb_set PendSV_Handler,Default_Handler
 369
 370    .weak      SysTick_Handler
 371    .thumb_set SysTick_Handler,Default_Handler
 372
 373    .weak      WWDG_IRQHandler
 374    .thumb_set WWDG_IRQHandler,Default_Handler
 375
 376    .weak      PVD_PVM_IRQHandler
 377    .thumb_set PVD_PVM_IRQHandler,Default_Handler
 378
 379    .weak      RTC_TAMP_STAMP_CSS_LSE_IRQHandler
 380    .thumb_set RTC_TAMP_STAMP_CSS_LSE_IRQHandler,Default_Handler
 381
 382    .weak      RTC_WKUP_IRQHandler
 383    .thumb_set RTC_WKUP_IRQHandler,Default_Handler
 384
 385    .weak      FLASH_IRQHandler
 386    .thumb_set FLASH_IRQHandler,Default_Handler
 387
 388    .weak      RCC_IRQHandler
 389    .thumb_set RCC_IRQHandler,Default_Handler
 390
 391    .weak      EXTI0_IRQHandler
 392    .thumb_set EXTI0_IRQHandler,Default_Handler
 393
 394    .weak      EXTI1_IRQHandler
 395    .thumb_set EXTI1_IRQHandler,Default_Handler
 396
 397    .weak      EXTI2_IRQHandler
 398    .thumb_set EXTI2_IRQHandler,Default_Handler
 399
 400    .weak      EXTI3_IRQHandler
 401    .thumb_set EXTI3_IRQHandler,Default_Handler
 402
 403    .weak      EXTI4_IRQHandler
 404    .thumb_set EXTI4_IRQHandler,Default_Handler
 405
 406    .weak      DMA1_Stream0_IRQHandler
 407    .thumb_set DMA1_Stream0_IRQHandler,Default_Handler
 408
 409    .weak      DMA1_Stream1_IRQHandler
 410    .thumb_set DMA1_Stream1_IRQHandler,Default_Handler
 411
 412    .weak      DMA1_Stream2_IRQHandler
 413    .thumb_set DMA1_Stream2_IRQHandler,Default_Handler
 414
 415    .weak      DMA1_Stream3_IRQHandler
 416    .thumb_set DMA1_Stream3_IRQHandler,Default_Handler
 417
 418    .weak      DMA1_Stream4_IRQHandler
 419    .thumb_set DMA1_Stream4_IRQHandler,Default_Handler
 420
 421    .weak      DMA1_Stream5_IRQHandler
 422    .thumb_set DMA1_Stream5_IRQHandler,Default_Handler
 423
 424    .weak      DMA1_Stream6_IRQHandler
 425    .thumb_set DMA1_Stream6_IRQHandler,Default_Handler
 426
 427    .weak      ADC_IRQHandler
 428    .thumb_set ADC_IRQHandler,Default_Handler
 429
 430    .weak      FDCAN1_IT0_IRQHandler
 431    .thumb_set FDCAN1_IT0_IRQHandler,Default_Handler
 432
 433    .weak      FDCAN2_IT0_IRQHandler
 434    .thumb_set FDCAN2_IT0_IRQHandler,Default_Handler
 435
 436    .weak      FDCAN1_IT1_IRQHandler
 437    .thumb_set FDCAN1_IT1_IRQHandler,Default_Handler
 438
 439    .weak      FDCAN2_IT1_IRQHandler
 440    .thumb_set FDCAN2_IT1_IRQHandler,Default_Handler
 441
 442    .weak      EXTI9_5_IRQHandler
 443    .thumb_set EXTI9_5_IRQHandler,Default_Handler
 444
 445    .weak      TIM1_BRK_IRQHandler
 446    .thumb_set TIM1_BRK_IRQHandler,Default_Handler
 447
 448    .weak      TIM1_UP_IRQHandler
 449    .thumb_set TIM1_UP_IRQHandler,Default_Handler
 450
 451    .weak      TIM1_TRG_COM_IRQHandler
 452    .thumb_set TIM1_TRG_COM_IRQHandler,Default_Handler
 453
 454    .weak      TIM1_CC_IRQHandler
 455    .thumb_set TIM1_CC_IRQHandler,Default_Handler
 456
 457    .weak      TIM2_IRQHandler
 458    .thumb_set TIM2_IRQHandler,Default_Handler
 459
 460    .weak      TIM3_IRQHandler
 461    .thumb_set TIM3_IRQHandler,Default_Handler
 462
 463    .weak      TIM4_IRQHandler
 464    .thumb_set TIM4_IRQHandler,Default_Handler
 465
 466    .weak      I2C1_EV_IRQHandler
 467    .thumb_set I2C1_EV_IRQHandler,Default_Handler
 468
 469    .weak      I2C1_ER_IRQHandler
 470    .thumb_set I2C1_ER_IRQHandler,Default_Handler
 471
 472    .weak      I2C2_EV_IRQHandler
 473    .thumb_set I2C2_EV_IRQHandler,Default_Handler
 474
 475    .weak      I2C2_ER_IRQHandler
 476    .thumb_set I2C2_ER_IRQHandler,Default_Handler
 477
 478    .weak      SPI1_IRQHandler
 479    .thumb_set SPI1_IRQHandler,Default_Handler
 480
 481    .weak      SPI2_IRQHandler
 482    .thumb_set SPI2_IRQHandler,Default_Handler
 483
 484    .weak      USART1_IRQHandler
 485    .thumb_set USART1_IRQHandler,Default_Handler
 486
 487    .weak      USART2_IRQHandler
 488    .thumb_set USART2_IRQHandler,Default_Handler
 489
 490    .weak      USART3_IRQHandler
 491    .thumb_set USART3_IRQHandler,Default_Handler
 492
 493    .weak      EXTI15_10_IRQHandler
 494    .thumb_set EXTI15_10_IRQHandler,Default_Handler
 495
 496    .weak      RTC_Alarm_IRQHandler
 497    .thumb_set RTC_Alarm_IRQHandler,Default_Handler
 498
 499    .weak      DFSDM2_IRQHandler
 500    .thumb_set DFSDM2_IRQHandler,Default_Handler
 501
 502    .weak      TIM8_BRK_TIM12_IRQHandler
 503    .thumb_set TIM8_BRK_TIM12_IRQHandler,Default_Handler
 504
 505    .weak      TIM8_UP_TIM13_IRQHandler
 506    .thumb_set TIM8_UP_TIM13_IRQHandler,Default_Handler
 507
 508    .weak      TIM8_TRG_COM_TIM14_IRQHandler
 509    .thumb_set TIM8_TRG_COM_TIM14_IRQHandler,Default_Handler
 510
 511    .weak      TIM8_CC_IRQHandler
 512    .thumb_set TIM8_CC_IRQHandler,Default_Handler
 513
 514    .weak      DMA1_Stream7_IRQHandler
 515    .thumb_set DMA1_Stream7_IRQHandler,Default_Handler
 516
 517    .weak      FMC_IRQHandler
 518    .thumb_set FMC_IRQHandler,Default_Handler
 519
 520    .weak      SDMMC1_IRQHandler
 521    .thumb_set SDMMC1_IRQHandler,Default_Handler
 522
 523    .weak      TIM5_IRQHandler
 524    .thumb_set TIM5_IRQHandler,Default_Handler
 525
 526    .weak      SPI3_IRQHandler
 527    .thumb_set SPI3_IRQHandler,Default_Handler
 528
 529    .weak      UART4_IRQHandler
 530    .thumb_set UART4_IRQHandler,Default_Handler
 531
 532    .weak      UART5_IRQHandler
 533    .thumb_set UART5_IRQHandler,Default_Handler
 534
 535    .weak      TIM6_DAC_IRQHandler
 536    .thumb_set TIM6_DAC_IRQHandler,Default_Handler
 537
 538    .weak      TIM7_IRQHandler
 539    .thumb_set TIM7_IRQHandler,Default_Handler
 540
 541    .weak      DMA2_Stream0_IRQHandler
 542    .thumb_set DMA2_Stream0_IRQHandler,Default_Handler
 543
 544    .weak      DMA2_Stream1_IRQHandler
 545    .thumb_set DMA2_Stream1_IRQHandler,Default_Handler
 546
 547    .weak      DMA2_Stream2_IRQHandler
 548    .thumb_set DMA2_Stream2_IRQHandler,Default_Handler
 549
 550    .weak      DMA2_Stream3_IRQHandler
 551    .thumb_set DMA2_Stream3_IRQHandler,Default_Handler
 552
 553    .weak      DMA2_Stream4_IRQHandler
 554    .thumb_set DMA2_Stream4_IRQHandler,Default_Handler
 555
 556    .weak      FDCAN_CAL_IRQHandler
 557    .thumb_set FDCAN_CAL_IRQHandler,Default_Handler
 558
 559    .weak      DFSDM1_FLT4_IRQHandler
 560    .thumb_set DFSDM1_FLT4_IRQHandler,Default_Handler
 561
 562    .weak      DFSDM1_FLT5_IRQHandler
 563    .thumb_set DFSDM1_FLT5_IRQHandler,Default_Handler
 564
 565    .weak      DFSDM1_FLT6_IRQHandler
 566    .thumb_set DFSDM1_FLT6_IRQHandler,Default_Handler
 567
 568    .weak      DFSDM1_FLT7_IRQHandler
 569    .thumb_set DFSDM1_FLT7_IRQHandler,Default_Handler
 570
 571    .weak      DMA2_Stream5_IRQHandler
 572    .thumb_set DMA2_Stream5_IRQHandler,Default_Handler
 573
 574    .weak      DMA2_Stream6_IRQHandler
 575    .thumb_set DMA2_Stream6_IRQHandler,Default_Handler
 576
 577    .weak      DMA2_Stream7_IRQHandler
 578    .thumb_set DMA2_Stream7_IRQHandler,Default_Handler
 579
 580    .weak      USART6_IRQHandler
 581    .thumb_set USART6_IRQHandler,Default_Handler
 582
 583    .weak      I2C3_EV_IRQHandler
 584    .thumb_set I2C3_EV_IRQHandler,Default_Handler
 585
 586    .weak      I2C3_ER_IRQHandler
 587    .thumb_set I2C3_ER_IRQHandler,Default_Handler
 588
 589    .weak      OTG_HS_EP1_OUT_IRQHandler
 590    .thumb_set OTG_HS_EP1_OUT_IRQHandler,Default_Handler
 591
 592    .weak      OTG_HS_EP1_IN_IRQHandler
 593    .thumb_set OTG_HS_EP1_IN_IRQHandler,Default_Handler
 594
 595    .weak      OTG_HS_WKUP_IRQHandler
 596    .thumb_set OTG_HS_WKUP_IRQHandler,Default_Handler
 597
 598    .weak      OTG_HS_IRQHandler
 599    .thumb_set OTG_HS_IRQHandler,Default_Handler
 600
 601    .weak      DCMI_PSSI_IRQHandler
 602    .thumb_set DCMI_PSSI_IRQHandler,Default_Handler
 603
 604    .weak      RNG_IRQHandler
 605    .thumb_set RNG_IRQHandler,Default_Handler
 606
 607    .weak      FPU_IRQHandler
 608    .thumb_set FPU_IRQHandler,Default_Handler
 609
 610    .weak      UART7_IRQHandler
 611    .thumb_set UART7_IRQHandler,Default_Handler
 612
 613    .weak      UART8_IRQHandler
 614    .thumb_set UART8_IRQHandler,Default_Handler
 615
 616    .weak      SPI4_IRQHandler
 617    .thumb_set SPI4_IRQHandler,Default_Handler
 618
 619    .weak      SPI5_IRQHandler
 620    .thumb_set SPI5_IRQHandler,Default_Handler
 621
 622    .weak      SPI6_IRQHandler
 623    .thumb_set SPI6_IRQHandler,Default_Handler
 624
 625    .weak      SAI1_IRQHandler
 626    .thumb_set SAI1_IRQHandler,Default_Handler
 627
 628    .weak      LTDC_IRQHandler
 629    .thumb_set LTDC_IRQHandler,Default_Handler
 630
 631    .weak      LTDC_ER_IRQHandler
 632    .thumb_set LTDC_ER_IRQHandler,Default_Handler
 633
 634    .weak      DMA2D_IRQHandler
 635    .thumb_set DMA2D_IRQHandler,Default_Handler
 636
 637    .weak      SAI2_IRQHandler
 638    .thumb_set SAI2_IRQHandler,Default_Handler
 639
 640    .weak      OCTOSPI1_IRQHandler
 641    .thumb_set OCTOSPI1_IRQHandler,Default_Handler
 642
 643    .weak      LPTIM1_IRQHandler
 644    .thumb_set LPTIM1_IRQHandler,Default_Handler
 645
 646    .weak      CEC_IRQHandler
 647    .thumb_set CEC_IRQHandler,Default_Handler
 648
 649    .weak      I2C4_EV_IRQHandler
 650    .thumb_set I2C4_EV_IRQHandler,Default_Handler
 651
 652    .weak      I2C4_ER_IRQHandler
 653    .thumb_set I2C4_ER_IRQHandler,Default_Handler
 654
 655    .weak      SPDIF_RX_IRQHandler
 656    .thumb_set SPDIF_RX_IRQHandler,Default_Handler
 657
 658    .weak      DMAMUX1_OVR_IRQHandler
 659    .thumb_set DMAMUX1_OVR_IRQHandler,Default_Handler
 660
 661    .weak      DFSDM1_FLT0_IRQHandler
 662    .thumb_set DFSDM1_FLT0_IRQHandler,Default_Handler
 663
 664    .weak      DFSDM1_FLT1_IRQHandler
 665    .thumb_set DFSDM1_FLT1_IRQHandler,Default_Handler
 666
 667    .weak      DFSDM1_FLT2_IRQHandler
 668    .thumb_set DFSDM1_FLT2_IRQHandler,Default_Handler
 669
 670    .weak      DFSDM1_FLT3_IRQHandler
 671    .thumb_set DFSDM1_FLT3_IRQHandler,Default_Handler
 672
 673    .weak      SWPMI1_IRQHandler
 674    .thumb_set SWPMI1_IRQHandler,Default_Handler
 675
 676    .weak      TIM15_IRQHandler
 677    .thumb_set TIM15_IRQHandler,Default_Handler
 678
 679    .weak      TIM16_IRQHandler
 680    .thumb_set TIM16_IRQHandler,Default_Handler
 681
 682    .weak      TIM17_IRQHandler
 683    .thumb_set TIM17_IRQHandler,Default_Handler
 684
 685    .weak      MDIOS_WKUP_IRQHandler
 686    .thumb_set MDIOS_WKUP_IRQHandler,Default_Handler
 687
 688    .weak      MDIOS_IRQHandler
 689    .thumb_set MDIOS_IRQHandler,Default_Handler
 690
 691    .weak      JPEG_IRQHandler
 692    .thumb_set JPEG_IRQHandler,Default_Handler
 693
 694    .weak      MDMA_IRQHandler
 695    .thumb_set MDMA_IRQHandler,Default_Handler
 696
 697    .weak      SDMMC2_IRQHandler
 698    .thumb_set SDMMC2_IRQHandler,Default_Handler
 699
 700    .weak      HSEM1_IRQHandler
 701    .thumb_set HSEM1_IRQHandler,Default_Handler
 702
 703    .weak      DAC2_IRQHandler
 704    .thumb_set DAC2_IRQHandler,Default_Handler
 705
 706    .weak      DMAMUX2_OVR_IRQHandler
 707    .thumb_set DMAMUX2_OVR_IRQHandler,Default_Handler
 708
 709    .weak      BDMA2_Channel0_IRQHandler
 710    .thumb_set BDMA2_Channel0_IRQHandler,Default_Handler
 711
 712    .weak      BDMA2_Channel1_IRQHandler
 713    .thumb_set BDMA2_Channel1_IRQHandler,Default_Handler
 714
 715    .weak      BDMA2_Channel2_IRQHandler
 716    .thumb_set BDMA2_Channel2_IRQHandler,Default_Handler
 717
 718    .weak      BDMA2_Channel3_IRQHandler
 719    .thumb_set BDMA2_Channel3_IRQHandler,Default_Handler
 720
 721    .weak      BDMA2_Channel4_IRQHandler
 722    .thumb_set BDMA2_Channel4_IRQHandler,Default_Handler
 723
 724    .weak      BDMA2_Channel5_IRQHandler
 725    .thumb_set BDMA2_Channel5_IRQHandler,Default_Handler
 726
 727    .weak      BDMA2_Channel6_IRQHandler
 728    .thumb_set BDMA2_Channel6_IRQHandler,Default_Handler
 729
 730    .weak      BDMA2_Channel7_IRQHandler
 731    .thumb_set BDMA2_Channel7_IRQHandler,Default_Handler
 732
 733    .weak      COMP_IRQHandler
 734    .thumb_set COMP_IRQHandler,Default_Handler
 735
 736    .weak      LPTIM2_IRQHandler
 737    .thumb_set LPTIM2_IRQHandler,Default_Handler
 738
 739    .weak      LPTIM3_IRQHandler
 740    .thumb_set LPTIM3_IRQHandler,Default_Handler
 741
 742    .weak      LPTIM4_IRQHandler
 743    .thumb_set LPTIM4_IRQHandler,Default_Handler
 744
 745    .weak      LPTIM5_IRQHandler
 746    .thumb_set LPTIM5_IRQHandler,Default_Handler
 747
 748    .weak      UART9_IRQHandler
 749    .thumb_set UART9_IRQHandler,Default_Handler
 750
 751    .weak      USART10_IRQHandler
 752    .thumb_set USART10_IRQHandler,Default_Handler
 753
 754    .weak      LPUART1_IRQHandler
 755    .thumb_set LPUART1_IRQHandler,Default_Handler
 756
 757    .weak      CRS_IRQHandler
 758    .thumb_set CRS_IRQHandler,Default_Handler
 759
 760    .weak      ECC_IRQHandler
 761    .thumb_set ECC_IRQHandler,Default_Handler
 762
 763    .weak      DTS_IRQHandler
 764    .thumb_set DTS_IRQHandler,Default_Handler
 765
 766    .weak      WAKEUP_PIN_IRQHandler
 767    .thumb_set WAKEUP_PIN_IRQHandler,Default_Handler
 768
 769    .weak      OCTOSPI2_IRQHandler
 770    .thumb_set OCTOSPI2_IRQHandler,Default_Handler
 771
 772    .weak      GFXMMU_IRQHandler
 773    .thumb_set GFXMMU_IRQHandler,Default_Handler
 774
 775    .weak      BDMA1_IRQHandler
 776    .thumb_set BDMA1_IRQHandler,Default_Handler
 777
 778 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 779