update serTcpOpen declaration to fix compile errors (#14113)
[betaflight.git] / src / main / pg / sdio.c
blob9d21ab6a7858af2d904625921ccfb4fa68fcb1f7
1 /*
2 * This file is part of Cleanflight and Betaflight.
4 * Cleanflight and Betaflight are free software. You can redistribute
5 * this software and/or modify this software under the terms of the
6 * GNU General Public License as published by the Free Software
7 * Foundation, either version 3 of the License, or (at your option)
8 * any later version.
10 * Cleanflight and Betaflight are distributed in the hope that they
11 * will be useful, but WITHOUT ANY WARRANTY; without even the implied
12 * warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.
13 * See the GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this software.
18 * If not, see <http://www.gnu.org/licenses/>.
21 #include "platform.h"
23 #if defined(USE_SDCARD_SDIO)
25 #include "drivers/io.h"
26 #include "drivers/sdio.h"
27 #include "pg/pg_ids.h"
28 #include "pg/sdio.h"
30 #ifndef SDCARD_SDIO_DMA_OPT
31 #define SDCARD_SDIO_DMA_OPT (DMA_OPT_UNUSED)
32 #endif
34 #ifndef SDIO_DEVICE
35 #define SDIO_DEVICE SDIOINVALID
36 #endif
38 #ifndef SDIO_USE_4BIT
39 #define SDIO_USE_4BIT false
40 #endif
41 #ifndef SDIO_CK_PIN
42 #define SDIO_CK_PIN NONE
43 #endif
44 #ifndef SDIO_CMD_PIN
45 #define SDIO_CMD_PIN NONE
46 #endif
47 #ifndef SDIO_D0_PIN
48 #define SDIO_D0_PIN NONE
49 #endif
50 #ifndef SDIO_D1_PIN
51 #define SDIO_D1_PIN NONE
52 #endif
53 #ifndef SDIO_D2_PIN
54 #define SDIO_D2_PIN NONE
55 #endif
56 #ifndef SDIO_D3_PIN
57 #define SDIO_D3_PIN NONE
58 #endif
60 PG_REGISTER_WITH_RESET_TEMPLATE(sdioConfig_t, sdioConfig, PG_SDIO_CONFIG, 0);
62 PG_RESET_TEMPLATE(sdioConfig_t, sdioConfig,
63 .clockBypass = 0,
64 .useCache = 0,
65 .use4BitWidth = SDIO_USE_4BIT,
66 .dmaopt = SDCARD_SDIO_DMA_OPT,
67 .device = SDIO_DEV_TO_CFG(SDIO_DEVICE),
70 #ifdef STM32H7
71 PG_REGISTER_WITH_RESET_TEMPLATE(sdioPinConfig_t, sdioPinConfig, PG_SDIO_PIN_CONFIG, 0);
73 PG_RESET_TEMPLATE(sdioPinConfig_t, sdioPinConfig,
74 .CKPin = IO_TAG(SDIO_CK_PIN),
75 .CMDPin = IO_TAG(SDIO_CMD_PIN),
76 .D0Pin = IO_TAG(SDIO_D0_PIN),
77 .D1Pin = IO_TAG(SDIO_D1_PIN),
78 .D2Pin = IO_TAG(SDIO_D2_PIN),
79 .D3Pin = IO_TAG(SDIO_D3_PIN),
81 #endif
83 #endif