lib/main/STM32F4/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_hal_pwr.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_hal_pwr.h
   4   * @author  MCD Application Team
   5   * @version V1.7.1
   6   * @date    14-April-2017
   7   * @brief   Header file of PWR HAL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F4xx_HAL_PWR_H
  40 #define __STM32F4xx_HAL_PWR_H
  41
  42 #ifdef __cplusplus
  43  extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f4xx_hal_def.h"
  48
  49 /** @addtogroup STM32F4xx_HAL_Driver
  50   * @{
  51   */
  52
  53 /** @addtogroup PWR
  54   * @{
  55   */
  56
  57 /* Exported types ------------------------------------------------------------*/
  58
  59 /** @defgroup PWR_Exported_Types PWR Exported Types
  60   * @{
  61   */
  62
  63 /**
  64   * @brief  PWR PVD configuration structure definition
  65   */
  66 typedef struct
  67 {
  68   uint32_t PVDLevel;   /*!< PVDLevel: Specifies the PVD detection level.
  69                             This parameter can be a value of @ref PWR_PVD_detection_level */
  70
  71   uint32_t Mode;      /*!< Mode: Specifies the operating mode for the selected pins.
  72                            This parameter can be a value of @ref PWR_PVD_Mode */
  73 }PWR_PVDTypeDef;
  74
  75 /**
  76   * @}
  77   */
  78
  79 /* Exported constants --------------------------------------------------------*/
  80 /** @defgroup PWR_Exported_Constants PWR Exported Constants
  81   * @{
  82   */
  83
  84 /** @defgroup PWR_WakeUp_Pins PWR WakeUp Pins
  85   * @{
  86   */
  87 #define PWR_WAKEUP_PIN1                 0x00000100U
  88 /**
  89   * @}
  90   */
  91
  92 /** @defgroup PWR_PVD_detection_level PWR PVD detection level
  93   * @{
  94   */
  95 #define PWR_PVDLEVEL_0                  PWR_CR_PLS_LEV0
  96 #define PWR_PVDLEVEL_1                  PWR_CR_PLS_LEV1
  97 #define PWR_PVDLEVEL_2                  PWR_CR_PLS_LEV2
  98 #define PWR_PVDLEVEL_3                  PWR_CR_PLS_LEV3
  99 #define PWR_PVDLEVEL_4                  PWR_CR_PLS_LEV4
 100 #define PWR_PVDLEVEL_5                  PWR_CR_PLS_LEV5
 101 #define PWR_PVDLEVEL_6                  PWR_CR_PLS_LEV6
 102 #define PWR_PVDLEVEL_7                  PWR_CR_PLS_LEV7/* External input analog voltage
 103                                                           (Compare internally to VREFINT) */
 104 /**
 105   * @}
 106   */
 107
 108 /** @defgroup PWR_PVD_Mode PWR PVD Mode
 109   * @{
 110   */
 111 #define PWR_PVD_MODE_NORMAL                 0x00000000U   /*!< basic mode is used */
 112 #define PWR_PVD_MODE_IT_RISING              0x00010001U   /*!< External Interrupt Mode with Rising edge trigger detection */
 113 #define PWR_PVD_MODE_IT_FALLING             0x00010002U   /*!< External Interrupt Mode with Falling edge trigger detection */
 114 #define PWR_PVD_MODE_IT_RISING_FALLING      0x00010003U   /*!< External Interrupt Mode with Rising/Falling edge trigger detection */
 115 #define PWR_PVD_MODE_EVENT_RISING           0x00020001U   /*!< Event Mode with Rising edge trigger detection */
 116 #define PWR_PVD_MODE_EVENT_FALLING          0x00020002U   /*!< Event Mode with Falling edge trigger detection */
 117 #define PWR_PVD_MODE_EVENT_RISING_FALLING   0x00020003U   /*!< Event Mode with Rising/Falling edge trigger detection */
 118 /**
 119   * @}
 120   */
 121
 122
 123 /** @defgroup PWR_Regulator_state_in_STOP_mode PWR Regulator state in SLEEP/STOP mode
 124   * @{
 125   */
 126 #define PWR_MAINREGULATOR_ON                        0x00000000U
 127 #define PWR_LOWPOWERREGULATOR_ON                    PWR_CR_LPDS
 128 /**
 129   * @}
 130   */
 131
 132 /** @defgroup PWR_SLEEP_mode_entry PWR SLEEP mode entry
 133   * @{
 134   */
 135 #define PWR_SLEEPENTRY_WFI              ((uint8_t)0x01)
 136 #define PWR_SLEEPENTRY_WFE              ((uint8_t)0x02)
 137 /**
 138   * @}
 139   */
 140
 141 /** @defgroup PWR_STOP_mode_entry PWR STOP mode entry
 142   * @{
 143   */
 144 #define PWR_STOPENTRY_WFI               ((uint8_t)0x01)
 145 #define PWR_STOPENTRY_WFE               ((uint8_t)0x02)
 146 /**
 147   * @}
 148   */
 149
 150 /** @defgroup PWR_Flag PWR Flag
 151   * @{
 152   */
 153 #define PWR_FLAG_WU                     PWR_CSR_WUF
 154 #define PWR_FLAG_SB                     PWR_CSR_SBF
 155 #define PWR_FLAG_PVDO                   PWR_CSR_PVDO
 156 #define PWR_FLAG_BRR                    PWR_CSR_BRR
 157 #define PWR_FLAG_VOSRDY                 PWR_CSR_VOSRDY
 158 /**
 159   * @}
 160   */
 161
 162 /**
 163   * @}
 164   */
 165
 166 /* Exported macro ------------------------------------------------------------*/
 167 /** @defgroup PWR_Exported_Macro PWR Exported Macro
 168   * @{
 169   */
 170
 171 /** @brief  Check PWR flag is set or not.
 172   * @param  __FLAG__: specifies the flag to check.
 173   *           This parameter can be one of the following values:
 174   *            @arg PWR_FLAG_WU: Wake Up flag. This flag indicates that a wakeup event
 175   *                  was received from the WKUP pin or from the RTC alarm (Alarm A
 176   *                  or Alarm B), RTC Tamper event, RTC TimeStamp event or RTC Wakeup.
 177   *                  An additional wakeup event is detected if the WKUP pin is enabled
 178   *                  (by setting the EWUP bit) when the WKUP pin level is already high.
 179   *            @arg PWR_FLAG_SB: StandBy flag. This flag indicates that the system was
 180   *                  resumed from StandBy mode.
 181   *            @arg PWR_FLAG_PVDO: PVD Output. This flag is valid only if PVD is enabled
 182   *                  by the HAL_PWR_EnablePVD() function. The PVD is stopped by Standby mode
 183   *                  For this reason, this bit is equal to 0 after Standby or reset
 184   *                  until the PVDE bit is set.
 185   *            @arg PWR_FLAG_BRR: Backup regulator ready flag. This bit is not reset
 186   *                  when the device wakes up from Standby mode or by a system reset
 187   *                  or power reset.
 188   *            @arg PWR_FLAG_VOSRDY: This flag indicates that the Regulator voltage
 189   *                 scaling output selection is ready.
 190   * @retval The new state of __FLAG__ (TRUE or FALSE).
 191   */
 192 #define __HAL_PWR_GET_FLAG(__FLAG__) ((PWR->CSR & (__FLAG__)) == (__FLAG__))
 193
 194 /** @brief  Clear the PWR's pending flags.
 195   * @param  __FLAG__: specifies the flag to clear.
 196   *          This parameter can be one of the following values:
 197   *            @arg PWR_FLAG_WU: Wake Up flag
 198   *            @arg PWR_FLAG_SB: StandBy flag
 199   */
 200 #define __HAL_PWR_CLEAR_FLAG(__FLAG__) (PWR->CR |=  (__FLAG__) << 2U)
 201
 202 /**
 203   * @brief Enable the PVD Exti Line 16.
 204   * @retval None.
 205   */
 206 #define __HAL_PWR_PVD_EXTI_ENABLE_IT()   (EXTI->IMR |= (PWR_EXTI_LINE_PVD))
 207
 208 /**
 209   * @brief Disable the PVD EXTI Line 16.
 210   * @retval None.
 211   */
 212 #define __HAL_PWR_PVD_EXTI_DISABLE_IT()  (EXTI->IMR &= ~(PWR_EXTI_LINE_PVD))
 213
 214 /**
 215   * @brief Enable event on PVD Exti Line 16.
 216   * @retval None.
 217   */
 218 #define __HAL_PWR_PVD_EXTI_ENABLE_EVENT()   (EXTI->EMR |= (PWR_EXTI_LINE_PVD))
 219
 220 /**
 221   * @brief Disable event on PVD Exti Line 16.
 222   * @retval None.
 223   */
 224 #define __HAL_PWR_PVD_EXTI_DISABLE_EVENT()  (EXTI->EMR &= ~(PWR_EXTI_LINE_PVD))
 225
 226 /**
 227   * @brief Enable the PVD Extended Interrupt Rising Trigger.
 228   * @retval None.
 229   */
 230 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE()   SET_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
 231
 232 /**
 233   * @brief Disable the PVD Extended Interrupt Rising Trigger.
 234   * @retval None.
 235   */
 236 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE()  CLEAR_BIT(EXTI->RTSR, PWR_EXTI_LINE_PVD)
 237
 238 /**
 239   * @brief Enable the PVD Extended Interrupt Falling Trigger.
 240   * @retval None.
 241   */
 242 #define __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE()   SET_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
 243
 244
 245 /**
 246   * @brief Disable the PVD Extended Interrupt Falling Trigger.
 247   * @retval None.
 248   */
 249 #define __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE()  CLEAR_BIT(EXTI->FTSR, PWR_EXTI_LINE_PVD)
 250
 251
 252 /**
 253   * @brief  PVD EXTI line configuration: set rising & falling edge trigger.
 254   * @retval None.
 255   */
 256 #define __HAL_PWR_PVD_EXTI_ENABLE_RISING_FALLING_EDGE()   do{__HAL_PWR_PVD_EXTI_ENABLE_RISING_EDGE();\
 257                                                              __HAL_PWR_PVD_EXTI_ENABLE_FALLING_EDGE();\
 258                                                             }while(0U)
 259
 260 /**
 261   * @brief Disable the PVD Extended Interrupt Rising & Falling Trigger.
 262   * This parameter can be:
 263   * @retval None.
 264   */
 265 #define __HAL_PWR_PVD_EXTI_DISABLE_RISING_FALLING_EDGE()  do{__HAL_PWR_PVD_EXTI_DISABLE_RISING_EDGE();\
 266                                                              __HAL_PWR_PVD_EXTI_DISABLE_FALLING_EDGE();\
 267                                                             }while(0U)
 268
 269 /**
 270   * @brief checks whether the specified PVD Exti interrupt flag is set or not.
 271   * @retval EXTI PVD Line Status.
 272   */
 273 #define __HAL_PWR_PVD_EXTI_GET_FLAG()  (EXTI->PR & (PWR_EXTI_LINE_PVD))
 274
 275 /**
 276   * @brief Clear the PVD Exti flag.
 277   * @retval None.
 278   */
 279 #define __HAL_PWR_PVD_EXTI_CLEAR_FLAG()  (EXTI->PR = (PWR_EXTI_LINE_PVD))
 280
 281 /**
 282   * @brief  Generates a Software interrupt on PVD EXTI line.
 283   * @retval None
 284   */
 285 #define __HAL_PWR_PVD_EXTI_GENERATE_SWIT() (EXTI->SWIER |= (PWR_EXTI_LINE_PVD))
 286
 287 /**
 288   * @}
 289   */
 290
 291 /* Include PWR HAL Extension module */
 292 #include "stm32f4xx_hal_pwr_ex.h"
 293
 294 /* Exported functions --------------------------------------------------------*/
 295 /** @addtogroup PWR_Exported_Functions PWR Exported Functions
 296   * @{
 297   */
 298
 299 /** @addtogroup PWR_Exported_Functions_Group1 Initialization and de-initialization functions
 300   * @{
 301   */
 302 /* Initialization and de-initialization functions *****************************/
 303 void HAL_PWR_DeInit(void);
 304 void HAL_PWR_EnableBkUpAccess(void);
 305 void HAL_PWR_DisableBkUpAccess(void);
 306 /**
 307   * @}
 308   */
 309
 310 /** @addtogroup PWR_Exported_Functions_Group2 Peripheral Control functions
 311   * @{
 312   */
 313 /* Peripheral Control functions  **********************************************/
 314 /* PVD configuration */
 315 void HAL_PWR_ConfigPVD(PWR_PVDTypeDef *sConfigPVD);
 316 void HAL_PWR_EnablePVD(void);
 317 void HAL_PWR_DisablePVD(void);
 318
 319 /* WakeUp pins configuration */
 320 void HAL_PWR_EnableWakeUpPin(uint32_t WakeUpPinx);
 321 void HAL_PWR_DisableWakeUpPin(uint32_t WakeUpPinx);
 322
 323 /* Low Power modes entry */
 324 void HAL_PWR_EnterSTOPMode(uint32_t Regulator, uint8_t STOPEntry);
 325 void HAL_PWR_EnterSLEEPMode(uint32_t Regulator, uint8_t SLEEPEntry);
 326 void HAL_PWR_EnterSTANDBYMode(void);
 327
 328 /* Power PVD IRQ Handler */
 329 void HAL_PWR_PVD_IRQHandler(void);
 330 void HAL_PWR_PVDCallback(void);
 331
 332 /* Cortex System Control functions  *******************************************/
 333 void HAL_PWR_EnableSleepOnExit(void);
 334 void HAL_PWR_DisableSleepOnExit(void);
 335 void HAL_PWR_EnableSEVOnPend(void);
 336 void HAL_PWR_DisableSEVOnPend(void);
 337 /**
 338   * @}
 339   */
 340
 341 /**
 342   * @}
 343   */
 344
 345 /* Private types -------------------------------------------------------------*/
 346 /* Private variables ---------------------------------------------------------*/
 347 /* Private constants ---------------------------------------------------------*/
 348 /** @defgroup PWR_Private_Constants PWR Private Constants
 349   * @{
 350   */
 351
 352 /** @defgroup PWR_PVD_EXTI_Line PWR PVD EXTI Line
 353   * @{
 354   */
 355 #define PWR_EXTI_LINE_PVD  ((uint32_t)EXTI_IMR_MR16)  /*!< External interrupt line 16 Connected to the PVD EXTI Line */
 356 /**
 357   * @}
 358   */
 359
 360 /** @defgroup PWR_register_alias_address PWR Register alias address
 361   * @{
 362   */
 363 /* ------------- PWR registers bit address in the alias region ---------------*/
 364 #define PWR_OFFSET               (PWR_BASE - PERIPH_BASE)
 365 #define PWR_CR_OFFSET            0x00U
 366 #define PWR_CSR_OFFSET           0x04U
 367 #define PWR_CR_OFFSET_BB         (PWR_OFFSET + PWR_CR_OFFSET)
 368 #define PWR_CSR_OFFSET_BB        (PWR_OFFSET + PWR_CSR_OFFSET)
 369 /**
 370   * @}
 371   */
 372
 373 /** @defgroup PWR_CR_register_alias PWR CR Register alias address
 374   * @{
 375   */
 376 /* --- CR Register ---*/
 377 /* Alias word address of DBP bit */
 378 #define DBP_BIT_NUMBER   POSITION_VAL(PWR_CR_DBP)
 379 #define CR_DBP_BB        (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (DBP_BIT_NUMBER * 4U))
 380
 381 /* Alias word address of PVDE bit */
 382 #define PVDE_BIT_NUMBER  POSITION_VAL(PWR_CR_PVDE)
 383 #define CR_PVDE_BB       (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PVDE_BIT_NUMBER * 4U))
 384
 385 /* Alias word address of PMODE bit */
 386 #define PMODE_BIT_NUMBER  POSITION_VAL(PWR_CR_PMODE)
 387 #define CR_PMODE_BB      (uint32_t)(PERIPH_BB_BASE + (PWR_CR_OFFSET_BB * 32U) + (PMODE_BIT_NUMBER * 4U))
 388 /**
 389   * @}
 390   */
 391
 392 /** @defgroup PWR_CSR_register_alias PWR CSR Register alias address
 393   * @{
 394   */
 395 /* --- CSR Register ---*/
 396 /* Alias word address of EWUP bit */
 397 #define EWUP_BIT_NUMBER  POSITION_VAL(PWR_CSR_EWUP)
 398 #define CSR_EWUP_BB      (PERIPH_BB_BASE + (PWR_CSR_OFFSET_BB * 32U) + (EWUP_BIT_NUMBER * 4U))
 399 /**
 400   * @}
 401   */
 402
 403 /**
 404   * @}
 405   */
 406 /* Private macros ------------------------------------------------------------*/
 407 /** @defgroup PWR_Private_Macros PWR Private Macros
 408   * @{
 409   */
 410
 411 /** @defgroup PWR_IS_PWR_Definitions PWR Private macros to check input parameters
 412   * @{
 413   */
 414 #define IS_PWR_PVD_LEVEL(LEVEL) (((LEVEL) == PWR_PVDLEVEL_0) || ((LEVEL) == PWR_PVDLEVEL_1)|| \
 415                                  ((LEVEL) == PWR_PVDLEVEL_2) || ((LEVEL) == PWR_PVDLEVEL_3)|| \
 416                                  ((LEVEL) == PWR_PVDLEVEL_4) || ((LEVEL) == PWR_PVDLEVEL_5)|| \
 417                                  ((LEVEL) == PWR_PVDLEVEL_6) || ((LEVEL) == PWR_PVDLEVEL_7))
 418 #define IS_PWR_PVD_MODE(MODE) (((MODE) == PWR_PVD_MODE_IT_RISING)|| ((MODE) == PWR_PVD_MODE_IT_FALLING) || \
 419                               ((MODE) == PWR_PVD_MODE_IT_RISING_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING) || \
 420                               ((MODE) == PWR_PVD_MODE_EVENT_FALLING) || ((MODE) == PWR_PVD_MODE_EVENT_RISING_FALLING) || \
 421                               ((MODE) == PWR_PVD_MODE_NORMAL))
 422 #define IS_PWR_REGULATOR(REGULATOR) (((REGULATOR) == PWR_MAINREGULATOR_ON) || \
 423                                      ((REGULATOR) == PWR_LOWPOWERREGULATOR_ON))
 424 #define IS_PWR_SLEEP_ENTRY(ENTRY) (((ENTRY) == PWR_SLEEPENTRY_WFI) || ((ENTRY) == PWR_SLEEPENTRY_WFE))
 425 #define IS_PWR_STOP_ENTRY(ENTRY) (((ENTRY) == PWR_STOPENTRY_WFI) || ((ENTRY) == PWR_STOPENTRY_WFE))
 426 /**
 427   * @}
 428   */
 429
 430 /**
 431   * @}
 432   */
 433
 434 /**
 435   * @}
 436   */
 437
 438 /**
 439   * @}
 440   */
 441
 442 #ifdef __cplusplus
 443 }
 444 #endif
 445
 446
 447 #endif /* __STM32F4xx_HAL_PWR_H */
 448
 449 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/