lib/main/STM32F4/Drivers/STM32F4xx_HAL_Driver/Inc/stm32f4xx_ll_rng.h

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_ll_rng.h
   4   * @author  MCD Application Team
   5   * @version V1.7.1
   6   * @date    14-April-2017
   7   * @brief   Header file of RNG LL module.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37
  38 /* Define to prevent recursive inclusion -------------------------------------*/
  39 #ifndef __STM32F4xx_LL_RNG_H
  40 #define __STM32F4xx_LL_RNG_H
  41
  42 #ifdef __cplusplus
  43 extern "C" {
  44 #endif
  45
  46 /* Includes ------------------------------------------------------------------*/
  47 #include "stm32f4xx.h"
  48
  49 /** @addtogroup STM32F4xx_LL_Driver
  50   * @{
  51   */
  52
  53 #if defined(RNG)
  54
  55 /** @defgroup RNG_LL RNG
  56   * @{
  57   */
  58
  59 /* Private types -------------------------------------------------------------*/
  60 /* Private variables ---------------------------------------------------------*/
  61 /* Private constants ---------------------------------------------------------*/
  62 /* Private macros ------------------------------------------------------------*/
  63
  64 /* Exported types ------------------------------------------------------------*/
  65 /* Exported constants --------------------------------------------------------*/
  66 /** @defgroup RNG_LL_Exported_Constants RNG Exported Constants
  67   * @{
  68   */
  69
  70 /** @defgroup RNG_LL_EC_GET_FLAG Get Flags Defines
  71   * @brief    Flags defines which can be used with LL_RNG_ReadReg function
  72   * @{
  73   */
  74 #define LL_RNG_SR_DRDY RNG_SR_DRDY    /*!< Register contains valid random data */
  75 #define LL_RNG_SR_CECS RNG_SR_CECS    /*!< Clock error current status */
  76 #define LL_RNG_SR_SECS RNG_SR_SECS    /*!< Seed error current status */
  77 #define LL_RNG_SR_CEIS RNG_SR_CEIS    /*!< Clock error interrupt status */
  78 #define LL_RNG_SR_SEIS RNG_SR_SEIS    /*!< Seed error interrupt status */
  79 /**
  80   * @}
  81   */
  82
  83 /** @defgroup RNG_LL_EC_IT IT Defines
  84   * @brief    IT defines which can be used with LL_RNG_ReadReg and  LL_RNG_WriteReg macros
  85   * @{
  86   */
  87 #define LL_RNG_CR_IE   RNG_CR_IE      /*!< RNG Interrupt enable */
  88 /**
  89   * @}
  90   */
  91
  92 /**
  93   * @}
  94   */
  95
  96 /* Exported macro ------------------------------------------------------------*/
  97 /** @defgroup RNG_LL_Exported_Macros RNG Exported Macros
  98   * @{
  99   */
 100
 101 /** @defgroup RNG_LL_EM_WRITE_READ Common Write and read registers Macros
 102   * @{
 103   */
 104
 105 /**
 106   * @brief  Write a value in RNG register
 107   * @param  __INSTANCE__ RNG Instance
 108   * @param  __REG__ Register to be written
 109   * @param  __VALUE__ Value to be written in the register
 110   * @retval None
 111   */
 112 #define LL_RNG_WriteReg(__INSTANCE__, __REG__, __VALUE__) WRITE_REG(__INSTANCE__->__REG__, (__VALUE__))
 113
 114 /**
 115   * @brief  Read a value in RNG register
 116   * @param  __INSTANCE__ RNG Instance
 117   * @param  __REG__ Register to be read
 118   * @retval Register value
 119   */
 120 #define LL_RNG_ReadReg(__INSTANCE__, __REG__) READ_REG(__INSTANCE__->__REG__)
 121 /**
 122   * @}
 123   */
 124
 125 /**
 126   * @}
 127   */
 128
 129
 130 /* Exported functions --------------------------------------------------------*/
 131 /** @defgroup RNG_LL_Exported_Functions RNG Exported Functions
 132   * @{
 133   */
 134 /** @defgroup RNG_LL_EF_Configuration RNG Configuration functions
 135   * @{
 136   */
 137
 138 /**
 139   * @brief  Enable Random Number Generation
 140   * @rmtoll CR           RNGEN         LL_RNG_Enable
 141   * @param  RNGx RNG Instance
 142   * @retval None
 143   */
 144 __STATIC_INLINE void LL_RNG_Enable(RNG_TypeDef *RNGx)
 145 {
 146   SET_BIT(RNGx->CR, RNG_CR_RNGEN);
 147 }
 148
 149 /**
 150   * @brief  Disable Random Number Generation
 151   * @rmtoll CR           RNGEN         LL_RNG_Disable
 152   * @param  RNGx RNG Instance
 153   * @retval None
 154   */
 155 __STATIC_INLINE void LL_RNG_Disable(RNG_TypeDef *RNGx)
 156 {
 157   CLEAR_BIT(RNGx->CR, RNG_CR_RNGEN);
 158 }
 159
 160 /**
 161   * @brief  Check if Random Number Generator is enabled
 162   * @rmtoll CR           RNGEN         LL_RNG_IsEnabled
 163   * @param  RNGx RNG Instance
 164   * @retval State of bit (1 or 0).
 165   */
 166 __STATIC_INLINE uint32_t LL_RNG_IsEnabled(RNG_TypeDef *RNGx)
 167 {
 168   return (READ_BIT(RNGx->CR, RNG_CR_RNGEN) == (RNG_CR_RNGEN));
 169 }
 170
 171 /**
 172   * @}
 173   */
 174
 175 /** @defgroup RNG_LL_EF_FLAG_Management FLAG Management
 176   * @{
 177   */
 178
 179 /**
 180   * @brief  Indicate if the RNG Data ready Flag is set or not
 181   * @rmtoll SR           DRDY          LL_RNG_IsActiveFlag_DRDY
 182   * @param  RNGx RNG Instance
 183   * @retval State of bit (1 or 0).
 184   */
 185 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_DRDY(RNG_TypeDef *RNGx)
 186 {
 187   return (READ_BIT(RNGx->SR, RNG_SR_DRDY) == (RNG_SR_DRDY));
 188 }
 189
 190 /**
 191   * @brief  Indicate if the Clock Error Current Status Flag is set or not
 192   * @rmtoll SR           CECS          LL_RNG_IsActiveFlag_CECS
 193   * @param  RNGx RNG Instance
 194   * @retval State of bit (1 or 0).
 195   */
 196 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CECS(RNG_TypeDef *RNGx)
 197 {
 198   return (READ_BIT(RNGx->SR, RNG_SR_CECS) == (RNG_SR_CECS));
 199 }
 200
 201 /**
 202   * @brief  Indicate if the Seed Error Current Status Flag is set or not
 203   * @rmtoll SR           SECS          LL_RNG_IsActiveFlag_SECS
 204   * @param  RNGx RNG Instance
 205   * @retval State of bit (1 or 0).
 206   */
 207 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SECS(RNG_TypeDef *RNGx)
 208 {
 209   return (READ_BIT(RNGx->SR, RNG_SR_SECS) == (RNG_SR_SECS));
 210 }
 211
 212 /**
 213   * @brief  Indicate if the Clock Error Interrupt Status Flag is set or not
 214   * @rmtoll SR           CEIS          LL_RNG_IsActiveFlag_CEIS
 215   * @param  RNGx RNG Instance
 216   * @retval State of bit (1 or 0).
 217   */
 218 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_CEIS(RNG_TypeDef *RNGx)
 219 {
 220   return (READ_BIT(RNGx->SR, RNG_SR_CEIS) == (RNG_SR_CEIS));
 221 }
 222
 223 /**
 224   * @brief  Indicate if the Seed Error Interrupt Status Flag is set or not
 225   * @rmtoll SR           SEIS          LL_RNG_IsActiveFlag_SEIS
 226   * @param  RNGx RNG Instance
 227   * @retval State of bit (1 or 0).
 228   */
 229 __STATIC_INLINE uint32_t LL_RNG_IsActiveFlag_SEIS(RNG_TypeDef *RNGx)
 230 {
 231   return (READ_BIT(RNGx->SR, RNG_SR_SEIS) == (RNG_SR_SEIS));
 232 }
 233
 234 /**
 235   * @brief  Clear Clock Error interrupt Status (CEIS) Flag
 236   * @rmtoll SR           CEIS          LL_RNG_ClearFlag_CEIS
 237   * @param  RNGx RNG Instance
 238   * @retval None
 239   */
 240 __STATIC_INLINE void LL_RNG_ClearFlag_CEIS(RNG_TypeDef *RNGx)
 241 {
 242   WRITE_REG(RNGx->SR, ~RNG_SR_CEIS);
 243 }
 244
 245 /**
 246   * @brief  Clear Seed Error interrupt Status (SEIS) Flag
 247   * @rmtoll SR           SEIS          LL_RNG_ClearFlag_SEIS
 248   * @param  RNGx RNG Instance
 249   * @retval None
 250   */
 251 __STATIC_INLINE void LL_RNG_ClearFlag_SEIS(RNG_TypeDef *RNGx)
 252 {
 253   WRITE_REG(RNGx->SR, ~RNG_SR_SEIS);
 254 }
 255
 256 /**
 257   * @}
 258   */
 259
 260 /** @defgroup RNG_LL_EF_IT_Management IT Management
 261   * @{
 262   */
 263
 264 /**
 265   * @brief  Enable Random Number Generator Interrupt
 266   *         (applies for either Seed error, Clock Error or Data ready interrupts)
 267   * @rmtoll CR           IE            LL_RNG_EnableIT
 268   * @param  RNGx RNG Instance
 269   * @retval None
 270   */
 271 __STATIC_INLINE void LL_RNG_EnableIT(RNG_TypeDef *RNGx)
 272 {
 273   SET_BIT(RNGx->CR, RNG_CR_IE);
 274 }
 275
 276 /**
 277   * @brief  Disable Random Number Generator Interrupt
 278   *         (applies for either Seed error, Clock Error or Data ready interrupts)
 279   * @rmtoll CR           IE            LL_RNG_DisableIT
 280   * @param  RNGx RNG Instance
 281   * @retval None
 282   */
 283 __STATIC_INLINE void LL_RNG_DisableIT(RNG_TypeDef *RNGx)
 284 {
 285   CLEAR_BIT(RNGx->CR, RNG_CR_IE);
 286 }
 287
 288 /**
 289   * @brief  Check if Random Number Generator Interrupt is enabled
 290   *         (applies for either Seed error, Clock Error or Data ready interrupts)
 291   * @rmtoll CR           IE            LL_RNG_IsEnabledIT
 292   * @param  RNGx RNG Instance
 293   * @retval State of bit (1 or 0).
 294   */
 295 __STATIC_INLINE uint32_t LL_RNG_IsEnabledIT(RNG_TypeDef *RNGx)
 296 {
 297   return (READ_BIT(RNGx->CR, RNG_CR_IE) == (RNG_CR_IE));
 298 }
 299
 300 /**
 301   * @}
 302   */
 303
 304 /** @defgroup RNG_LL_EF_Data_Management Data Management
 305   * @{
 306   */
 307
 308 /**
 309   * @brief  Return32-bit Random Number value
 310   * @rmtoll DR           RNDATA        LL_RNG_ReadRandData32
 311   * @param  RNGx RNG Instance
 312   * @retval Generated 32-bit random value
 313   */
 314 __STATIC_INLINE uint32_t LL_RNG_ReadRandData32(RNG_TypeDef *RNGx)
 315 {
 316   return (uint32_t)(READ_REG(RNGx->DR));
 317 }
 318
 319 /**
 320   * @}
 321   */
 322
 323 #if defined(USE_FULL_LL_DRIVER)
 324 /** @defgroup RNG_LL_EF_Init Initialization and de-initialization functions
 325   * @{
 326   */
 327
 328 ErrorStatus LL_RNG_DeInit(RNG_TypeDef *RNGx);
 329
 330 /**
 331   * @}
 332   */
 333 #endif /* USE_FULL_LL_DRIVER */
 334
 335 /**
 336   * @}
 337   */
 338
 339 /**
 340   * @}
 341   */
 342
 343 #endif /* defined(RNG) */
 344
 345 /**
 346   * @}
 347   */
 348
 349 #ifdef __cplusplus
 350 }
 351 #endif
 352
 353 #endif /* __STM32F4xx_LL_RNG_H */
 354
 355 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/