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Merge pull request #11198 from SteveCEvans/sce_rc2
[betaflight.git] / lib / main / STM32F4 / Drivers / STM32F4xx_HAL_Driver / Src / stm32f4xx_hal_cryp.c
blobf677452acdc40c0ee1b50bdf5d7d0899b3addf77
1 /**
2 ******************************************************************************
3 * @file stm32f4xx_hal_cryp.c
4 * @author MCD Application Team
5 * @version V1.7.1
6 * @date 14-April-2017
7 * @brief CRYP HAL module driver.
8 * This file provides firmware functions to manage the following
9 * functionalities of the Cryptography (CRYP) peripheral:
10 * + Initialization and de-initialization functions
11 * + AES processing functions
12 * + DES processing functions
13 * + TDES processing functions
14 * + DMA callback functions
15 * + CRYP IRQ handler management
16 * + Peripheral State functions
17 *
18 @verbatim
19 ==============================================================================
20 ##### How to use this driver #####
21 ==============================================================================
22 [..]
23 The CRYP HAL driver can be used as follows:
24
25 (#)Initialize the CRYP low level resources by implementing the HAL_CRYP_MspInit():
26 (##) Enable the CRYP interface clock using __HAL_RCC_CRYP_CLK_ENABLE()
27 (##) In case of using interrupts (e.g. HAL_CRYP_AESECB_Encrypt_IT())
28 (+++) Configure the CRYP interrupt priority using HAL_NVIC_SetPriority()
29 (+++) Enable the CRYP IRQ handler using HAL_NVIC_EnableIRQ()
30 (+++) In CRYP IRQ handler, call HAL_CRYP_IRQHandler()
31 (##) In case of using DMA to control data transfer (e.g. HAL_CRYP_AESECB_Encrypt_DMA())
32 (+++) Enable the DMAx interface clock using __DMAx_CLK_ENABLE()
33 (+++) Configure and enable two DMA streams one for managing data transfer from
34 memory to peripheral (input stream) and another stream for managing data
35 transfer from peripheral to memory (output stream)
36 (+++) Associate the initialized DMA handle to the CRYP DMA handle
37 using __HAL_LINKDMA()
38 (+++) Configure the priority and enable the NVIC for the transfer complete
39 interrupt on the two DMA Streams. The output stream should have higher
40 priority than the input stream HAL_NVIC_SetPriority() and HAL_NVIC_EnableIRQ()
41
42 (#)Initialize the CRYP HAL using HAL_CRYP_Init(). This function configures mainly:
43 (##) The data type: 1-bit, 8-bit, 16-bit and 32-bit
44 (##) The key size: 128, 192 and 256. This parameter is relevant only for AES
45 (##) The encryption/decryption key. It's size depends on the algorithm
46 used for encryption/decryption
47 (##) The initialization vector (counter). It is not used ECB mode.
48
49 (#)Three processing (encryption/decryption) functions are available:
50 (##) Polling mode: encryption and decryption APIs are blocking functions
51 i.e. they process the data and wait till the processing is finished,
52 e.g. HAL_CRYP_AESCBC_Encrypt()
53 (##) Interrupt mode: encryption and decryption APIs are not blocking functions
54 i.e. they process the data under interrupt,
55 e.g. HAL_CRYP_AESCBC_Encrypt_IT()
56 (##) DMA mode: encryption and decryption APIs are not blocking functions
57 i.e. the data transfer is ensured by DMA,
58 e.g. HAL_CRYP_AESCBC_Encrypt_DMA()
59
60 (#)When the processing function is called at first time after HAL_CRYP_Init()
61 the CRYP peripheral is initialized and processes the buffer in input.
62 At second call, the processing function performs an append of the already
63 processed buffer.
64 When a new data block is to be processed, call HAL_CRYP_Init() then the
65 processing function.
66
67 (#)Call HAL_CRYP_DeInit() to deinitialize the CRYP peripheral.
68
69 @endverbatim
70 ******************************************************************************
71 * @attention
72 *
73 * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
74 *
75 * Redistribution and use in source and binary forms, with or without modification,
76 * are permitted provided that the following conditions are met:
77 * 1. Redistributions of source code must retain the above copyright notice,
78 * this list of conditions and the following disclaimer.
79 * 2. Redistributions in binary form must reproduce the above copyright notice,
80 * this list of conditions and the following disclaimer in the documentation
81 * and/or other materials provided with the distribution.
82 * 3. Neither the name of STMicroelectronics nor the names of its contributors
83 * may be used to endorse or promote products derived from this software
84 * without specific prior written permission.
85 *
86 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
87 * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
88 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
89 * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
90 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
91 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
92 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
93 * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
94 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
95 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
96 *
97 ******************************************************************************
98 */
99
100 /* Includes ------------------------------------------------------------------*/
101 #include "stm32f4xx_hal.h"
102
103 /** @addtogroup STM32F4xx_HAL_Driver
104 * @{
105 */
106
107 #ifdef HAL_CRYP_MODULE_ENABLED
108
109 #if defined(CRYP)
110
111 /** @defgroup CRYP CRYP
112 * @brief CRYP HAL module driver.
113 * @{
114 */
115
116 /* Private typedef -----------------------------------------------------------*/
117 /* Private define ------------------------------------------------------------*/
118 /** @addtogroup CRYP_Private_define
119 * @{
120 */
121 #define CRYP_TIMEOUT_VALUE 1U
122 /**
123 * @}
124 */
125
126 /* Private macro -------------------------------------------------------------*/
127 /* Private variables ---------------------------------------------------------*/
128 /* Private function prototypes -----------------------------------------------*/
129 /** @addtogroup CRYP_Private_Functions_prototypes
130 * @{
131 */
132 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize);
133 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize);
134 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
135 static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout);
136 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma);
137 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma);
138 static void CRYP_DMAError(DMA_HandleTypeDef *hdma);
139 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr);
140 static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
141 static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
142 static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
143 static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction);
144 /**
145 * @}
146 */
147
148
149 /* Private functions ---------------------------------------------------------*/
150
151 /** @addtogroup CRYP_Private_Functions
152 * @{
153 */
154
155
156 /**
157 * @brief DMA CRYP Input Data process complete callback.
158 * @param hdma: DMA handle
159 * @retval None
160 */
161 static void CRYP_DMAInCplt(DMA_HandleTypeDef *hdma)
162 {
163 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
164
165 /* Disable the DMA transfer for input FIFO request by resetting the DIEN bit
166 in the DMACR register */
167 hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DIEN);
168
169 /* Call input data transfer complete callback */
170 HAL_CRYP_InCpltCallback(hcryp);
171 }
172
173 /**
174 * @brief DMA CRYP Output Data process complete callback.
175 * @param hdma: DMA handle
176 * @retval None
177 */
178 static void CRYP_DMAOutCplt(DMA_HandleTypeDef *hdma)
179 {
180 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
181
182 /* Disable the DMA transfer for output FIFO request by resetting the DOEN bit
183 in the DMACR register */
184 hcryp->Instance->DMACR &= (uint32_t)(~CRYP_DMACR_DOEN);
185
186 /* Disable CRYP */
187 __HAL_CRYP_DISABLE(hcryp);
188
189 /* Change the CRYP state to ready */
190 hcryp->State = HAL_CRYP_STATE_READY;
191
192 /* Call output data transfer complete callback */
193 HAL_CRYP_OutCpltCallback(hcryp);
194 }
195
196 /**
197 * @brief DMA CRYP communication error callback.
198 * @param hdma: DMA handle
199 * @retval None
200 */
201 static void CRYP_DMAError(DMA_HandleTypeDef *hdma)
202 {
203 CRYP_HandleTypeDef* hcryp = (CRYP_HandleTypeDef*)((DMA_HandleTypeDef*)hdma)->Parent;
204 hcryp->State= HAL_CRYP_STATE_READY;
205 HAL_CRYP_ErrorCallback(hcryp);
206 }
207
208 /**
209 * @brief Writes the Key in Key registers.
210 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
211 * the configuration information for CRYP module
212 * @param Key: Pointer to Key buffer
213 * @param KeySize: Size of Key
214 * @retval None
215 */
216 static void CRYP_SetKey(CRYP_HandleTypeDef *hcryp, uint8_t *Key, uint32_t KeySize)
217 {
218 uint32_t keyaddr = (uint32_t)Key;
219
220 switch(KeySize)
221 {
222 case CRYP_KEYSIZE_256B:
223 /* Key Initialisation */
224 hcryp->Instance->K0LR = __REV(*(uint32_t*)(keyaddr));
225 keyaddr+=4U;
226 hcryp->Instance->K0RR = __REV(*(uint32_t*)(keyaddr));
227 keyaddr+=4U;
228 hcryp->Instance->K1LR = __REV(*(uint32_t*)(keyaddr));
229 keyaddr+=4U;
230 hcryp->Instance->K1RR = __REV(*(uint32_t*)(keyaddr));
231 keyaddr+=4U;
232 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
233 keyaddr+=4U;
234 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
235 keyaddr+=4U;
236 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
237 keyaddr+=4U;
238 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
239 break;
240 case CRYP_KEYSIZE_192B:
241 hcryp->Instance->K1LR = __REV(*(uint32_t*)(keyaddr));
242 keyaddr+=4U;
243 hcryp->Instance->K1RR = __REV(*(uint32_t*)(keyaddr));
244 keyaddr+=4U;
245 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
246 keyaddr+=4U;
247 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
248 keyaddr+=4U;
249 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
250 keyaddr+=4U;
251 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
252 break;
253 case CRYP_KEYSIZE_128B:
254 hcryp->Instance->K2LR = __REV(*(uint32_t*)(keyaddr));
255 keyaddr+=4U;
256 hcryp->Instance->K2RR = __REV(*(uint32_t*)(keyaddr));
257 keyaddr+=4U;
258 hcryp->Instance->K3LR = __REV(*(uint32_t*)(keyaddr));
259 keyaddr+=4U;
260 hcryp->Instance->K3RR = __REV(*(uint32_t*)(keyaddr));
261 break;
262 default:
263 break;
264 }
265 }
266
267 /**
268 * @brief Writes the InitVector/InitCounter in IV registers.
269 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
270 * the configuration information for CRYP module
271 * @param InitVector: Pointer to InitVector/InitCounter buffer
272 * @param IVSize: Size of the InitVector/InitCounter
273 * @retval None
274 */
275 static void CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp, uint8_t *InitVector, uint32_t IVSize)
276 {
277 uint32_t ivaddr = (uint32_t)InitVector;
278
279 switch(IVSize)
280 {
281 case CRYP_KEYSIZE_128B:
282 hcryp->Instance->IV0LR = __REV(*(uint32_t*)(ivaddr));
283 ivaddr+=4U;
284 hcryp->Instance->IV0RR = __REV(*(uint32_t*)(ivaddr));
285 ivaddr+=4U;
286 hcryp->Instance->IV1LR = __REV(*(uint32_t*)(ivaddr));
287 ivaddr+=4U;
288 hcryp->Instance->IV1RR = __REV(*(uint32_t*)(ivaddr));
289 break;
290 /* Whatever key size 192 or 256, Init vector is written in IV0LR and IV0RR */
291 case CRYP_KEYSIZE_192B:
292 hcryp->Instance->IV0LR = __REV(*(uint32_t*)(ivaddr));
293 ivaddr+=4U;
294 hcryp->Instance->IV0RR = __REV(*(uint32_t*)(ivaddr));
295 break;
296 case CRYP_KEYSIZE_256B:
297 hcryp->Instance->IV0LR = __REV(*(uint32_t*)(ivaddr));
298 ivaddr+=4U;
299 hcryp->Instance->IV0RR = __REV(*(uint32_t*)(ivaddr));
300 break;
301 default:
302 break;
303 }
304 }
305
306 /**
307 * @brief Process Data: Writes Input data in polling mode and read the output data
308 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
309 * the configuration information for CRYP module
310 * @param Input: Pointer to the Input buffer
311 * @param Ilength: Length of the Input buffer, must be a multiple of 16.
312 * @param Output: Pointer to the returned buffer
313 * @param Timeout: Timeout value
314 * @retval None
315 */
316 static HAL_StatusTypeDef CRYP_ProcessData(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
317 {
318 uint32_t tickstart = 0U;
319
320 uint32_t i = 0U;
321 uint32_t inputaddr = (uint32_t)Input;
322 uint32_t outputaddr = (uint32_t)Output;
323
324 for(i=0U; (i < Ilength); i+=16U)
325 {
326 /* Write the Input block in the IN FIFO */
327 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
328 inputaddr+=4U;
329 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
330 inputaddr+=4U;
331 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
332 inputaddr+=4U;
333 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
334 inputaddr+=4U;
335
336 /* Get tick */
337 tickstart = HAL_GetTick();
338
339 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
340 {
341 /* Check for the Timeout */
342 if(Timeout != HAL_MAX_DELAY)
343 {
344 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
345 {
346 /* Change state */
347 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
348
349 /* Process Unlocked */
350 __HAL_UNLOCK(hcryp);
351
352 return HAL_TIMEOUT;
353 }
354 }
355 }
356 /* Read the Output block from the Output FIFO */
357 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
358 outputaddr+=4U;
359 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
360 outputaddr+=4U;
361 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
362 outputaddr+=4U;
363 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
364 outputaddr+=4U;
365 }
366 /* Return function status */
367 return HAL_OK;
368 }
369
370 /**
371 * @brief Process Data: Write Input data in polling mode.
372 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
373 * the configuration information for CRYP module
374 * @param Input: Pointer to the Input buffer
375 * @param Ilength: Length of the Input buffer, must be a multiple of 8
376 * @param Output: Pointer to the returned buffer
377 * @param Timeout: Specify Timeout value
378 * @retval None
379 */
380 static HAL_StatusTypeDef CRYP_ProcessData2Words(CRYP_HandleTypeDef *hcryp, uint8_t* Input, uint16_t Ilength, uint8_t* Output, uint32_t Timeout)
381 {
382 uint32_t tickstart = 0U;
383
384 uint32_t i = 0U;
385 uint32_t inputaddr = (uint32_t)Input;
386 uint32_t outputaddr = (uint32_t)Output;
387
388 for(i=0U; (i < Ilength); i+=8U)
389 {
390 /* Write the Input block in the IN FIFO */
391 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
392 inputaddr+=4U;
393 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
394 inputaddr+=4U;
395
396 /* Get tick */
397 tickstart = HAL_GetTick();
398
399 while(HAL_IS_BIT_CLR(hcryp->Instance->SR, CRYP_FLAG_OFNE))
400 {
401 /* Check for the Timeout */
402 if(Timeout != HAL_MAX_DELAY)
403 {
404 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
405 {
406 /* Change state */
407 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
408
409 /* Process Unlocked */
410 __HAL_UNLOCK(hcryp);
411
412 return HAL_TIMEOUT;
413 }
414 }
415 }
416 /* Read the Output block from the Output FIFO */
417 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
418 outputaddr+=4U;
419 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
420 outputaddr+=4U;
421 }
422 /* Return function status */
423 return HAL_OK;
424 }
425
426 /**
427 * @brief Set the DMA configuration and start the DMA transfer
428 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
429 * the configuration information for CRYP module
430 * @param inputaddr: address of the Input buffer
431 * @param Size: Size of the Input buffer, must be a multiple of 16.
432 * @param outputaddr: address of the Output buffer
433 * @retval None
434 */
435 static void CRYP_SetDMAConfig(CRYP_HandleTypeDef *hcryp, uint32_t inputaddr, uint16_t Size, uint32_t outputaddr)
436 {
437 /* Set the CRYP DMA transfer complete callback */
438 hcryp->hdmain->XferCpltCallback = CRYP_DMAInCplt;
439 /* Set the DMA error callback */
440 hcryp->hdmain->XferErrorCallback = CRYP_DMAError;
441
442 /* Set the CRYP DMA transfer complete callback */
443 hcryp->hdmaout->XferCpltCallback = CRYP_DMAOutCplt;
444 /* Set the DMA error callback */
445 hcryp->hdmaout->XferErrorCallback = CRYP_DMAError;
446
447 /* Enable CRYP */
448 __HAL_CRYP_ENABLE(hcryp);
449
450 /* Enable the DMA In DMA Stream */
451 HAL_DMA_Start_IT(hcryp->hdmain, inputaddr, (uint32_t)&hcryp->Instance->DR, Size/4U);
452
453 /* Enable In DMA request */
454 hcryp->Instance->DMACR = (CRYP_DMACR_DIEN);
455
456 /* Enable the DMA Out DMA Stream */
457 HAL_DMA_Start_IT(hcryp->hdmaout, (uint32_t)&hcryp->Instance->DOUT, outputaddr, Size/4U);
458
459 /* Enable Out DMA request */
460 hcryp->Instance->DMACR |= CRYP_DMACR_DOEN;
461
462 }
463
464 /**
465 * @brief Sets the CRYP peripheral in DES ECB mode.
466 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
467 * the configuration information for CRYP module
468 * @param Direction: Encryption or decryption
469 * @retval None
470 */
471 static void CRYP_SetDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
472 {
473 /* Check if initialization phase has already been performed */
474 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
475 {
476 /* Set the CRYP peripheral in AES ECB mode */
477 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_DES_ECB | Direction);
478
479 /* Set the key */
480 hcryp->Instance->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey));
481 hcryp->Instance->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4U));
482
483 /* Flush FIFO */
484 __HAL_CRYP_FIFO_FLUSH(hcryp);
485
486 /* Set the phase */
487 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
488 }
489 }
490
491 /**
492 * @brief Sets the CRYP peripheral in DES CBC mode.
493 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
494 * the configuration information for CRYP module
495 * @param Direction: Encryption or decryption
496 * @retval None
497 */
498 static void CRYP_SetDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
499 {
500 /* Check if initialization phase has already been performed */
501 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
502 {
503 /* Set the CRYP peripheral in AES ECB mode */
504 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_DES_CBC | Direction);
505
506 /* Set the key */
507 hcryp->Instance->K1LR = __REV(*(uint32_t*)(hcryp->Init.pKey));
508 hcryp->Instance->K1RR = __REV(*(uint32_t*)(hcryp->Init.pKey+4U));
509
510 /* Set the Initialization Vector */
511 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B);
512
513 /* Flush FIFO */
514 __HAL_CRYP_FIFO_FLUSH(hcryp);
515
516 /* Set the phase */
517 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
518 }
519 }
520
521 /**
522 * @brief Sets the CRYP peripheral in TDES ECB mode.
523 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
524 * the configuration information for CRYP module
525 * @param Direction: Encryption or decryption
526 * @retval None
527 */
528 static void CRYP_SetTDESECBMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
529 {
530 /* Check if initialization phase has already been performed */
531 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
532 {
533 /* Set the CRYP peripheral in AES ECB mode */
534 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_TDES_ECB | Direction);
535
536 /* Set the key */
537 CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B);
538
539 /* Flush FIFO */
540 __HAL_CRYP_FIFO_FLUSH(hcryp);
541
542 /* Set the phase */
543 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
544 }
545 }
546
547 /**
548 * @brief Sets the CRYP peripheral in TDES CBC mode
549 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
550 * the configuration information for CRYP module
551 * @param Direction: Encryption or decryption
552 * @retval None
553 */
554 static void CRYP_SetTDESCBCMode(CRYP_HandleTypeDef *hcryp, uint32_t Direction)
555 {
556 /* Check if initialization phase has already been performed */
557 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
558 {
559 /* Set the CRYP peripheral in AES CBC mode */
560 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_TDES_CBC | Direction);
561
562 /* Set the key */
563 CRYP_SetKey(hcryp, hcryp->Init.pKey, CRYP_KEYSIZE_192B);
564
565 /* Set the Initialization Vector */
566 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_256B);
567
568 /* Flush FIFO */
569 __HAL_CRYP_FIFO_FLUSH(hcryp);
570
571 /* Set the phase */
572 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
573 }
574 }
575
576 /**
577 * @}
578 */
579
580 /* Exported functions --------------------------------------------------------*/
581 /** @addtogroup CRYP_Exported_Functions
582 * @{
583 */
584
585 /** @defgroup CRYP_Exported_Functions_Group1 Initialization and de-initialization functions
586 * @brief Initialization and Configuration functions.
587 *
588 @verbatim
589 ==============================================================================
590 ##### Initialization and de-initialization functions #####
591 ==============================================================================
592 [..] This section provides functions allowing to:
593 (+) Initialize the CRYP according to the specified parameters
594 in the CRYP_InitTypeDef and creates the associated handle
595 (+) DeInitialize the CRYP peripheral
596 (+) Initialize the CRYP MSP
597 (+) DeInitialize CRYP MSP
598
599 @endverbatim
600 * @{
601 */
602
603 /**
604 * @brief Initializes the CRYP according to the specified
605 * parameters in the CRYP_InitTypeDef and creates the associated handle.
606 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
607 * the configuration information for CRYP module
608 * @retval HAL status
609 */
610 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
611 {
612 /* Check the CRYP handle allocation */
613 if(hcryp == NULL)
614 {
615 return HAL_ERROR;
616 }
617
618 /* Check the parameters */
619 assert_param(IS_CRYP_KEYSIZE(hcryp->Init.KeySize));
620 assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
621
622 if(hcryp->State == HAL_CRYP_STATE_RESET)
623 {
624 /* Allocate lock resource and initialize it */
625 hcryp->Lock = HAL_UNLOCKED;
626 /* Init the low level hardware */
627 HAL_CRYP_MspInit(hcryp);
628 }
629
630 /* Change the CRYP state */
631 hcryp->State = HAL_CRYP_STATE_BUSY;
632
633 /* Set the key size and data type*/
634 CRYP->CR = (uint32_t) (hcryp->Init.KeySize | hcryp->Init.DataType);
635
636 /* Reset CrypInCount and CrypOutCount */
637 hcryp->CrypInCount = 0U;
638 hcryp->CrypOutCount = 0U;
639
640 /* Change the CRYP state */
641 hcryp->State = HAL_CRYP_STATE_READY;
642
643 /* Set the default CRYP phase */
644 hcryp->Phase = HAL_CRYP_PHASE_READY;
645
646 /* Return function status */
647 return HAL_OK;
648 }
649
650 /**
651 * @brief DeInitializes the CRYP peripheral.
652 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
653 * the configuration information for CRYP module
654 * @retval HAL status
655 */
656 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
657 {
658 /* Check the CRYP handle allocation */
659 if(hcryp == NULL)
660 {
661 return HAL_ERROR;
662 }
663
664 /* Change the CRYP state */
665 hcryp->State = HAL_CRYP_STATE_BUSY;
666
667 /* Set the default CRYP phase */
668 hcryp->Phase = HAL_CRYP_PHASE_READY;
669
670 /* Reset CrypInCount and CrypOutCount */
671 hcryp->CrypInCount = 0U;
672 hcryp->CrypOutCount = 0U;
673
674 /* Disable the CRYP Peripheral Clock */
675 __HAL_CRYP_DISABLE(hcryp);
676
677 /* DeInit the low level hardware: CLOCK, NVIC.*/
678 HAL_CRYP_MspDeInit(hcryp);
679
680 /* Change the CRYP state */
681 hcryp->State = HAL_CRYP_STATE_RESET;
682
683 /* Release Lock */
684 __HAL_UNLOCK(hcryp);
685
686 /* Return function status */
687 return HAL_OK;
688 }
689
690 /**
691 * @brief Initializes the CRYP MSP.
692 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
693 * the configuration information for CRYP module
694 * @retval None
695 */
696 __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
697 {
698 /* Prevent unused argument(s) compilation warning */
699 UNUSED(hcryp);
700 /* NOTE : This function Should not be modified, when the callback is needed,
701 the HAL_CRYP_MspInit could be implemented in the user file
702 */
703 }
704
705 /**
706 * @brief DeInitializes CRYP MSP.
707 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
708 * the configuration information for CRYP module
709 * @retval None
710 */
711 __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
712 {
713 /* Prevent unused argument(s) compilation warning */
714 UNUSED(hcryp);
715 /* NOTE : This function Should not be modified, when the callback is needed,
716 the HAL_CRYP_MspDeInit could be implemented in the user file
717 */
718 }
719
720 /**
721 * @}
722 */
723
724 /** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
725 * @brief processing functions.
726 *
727 @verbatim
728 ==============================================================================
729 ##### AES processing functions #####
730 ==============================================================================
731 [..] This section provides functions allowing to:
732 (+) Encrypt plaintext using AES-128/192/256 using chaining modes
733 (+) Decrypt cyphertext using AES-128/192/256 using chaining modes
734 [..] Three processing functions are available:
735 (+) Polling mode
736 (+) Interrupt mode
737 (+) DMA mode
738
739 @endverbatim
740 * @{
741 */
742
743 /**
744 * @brief Initializes the CRYP peripheral in AES ECB encryption mode
745 * then encrypt pPlainData. The cypher data are available in pCypherData
746 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
747 * the configuration information for CRYP module
748 * @param pPlainData: Pointer to the plaintext buffer
749 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
750 * @param pCypherData: Pointer to the cyphertext buffer
751 * @param Timeout: Specify Timeout value
752 * @retval HAL status
753 */
754 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
755 {
756 /* Process Locked */
757 __HAL_LOCK(hcryp);
758
759 /* Change the CRYP state */
760 hcryp->State = HAL_CRYP_STATE_BUSY;
761
762 /* Check if initialization phase has already been performed */
763 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
764 {
765 /* Set the key */
766 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
767
768 /* Set the CRYP peripheral in AES ECB mode */
769 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB);
770
771 /* Flush FIFO */
772 __HAL_CRYP_FIFO_FLUSH(hcryp);
773
774 /* Enable CRYP */
775 __HAL_CRYP_ENABLE(hcryp);
776
777 /* Set the phase */
778 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
779 }
780
781 /* Write Plain Data and Get Cypher Data */
782 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
783 {
784 return HAL_TIMEOUT;
785 }
786
787 /* Change the CRYP state */
788 hcryp->State = HAL_CRYP_STATE_READY;
789
790 /* Process Unlocked */
791 __HAL_UNLOCK(hcryp);
792
793 /* Return function status */
794 return HAL_OK;
795 }
796
797 /**
798 * @brief Initializes the CRYP peripheral in AES CBC encryption mode
799 * then encrypt pPlainData. The cypher data are available in pCypherData
800 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
801 * the configuration information for CRYP module
802 * @param pPlainData: Pointer to the plaintext buffer
803 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
804 * @param pCypherData: Pointer to the cyphertext buffer
805 * @param Timeout: Specify Timeout value
806 * @retval HAL status
807 */
808 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
809 {
810 /* Process Locked */
811 __HAL_LOCK(hcryp);
812
813 /* Change the CRYP state */
814 hcryp->State = HAL_CRYP_STATE_BUSY;
815
816 /* Check if initialization phase has already been performed */
817 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
818 {
819 /* Set the key */
820 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
821
822 /* Set the CRYP peripheral in AES ECB mode */
823 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC);
824
825 /* Set the Initialization Vector */
826 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
827
828 /* Flush FIFO */
829 __HAL_CRYP_FIFO_FLUSH(hcryp);
830
831 /* Enable CRYP */
832 __HAL_CRYP_ENABLE(hcryp);
833
834 /* Set the phase */
835 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
836 }
837
838 /* Write Plain Data and Get Cypher Data */
839 if(CRYP_ProcessData(hcryp,pPlainData, Size, pCypherData, Timeout) != HAL_OK)
840 {
841 return HAL_TIMEOUT;
842 }
843
844 /* Change the CRYP state */
845 hcryp->State = HAL_CRYP_STATE_READY;
846
847 /* Process Unlocked */
848 __HAL_UNLOCK(hcryp);
849
850 /* Return function status */
851 return HAL_OK;
852 }
853
854 /**
855 * @brief Initializes the CRYP peripheral in AES CTR encryption mode
856 * then encrypt pPlainData. The cypher data are available in pCypherData
857 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
858 * the configuration information for CRYP module
859 * @param pPlainData: Pointer to the plaintext buffer
860 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
861 * @param pCypherData: Pointer to the cyphertext buffer
862 * @param Timeout: Specify Timeout value
863 * @retval HAL status
864 */
865 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
866 {
867 /* Process Locked */
868 __HAL_LOCK(hcryp);
869
870 /* Change the CRYP state */
871 hcryp->State = HAL_CRYP_STATE_BUSY;
872
873 /* Check if initialization phase has already been performed */
874 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
875 {
876 /* Set the key */
877 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
878
879 /* Set the CRYP peripheral in AES ECB mode */
880 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR);
881
882 /* Set the Initialization Vector */
883 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
884
885 /* Flush FIFO */
886 __HAL_CRYP_FIFO_FLUSH(hcryp);
887
888 /* Enable CRYP */
889 __HAL_CRYP_ENABLE(hcryp);
890
891 /* Set the phase */
892 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
893 }
894
895 /* Write Plain Data and Get Cypher Data */
896 if(CRYP_ProcessData(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
897 {
898 return HAL_TIMEOUT;
899 }
900
901 /* Change the CRYP state */
902 hcryp->State = HAL_CRYP_STATE_READY;
903
904 /* Process Unlocked */
905 __HAL_UNLOCK(hcryp);
906
907 /* Return function status */
908 return HAL_OK;
909 }
910
911
912
913 /**
914 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
915 * then decrypted pCypherData. The cypher data are available in pPlainData
916 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
917 * the configuration information for CRYP module
918 * @param pCypherData: Pointer to the cyphertext buffer
919 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
920 * @param pPlainData: Pointer to the plaintext buffer
921 * @param Timeout: Specify Timeout value
922 * @retval HAL status
923 */
924 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
925 {
926 uint32_t tickstart = 0U;
927
928 /* Process Locked */
929 __HAL_LOCK(hcryp);
930
931 /* Change the CRYP state */
932 hcryp->State = HAL_CRYP_STATE_BUSY;
933
934 /* Check if initialization phase has already been performed */
935 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
936 {
937 /* Set the key */
938 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
939
940 /* Set the CRYP peripheral in AES Key mode */
941 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
942
943 /* Enable CRYP */
944 __HAL_CRYP_ENABLE(hcryp);
945
946 /* Get tick */
947 tickstart = HAL_GetTick();
948
949 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
950 {
951 /* Check for the Timeout */
952 if(Timeout != HAL_MAX_DELAY)
953 {
954 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
955 {
956 /* Change state */
957 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
958
959 /* Process Unlocked */
960 __HAL_UNLOCK(hcryp);
961
962 return HAL_TIMEOUT;
963 }
964 }
965 }
966
967 /* Disable CRYP */
968 __HAL_CRYP_DISABLE(hcryp);
969
970 /* Reset the ALGOMODE bits*/
971 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
972
973 /* Set the CRYP peripheral in AES ECB decryption mode */
974 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
975 /* Flush FIFO */
976 __HAL_CRYP_FIFO_FLUSH(hcryp);
977
978 /* Enable CRYP */
979 __HAL_CRYP_ENABLE(hcryp);
980
981 /* Set the phase */
982 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
983 }
984
985 /* Write Plain Data and Get Cypher Data */
986 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
987 {
988 return HAL_TIMEOUT;
989 }
990
991 /* Change the CRYP state */
992 hcryp->State = HAL_CRYP_STATE_READY;
993
994 /* Process Unlocked */
995 __HAL_UNLOCK(hcryp);
996
997 /* Return function status */
998 return HAL_OK;
999 }
1000
1001 /**
1002 * @brief Initializes the CRYP peripheral in AES ECB decryption mode
1003 * then decrypted pCypherData. The cypher data are available in pPlainData
1004 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1005 * the configuration information for CRYP module
1006 * @param pCypherData: Pointer to the cyphertext buffer
1007 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1008 * @param pPlainData: Pointer to the plaintext buffer
1009 * @param Timeout: Specify Timeout value
1010 * @retval HAL status
1011 */
1012 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
1013 {
1014 uint32_t tickstart = 0U;
1015
1016 /* Process Locked */
1017 __HAL_LOCK(hcryp);
1018
1019 /* Change the CRYP state */
1020 hcryp->State = HAL_CRYP_STATE_BUSY;
1021
1022 /* Check if initialization phase has already been performed */
1023 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1024 {
1025 /* Set the key */
1026 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1027
1028 /* Set the CRYP peripheral in AES Key mode */
1029 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1030
1031 /* Enable CRYP */
1032 __HAL_CRYP_ENABLE(hcryp);
1033
1034 /* Get tick */
1035 tickstart = HAL_GetTick();
1036
1037 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
1038 {
1039 /* Check for the Timeout */
1040 if(Timeout != HAL_MAX_DELAY)
1041 {
1042 if((Timeout == 0U)||((HAL_GetTick() - tickstart ) > Timeout))
1043 {
1044 /* Change state */
1045 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1046
1047 /* Process Unlocked */
1048 __HAL_UNLOCK(hcryp);
1049
1050 return HAL_TIMEOUT;
1051 }
1052 }
1053 }
1054
1055 /* Reset the ALGOMODE bits*/
1056 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1057
1058 /* Set the CRYP peripheral in AES CBC decryption mode */
1059 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
1060
1061 /* Set the Initialization Vector */
1062 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1063
1064 /* Flush FIFO */
1065 __HAL_CRYP_FIFO_FLUSH(hcryp);
1066
1067 /* Enable CRYP */
1068 __HAL_CRYP_ENABLE(hcryp);
1069
1070 /* Set the phase */
1071 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1072 }
1073
1074 /* Write Plain Data and Get Cypher Data */
1075 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
1076 {
1077 return HAL_TIMEOUT;
1078 }
1079
1080 /* Change the CRYP state */
1081 hcryp->State = HAL_CRYP_STATE_READY;
1082
1083 /* Process Unlocked */
1084 __HAL_UNLOCK(hcryp);
1085
1086 /* Return function status */
1087 return HAL_OK;
1088 }
1089
1090 /**
1091 * @brief Initializes the CRYP peripheral in AES CTR decryption mode
1092 * then decrypted pCypherData. The cypher data are available in pPlainData
1093 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1094 * the configuration information for CRYP module
1095 * @param pCypherData: Pointer to the cyphertext buffer
1096 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1097 * @param pPlainData: Pointer to the plaintext buffer
1098 * @param Timeout: Specify Timeout value
1099 * @retval HAL status
1100 */
1101 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
1102 {
1103 /* Process Locked */
1104 __HAL_LOCK(hcryp);
1105
1106 /* Check if initialization phase has already been performed */
1107 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1108 {
1109 /* Change the CRYP state */
1110 hcryp->State = HAL_CRYP_STATE_BUSY;
1111
1112 /* Set the key */
1113 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1114
1115 /* Set the CRYP peripheral in AES CTR mode */
1116 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
1117
1118 /* Set the Initialization Vector */
1119 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1120
1121 /* Flush FIFO */
1122 __HAL_CRYP_FIFO_FLUSH(hcryp);
1123
1124 /* Enable CRYP */
1125 __HAL_CRYP_ENABLE(hcryp);
1126
1127 /* Set the phase */
1128 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1129 }
1130
1131 /* Write Plain Data and Get Cypher Data */
1132 if(CRYP_ProcessData(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
1133 {
1134 return HAL_TIMEOUT;
1135 }
1136
1137 /* Change the CRYP state */
1138 hcryp->State = HAL_CRYP_STATE_READY;
1139
1140 /* Process Unlocked */
1141 __HAL_UNLOCK(hcryp);
1142
1143 /* Return function status */
1144 return HAL_OK;
1145 }
1146
1147 /**
1148 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using Interrupt.
1149 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1150 * the configuration information for CRYP module
1151 * @param pPlainData: Pointer to the plaintext buffer
1152 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1153 * @param pCypherData: Pointer to the cyphertext buffer
1154 * @retval HAL status
1155 */
1156 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1157 {
1158 uint32_t inputaddr;
1159 uint32_t outputaddr;
1160
1161 if(hcryp->State == HAL_CRYP_STATE_READY)
1162 {
1163 /* Process Locked */
1164 __HAL_LOCK(hcryp);
1165
1166 hcryp->CrypInCount = Size;
1167 hcryp->pCrypInBuffPtr = pPlainData;
1168 hcryp->pCrypOutBuffPtr = pCypherData;
1169 hcryp->CrypOutCount = Size;
1170
1171 /* Change the CRYP state */
1172 hcryp->State = HAL_CRYP_STATE_BUSY;
1173
1174 /* Check if initialization phase has already been performed */
1175 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1176 {
1177 /* Set the key */
1178 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1179
1180 /* Set the CRYP peripheral in AES ECB mode */
1181 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB);
1182
1183 /* Flush FIFO */
1184 __HAL_CRYP_FIFO_FLUSH(hcryp);
1185
1186 /* Set the phase */
1187 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1188 }
1189
1190 /* Enable Interrupts */
1191 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1192
1193 /* Enable CRYP */
1194 __HAL_CRYP_ENABLE(hcryp);
1195
1196 /* Return function status */
1197 return HAL_OK;
1198 }
1199 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1200 {
1201 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1202 /* Write the Input block in the IN FIFO */
1203 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1204 inputaddr+=4U;
1205 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1206 inputaddr+=4U;
1207 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1208 inputaddr+=4U;
1209 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1210 hcryp->pCrypInBuffPtr += 16U;
1211 hcryp->CrypInCount -= 16U;
1212 if(hcryp->CrypInCount == 0U)
1213 {
1214 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1215 /* Call the Input data transfer complete callback */
1216 HAL_CRYP_InCpltCallback(hcryp);
1217 }
1218 }
1219 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1220 {
1221 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1222 /* Read the Output block from the Output FIFO */
1223 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1224 outputaddr+=4U;
1225 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1226 outputaddr+=4U;
1227 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1228 outputaddr+=4U;
1229 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1230 hcryp->pCrypOutBuffPtr += 16U;
1231 hcryp->CrypOutCount -= 16U;
1232 if(hcryp->CrypOutCount == 0U)
1233 {
1234 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1235 /* Process Locked */
1236 __HAL_UNLOCK(hcryp);
1237 /* Change the CRYP state */
1238 hcryp->State = HAL_CRYP_STATE_READY;
1239 /* Call Input transfer complete callback */
1240 HAL_CRYP_OutCpltCallback(hcryp);
1241 }
1242 }
1243
1244 /* Return function status */
1245 return HAL_OK;
1246 }
1247
1248 /**
1249 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using Interrupt.
1250 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1251 * the configuration information for CRYP module
1252 * @param pPlainData: Pointer to the plaintext buffer
1253 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1254 * @param pCypherData: Pointer to the cyphertext buffer
1255 * @retval HAL status
1256 */
1257 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1258 {
1259 uint32_t inputaddr;
1260 uint32_t outputaddr;
1261
1262 if(hcryp->State == HAL_CRYP_STATE_READY)
1263 {
1264 /* Process Locked */
1265 __HAL_LOCK(hcryp);
1266
1267 hcryp->CrypInCount = Size;
1268 hcryp->pCrypInBuffPtr = pPlainData;
1269 hcryp->pCrypOutBuffPtr = pCypherData;
1270 hcryp->CrypOutCount = Size;
1271
1272 /* Change the CRYP state */
1273 hcryp->State = HAL_CRYP_STATE_BUSY;
1274
1275 /* Check if initialization phase has already been performed */
1276 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1277 {
1278 /* Set the key */
1279 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1280
1281 /* Set the CRYP peripheral in AES CBC mode */
1282 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC);
1283
1284 /* Set the Initialization Vector */
1285 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1286
1287 /* Flush FIFO */
1288 __HAL_CRYP_FIFO_FLUSH(hcryp);
1289
1290 /* Set the phase */
1291 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1292 }
1293 /* Enable Interrupts */
1294 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1295
1296 /* Enable CRYP */
1297 __HAL_CRYP_ENABLE(hcryp);
1298
1299 /* Return function status */
1300 return HAL_OK;
1301 }
1302 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1303 {
1304 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1305 /* Write the Input block in the IN FIFO */
1306 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1307 inputaddr+=4U;
1308 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1309 inputaddr+=4U;
1310 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1311 inputaddr+=4U;
1312 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1313 hcryp->pCrypInBuffPtr += 16U;
1314 hcryp->CrypInCount -= 16U;
1315 if(hcryp->CrypInCount == 0U)
1316 {
1317 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1318 /* Call the Input data transfer complete callback */
1319 HAL_CRYP_InCpltCallback(hcryp);
1320 }
1321 }
1322 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1323 {
1324 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1325 /* Read the Output block from the Output FIFO */
1326 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1327 outputaddr+=4U;
1328 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1329 outputaddr+=4U;
1330 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1331 outputaddr+=4U;
1332 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1333 hcryp->pCrypOutBuffPtr += 16U;
1334 hcryp->CrypOutCount -= 16U;
1335 if(hcryp->CrypOutCount == 0U)
1336 {
1337 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1338 /* Process Locked */
1339 __HAL_UNLOCK(hcryp);
1340 /* Change the CRYP state */
1341 hcryp->State = HAL_CRYP_STATE_READY;
1342 /* Call Input transfer complete callback */
1343 HAL_CRYP_OutCpltCallback(hcryp);
1344 }
1345 }
1346
1347 /* Return function status */
1348 return HAL_OK;
1349 }
1350
1351 /**
1352 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using Interrupt.
1353 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1354 * the configuration information for CRYP module
1355 * @param pPlainData: Pointer to the plaintext buffer
1356 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1357 * @param pCypherData: Pointer to the cyphertext buffer
1358 * @retval HAL status
1359 */
1360 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1361 {
1362 uint32_t inputaddr;
1363 uint32_t outputaddr;
1364
1365 if(hcryp->State == HAL_CRYP_STATE_READY)
1366 {
1367 /* Process Locked */
1368 __HAL_LOCK(hcryp);
1369
1370 hcryp->CrypInCount = Size;
1371 hcryp->pCrypInBuffPtr = pPlainData;
1372 hcryp->pCrypOutBuffPtr = pCypherData;
1373 hcryp->CrypOutCount = Size;
1374
1375 /* Change the CRYP state */
1376 hcryp->State = HAL_CRYP_STATE_BUSY;
1377
1378 /* Check if initialization phase has already been performed */
1379 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1380 {
1381 /* Set the key */
1382 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1383
1384 /* Set the CRYP peripheral in AES CTR mode */
1385 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR);
1386
1387 /* Set the Initialization Vector */
1388 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1389
1390 /* Flush FIFO */
1391 __HAL_CRYP_FIFO_FLUSH(hcryp);
1392
1393 /* Set the phase */
1394 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1395 }
1396 /* Enable Interrupts */
1397 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1398
1399 /* Enable CRYP */
1400 __HAL_CRYP_ENABLE(hcryp);
1401
1402 /* Return function status */
1403 return HAL_OK;
1404 }
1405 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1406 {
1407 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1408 /* Write the Input block in the IN FIFO */
1409 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1410 inputaddr+=4U;
1411 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1412 inputaddr+=4U;
1413 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1414 inputaddr+=4U;
1415 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1416 hcryp->pCrypInBuffPtr += 16U;
1417 hcryp->CrypInCount -= 16U;
1418 if(hcryp->CrypInCount == 0U)
1419 {
1420 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1421 /* Call the Input data transfer complete callback */
1422 HAL_CRYP_InCpltCallback(hcryp);
1423 }
1424 }
1425 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1426 {
1427 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1428 /* Read the Output block from the Output FIFO */
1429 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1430 outputaddr+=4U;
1431 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1432 outputaddr+=4U;
1433 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1434 outputaddr+=4U;
1435 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1436 hcryp->pCrypOutBuffPtr += 16U;
1437 hcryp->CrypOutCount -= 16U;
1438 if(hcryp->CrypOutCount == 0U)
1439 {
1440 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1441 /* Process Unlocked */
1442 __HAL_UNLOCK(hcryp);
1443 /* Change the CRYP state */
1444 hcryp->State = HAL_CRYP_STATE_READY;
1445 /* Call Input transfer complete callback */
1446 HAL_CRYP_OutCpltCallback(hcryp);
1447 }
1448 }
1449
1450 /* Return function status */
1451 return HAL_OK;
1452 }
1453
1454
1455 /**
1456 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using Interrupt.
1457 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1458 * the configuration information for CRYP module
1459 * @param pCypherData: Pointer to the cyphertext buffer
1460 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1461 * @param pPlainData: Pointer to the plaintext buffer
1462 * @retval HAL status
1463 */
1464 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1465 {
1466 uint32_t tickstart = 0U;
1467
1468 uint32_t inputaddr;
1469 uint32_t outputaddr;
1470
1471 if(hcryp->State == HAL_CRYP_STATE_READY)
1472 {
1473 /* Process Locked */
1474 __HAL_LOCK(hcryp);
1475
1476 hcryp->CrypInCount = Size;
1477 hcryp->pCrypInBuffPtr = pCypherData;
1478 hcryp->pCrypOutBuffPtr = pPlainData;
1479 hcryp->CrypOutCount = Size;
1480
1481 /* Change the CRYP state */
1482 hcryp->State = HAL_CRYP_STATE_BUSY;
1483
1484 /* Check if initialization phase has already been performed */
1485 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1486 {
1487 /* Set the key */
1488 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1489
1490 /* Set the CRYP peripheral in AES Key mode */
1491 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1492 /* Enable CRYP */
1493 __HAL_CRYP_ENABLE(hcryp);
1494
1495 /* Get tick */
1496 tickstart = HAL_GetTick();
1497
1498 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
1499 {
1500 /* Check for the Timeout */
1501 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1502 {
1503 /* Change state */
1504 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1505
1506 /* Process Unlocked */
1507 __HAL_UNLOCK(hcryp);
1508
1509 return HAL_TIMEOUT;
1510 }
1511 }
1512
1513 /* Reset the ALGOMODE bits*/
1514 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1515
1516 /* Set the CRYP peripheral in AES ECB decryption mode */
1517 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
1518
1519 /* Flush FIFO */
1520 __HAL_CRYP_FIFO_FLUSH(hcryp);
1521
1522 /* Set the phase */
1523 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1524 }
1525
1526 /* Enable Interrupts */
1527 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1528
1529 /* Enable CRYP */
1530 __HAL_CRYP_ENABLE(hcryp);
1531
1532 /* Return function status */
1533 return HAL_OK;
1534 }
1535 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1536 {
1537 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1538 /* Write the Input block in the IN FIFO */
1539 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1540 inputaddr+=4U;
1541 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1542 inputaddr+=4U;
1543 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1544 inputaddr+=4U;
1545 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1546 hcryp->pCrypInBuffPtr += 16U;
1547 hcryp->CrypInCount -= 16U;
1548 if(hcryp->CrypInCount == 0U)
1549 {
1550 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1551 /* Call the Input data transfer complete callback */
1552 HAL_CRYP_InCpltCallback(hcryp);
1553 }
1554 }
1555 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1556 {
1557 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1558 /* Read the Output block from the Output FIFO */
1559 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1560 outputaddr+=4U;
1561 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1562 outputaddr+=4U;
1563 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1564 outputaddr+=4U;
1565 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1566 hcryp->pCrypOutBuffPtr += 16U;
1567 hcryp->CrypOutCount -= 16U;
1568 if(hcryp->CrypOutCount == 0U)
1569 {
1570 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1571 /* Process Unlocked */
1572 __HAL_UNLOCK(hcryp);
1573 /* Change the CRYP state */
1574 hcryp->State = HAL_CRYP_STATE_READY;
1575 /* Call Input transfer complete callback */
1576 HAL_CRYP_OutCpltCallback(hcryp);
1577 }
1578 }
1579
1580 /* Return function status */
1581 return HAL_OK;
1582 }
1583
1584 /**
1585 * @brief Initializes the CRYP peripheral in AES CBC decryption mode using IT.
1586 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1587 * the configuration information for CRYP module
1588 * @param pCypherData: Pointer to the cyphertext buffer
1589 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1590 * @param pPlainData: Pointer to the plaintext buffer
1591 * @retval HAL status
1592 */
1593 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1594 {
1595
1596 uint32_t tickstart = 0U;
1597 uint32_t inputaddr;
1598 uint32_t outputaddr;
1599
1600 if(hcryp->State == HAL_CRYP_STATE_READY)
1601 {
1602 /* Process Locked */
1603 __HAL_LOCK(hcryp);
1604
1605 /* Get the buffer addresses and sizes */
1606 hcryp->CrypInCount = Size;
1607 hcryp->pCrypInBuffPtr = pCypherData;
1608 hcryp->pCrypOutBuffPtr = pPlainData;
1609 hcryp->CrypOutCount = Size;
1610
1611 /* Change the CRYP state */
1612 hcryp->State = HAL_CRYP_STATE_BUSY;
1613
1614 /* Check if initialization phase has already been performed */
1615 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1616 {
1617 /* Set the key */
1618 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1619
1620 /* Set the CRYP peripheral in AES Key mode */
1621 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
1622
1623 /* Enable CRYP */
1624 __HAL_CRYP_ENABLE(hcryp);
1625
1626 /* Get tick */
1627 tickstart = HAL_GetTick();
1628
1629 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
1630 {
1631 /* Check for the Timeout */
1632 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
1633 {
1634 /* Change state */
1635 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
1636
1637 /* Process Unlocked */
1638 __HAL_UNLOCK(hcryp);
1639
1640 return HAL_TIMEOUT;
1641 }
1642 }
1643
1644 /* Reset the ALGOMODE bits*/
1645 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
1646
1647 /* Set the CRYP peripheral in AES CBC decryption mode */
1648 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
1649
1650 /* Set the Initialization Vector */
1651 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1652
1653 /* Flush FIFO */
1654 __HAL_CRYP_FIFO_FLUSH(hcryp);
1655
1656 /* Enable CRYP */
1657 __HAL_CRYP_ENABLE(hcryp);
1658
1659 /* Set the phase */
1660 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1661 }
1662
1663 /* Enable Interrupts */
1664 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1665
1666 /* Enable CRYP */
1667 __HAL_CRYP_ENABLE(hcryp);
1668
1669 /* Return function status */
1670 return HAL_OK;
1671 }
1672 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1673 {
1674 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1675 /* Write the Input block in the IN FIFO */
1676 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1677 inputaddr+=4U;
1678 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1679 inputaddr+=4U;
1680 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1681 inputaddr+=4U;
1682 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1683 hcryp->pCrypInBuffPtr += 16U;
1684 hcryp->CrypInCount -= 16U;
1685 if(hcryp->CrypInCount == 0U)
1686 {
1687 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1688 /* Call the Input data transfer complete callback */
1689 HAL_CRYP_InCpltCallback(hcryp);
1690 }
1691 }
1692 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1693 {
1694 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1695 /* Read the Output block from the Output FIFO */
1696 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1697 outputaddr+=4U;
1698 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1699 outputaddr+=4U;
1700 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1701 outputaddr+=4U;
1702 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1703 hcryp->pCrypOutBuffPtr += 16U;
1704 hcryp->CrypOutCount -= 16U;
1705 if(hcryp->CrypOutCount == 0U)
1706 {
1707 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1708 /* Process Unlocked */
1709 __HAL_UNLOCK(hcryp);
1710 /* Change the CRYP state */
1711 hcryp->State = HAL_CRYP_STATE_READY;
1712 /* Call Input transfer complete callback */
1713 HAL_CRYP_OutCpltCallback(hcryp);
1714 }
1715 }
1716
1717 /* Return function status */
1718 return HAL_OK;
1719 }
1720
1721 /**
1722 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using Interrupt.
1723 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1724 * the configuration information for CRYP module
1725 * @param pCypherData: Pointer to the cyphertext buffer
1726 * @param Size: Length of the plaintext buffer, must be a multiple of 16
1727 * @param pPlainData: Pointer to the plaintext buffer
1728 * @retval HAL status
1729 */
1730 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
1731 {
1732 uint32_t inputaddr;
1733 uint32_t outputaddr;
1734
1735 if(hcryp->State == HAL_CRYP_STATE_READY)
1736 {
1737 /* Process Locked */
1738 __HAL_LOCK(hcryp);
1739
1740 /* Get the buffer addresses and sizes */
1741 hcryp->CrypInCount = Size;
1742 hcryp->pCrypInBuffPtr = pCypherData;
1743 hcryp->pCrypOutBuffPtr = pPlainData;
1744 hcryp->CrypOutCount = Size;
1745
1746 /* Change the CRYP state */
1747 hcryp->State = HAL_CRYP_STATE_BUSY;
1748
1749 /* Check if initialization phase has already been performed */
1750 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1751 {
1752 /* Set the key */
1753 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1754
1755 /* Set the CRYP peripheral in AES CTR mode */
1756 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
1757
1758 /* Set the Initialization Vector */
1759 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1760
1761 /* Flush FIFO */
1762 __HAL_CRYP_FIFO_FLUSH(hcryp);
1763
1764 /* Set the phase */
1765 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1766 }
1767
1768 /* Enable Interrupts */
1769 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
1770
1771 /* Enable CRYP */
1772 __HAL_CRYP_ENABLE(hcryp);
1773
1774 /* Return function status */
1775 return HAL_OK;
1776 }
1777 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
1778 {
1779 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
1780 /* Write the Input block in the IN FIFO */
1781 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1782 inputaddr+=4U;
1783 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1784 inputaddr+=4U;
1785 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1786 inputaddr+=4U;
1787 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
1788 hcryp->pCrypInBuffPtr += 16U;
1789 hcryp->CrypInCount -= 16U;
1790 if(hcryp->CrypInCount == 0U)
1791 {
1792 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
1793 /* Call the Input data transfer complete callback */
1794 HAL_CRYP_InCpltCallback(hcryp);
1795 }
1796 }
1797 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
1798 {
1799 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
1800 /* Read the Output block from the Output FIFO */
1801 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1802 outputaddr+=4U;
1803 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1804 outputaddr+=4U;
1805 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1806 outputaddr+=4U;
1807 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
1808 hcryp->pCrypOutBuffPtr += 16U;
1809 hcryp->CrypOutCount -= 16U;
1810 if(hcryp->CrypOutCount == 0U)
1811 {
1812 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
1813 /* Process Unlocked */
1814 __HAL_UNLOCK(hcryp);
1815 /* Change the CRYP state */
1816 hcryp->State = HAL_CRYP_STATE_READY;
1817 /* Call Input transfer complete callback */
1818 HAL_CRYP_OutCpltCallback(hcryp);
1819 }
1820 }
1821
1822 /* Return function status */
1823 return HAL_OK;
1824 }
1825
1826 /**
1827 * @brief Initializes the CRYP peripheral in AES ECB encryption mode using DMA.
1828 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1829 * the configuration information for CRYP module
1830 * @param pPlainData: Pointer to the plaintext buffer
1831 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
1832 * @param pCypherData: Pointer to the cyphertext buffer
1833 * @retval HAL status
1834 */
1835 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1836 {
1837 uint32_t inputaddr;
1838 uint32_t outputaddr;
1839
1840 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1841 {
1842 /* Process Locked */
1843 __HAL_LOCK(hcryp);
1844
1845 inputaddr = (uint32_t)pPlainData;
1846 outputaddr = (uint32_t)pCypherData;
1847
1848 /* Change the CRYP state */
1849 hcryp->State = HAL_CRYP_STATE_BUSY;
1850
1851 /* Check if initialization phase has already been performed */
1852 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1853 {
1854 /* Set the key */
1855 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1856
1857 /* Set the CRYP peripheral in AES ECB mode */
1858 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB);
1859
1860 /* Flush FIFO */
1861 __HAL_CRYP_FIFO_FLUSH(hcryp);
1862
1863 /* Set the phase */
1864 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1865 }
1866 /* Set the input and output addresses and start DMA transfer */
1867 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1868
1869 /* Process Unlocked */
1870 __HAL_UNLOCK(hcryp);
1871
1872 /* Return function status */
1873 return HAL_OK;
1874 }
1875 else
1876 {
1877 return HAL_ERROR;
1878 }
1879 }
1880
1881 /**
1882 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
1883 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1884 * the configuration information for CRYP module
1885 * @param pPlainData: Pointer to the plaintext buffer
1886 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1887 * @param pCypherData: Pointer to the cyphertext buffer
1888 * @retval HAL status
1889 */
1890 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1891 {
1892 uint32_t inputaddr;
1893 uint32_t outputaddr;
1894
1895 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1896 {
1897 /* Process Locked */
1898 __HAL_LOCK(hcryp);
1899
1900 inputaddr = (uint32_t)pPlainData;
1901 outputaddr = (uint32_t)pCypherData;
1902
1903 /* Change the CRYP state */
1904 hcryp->State = HAL_CRYP_STATE_BUSY;
1905
1906 /* Check if initialization phase has already been performed */
1907 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1908 {
1909 /* Set the key */
1910 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1911
1912 /* Set the CRYP peripheral in AES ECB mode */
1913 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC);
1914
1915 /* Set the Initialization Vector */
1916 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1917
1918 /* Flush FIFO */
1919 __HAL_CRYP_FIFO_FLUSH(hcryp);
1920
1921 /* Set the phase */
1922 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1923 }
1924 /* Set the input and output addresses and start DMA transfer */
1925 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1926
1927 /* Process Unlocked */
1928 __HAL_UNLOCK(hcryp);
1929
1930 /* Return function status */
1931 return HAL_OK;
1932 }
1933 else
1934 {
1935 return HAL_ERROR;
1936 }
1937 }
1938
1939 /**
1940 * @brief Initializes the CRYP peripheral in AES CTR encryption mode using DMA.
1941 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
1942 * the configuration information for CRYP module
1943 * @param pPlainData: Pointer to the plaintext buffer
1944 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
1945 * @param pCypherData: Pointer to the cyphertext buffer
1946 * @retval HAL status
1947 */
1948 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
1949 {
1950 uint32_t inputaddr;
1951 uint32_t outputaddr;
1952
1953 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
1954 {
1955 /* Process Locked */
1956 __HAL_LOCK(hcryp);
1957
1958 inputaddr = (uint32_t)pPlainData;
1959 outputaddr = (uint32_t)pCypherData;
1960
1961 /* Change the CRYP state */
1962 hcryp->State = HAL_CRYP_STATE_BUSY;
1963
1964 /* Check if initialization phase has already been performed */
1965 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
1966 {
1967 /* Set the key */
1968 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
1969
1970 /* Set the CRYP peripheral in AES ECB mode */
1971 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR);
1972
1973 /* Set the Initialization Vector */
1974 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
1975
1976 /* Flush FIFO */
1977 __HAL_CRYP_FIFO_FLUSH(hcryp);
1978
1979 /* Set the phase */
1980 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
1981 }
1982
1983 /* Set the input and output addresses and start DMA transfer */
1984 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
1985
1986 /* Process Unlocked */
1987 __HAL_UNLOCK(hcryp);
1988
1989 /* Return function status */
1990 return HAL_OK;
1991 }
1992 else
1993 {
1994 return HAL_ERROR;
1995 }
1996 }
1997
1998 /**
1999 * @brief Initializes the CRYP peripheral in AES ECB decryption mode using DMA.
2000 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2001 * the configuration information for CRYP module
2002 * @param pCypherData: Pointer to the cyphertext buffer
2003 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
2004 * @param pPlainData: Pointer to the plaintext buffer
2005 * @retval HAL status
2006 */
2007 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2008 {
2009 uint32_t tickstart = 0U;
2010 uint32_t inputaddr;
2011 uint32_t outputaddr;
2012
2013 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2014 {
2015 /* Process Locked */
2016 __HAL_LOCK(hcryp);
2017
2018 inputaddr = (uint32_t)pCypherData;
2019 outputaddr = (uint32_t)pPlainData;
2020
2021 /* Change the CRYP state */
2022 hcryp->State = HAL_CRYP_STATE_BUSY;
2023
2024 /* Check if initialization phase has already been performed */
2025 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2026 {
2027 /* Set the key */
2028 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2029
2030 /* Set the CRYP peripheral in AES Key mode */
2031 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
2032
2033 /* Enable CRYP */
2034 __HAL_CRYP_ENABLE(hcryp);
2035
2036 /* Get tick */
2037 tickstart = HAL_GetTick();
2038
2039 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
2040 {
2041 /* Check for the Timeout */
2042 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
2043 {
2044 /* Change state */
2045 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
2046
2047 /* Process Unlocked */
2048 __HAL_UNLOCK(hcryp);
2049
2050 return HAL_TIMEOUT;
2051 }
2052 }
2053
2054 /* Reset the ALGOMODE bits*/
2055 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
2056
2057 /* Set the CRYP peripheral in AES ECB decryption mode */
2058 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_ECB | CRYP_CR_ALGODIR);
2059
2060 /* Flush FIFO */
2061 __HAL_CRYP_FIFO_FLUSH(hcryp);
2062
2063 /* Set the phase */
2064 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2065 }
2066
2067 /* Set the input and output addresses and start DMA transfer */
2068 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2069
2070 /* Process Unlocked */
2071 __HAL_UNLOCK(hcryp);
2072
2073 /* Return function status */
2074 return HAL_OK;
2075 }
2076 else
2077 {
2078 return HAL_ERROR;
2079 }
2080 }
2081
2082 /**
2083 * @brief Initializes the CRYP peripheral in AES CBC encryption mode using DMA.
2084 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2085 * the configuration information for CRYP module
2086 * @param pCypherData: Pointer to the cyphertext buffer
2087 * @param Size: Length of the plaintext buffer, must be a multiple of 16 bytes
2088 * @param pPlainData: Pointer to the plaintext buffer
2089 * @retval HAL status
2090 */
2091 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2092 {
2093 uint32_t tickstart = 0U;
2094 uint32_t inputaddr;
2095 uint32_t outputaddr;
2096
2097 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2098 {
2099 /* Process Locked */
2100 __HAL_LOCK(hcryp);
2101
2102 inputaddr = (uint32_t)pCypherData;
2103 outputaddr = (uint32_t)pPlainData;
2104
2105 /* Change the CRYP state */
2106 hcryp->State = HAL_CRYP_STATE_BUSY;
2107
2108 /* Check if initialization phase has already been performed */
2109 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2110 {
2111 /* Set the key */
2112 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2113
2114 /* Set the CRYP peripheral in AES Key mode */
2115 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_KEY | CRYP_CR_ALGODIR);
2116
2117 /* Enable CRYP */
2118 __HAL_CRYP_ENABLE(hcryp);
2119
2120 /* Get tick */
2121 tickstart = HAL_GetTick();
2122
2123 while(HAL_IS_BIT_SET(hcryp->Instance->SR, CRYP_FLAG_BUSY))
2124 {
2125 /* Check for the Timeout */
2126 if((HAL_GetTick() - tickstart ) > CRYP_TIMEOUT_VALUE)
2127 {
2128 /* Change state */
2129 hcryp->State = HAL_CRYP_STATE_TIMEOUT;
2130
2131 /* Process Unlocked */
2132 __HAL_UNLOCK(hcryp);
2133
2134 return HAL_TIMEOUT;
2135 }
2136 }
2137
2138 /* Reset the ALGOMODE bits*/
2139 CRYP->CR &= (uint32_t)(~CRYP_CR_ALGOMODE);
2140
2141 /* Set the CRYP peripheral in AES CBC decryption mode */
2142 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CBC | CRYP_CR_ALGODIR);
2143
2144 /* Set the Initialization Vector */
2145 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
2146
2147 /* Flush FIFO */
2148 __HAL_CRYP_FIFO_FLUSH(hcryp);
2149
2150 /* Set the phase */
2151 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2152 }
2153
2154 /* Set the input and output addresses and start DMA transfer */
2155 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2156
2157 /* Process Unlocked */
2158 __HAL_UNLOCK(hcryp);
2159
2160 /* Return function status */
2161 return HAL_OK;
2162 }
2163 else
2164 {
2165 return HAL_ERROR;
2166 }
2167 }
2168
2169 /**
2170 * @brief Initializes the CRYP peripheral in AES CTR decryption mode using DMA.
2171 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2172 * the configuration information for CRYP module
2173 * @param pCypherData: Pointer to the cyphertext buffer
2174 * @param Size: Length of the plaintext buffer, must be a multiple of 16
2175 * @param pPlainData: Pointer to the plaintext buffer
2176 * @retval HAL status
2177 */
2178 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2179 {
2180 uint32_t inputaddr;
2181 uint32_t outputaddr;
2182
2183 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2184 {
2185 /* Process Locked */
2186 __HAL_LOCK(hcryp);
2187
2188 inputaddr = (uint32_t)pCypherData;
2189 outputaddr = (uint32_t)pPlainData;
2190
2191 /* Change the CRYP state */
2192 hcryp->State = HAL_CRYP_STATE_BUSY;
2193
2194 /* Check if initialization phase has already been performed */
2195 if(hcryp->Phase == HAL_CRYP_PHASE_READY)
2196 {
2197 /* Set the key */
2198 CRYP_SetKey(hcryp, hcryp->Init.pKey, hcryp->Init.KeySize);
2199
2200 /* Set the CRYP peripheral in AES CTR mode */
2201 __HAL_CRYP_SET_MODE(hcryp, CRYP_CR_ALGOMODE_AES_CTR | CRYP_CR_ALGODIR);
2202
2203 /* Set the Initialization Vector */
2204 CRYP_SetInitVector(hcryp, hcryp->Init.pInitVect, CRYP_KEYSIZE_128B);
2205
2206 /* Flush FIFO */
2207 __HAL_CRYP_FIFO_FLUSH(hcryp);
2208
2209 /* Set the phase */
2210 hcryp->Phase = HAL_CRYP_PHASE_PROCESS;
2211 }
2212
2213 /* Set the input and output addresses and start DMA transfer */
2214 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2215
2216 /* Process Unlocked */
2217 __HAL_UNLOCK(hcryp);
2218
2219 /* Return function status */
2220 return HAL_OK;
2221 }
2222 else
2223 {
2224 return HAL_ERROR;
2225 }
2226 }
2227
2228
2229 /**
2230 * @}
2231 */
2232
2233 /** @defgroup CRYP_Exported_Functions_Group3 DES processing functions
2234 * @brief processing functions.
2235 *
2236 @verbatim
2237 ==============================================================================
2238 ##### DES processing functions #####
2239 ==============================================================================
2240 [..] This section provides functions allowing to:
2241 (+) Encrypt plaintext using DES using ECB or CBC chaining modes
2242 (+) Decrypt cyphertext using ECB or CBC chaining modes
2243 [..] Three processing functions are available:
2244 (+) Polling mode
2245 (+) Interrupt mode
2246 (+) DMA mode
2247
2248 @endverbatim
2249 * @{
2250 */
2251
2252 /**
2253 * @brief Initializes the CRYP peripheral in DES ECB encryption mode.
2254 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2255 * the configuration information for CRYP module
2256 * @param pPlainData: Pointer to the plaintext buffer
2257 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2258 * @param pCypherData: Pointer to the cyphertext buffer
2259 * @param Timeout: Specify Timeout value
2260 * @retval HAL status
2261 */
2262 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2263 {
2264 /* Process Locked */
2265 __HAL_LOCK(hcryp);
2266
2267 /* Change the CRYP state */
2268 hcryp->State = HAL_CRYP_STATE_BUSY;
2269
2270 /* Set CRYP peripheral in DES ECB encryption mode */
2271 CRYP_SetDESECBMode(hcryp, 0U);
2272
2273 /* Enable CRYP */
2274 __HAL_CRYP_ENABLE(hcryp);
2275
2276 /* Write Plain Data and Get Cypher Data */
2277 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2278 {
2279 return HAL_TIMEOUT;
2280 }
2281
2282 /* Change the CRYP state */
2283 hcryp->State = HAL_CRYP_STATE_READY;
2284
2285 /* Process Unlocked */
2286 __HAL_UNLOCK(hcryp);
2287
2288 /* Return function status */
2289 return HAL_OK;
2290 }
2291
2292 /**
2293 * @brief Initializes the CRYP peripheral in DES ECB decryption mode.
2294 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2295 * the configuration information for CRYP module
2296 * @param pCypherData: Pointer to the cyphertext buffer
2297 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2298 * @param pPlainData: Pointer to the plaintext buffer
2299 * @param Timeout: Specify Timeout value
2300 * @retval HAL status
2301 */
2302 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
2303 {
2304 /* Process Locked */
2305 __HAL_LOCK(hcryp);
2306
2307 /* Change the CRYP state */
2308 hcryp->State = HAL_CRYP_STATE_BUSY;
2309
2310 /* Set CRYP peripheral in DES ECB decryption mode */
2311 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2312
2313 /* Enable CRYP */
2314 __HAL_CRYP_ENABLE(hcryp);
2315
2316 /* Write Plain Data and Get Cypher Data */
2317 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
2318 {
2319 return HAL_TIMEOUT;
2320 }
2321
2322 /* Change the CRYP state */
2323 hcryp->State = HAL_CRYP_STATE_READY;
2324
2325 /* Process Unlocked */
2326 __HAL_UNLOCK(hcryp);
2327
2328 /* Return function status */
2329 return HAL_OK;
2330 }
2331
2332 /**
2333 * @brief Initializes the CRYP peripheral in DES CBC encryption mode.
2334 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2335 * the configuration information for CRYP module
2336 * @param pPlainData: Pointer to the plaintext buffer
2337 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2338 * @param pCypherData: Pointer to the cyphertext buffer
2339 * @param Timeout: Specify Timeout value
2340 * @retval HAL status
2341 */
2342 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2343 {
2344 /* Process Locked */
2345 __HAL_LOCK(hcryp);
2346
2347 /* Change the CRYP state */
2348 hcryp->State = HAL_CRYP_STATE_BUSY;
2349
2350 /* Set CRYP peripheral in DES CBC encryption mode */
2351 CRYP_SetDESCBCMode(hcryp, 0U);
2352
2353 /* Enable CRYP */
2354 __HAL_CRYP_ENABLE(hcryp);
2355
2356 /* Write Plain Data and Get Cypher Data */
2357 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2358 {
2359 return HAL_TIMEOUT;
2360 }
2361
2362 /* Change the CRYP state */
2363 hcryp->State = HAL_CRYP_STATE_READY;
2364
2365 /* Process Unlocked */
2366 __HAL_UNLOCK(hcryp);
2367
2368 /* Return function status */
2369 return HAL_OK;
2370 }
2371
2372 /**
2373 * @brief Initializes the CRYP peripheral in DES ECB decryption mode.
2374 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2375 * the configuration information for CRYP module
2376 * @param pCypherData: Pointer to the cyphertext buffer
2377 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2378 * @param pPlainData: Pointer to the plaintext buffer
2379 * @param Timeout: Specify Timeout value
2380 * @retval HAL status
2381 */
2382 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
2383 {
2384 /* Process Locked */
2385 __HAL_LOCK(hcryp);
2386
2387 /* Change the CRYP state */
2388 hcryp->State = HAL_CRYP_STATE_BUSY;
2389
2390 /* Set CRYP peripheral in DES CBC decryption mode */
2391 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2392
2393 /* Enable CRYP */
2394 __HAL_CRYP_ENABLE(hcryp);
2395
2396 /* Write Plain Data and Get Cypher Data */
2397 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
2398 {
2399 return HAL_TIMEOUT;
2400 }
2401
2402 /* Change the CRYP state */
2403 hcryp->State = HAL_CRYP_STATE_READY;
2404
2405 /* Process Unlocked */
2406 __HAL_UNLOCK(hcryp);
2407
2408 /* Return function status */
2409 return HAL_OK;
2410 }
2411
2412 /**
2413 * @brief Initializes the CRYP peripheral in DES ECB encryption mode using IT.
2414 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2415 * the configuration information for CRYP module
2416 * @param pPlainData: Pointer to the plaintext buffer
2417 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2418 * @param pCypherData: Pointer to the cyphertext buffer
2419 * @retval HAL status
2420 */
2421 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2422 {
2423 uint32_t inputaddr;
2424 uint32_t outputaddr;
2425
2426 if(hcryp->State == HAL_CRYP_STATE_READY)
2427 {
2428 /* Process Locked */
2429 __HAL_LOCK(hcryp);
2430
2431 hcryp->CrypInCount = Size;
2432 hcryp->pCrypInBuffPtr = pPlainData;
2433 hcryp->pCrypOutBuffPtr = pCypherData;
2434 hcryp->CrypOutCount = Size;
2435
2436 /* Change the CRYP state */
2437 hcryp->State = HAL_CRYP_STATE_BUSY;
2438
2439 /* Set CRYP peripheral in DES ECB encryption mode */
2440 CRYP_SetDESECBMode(hcryp, 0U);
2441
2442 /* Enable Interrupts */
2443 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2444
2445 /* Enable CRYP */
2446 __HAL_CRYP_ENABLE(hcryp);
2447
2448 /* Return function status */
2449 return HAL_OK;
2450 }
2451 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2452 {
2453 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2454 /* Write the Input block in the IN FIFO */
2455 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2456 inputaddr+=4U;
2457 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2458
2459 hcryp->pCrypInBuffPtr += 8U;
2460 hcryp->CrypInCount -= 8U;
2461 if(hcryp->CrypInCount == 0U)
2462 {
2463 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2464 /* Call the Input data transfer complete callback */
2465 HAL_CRYP_InCpltCallback(hcryp);
2466 }
2467 }
2468 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2469 {
2470 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2471 /* Read the Output block from the Output FIFO */
2472 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2473 outputaddr+=4U;
2474 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2475
2476 hcryp->pCrypOutBuffPtr += 8U;
2477 hcryp->CrypOutCount -= 8U;
2478 if(hcryp->CrypOutCount == 0U)
2479 {
2480 /* Disable IT */
2481 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2482 /* Disable CRYP */
2483 __HAL_CRYP_DISABLE(hcryp);
2484 /* Process Unlocked */
2485 __HAL_UNLOCK(hcryp);
2486 /* Change the CRYP state */
2487 hcryp->State = HAL_CRYP_STATE_READY;
2488 /* Call Input transfer complete callback */
2489 HAL_CRYP_OutCpltCallback(hcryp);
2490 }
2491 }
2492
2493 /* Return function status */
2494 return HAL_OK;
2495 }
2496
2497 /**
2498 * @brief Initializes the CRYP peripheral in DES CBC encryption mode using interrupt.
2499 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2500 * the configuration information for CRYP module
2501 * @param pPlainData: Pointer to the plaintext buffer
2502 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2503 * @param pCypherData: Pointer to the cyphertext buffer
2504 * @retval HAL status
2505 */
2506 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2507 {
2508 uint32_t inputaddr;
2509 uint32_t outputaddr;
2510
2511 if(hcryp->State == HAL_CRYP_STATE_READY)
2512 {
2513 /* Process Locked */
2514 __HAL_LOCK(hcryp);
2515
2516 hcryp->CrypInCount = Size;
2517 hcryp->pCrypInBuffPtr = pPlainData;
2518 hcryp->pCrypOutBuffPtr = pCypherData;
2519 hcryp->CrypOutCount = Size;
2520
2521 /* Change the CRYP state */
2522 hcryp->State = HAL_CRYP_STATE_BUSY;
2523
2524 /* Set CRYP peripheral in DES CBC encryption mode */
2525 CRYP_SetDESCBCMode(hcryp, 0U);
2526
2527 /* Enable Interrupts */
2528 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2529
2530 /* Enable CRYP */
2531 __HAL_CRYP_ENABLE(hcryp);
2532
2533 /* Return function status */
2534 return HAL_OK;
2535 }
2536
2537 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2538 {
2539 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2540 /* Write the Input block in the IN FIFO */
2541 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2542 inputaddr+=4U;
2543 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2544
2545 hcryp->pCrypInBuffPtr += 8U;
2546 hcryp->CrypInCount -= 8U;
2547 if(hcryp->CrypInCount == 0U)
2548 {
2549 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2550 /* Call the Input data transfer complete callback */
2551 HAL_CRYP_InCpltCallback(hcryp);
2552 }
2553 }
2554 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2555 {
2556 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2557 /* Read the Output block from the Output FIFO */
2558 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2559 outputaddr+=4U;
2560 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2561
2562 hcryp->pCrypOutBuffPtr += 8U;
2563 hcryp->CrypOutCount -= 8U;
2564 if(hcryp->CrypOutCount == 0U)
2565 {
2566 /* Disable IT */
2567 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2568 /* Disable CRYP */
2569 __HAL_CRYP_DISABLE(hcryp);
2570 /* Process Unlocked */
2571 __HAL_UNLOCK(hcryp);
2572 /* Change the CRYP state */
2573 hcryp->State = HAL_CRYP_STATE_READY;
2574 /* Call Input transfer complete callback */
2575 HAL_CRYP_OutCpltCallback(hcryp);
2576 }
2577 }
2578
2579 /* Return function status */
2580 return HAL_OK;
2581 }
2582
2583 /**
2584 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using IT.
2585 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2586 * the configuration information for CRYP module
2587 * @param pPlainData: Pointer to the plaintext buffer
2588 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2589 * @param pCypherData: Pointer to the cyphertext buffer
2590 * @retval HAL status
2591 */
2592 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2593 {
2594 uint32_t inputaddr;
2595 uint32_t outputaddr;
2596
2597 if(hcryp->State == HAL_CRYP_STATE_READY)
2598 {
2599 /* Process Locked */
2600 __HAL_LOCK(hcryp);
2601
2602 hcryp->CrypInCount = Size;
2603 hcryp->pCrypInBuffPtr = pCypherData;
2604 hcryp->pCrypOutBuffPtr = pPlainData;
2605 hcryp->CrypOutCount = Size;
2606
2607 /* Change the CRYP state */
2608 hcryp->State = HAL_CRYP_STATE_BUSY;
2609
2610 /* Set CRYP peripheral in DES ECB decryption mode */
2611 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2612
2613 /* Enable Interrupts */
2614 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2615
2616 /* Enable CRYP */
2617 __HAL_CRYP_ENABLE(hcryp);
2618
2619 /* Return function status */
2620 return HAL_OK;
2621 }
2622 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2623 {
2624 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2625 /* Write the Input block in the IN FIFO */
2626 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2627 inputaddr+=4U;
2628 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2629
2630 hcryp->pCrypInBuffPtr += 8U;
2631 hcryp->CrypInCount -= 8U;
2632 if(hcryp->CrypInCount == 0U)
2633 {
2634 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2635 /* Call the Input data transfer complete callback */
2636 HAL_CRYP_InCpltCallback(hcryp);
2637 }
2638 }
2639 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2640 {
2641 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2642 /* Read the Output block from the Output FIFO */
2643 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2644 outputaddr+=4U;
2645 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2646
2647 hcryp->pCrypOutBuffPtr += 8U;
2648 hcryp->CrypOutCount -= 8U;
2649 if(hcryp->CrypOutCount == 0U)
2650 {
2651 /* Disable IT */
2652 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2653 /* Disable CRYP */
2654 __HAL_CRYP_DISABLE(hcryp);
2655 /* Process Unlocked */
2656 __HAL_UNLOCK(hcryp);
2657 /* Change the CRYP state */
2658 hcryp->State = HAL_CRYP_STATE_READY;
2659 /* Call Input transfer complete callback */
2660 HAL_CRYP_OutCpltCallback(hcryp);
2661 }
2662 }
2663
2664 /* Return function status */
2665 return HAL_OK;
2666 }
2667
2668 /**
2669 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using interrupt.
2670 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2671 * the configuration information for CRYP module
2672 * @param pPlainData: Pointer to the plaintext buffer
2673 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2674 * @param pCypherData: Pointer to the cyphertext buffer
2675 * @retval HAL status
2676 */
2677 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2678 {
2679 uint32_t inputaddr;
2680 uint32_t outputaddr;
2681
2682 if(hcryp->State == HAL_CRYP_STATE_READY)
2683 {
2684 /* Process Locked */
2685 __HAL_LOCK(hcryp);
2686
2687 hcryp->CrypInCount = Size;
2688 hcryp->pCrypInBuffPtr = pCypherData;
2689 hcryp->pCrypOutBuffPtr = pPlainData;
2690 hcryp->CrypOutCount = Size;
2691
2692 /* Change the CRYP state */
2693 hcryp->State = HAL_CRYP_STATE_BUSY;
2694
2695 /* Set CRYP peripheral in DES CBC decryption mode */
2696 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2697
2698 /* Enable Interrupts */
2699 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
2700
2701 /* Enable CRYP */
2702 __HAL_CRYP_ENABLE(hcryp);
2703
2704 /* Return function status */
2705 return HAL_OK;
2706 }
2707 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
2708 {
2709 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
2710 /* Write the Input block in the IN FIFO */
2711 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2712 inputaddr+=4U;
2713 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
2714
2715 hcryp->pCrypInBuffPtr += 8U;
2716 hcryp->CrypInCount -= 8U;
2717 if(hcryp->CrypInCount == 0U)
2718 {
2719 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
2720 /* Call the Input data transfer complete callback */
2721 HAL_CRYP_InCpltCallback(hcryp);
2722 }
2723 }
2724 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
2725 {
2726 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
2727 /* Read the Output block from the Output FIFO */
2728 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2729 outputaddr+=4U;
2730 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
2731
2732 hcryp->pCrypOutBuffPtr += 8U;
2733 hcryp->CrypOutCount -= 8U;
2734 if(hcryp->CrypOutCount == 0U)
2735 {
2736 /* Disable IT */
2737 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
2738 /* Disable CRYP */
2739 __HAL_CRYP_DISABLE(hcryp);
2740 /* Process Unlocked */
2741 __HAL_UNLOCK(hcryp);
2742 /* Change the CRYP state */
2743 hcryp->State = HAL_CRYP_STATE_READY;
2744 /* Call Input transfer complete callback */
2745 HAL_CRYP_OutCpltCallback(hcryp);
2746 }
2747 }
2748
2749 /* Return function status */
2750 return HAL_OK;
2751 }
2752
2753 /**
2754 * @brief Initializes the CRYP peripheral in DES ECB encryption mode using DMA.
2755 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2756 * the configuration information for CRYP module
2757 * @param pPlainData: Pointer to the plaintext buffer
2758 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2759 * @param pCypherData: Pointer to the cyphertext buffer
2760 * @retval HAL status
2761 */
2762 HAL_StatusTypeDef HAL_CRYP_DESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2763 {
2764 uint32_t inputaddr;
2765 uint32_t outputaddr;
2766
2767 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2768 {
2769 /* Process Locked */
2770 __HAL_LOCK(hcryp);
2771
2772 inputaddr = (uint32_t)pPlainData;
2773 outputaddr = (uint32_t)pCypherData;
2774
2775 /* Change the CRYP state */
2776 hcryp->State = HAL_CRYP_STATE_BUSY;
2777
2778 /* Set CRYP peripheral in DES ECB encryption mode */
2779 CRYP_SetDESECBMode(hcryp, 0U);
2780
2781 /* Set the input and output addresses and start DMA transfer */
2782 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2783
2784 /* Process Unlocked */
2785 __HAL_UNLOCK(hcryp);
2786
2787 /* Return function status */
2788 return HAL_OK;
2789 }
2790 else
2791 {
2792 return HAL_ERROR;
2793 }
2794 }
2795
2796 /**
2797 * @brief Initializes the CRYP peripheral in DES CBC encryption mode using DMA.
2798 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2799 * the configuration information for CRYP module
2800 * @param pPlainData: Pointer to the plaintext buffer
2801 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2802 * @param pCypherData: Pointer to the cyphertext buffer
2803 * @retval HAL status
2804 */
2805 HAL_StatusTypeDef HAL_CRYP_DESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
2806 {
2807 uint32_t inputaddr;
2808 uint32_t outputaddr;
2809
2810 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2811 {
2812 /* Process Locked */
2813 __HAL_LOCK(hcryp);
2814
2815 inputaddr = (uint32_t)pPlainData;
2816 outputaddr = (uint32_t)pCypherData;
2817
2818 /* Change the CRYP state */
2819 hcryp->State = HAL_CRYP_STATE_BUSY;
2820
2821 /* Set CRYP peripheral in DES CBC encryption mode */
2822 CRYP_SetDESCBCMode(hcryp, 0U);
2823
2824 /* Set the input and output addresses and start DMA transfer */
2825 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2826
2827 /* Process Unlocked */
2828 __HAL_UNLOCK(hcryp);
2829
2830 /* Return function status */
2831 return HAL_OK;
2832 }
2833 else
2834 {
2835 return HAL_ERROR;
2836 }
2837 }
2838
2839 /**
2840 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA.
2841 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2842 * the configuration information for CRYP module
2843 * @param pPlainData: Pointer to the plaintext buffer
2844 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2845 * @param pCypherData: Pointer to the cyphertext buffer
2846 * @retval HAL status
2847 */
2848 HAL_StatusTypeDef HAL_CRYP_DESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2849 {
2850 uint32_t inputaddr;
2851 uint32_t outputaddr;
2852
2853 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2854 {
2855 /* Process Locked */
2856 __HAL_LOCK(hcryp);
2857
2858 inputaddr = (uint32_t)pCypherData;
2859 outputaddr = (uint32_t)pPlainData;
2860
2861 /* Change the CRYP state */
2862 hcryp->State = HAL_CRYP_STATE_BUSY;
2863
2864 /* Set CRYP peripheral in DES ECB decryption mode */
2865 CRYP_SetDESECBMode(hcryp, CRYP_CR_ALGODIR);
2866
2867 /* Set the input and output addresses and start DMA transfer */
2868 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2869
2870 /* Process Unlocked */
2871 __HAL_UNLOCK(hcryp);
2872
2873 /* Return function status */
2874 return HAL_OK;
2875 }
2876 else
2877 {
2878 return HAL_ERROR;
2879 }
2880 }
2881
2882 /**
2883 * @brief Initializes the CRYP peripheral in DES ECB decryption mode using DMA.
2884 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2885 * the configuration information for CRYP module
2886 * @param pPlainData: Pointer to the plaintext buffer
2887 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2888 * @param pCypherData: Pointer to the cyphertext buffer
2889 * @retval HAL status
2890 */
2891 HAL_StatusTypeDef HAL_CRYP_DESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
2892 {
2893 uint32_t inputaddr;
2894 uint32_t outputaddr;
2895
2896 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
2897 {
2898 /* Process Locked */
2899 __HAL_LOCK(hcryp);
2900
2901 inputaddr = (uint32_t)pCypherData;
2902 outputaddr = (uint32_t)pPlainData;
2903
2904 /* Change the CRYP state */
2905 hcryp->State = HAL_CRYP_STATE_BUSY;
2906
2907 /* Set CRYP peripheral in DES CBC decryption mode */
2908 CRYP_SetDESCBCMode(hcryp, CRYP_CR_ALGODIR);
2909
2910 /* Set the input and output addresses and start DMA transfer */
2911 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
2912
2913 /* Process Unlocked */
2914 __HAL_UNLOCK(hcryp);
2915
2916 /* Return function status */
2917 return HAL_OK;
2918 }
2919 else
2920 {
2921 return HAL_ERROR;
2922 }
2923 }
2924
2925 /**
2926 * @}
2927 */
2928
2929 /** @defgroup CRYP_Exported_Functions_Group4 TDES processing functions
2930 * @brief processing functions.
2931 *
2932 @verbatim
2933 ==============================================================================
2934 ##### TDES processing functions #####
2935 ==============================================================================
2936 [..] This section provides functions allowing to:
2937 (+) Encrypt plaintext using TDES based on ECB or CBC chaining modes
2938 (+) Decrypt cyphertext using TDES based on ECB or CBC chaining modes
2939 [..] Three processing functions are available:
2940 (+) Polling mode
2941 (+) Interrupt mode
2942 (+) DMA mode
2943
2944 @endverbatim
2945 * @{
2946 */
2947
2948 /**
2949 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode
2950 * then encrypt pPlainData. The cypher data are available in pCypherData
2951 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2952 * the configuration information for CRYP module
2953 * @param pPlainData: Pointer to the plaintext buffer
2954 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2955 * @param pCypherData: Pointer to the cyphertext buffer
2956 * @param Timeout: Specify Timeout value
2957 * @retval HAL status
2958 */
2959 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
2960 {
2961 /* Process Locked */
2962 __HAL_LOCK(hcryp);
2963
2964 /* Change the CRYP state */
2965 hcryp->State = HAL_CRYP_STATE_BUSY;
2966
2967 /* Set CRYP peripheral in TDES ECB encryption mode */
2968 CRYP_SetTDESECBMode(hcryp, 0U);
2969
2970 /* Enable CRYP */
2971 __HAL_CRYP_ENABLE(hcryp);
2972
2973 /* Write Plain Data and Get Cypher Data */
2974 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
2975 {
2976 return HAL_TIMEOUT;
2977 }
2978
2979 /* Change the CRYP state */
2980 hcryp->State = HAL_CRYP_STATE_READY;
2981
2982 /* Process Unlocked */
2983 __HAL_UNLOCK(hcryp);
2984
2985 /* Return function status */
2986 return HAL_OK;
2987 }
2988
2989 /**
2990 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode
2991 * then decrypted pCypherData. The cypher data are available in pPlainData
2992 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
2993 * the configuration information for CRYP module
2994 * @param pPlainData: Pointer to the plaintext buffer
2995 * @param Size: Length of the plaintext buffer, must be a multiple of 8
2996 * @param pCypherData: Pointer to the cyphertext buffer
2997 * @param Timeout: Specify Timeout value
2998 * @retval HAL status
2999 */
3000 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
3001 {
3002 /* Process Locked */
3003 __HAL_LOCK(hcryp);
3004
3005 /* Change the CRYP state */
3006 hcryp->State = HAL_CRYP_STATE_BUSY;
3007
3008 /* Set CRYP peripheral in TDES ECB decryption mode */
3009 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3010
3011 /* Enable CRYP */
3012 __HAL_CRYP_ENABLE(hcryp);
3013
3014 /* Write Cypher Data and Get Plain Data */
3015 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
3016 {
3017 return HAL_TIMEOUT;
3018 }
3019
3020 /* Change the CRYP state */
3021 hcryp->State = HAL_CRYP_STATE_READY;
3022
3023 /* Process Unlocked */
3024 __HAL_UNLOCK(hcryp);
3025
3026 /* Return function status */
3027 return HAL_OK;
3028 }
3029
3030 /**
3031 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode
3032 * then encrypt pPlainData. The cypher data are available in pCypherData
3033 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3034 * the configuration information for CRYP module
3035 * @param pPlainData: Pointer to the plaintext buffer
3036 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3037 * @param pCypherData: Pointer to the cyphertext buffer
3038 * @param Timeout: Specify Timeout value
3039 * @retval HAL status
3040 */
3041 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
3042 {
3043 /* Process Locked */
3044 __HAL_LOCK(hcryp);
3045
3046 /* Change the CRYP state */
3047 hcryp->State = HAL_CRYP_STATE_BUSY;
3048
3049 /* Set CRYP peripheral in TDES CBC encryption mode */
3050 CRYP_SetTDESCBCMode(hcryp, 0U);
3051
3052 /* Enable CRYP */
3053 __HAL_CRYP_ENABLE(hcryp);
3054
3055 /* Write Plain Data and Get Cypher Data */
3056 if(CRYP_ProcessData2Words(hcryp, pPlainData, Size, pCypherData, Timeout) != HAL_OK)
3057 {
3058 return HAL_TIMEOUT;
3059 }
3060
3061 /* Change the CRYP state */
3062 hcryp->State = HAL_CRYP_STATE_READY;
3063
3064 /* Process Unlocked */
3065 __HAL_UNLOCK(hcryp);
3066
3067 /* Return function status */
3068 return HAL_OK;
3069 }
3070
3071 /**
3072 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode
3073 * then decrypted pCypherData. The cypher data are available in pPlainData
3074 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3075 * the configuration information for CRYP module
3076 * @param pCypherData: Pointer to the cyphertext buffer
3077 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3078 * @param pPlainData: Pointer to the plaintext buffer
3079 * @param Timeout: Specify Timeout value
3080 * @retval HAL status
3081 */
3082 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
3083 {
3084 /* Process Locked */
3085 __HAL_LOCK(hcryp);
3086
3087 /* Change the CRYP state */
3088 hcryp->State = HAL_CRYP_STATE_BUSY;
3089
3090 /* Set CRYP peripheral in TDES CBC decryption mode */
3091 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3092
3093 /* Enable CRYP */
3094 __HAL_CRYP_ENABLE(hcryp);
3095
3096 /* Write Cypher Data and Get Plain Data */
3097 if(CRYP_ProcessData2Words(hcryp, pCypherData, Size, pPlainData, Timeout) != HAL_OK)
3098 {
3099 return HAL_TIMEOUT;
3100 }
3101
3102 /* Change the CRYP state */
3103 hcryp->State = HAL_CRYP_STATE_READY;
3104
3105 /* Process Unlocked */
3106 __HAL_UNLOCK(hcryp);
3107
3108 /* Return function status */
3109 return HAL_OK;
3110 }
3111
3112 /**
3113 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using interrupt.
3114 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3115 * the configuration information for CRYP module
3116 * @param pPlainData: Pointer to the plaintext buffer
3117 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3118 * @param pCypherData: Pointer to the cyphertext buffer
3119 * @retval HAL status
3120 */
3121 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3122 {
3123 uint32_t inputaddr;
3124 uint32_t outputaddr;
3125
3126 if(hcryp->State == HAL_CRYP_STATE_READY)
3127 {
3128 /* Process Locked */
3129 __HAL_LOCK(hcryp);
3130
3131 hcryp->CrypInCount = Size;
3132 hcryp->pCrypInBuffPtr = pPlainData;
3133 hcryp->pCrypOutBuffPtr = pCypherData;
3134 hcryp->CrypOutCount = Size;
3135
3136 /* Change the CRYP state */
3137 hcryp->State = HAL_CRYP_STATE_BUSY;
3138
3139 /* Set CRYP peripheral in TDES ECB encryption mode */
3140 CRYP_SetTDESECBMode(hcryp, 0U);
3141
3142 /* Enable Interrupts */
3143 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3144
3145 /* Enable CRYP */
3146 __HAL_CRYP_ENABLE(hcryp);
3147
3148 /* Return function status */
3149 return HAL_OK;
3150 }
3151 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3152 {
3153 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3154 /* Write the Input block in the IN FIFO */
3155 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3156 inputaddr+=4U;
3157 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3158
3159 hcryp->pCrypInBuffPtr += 8U;
3160 hcryp->CrypInCount -= 8U;
3161 if(hcryp->CrypInCount == 0U)
3162 {
3163 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3164 /* Call the Input data transfer complete callback */
3165 HAL_CRYP_InCpltCallback(hcryp);
3166 }
3167 }
3168 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3169 {
3170 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3171 /* Read the Output block from the Output FIFO */
3172 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3173 outputaddr+=4U;
3174 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3175
3176 hcryp->pCrypOutBuffPtr += 8U;
3177 hcryp->CrypOutCount -= 8U;
3178 if(hcryp->CrypOutCount == 0U)
3179 {
3180 /* Disable IT */
3181 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3182 /* Disable CRYP */
3183 __HAL_CRYP_DISABLE(hcryp);
3184 /* Process Unlocked */
3185 __HAL_UNLOCK(hcryp);
3186 /* Change the CRYP state */
3187 hcryp->State = HAL_CRYP_STATE_READY;
3188 /* Call the Output data transfer complete callback */
3189 HAL_CRYP_OutCpltCallback(hcryp);
3190 }
3191 }
3192
3193 /* Return function status */
3194 return HAL_OK;
3195 }
3196
3197 /**
3198 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode.
3199 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3200 * the configuration information for CRYP module
3201 * @param pPlainData: Pointer to the plaintext buffer
3202 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3203 * @param pCypherData: Pointer to the cyphertext buffer
3204 * @retval HAL status
3205 */
3206 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3207 {
3208 uint32_t inputaddr;
3209 uint32_t outputaddr;
3210
3211 if(hcryp->State == HAL_CRYP_STATE_READY)
3212 {
3213 /* Process Locked */
3214 __HAL_LOCK(hcryp);
3215
3216 hcryp->CrypInCount = Size;
3217 hcryp->pCrypInBuffPtr = pPlainData;
3218 hcryp->pCrypOutBuffPtr = pCypherData;
3219 hcryp->CrypOutCount = Size;
3220
3221 /* Change the CRYP state */
3222 hcryp->State = HAL_CRYP_STATE_BUSY;
3223
3224 /* Set CRYP peripheral in TDES CBC encryption mode */
3225 CRYP_SetTDESCBCMode(hcryp, 0U);
3226
3227 /* Enable Interrupts */
3228 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3229
3230 /* Enable CRYP */
3231 __HAL_CRYP_ENABLE(hcryp);
3232
3233 /* Return function status */
3234 return HAL_OK;
3235 }
3236 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3237 {
3238 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3239 /* Write the Input block in the IN FIFO */
3240 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3241 inputaddr+=4U;
3242 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3243
3244 hcryp->pCrypInBuffPtr += 8U;
3245 hcryp->CrypInCount -= 8U;
3246 if(hcryp->CrypInCount == 0U)
3247 {
3248 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3249 /* Call the Input data transfer complete callback */
3250 HAL_CRYP_InCpltCallback(hcryp);
3251 }
3252 }
3253 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3254 {
3255 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3256 /* Read the Output block from the Output FIFO */
3257 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3258 outputaddr+=4U;
3259 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3260
3261 hcryp->pCrypOutBuffPtr += 8U;
3262 hcryp->CrypOutCount -= 8U;
3263 if(hcryp->CrypOutCount == 0U)
3264 {
3265 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3266 /* Disable CRYP */
3267 __HAL_CRYP_DISABLE(hcryp);
3268 /* Process Unlocked */
3269 __HAL_UNLOCK(hcryp);
3270 /* Change the CRYP state */
3271 hcryp->State = HAL_CRYP_STATE_READY;
3272 /* Call Input transfer complete callback */
3273 HAL_CRYP_OutCpltCallback(hcryp);
3274 }
3275 }
3276
3277 /* Return function status */
3278 return HAL_OK;
3279 }
3280
3281 /**
3282 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode.
3283 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3284 * the configuration information for CRYP module
3285 * @param pPlainData: Pointer to the plaintext buffer
3286 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3287 * @param pCypherData: Pointer to the cyphertext buffer
3288 * @retval HAL status
3289 */
3290 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3291 {
3292 uint32_t inputaddr;
3293 uint32_t outputaddr;
3294
3295 if(hcryp->State == HAL_CRYP_STATE_READY)
3296 {
3297 /* Process Locked */
3298 __HAL_LOCK(hcryp);
3299
3300 hcryp->CrypInCount = Size;
3301 hcryp->pCrypInBuffPtr = pCypherData;
3302 hcryp->pCrypOutBuffPtr = pPlainData;
3303 hcryp->CrypOutCount = Size;
3304
3305 /* Change the CRYP state */
3306 hcryp->State = HAL_CRYP_STATE_BUSY;
3307
3308 /* Set CRYP peripheral in TDES ECB decryption mode */
3309 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3310
3311 /* Enable Interrupts */
3312 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3313
3314 /* Enable CRYP */
3315 __HAL_CRYP_ENABLE(hcryp);
3316
3317 /* Return function status */
3318 return HAL_OK;
3319 }
3320 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3321 {
3322 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3323 /* Write the Input block in the IN FIFO */
3324 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3325 inputaddr+=4U;
3326 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3327
3328 hcryp->pCrypInBuffPtr += 8U;
3329 hcryp->CrypInCount -= 8U;
3330 if(hcryp->CrypInCount == 0U)
3331 {
3332 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3333 /* Call the Input data transfer complete callback */
3334 HAL_CRYP_InCpltCallback(hcryp);
3335 }
3336 }
3337 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3338 {
3339 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3340 /* Read the Output block from the Output FIFO */
3341 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3342 outputaddr+=4U;
3343 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3344
3345 hcryp->pCrypOutBuffPtr += 8U;
3346 hcryp->CrypOutCount -= 8U;
3347 if(hcryp->CrypOutCount == 0U)
3348 {
3349 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3350 /* Disable CRYP */
3351 __HAL_CRYP_DISABLE(hcryp);
3352 /* Process Unlocked */
3353 __HAL_UNLOCK(hcryp);
3354 /* Change the CRYP state */
3355 hcryp->State = HAL_CRYP_STATE_READY;
3356 /* Call Input transfer complete callback */
3357 HAL_CRYP_OutCpltCallback(hcryp);
3358 }
3359 }
3360
3361 /* Return function status */
3362 return HAL_OK;
3363 }
3364
3365 /**
3366 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode.
3367 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3368 * the configuration information for CRYP module
3369 * @param pCypherData: Pointer to the cyphertext buffer
3370 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3371 * @param pPlainData: Pointer to the plaintext buffer
3372 * @retval HAL status
3373 */
3374 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3375 {
3376 uint32_t inputaddr;
3377 uint32_t outputaddr;
3378
3379 if(hcryp->State == HAL_CRYP_STATE_READY)
3380 {
3381 /* Process Locked */
3382 __HAL_LOCK(hcryp);
3383
3384 hcryp->CrypInCount = Size;
3385 hcryp->pCrypInBuffPtr = pCypherData;
3386 hcryp->pCrypOutBuffPtr = pPlainData;
3387 hcryp->CrypOutCount = Size;
3388
3389 /* Change the CRYP state */
3390 hcryp->State = HAL_CRYP_STATE_BUSY;
3391
3392 /* Set CRYP peripheral in TDES CBC decryption mode */
3393 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3394
3395 /* Enable Interrupts */
3396 __HAL_CRYP_ENABLE_IT(hcryp, CRYP_IT_INI | CRYP_IT_OUTI);
3397
3398 /* Enable CRYP */
3399 __HAL_CRYP_ENABLE(hcryp);
3400
3401 /* Return function status */
3402 return HAL_OK;
3403 }
3404 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_INI))
3405 {
3406 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
3407 /* Write the Input block in the IN FIFO */
3408 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3409 inputaddr+=4U;
3410 hcryp->Instance->DR = *(uint32_t*)(inputaddr);
3411
3412 hcryp->pCrypInBuffPtr += 8U;
3413 hcryp->CrypInCount -= 8U;
3414 if(hcryp->CrypInCount == 0U)
3415 {
3416 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_INI);
3417 /* Call the Input data transfer complete callback */
3418 HAL_CRYP_InCpltCallback(hcryp);
3419 }
3420 }
3421 else if(__HAL_CRYP_GET_IT(hcryp, CRYP_IT_OUTI))
3422 {
3423 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
3424 /* Read the Output block from the Output FIFO */
3425 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3426 outputaddr+=4U;
3427 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUT;
3428
3429 hcryp->pCrypOutBuffPtr += 8U;
3430 hcryp->CrypOutCount -= 8U;
3431 if(hcryp->CrypOutCount == 0U)
3432 {
3433 __HAL_CRYP_DISABLE_IT(hcryp, CRYP_IT_OUTI);
3434 /* Disable CRYP */
3435 __HAL_CRYP_DISABLE(hcryp);
3436 /* Process Unlocked */
3437 __HAL_UNLOCK(hcryp);
3438 /* Change the CRYP state */
3439 hcryp->State = HAL_CRYP_STATE_READY;
3440 /* Call Input transfer complete callback */
3441 HAL_CRYP_OutCpltCallback(hcryp);
3442 }
3443 }
3444
3445 /* Return function status */
3446 return HAL_OK;
3447 }
3448
3449 /**
3450 * @brief Initializes the CRYP peripheral in TDES ECB encryption mode using DMA.
3451 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3452 * the configuration information for CRYP module
3453 * @param pPlainData: Pointer to the plaintext buffer
3454 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3455 * @param pCypherData: Pointer to the cyphertext buffer
3456 * @retval HAL status
3457 */
3458 HAL_StatusTypeDef HAL_CRYP_TDESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3459 {
3460 uint32_t inputaddr;
3461 uint32_t outputaddr;
3462
3463 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3464 {
3465 /* Process Locked */
3466 __HAL_LOCK(hcryp);
3467
3468 inputaddr = (uint32_t)pPlainData;
3469 outputaddr = (uint32_t)pCypherData;
3470
3471 /* Change the CRYP state */
3472 hcryp->State = HAL_CRYP_STATE_BUSY;
3473
3474 /* Set CRYP peripheral in TDES ECB encryption mode */
3475 CRYP_SetTDESECBMode(hcryp, 0U);
3476
3477 /* Set the input and output addresses and start DMA transfer */
3478 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3479
3480 /* Process Unlocked */
3481 __HAL_UNLOCK(hcryp);
3482
3483 /* Return function status */
3484 return HAL_OK;
3485 }
3486 else
3487 {
3488 return HAL_ERROR;
3489 }
3490 }
3491
3492 /**
3493 * @brief Initializes the CRYP peripheral in TDES CBC encryption mode using DMA.
3494 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3495 * the configuration information for CRYP module
3496 * @param pPlainData: Pointer to the plaintext buffer
3497 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3498 * @param pCypherData: Pointer to the cyphertext buffer
3499 * @retval HAL status
3500 */
3501 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
3502 {
3503 uint32_t inputaddr;
3504 uint32_t outputaddr;
3505
3506 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3507 {
3508 /* Process Locked */
3509 __HAL_LOCK(hcryp);
3510
3511 inputaddr = (uint32_t)pPlainData;
3512 outputaddr = (uint32_t)pCypherData;
3513
3514 /* Change the CRYP state */
3515 hcryp->State = HAL_CRYP_STATE_BUSY;
3516
3517 /* Set CRYP peripheral in TDES CBC encryption mode */
3518 CRYP_SetTDESCBCMode(hcryp, 0U);
3519
3520 /* Set the input and output addresses and start DMA transfer */
3521 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3522
3523 /* Process Unlocked */
3524 __HAL_UNLOCK(hcryp);
3525
3526 /* Return function status */
3527 return HAL_OK;
3528 }
3529 else
3530 {
3531 return HAL_ERROR;
3532 }
3533 }
3534
3535 /**
3536 * @brief Initializes the CRYP peripheral in TDES ECB decryption mode using DMA.
3537 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3538 * the configuration information for CRYP module
3539 * @param pPlainData: Pointer to the plaintext buffer
3540 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3541 * @param pCypherData: Pointer to the cyphertext buffer
3542 * @retval HAL status
3543 */
3544 HAL_StatusTypeDef HAL_CRYP_TDESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3545 {
3546 uint32_t inputaddr;
3547 uint32_t outputaddr;
3548
3549 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3550 {
3551 /* Process Locked */
3552 __HAL_LOCK(hcryp);
3553
3554 inputaddr = (uint32_t)pCypherData;
3555 outputaddr = (uint32_t)pPlainData;
3556
3557 /* Change the CRYP state */
3558 hcryp->State = HAL_CRYP_STATE_BUSY;
3559
3560 /* Set CRYP peripheral in TDES ECB decryption mode */
3561 CRYP_SetTDESECBMode(hcryp, CRYP_CR_ALGODIR);
3562
3563 /* Set the input and output addresses and start DMA transfer */
3564 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3565
3566 /* Process Unlocked */
3567 __HAL_UNLOCK(hcryp);
3568
3569 /* Return function status */
3570 return HAL_OK;
3571 }
3572 else
3573 {
3574 return HAL_ERROR;
3575 }
3576 }
3577
3578 /**
3579 * @brief Initializes the CRYP peripheral in TDES CBC decryption mode using DMA.
3580 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3581 * the configuration information for CRYP module
3582 * @param pCypherData: Pointer to the cyphertext buffer
3583 * @param Size: Length of the plaintext buffer, must be a multiple of 8
3584 * @param pPlainData: Pointer to the plaintext buffer
3585 * @retval HAL status
3586 */
3587 HAL_StatusTypeDef HAL_CRYP_TDESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
3588 {
3589 uint32_t inputaddr;
3590 uint32_t outputaddr;
3591
3592 if((hcryp->State == HAL_CRYP_STATE_READY) || (hcryp->Phase == HAL_CRYP_PHASE_PROCESS))
3593 {
3594 /* Process Locked */
3595 __HAL_LOCK(hcryp);
3596
3597 inputaddr = (uint32_t)pCypherData;
3598 outputaddr = (uint32_t)pPlainData;
3599
3600 /* Change the CRYP state */
3601 hcryp->State = HAL_CRYP_STATE_BUSY;
3602
3603 /* Set CRYP peripheral in TDES CBC decryption mode */
3604 CRYP_SetTDESCBCMode(hcryp, CRYP_CR_ALGODIR);
3605
3606 /* Set the input and output addresses and start DMA transfer */
3607 CRYP_SetDMAConfig(hcryp, inputaddr, Size, outputaddr);
3608
3609 /* Process Unlocked */
3610 __HAL_UNLOCK(hcryp);
3611
3612 /* Return function status */
3613 return HAL_OK;
3614 }
3615 else
3616 {
3617 return HAL_ERROR;
3618 }
3619 }
3620
3621 /**
3622 * @}
3623 */
3624
3625 /** @defgroup CRYP_Exported_Functions_Group5 DMA callback functions
3626 * @brief DMA callback functions.
3627 *
3628 @verbatim
3629 ==============================================================================
3630 ##### DMA callback functions #####
3631 ==============================================================================
3632 [..] This section provides DMA callback functions:
3633 (+) DMA Input data transfer complete
3634 (+) DMA Output data transfer complete
3635 (+) DMA error
3636
3637 @endverbatim
3638 * @{
3639 */
3640
3641 /**
3642 * @brief Input FIFO transfer completed callbacks.
3643 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3644 * the configuration information for CRYP module
3645 * @retval None
3646 */
3647 __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
3648 {
3649 /* Prevent unused argument(s) compilation warning */
3650 UNUSED(hcryp);
3651 /* NOTE : This function Should not be modified, when the callback is needed,
3652 the HAL_CRYP_InCpltCallback could be implemented in the user file
3653 */
3654 }
3655
3656 /**
3657 * @brief Output FIFO transfer completed callbacks.
3658 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3659 * the configuration information for CRYP module
3660 * @retval None
3661 */
3662 __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
3663 {
3664 /* Prevent unused argument(s) compilation warning */
3665 UNUSED(hcryp);
3666 /* NOTE : This function Should not be modified, when the callback is needed,
3667 the HAL_CRYP_OutCpltCallback could be implemented in the user file
3668 */
3669 }
3670
3671 /**
3672 * @brief CRYP error callbacks.
3673 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3674 * the configuration information for CRYP module
3675 * @retval None
3676 */
3677 __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
3678 {
3679 /* Prevent unused argument(s) compilation warning */
3680 UNUSED(hcryp);
3681 /* NOTE : This function Should not be modified, when the callback is needed,
3682 the HAL_CRYP_ErrorCallback could be implemented in the user file
3683 */
3684 }
3685
3686 /**
3687 * @}
3688 */
3689
3690 /** @defgroup CRYP_Exported_Functions_Group6 CRYP IRQ handler management
3691 * @brief CRYP IRQ handler.
3692 *
3693 @verbatim
3694 ==============================================================================
3695 ##### CRYP IRQ handler management #####
3696 ==============================================================================
3697 [..] This section provides CRYP IRQ handler function.
3698
3699 @endverbatim
3700 * @{
3701 */
3702
3703 /**
3704 * @brief This function handles CRYP interrupt request.
3705 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3706 * the configuration information for CRYP module
3707 * @retval None
3708 */
3709 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
3710 {
3711 switch(CRYP->CR & CRYP_CR_ALGOMODE_DIRECTION)
3712 {
3713 case CRYP_CR_ALGOMODE_TDES_ECB_ENCRYPT:
3714 HAL_CRYP_TDESECB_Encrypt_IT(hcryp, NULL, 0U, NULL);
3715 break;
3716
3717 case CRYP_CR_ALGOMODE_TDES_ECB_DECRYPT:
3718 HAL_CRYP_TDESECB_Decrypt_IT(hcryp, NULL, 0U, NULL);
3719 break;
3720
3721 case CRYP_CR_ALGOMODE_TDES_CBC_ENCRYPT:
3722 HAL_CRYP_TDESCBC_Encrypt_IT(hcryp, NULL, 0U, NULL);
3723 break;
3724
3725 case CRYP_CR_ALGOMODE_TDES_CBC_DECRYPT:
3726 HAL_CRYP_TDESCBC_Decrypt_IT(hcryp, NULL, 0U, NULL);
3727 break;
3728
3729 case CRYP_CR_ALGOMODE_DES_ECB_ENCRYPT:
3730 HAL_CRYP_DESECB_Encrypt_IT(hcryp, NULL, 0U, NULL);
3731 break;
3732
3733 case CRYP_CR_ALGOMODE_DES_ECB_DECRYPT:
3734 HAL_CRYP_DESECB_Decrypt_IT(hcryp, NULL, 0U, NULL);
3735 break;
3736
3737 case CRYP_CR_ALGOMODE_DES_CBC_ENCRYPT:
3738 HAL_CRYP_DESCBC_Encrypt_IT(hcryp, NULL, 0U, NULL);
3739 break;
3740
3741 case CRYP_CR_ALGOMODE_DES_CBC_DECRYPT:
3742 HAL_CRYP_DESCBC_Decrypt_IT(hcryp, NULL, 0U, NULL);
3743 break;
3744
3745 case CRYP_CR_ALGOMODE_AES_ECB_ENCRYPT:
3746 HAL_CRYP_AESECB_Encrypt_IT(hcryp, NULL, 0U, NULL);
3747 break;
3748
3749 case CRYP_CR_ALGOMODE_AES_ECB_DECRYPT:
3750 HAL_CRYP_AESECB_Decrypt_IT(hcryp, NULL, 0U, NULL);
3751 break;
3752
3753 case CRYP_CR_ALGOMODE_AES_CBC_ENCRYPT:
3754 HAL_CRYP_AESCBC_Encrypt_IT(hcryp, NULL, 0U, NULL);
3755 break;
3756
3757 case CRYP_CR_ALGOMODE_AES_CBC_DECRYPT:
3758 HAL_CRYP_AESCBC_Decrypt_IT(hcryp, NULL, 0U, NULL);
3759 break;
3760
3761 case CRYP_CR_ALGOMODE_AES_CTR_ENCRYPT:
3762 HAL_CRYP_AESCTR_Encrypt_IT(hcryp, NULL, 0U, NULL);
3763 break;
3764
3765 case CRYP_CR_ALGOMODE_AES_CTR_DECRYPT:
3766 HAL_CRYP_AESCTR_Decrypt_IT(hcryp, NULL, 0U, NULL);
3767 break;
3768
3769 default:
3770 break;
3771 }
3772 }
3773
3774 /**
3775 * @}
3776 */
3777
3778 /** @defgroup CRYP_Exported_Functions_Group7 Peripheral State functions
3779 * @brief Peripheral State functions.
3780 *
3781 @verbatim
3782 ==============================================================================
3783 ##### Peripheral State functions #####
3784 ==============================================================================
3785 [..]
3786 This subsection permits to get in run-time the status of the peripheral.
3787
3788 @endverbatim
3789 * @{
3790 */
3791
3792 /**
3793 * @brief Returns the CRYP state.
3794 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
3795 * the configuration information for CRYP module
3796 * @retval HAL state
3797 */
3798 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
3799 {
3800 return hcryp->State;
3801 }
3802
3803 /**
3804 * @}
3805 */
3806
3807
3808 /**
3809 * @}
3810 */
3811
3812 #endif /* CRYP */
3813
3814 #if defined (AES)
3815
3816 /** @defgroup AES AES
3817 * @brief AES HAL module driver.
3818 * @{
3819 */
3820
3821 /* Private typedef -----------------------------------------------------------*/
3822 /* Private define ------------------------------------------------------------*/
3823 /* Private macro -------------------------------------------------------------*/
3824 /* Private variables ---------------------------------------------------------*/
3825 /* Private functions --------------------------------------------------------*/
3826
3827 /** @defgroup CRYP_Private_Functions CRYP Private Functions
3828 * @{
3829 */
3830
3831 static HAL_StatusTypeDef CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp);
3832 static HAL_StatusTypeDef CRYP_SetKey(CRYP_HandleTypeDef *hcryp);
3833 static HAL_StatusTypeDef CRYP_AES_IT(CRYP_HandleTypeDef *hcryp);
3834
3835 /**
3836 * @}
3837 */
3838
3839 /* Exported functions ---------------------------------------------------------*/
3840
3841 /** @defgroup CRYP_Exported_Functions CRYP Exported Functions
3842 * @{
3843 */
3844
3845 /** @defgroup CRYP_Exported_Functions_Group1 Initialization and deinitialization functions
3846 * @brief Initialization and Configuration functions.
3847 *
3848 @verbatim
3849 ==============================================================================
3850 ##### Initialization and deinitialization functions #####
3851 ==============================================================================
3852 [..] This section provides functions allowing to:
3853 (+) Initialize the CRYP according to the specified parameters
3854 in the CRYP_InitTypeDef and creates the associated handle
3855 (+) DeInitialize the CRYP peripheral
3856 (+) Initialize the CRYP MSP (MCU Specific Package)
3857 (+) De-Initialize the CRYP MSP
3858
3859 [..]
3860 (@) Specific care must be taken to format the key and the Initialization Vector IV!
3861
3862 [..] If the key is defined as a 128-bit long array key[127..0] = {b127 ... b0} where
3863 b127 is the MSB and b0 the LSB, the key must be stored in MCU memory
3864 (+) as a sequence of words where the MSB word comes first (occupies the
3865 lowest memory address)
3866 (+) where each word is byte-swapped:
3867 (++) address n+0 : 0b b103 .. b96 b111 .. b104 b119 .. b112 b127 .. b120
3868 (++) address n+4 : 0b b71 .. b64 b79 .. b72 b87 .. b80 b95 .. b88
3869 (++) address n+8 : 0b b39 .. b32 b47 .. b40 b55 .. b48 b63 .. b56
3870 (++) address n+C : 0b b7 .. b0 b15 .. b8 b23 .. b16 b31 .. b24
3871 [..] Hereafter, another illustration when considering a 128-bit long key made of 16 bytes {B15..B0}.
3872 The 4 32-bit words that make the key must be stored as follows in MCU memory:
3873 (+) address n+0 : 0x B12 B13 B14 B15
3874 (+) address n+4 : 0x B8 B9 B10 B11
3875 (+) address n+8 : 0x B4 B5 B6 B7
3876 (+) address n+C : 0x B0 B1 B2 B3
3877 [..] which leads to the expected setting
3878 (+) AES_KEYR3 = 0x B15 B14 B13 B12
3879 (+) AES_KEYR2 = 0x B11 B10 B9 B8
3880 (+) AES_KEYR1 = 0x B7 B6 B5 B4
3881 (+) AES_KEYR0 = 0x B3 B2 B1 B0
3882
3883 [..] Same format must be applied for a 256-bit long key made of 32 bytes {B31..B0}.
3884 The 8 32-bit words that make the key must be stored as follows in MCU memory:
3885 (+) address n+00 : 0x B28 B29 B30 B31
3886 (+) address n+04 : 0x B24 B25 B26 B27
3887 (+) address n+08 : 0x B20 B21 B22 B23
3888 (+) address n+0C : 0x B16 B17 B18 B19
3889 (+) address n+10 : 0x B12 B13 B14 B15
3890 (+) address n+14 : 0x B8 B9 B10 B11
3891 (+) address n+18 : 0x B4 B5 B6 B7
3892 (+) address n+1C : 0x B0 B1 B2 B3
3893 [..] which leads to the expected setting
3894 (+) AES_KEYR7 = 0x B31 B30 B29 B28
3895 (+) AES_KEYR6 = 0x B27 B26 B25 B24
3896 (+) AES_KEYR5 = 0x B23 B22 B21 B20
3897 (+) AES_KEYR4 = 0x B19 B18 B17 B16
3898 (+) AES_KEYR3 = 0x B15 B14 B13 B12
3899 (+) AES_KEYR2 = 0x B11 B10 B9 B8
3900 (+) AES_KEYR1 = 0x B7 B6 B5 B4
3901 (+) AES_KEYR0 = 0x B3 B2 B1 B0
3902
3903 [..] Initialization Vector IV (4 32-bit words) format must follow the same as
3904 that of a 128-bit long key.
3905
3906 [..]
3907
3908 @endverbatim
3909 * @{
3910 */
3911
3912 /**
3913 * @brief Initialize the CRYP according to the specified
3914 * parameters in the CRYP_InitTypeDef and initialize the associated handle.
3915 * @note Specific care must be taken to format the key and the Initialization Vector IV
3916 * stored in the MCU memory before calling HAL_CRYP_Init(). Refer to explanations
3917 * hereabove.
3918 * @retval HAL status
3919 */
3920 HAL_StatusTypeDef HAL_CRYP_Init(CRYP_HandleTypeDef *hcryp)
3921 {
3922 /* Check the CRYP handle allocation */
3923 if(hcryp == NULL)
3924 {
3925 return HAL_ERROR;
3926 }
3927
3928 /* Check the instance */
3929 assert_param(IS_AES_ALL_INSTANCE(hcryp->Instance));
3930
3931 /* Check the parameters */
3932 assert_param(IS_CRYP_KEYSIZE(hcryp->Init.KeySize));
3933 assert_param(IS_CRYP_DATATYPE(hcryp->Init.DataType));
3934 assert_param(IS_CRYP_ALGOMODE(hcryp->Init.OperatingMode));
3935 /* ChainingMode parameter is irrelevant when mode is set to Key derivation */
3936 if (hcryp->Init.OperatingMode != CRYP_ALGOMODE_KEYDERIVATION)
3937 {
3938 assert_param(IS_CRYP_CHAINMODE(hcryp->Init.ChainingMode));
3939 }
3940 assert_param(IS_CRYP_WRITE(hcryp->Init.KeyWriteFlag));
3941
3942 /*========================================================*/
3943 /* Check the proper operating/chaining modes combinations */
3944 /*========================================================*/
3945 /* Check the proper chaining when the operating mode is key derivation and decryption */
3946 #if defined(AES_CR_NPBLB)
3947 if ((hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT) &&\
3948 ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CTR) \
3949 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) \
3950 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM_CMAC)))
3951 #else
3952 if ((hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION_DECRYPT) &&\
3953 ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CTR) \
3954 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC) \
3955 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)))
3956 #endif
3957 {
3958 return HAL_ERROR;
3959 }
3960 /* Check that key derivation is not set in CMAC mode or CCM mode when applicable */
3961 #if defined(AES_CR_NPBLB)
3962 if ((hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION)
3963 && (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM_CMAC))
3964 #else
3965 if ((hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION)
3966 && (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC))
3967 #endif
3968 {
3969 return HAL_ERROR;
3970 }
3971
3972
3973 /*================*/
3974 /* Initialization */
3975 /*================*/
3976 /* Initialization start */
3977 if(hcryp->State == HAL_CRYP_STATE_RESET)
3978 {
3979 /* Allocate lock resource and initialize it */
3980 hcryp->Lock = HAL_UNLOCKED;
3981
3982 /* Init the low level hardware */
3983 HAL_CRYP_MspInit(hcryp);
3984 }
3985
3986 /* Change the CRYP state */
3987 hcryp->State = HAL_CRYP_STATE_BUSY;
3988
3989 /* Disable the Peripheral */
3990 __HAL_CRYP_DISABLE();
3991
3992 /*=============================================================*/
3993 /* AES initialization common to all operating modes */
3994 /*=============================================================*/
3995 /* Set the Key size selection */
3996 MODIFY_REG(hcryp->Instance->CR, AES_CR_KEYSIZE, hcryp->Init.KeySize);
3997
3998 /* Set the default CRYP phase when this parameter is not used.
3999 Phase is updated below in case of GCM/GMAC/CMAC(/CCM) setting. */
4000 hcryp->Phase = HAL_CRYP_PHASE_NOT_USED;
4001
4002
4003
4004 /*=============================================================*/
4005 /* Carry on the initialization based on the AES operating mode */
4006 /*=============================================================*/
4007 /* Key derivation */
4008 if (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION)
4009 {
4010 MODIFY_REG(hcryp->Instance->CR, AES_CR_MODE, CRYP_ALGOMODE_KEYDERIVATION);
4011
4012 /* Configure the Key registers */
4013 if (CRYP_SetKey(hcryp) != HAL_OK)
4014 {
4015 return HAL_ERROR;
4016 }
4017 }
4018 else
4019 /* Encryption / Decryption (with or without key derivation) / authentication */
4020 {
4021 /* Set data type, operating and chaining modes.
4022 In case of GCM or GMAC, data type is forced to 0b00 */
4023 if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
4024 {
4025 MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE|AES_CR_MODE|AES_CR_CHMOD, hcryp->Init.OperatingMode|hcryp->Init.ChainingMode);
4026 }
4027 else
4028 {
4029 MODIFY_REG(hcryp->Instance->CR, AES_CR_DATATYPE|AES_CR_MODE|AES_CR_CHMOD, hcryp->Init.DataType|hcryp->Init.OperatingMode|hcryp->Init.ChainingMode);
4030 }
4031
4032
4033 /* Specify the encryption/decryption phase in case of Galois counter mode (GCM),
4034 Galois message authentication code (GMAC), cipher message authentication code (CMAC)
4035 or Counter with Cipher Mode (CCM) when applicable */
4036 #if defined(AES_CR_NPBLB)
4037 if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
4038 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM_CMAC))
4039 #else
4040 if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
4041 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC))
4042 #endif
4043 {
4044 MODIFY_REG(hcryp->Instance->CR, AES_CR_GCMPH, hcryp->Init.GCMCMACPhase);
4045 hcryp->Phase = HAL_CRYP_PHASE_START;
4046 }
4047
4048
4049 /* Configure the Key registers if no need to bypass this step */
4050 if (hcryp->Init.KeyWriteFlag == CRYP_KEY_WRITE_ENABLE)
4051 {
4052 if (CRYP_SetKey(hcryp) != HAL_OK)
4053 {
4054 return HAL_ERROR;
4055 }
4056 }
4057
4058 /* If applicable, configure the Initialization Vector */
4059 if (hcryp->Init.ChainingMode != CRYP_CHAINMODE_AES_ECB)
4060 {
4061 if (CRYP_SetInitVector(hcryp) != HAL_OK)
4062 {
4063 return HAL_ERROR;
4064 }
4065 }
4066 }
4067
4068 #if defined(AES_CR_NPBLB)
4069 /* Clear NPBLB field */
4070 CLEAR_BIT(hcryp->Instance->CR, AES_CR_NPBLB);
4071 #endif
4072
4073 /* Reset CrypInCount and CrypOutCount */
4074 hcryp->CrypInCount = 0U;
4075 hcryp->CrypOutCount = 0U;
4076
4077 /* Reset ErrorCode field */
4078 hcryp->ErrorCode = HAL_CRYP_ERROR_NONE;
4079
4080 /* Reset Mode suspension request */
4081 hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
4082
4083 /* Change the CRYP state */
4084 hcryp->State = HAL_CRYP_STATE_READY;
4085
4086 /* Enable the Peripheral */
4087 __HAL_CRYP_ENABLE();
4088
4089 /* Return function status */
4090 return HAL_OK;
4091 }
4092
4093 /**
4094 * @brief DeInitialize the CRYP peripheral.
4095 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4096 * the configuration information for CRYP module
4097 * @retval HAL status
4098 */
4099 HAL_StatusTypeDef HAL_CRYP_DeInit(CRYP_HandleTypeDef *hcryp)
4100 {
4101 /* Check the CRYP handle allocation */
4102 if(hcryp == NULL)
4103 {
4104 return HAL_ERROR;
4105 }
4106
4107 /* Change the CRYP state */
4108 hcryp->State = HAL_CRYP_STATE_BUSY;
4109
4110 /* Set the default CRYP phase */
4111 hcryp->Phase = HAL_CRYP_PHASE_READY;
4112
4113 /* Reset CrypInCount and CrypOutCount */
4114 hcryp->CrypInCount = 0U;
4115 hcryp->CrypOutCount = 0U;
4116
4117 /* Disable the CRYP Peripheral Clock */
4118 __HAL_CRYP_DISABLE();
4119
4120 /* DeInit the low level hardware: CLOCK, NVIC.*/
4121 HAL_CRYP_MspDeInit(hcryp);
4122
4123 /* Change the CRYP state */
4124 hcryp->State = HAL_CRYP_STATE_RESET;
4125
4126 /* Release Lock */
4127 __HAL_UNLOCK(hcryp);
4128
4129 /* Return function status */
4130 return HAL_OK;
4131 }
4132
4133 /**
4134 * @brief Initialize the CRYP MSP.
4135 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4136 * the configuration information for CRYP module
4137 * @retval None
4138 */
4139 __weak void HAL_CRYP_MspInit(CRYP_HandleTypeDef *hcryp)
4140 {
4141 /* Prevent unused argument(s) compilation warning */
4142 UNUSED(hcryp);
4143
4144 /* NOTE : This function should not be modified; when the callback is needed,
4145 the HAL_CRYP_MspInit can be implemented in the user file
4146 */
4147 }
4148
4149 /**
4150 * @brief DeInitialize CRYP MSP.
4151 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4152 * the configuration information for CRYP module
4153 * @retval None
4154 */
4155 __weak void HAL_CRYP_MspDeInit(CRYP_HandleTypeDef *hcryp)
4156 {
4157 /* Prevent unused argument(s) compilation warning */
4158 UNUSED(hcryp);
4159
4160 /* NOTE : This function should not be modified; when the callback is needed,
4161 the HAL_CRYP_MspDeInit can be implemented in the user file
4162 */
4163 }
4164
4165 /**
4166 * @}
4167 */
4168
4169 /** @defgroup CRYP_Exported_Functions_Group2 AES processing functions
4170 * @brief Processing functions.
4171 *
4172 @verbatim
4173 ==============================================================================
4174 ##### AES processing functions #####
4175 ==============================================================================
4176 [..] This section provides functions allowing to:
4177 (+) Encrypt plaintext using AES algorithm in different chaining modes
4178 (+) Decrypt cyphertext using AES algorithm in different chaining modes
4179 [..] Three processing functions are available:
4180 (+) Polling mode
4181 (+) Interrupt mode
4182 (+) DMA mode
4183
4184 @endverbatim
4185 * @{
4186 */
4187
4188
4189 /**
4190 * @brief Encrypt pPlainData in AES ECB encryption mode. The cypher data are available in pCypherData.
4191 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4192 * the configuration information for CRYP module
4193 * @param pPlainData: Pointer to the plaintext buffer
4194 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4195 * @param pCypherData: Pointer to the cyphertext buffer
4196 * @param Timeout: Specify Timeout value
4197 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4198 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4199 * @retval HAL status
4200 */
4201 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
4202 {
4203 /* Re-initialize AES IP with proper parameters */
4204 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4205 {
4206 return HAL_ERROR;
4207 }
4208 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4209 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4210 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4211 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4212 {
4213 return HAL_ERROR;
4214 }
4215
4216 return HAL_CRYPEx_AES(hcryp, pPlainData, Size, pCypherData, Timeout);
4217 }
4218
4219
4220 /**
4221 * @brief Encrypt pPlainData in AES CBC encryption mode with key derivation. The cypher data are available in pCypherData.
4222 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4223 * the configuration information for CRYP module
4224 * @param pPlainData: Pointer to the plaintext buffer
4225 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4226 * @param pCypherData: Pointer to the cyphertext buffer
4227 * @param Timeout: Specify Timeout value
4228 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4229 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4230 * @retval HAL status
4231 */
4232 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
4233 {
4234 /* Re-initialize AES IP with proper parameters */
4235 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4236 {
4237 return HAL_ERROR;
4238 }
4239 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4240 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4241 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4242 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4243 {
4244 return HAL_ERROR;
4245 }
4246
4247 return HAL_CRYPEx_AES(hcryp, pPlainData, Size, pCypherData, Timeout);
4248 }
4249
4250
4251 /**
4252 * @brief Encrypt pPlainData in AES CTR encryption mode. The cypher data are available in pCypherData
4253 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4254 * the configuration information for CRYP module
4255 * @param pPlainData: Pointer to the plaintext buffer
4256 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4257 * @param pCypherData: Pointer to the cyphertext buffer
4258 * @param Timeout: Specify Timeout value
4259 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4260 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4261 * @retval HAL status
4262 */
4263 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData, uint32_t Timeout)
4264 {
4265 /* Re-initialize AES IP with proper parameters */
4266 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4267 {
4268 return HAL_ERROR;
4269 }
4270 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4271 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4272 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4273 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4274 {
4275 return HAL_ERROR;
4276 }
4277
4278 return HAL_CRYPEx_AES(hcryp, pPlainData, Size, pCypherData, Timeout);
4279 }
4280
4281 /**
4282 * @brief Decrypt pCypherData in AES ECB decryption mode with key derivation,
4283 * the decyphered data are available in pPlainData.
4284 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4285 * the configuration information for CRYP module
4286 * @param pCypherData: Pointer to the cyphertext buffer
4287 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4288 * @param pPlainData: Pointer to the plaintext buffer
4289 * @param Timeout: Specify Timeout value
4290 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4291 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4292 * @retval HAL status
4293 */
4294 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
4295 {
4296 /* Re-initialize AES IP with proper parameters */
4297 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4298 {
4299 return HAL_ERROR;
4300 }
4301 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4302 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4303 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4304 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4305 {
4306 return HAL_ERROR;
4307 }
4308
4309 return HAL_CRYPEx_AES(hcryp, pCypherData, Size, pPlainData, Timeout);
4310 }
4311
4312 /**
4313 * @brief Decrypt pCypherData in AES ECB decryption mode with key derivation,
4314 * the decyphered data are available in pPlainData.
4315 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4316 * the configuration information for CRYP module
4317 * @param pCypherData: Pointer to the cyphertext buffer
4318 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4319 * @param pPlainData: Pointer to the plaintext buffer
4320 * @param Timeout: Specify Timeout value
4321 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4322 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4323 * @retval HAL status
4324 */
4325 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
4326 {
4327 /* Re-initialize AES IP with proper parameters */
4328 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4329 {
4330 return HAL_ERROR;
4331 }
4332 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4333 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4334 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4335 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4336 {
4337 return HAL_ERROR;
4338 }
4339
4340 return HAL_CRYPEx_AES(hcryp, pCypherData, Size, pPlainData, Timeout);
4341 }
4342
4343 /**
4344 * @brief Decrypt pCypherData in AES CTR decryption mode,
4345 * the decyphered data are available in pPlainData.
4346 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4347 * the configuration information for CRYP module
4348 * @param pCypherData: Pointer to the cyphertext buffer
4349 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4350 * @param pPlainData: Pointer to the plaintext buffer
4351 * @param Timeout: Specify Timeout value
4352 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4353 * resort to generic HAL_CRYPEx_AES() API instead (usage recommended).
4354 * @retval HAL status
4355 */
4356 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData, uint32_t Timeout)
4357 {
4358 /* Re-initialize AES IP with proper parameters */
4359 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4360 {
4361 return HAL_ERROR;
4362 }
4363 hcryp->Init.OperatingMode = CRYP_ALGOMODE_DECRYPT;
4364 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4365 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4366 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4367 {
4368 return HAL_ERROR;
4369 }
4370
4371 return HAL_CRYPEx_AES(hcryp, pCypherData, Size, pPlainData, Timeout);
4372 }
4373
4374 /**
4375 * @brief Encrypt pPlainData in AES ECB encryption mode using Interrupt,
4376 * the cypher data are available in pCypherData.
4377 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4378 * the configuration information for CRYP module
4379 * @param pPlainData: Pointer to the plaintext buffer
4380 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4381 * @param pCypherData: Pointer to the cyphertext buffer
4382 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4383 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4384 * @retval HAL status
4385 */
4386 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4387 {
4388 /* Re-initialize AES IP with proper parameters */
4389 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4390 {
4391 return HAL_ERROR;
4392 }
4393 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4394 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4395 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4396 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4397 {
4398 return HAL_ERROR;
4399 }
4400
4401 return HAL_CRYPEx_AES_IT(hcryp, pPlainData, Size, pCypherData);
4402 }
4403
4404 /**
4405 * @brief Encrypt pPlainData in AES CBC encryption mode using Interrupt,
4406 * the cypher data are available in pCypherData.
4407 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4408 * the configuration information for CRYP module
4409 * @param pPlainData: Pointer to the plaintext buffer
4410 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4411 * @param pCypherData: Pointer to the cyphertext buffer
4412 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4413 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4414 * @retval HAL status
4415 */
4416 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4417 {
4418 /* Re-initialize AES IP with proper parameters */
4419 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4420 {
4421 return HAL_ERROR;
4422 }
4423 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4424 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4425 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4426 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4427 {
4428 return HAL_ERROR;
4429 }
4430
4431 return HAL_CRYPEx_AES_IT(hcryp, pPlainData, Size, pCypherData);
4432 }
4433
4434
4435 /**
4436 * @brief Encrypt pPlainData in AES CTR encryption mode using Interrupt,
4437 * the cypher data are available in pCypherData.
4438 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4439 * the configuration information for CRYP module
4440 * @param pPlainData: Pointer to the plaintext buffer
4441 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4442 * @param pCypherData: Pointer to the cyphertext buffer
4443 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4444 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4445 * @retval HAL status
4446 */
4447 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4448 {
4449 /* Re-initialize AES IP with proper parameters */
4450 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4451 {
4452 return HAL_ERROR;
4453 }
4454 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4455 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4456 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4457 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4458 {
4459 return HAL_ERROR;
4460 }
4461
4462 return HAL_CRYPEx_AES_IT(hcryp, pPlainData, Size, pCypherData);
4463 }
4464
4465 /**
4466 * @brief Decrypt pCypherData in AES ECB decryption mode using Interrupt,
4467 * the decyphered data are available in pPlainData.
4468 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4469 * the configuration information for CRYP module
4470 * @param pCypherData: Pointer to the cyphertext buffer
4471 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4472 * @param pPlainData: Pointer to the plaintext buffer.
4473 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4474 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4475 * @retval HAL status
4476 */
4477 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4478 {
4479 /* Re-initialize AES IP with proper parameters */
4480 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4481 {
4482 return HAL_ERROR;
4483 }
4484 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4485 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4486 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4487 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4488 {
4489 return HAL_ERROR;
4490 }
4491
4492 return HAL_CRYPEx_AES_IT(hcryp, pCypherData, Size, pPlainData);
4493 }
4494
4495 /**
4496 * @brief Decrypt pCypherData in AES CBC decryption mode using Interrupt,
4497 * the decyphered data are available in pPlainData.
4498 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4499 * the configuration information for CRYP module
4500 * @param pCypherData: Pointer to the cyphertext buffer
4501 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4502 * @param pPlainData: Pointer to the plaintext buffer
4503 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4504 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4505 * @retval HAL status
4506 */
4507 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4508 {
4509 /* Re-initialize AES IP with proper parameters */
4510 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4511 {
4512 return HAL_ERROR;
4513 }
4514 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4515 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4516 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4517 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4518 {
4519 return HAL_ERROR;
4520 }
4521
4522 return HAL_CRYPEx_AES_IT(hcryp, pCypherData, Size, pPlainData);
4523 }
4524
4525 /**
4526 * @brief Decrypt pCypherData in AES CTR decryption mode using Interrupt,
4527 * the decyphered data are available in pPlainData.
4528 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4529 * the configuration information for CRYP module
4530 * @param pCypherData: Pointer to the cyphertext buffer
4531 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4532 * @param pPlainData: Pointer to the plaintext buffer
4533 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4534 * resort to generic HAL_CRYPEx_AES_IT() API instead (usage recommended).
4535 * @retval HAL status
4536 */
4537 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_IT(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4538 {
4539 /* Re-initialize AES IP with proper parameters */
4540 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4541 {
4542 return HAL_ERROR;
4543 }
4544 hcryp->Init.OperatingMode = CRYP_ALGOMODE_DECRYPT;
4545 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4546 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4547 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4548 {
4549 return HAL_ERROR;
4550 }
4551
4552 return HAL_CRYPEx_AES_IT(hcryp, pCypherData, Size, pPlainData);
4553 }
4554
4555 /**
4556 * @brief Encrypt pPlainData in AES ECB encryption mode using DMA,
4557 * the cypher data are available in pCypherData.
4558 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4559 * the configuration information for CRYP module
4560 * @param pPlainData: Pointer to the plaintext buffer
4561 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4562 * @param pCypherData: Pointer to the cyphertext buffer
4563 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4564 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4565 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4566 * @retval HAL status
4567 */
4568 HAL_StatusTypeDef HAL_CRYP_AESECB_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4569 {
4570 /* Re-initialize AES IP with proper parameters */
4571 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4572 {
4573 return HAL_ERROR;
4574 }
4575 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4576 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4577 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4578 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4579 {
4580 return HAL_ERROR;
4581 }
4582
4583 return HAL_CRYPEx_AES_DMA(hcryp, pPlainData, Size, pCypherData);
4584 }
4585
4586
4587
4588 /**
4589 * @brief Encrypt pPlainData in AES CBC encryption mode using DMA,
4590 * the cypher data are available in pCypherData.
4591 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4592 * the configuration information for CRYP module
4593 * @param pPlainData: Pointer to the plaintext buffer
4594 * @param Size: Length of the plaintext buffer, must be a multiple of 16.
4595 * @param pCypherData: Pointer to the cyphertext buffer
4596 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4597 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4598 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4599 * @retval HAL status
4600 */
4601 HAL_StatusTypeDef HAL_CRYP_AESCBC_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4602 {
4603 /* Re-initialize AES IP with proper parameters */
4604 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4605 {
4606 return HAL_ERROR;
4607 }
4608 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4609 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4610 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4611 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4612 {
4613 return HAL_ERROR;
4614 }
4615
4616 return HAL_CRYPEx_AES_DMA(hcryp, pPlainData, Size, pCypherData);
4617 }
4618
4619 /**
4620 * @brief Encrypt pPlainData in AES CTR encryption mode using DMA,
4621 * the cypher data are available in pCypherData.
4622 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4623 * the configuration information for CRYP module
4624 * @param pPlainData: Pointer to the plaintext buffer
4625 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4626 * @param pCypherData: Pointer to the cyphertext buffer.
4627 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4628 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4629 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4630 * @retval HAL status
4631 */
4632 HAL_StatusTypeDef HAL_CRYP_AESCTR_Encrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pPlainData, uint16_t Size, uint8_t *pCypherData)
4633 {
4634 /* Re-initialize AES IP with proper parameters */
4635 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4636 {
4637 return HAL_ERROR;
4638 }
4639 hcryp->Init.OperatingMode = CRYP_ALGOMODE_ENCRYPT;
4640 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4641 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4642 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4643 {
4644 return HAL_ERROR;
4645 }
4646
4647 return HAL_CRYPEx_AES_DMA(hcryp, pPlainData, Size, pCypherData);
4648 }
4649
4650 /**
4651 * @brief Decrypt pCypherData in AES ECB decryption mode using DMA,
4652 * the decyphered data are available in pPlainData.
4653 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4654 * the configuration information for CRYP module
4655 * @param pCypherData: Pointer to the cyphertext buffer
4656 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4657 * @param pPlainData: Pointer to the plaintext buffer
4658 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4659 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4660 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4661 * @retval HAL status
4662 */
4663 HAL_StatusTypeDef HAL_CRYP_AESECB_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4664 {
4665 /* Re-initialize AES IP with proper parameters */
4666 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4667 {
4668 return HAL_ERROR;
4669 }
4670 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4671 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_ECB;
4672 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4673 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4674 {
4675 return HAL_ERROR;
4676 }
4677
4678 return HAL_CRYPEx_AES_DMA(hcryp, pCypherData, Size, pPlainData);
4679 }
4680
4681 /**
4682 * @brief Decrypt pCypherData in AES CBC decryption mode using DMA,
4683 * the decyphered data are available in pPlainData.
4684 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4685 * the configuration information for CRYP module
4686 * @param pCypherData: Pointer to the cyphertext buffer
4687 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4688 * @param pPlainData: Pointer to the plaintext buffer
4689 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4690 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4691 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4692 * @retval HAL status
4693 */
4694 HAL_StatusTypeDef HAL_CRYP_AESCBC_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4695 {
4696 /* Re-initialize AES IP with proper parameters */
4697 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4698 {
4699 return HAL_ERROR;
4700 }
4701 hcryp->Init.OperatingMode = CRYP_ALGOMODE_KEYDERIVATION_DECRYPT;
4702 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CBC;
4703 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4704 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4705 {
4706 return HAL_ERROR;
4707 }
4708
4709 return HAL_CRYPEx_AES_DMA(hcryp, pCypherData, Size, pPlainData);
4710 }
4711
4712 /**
4713 * @brief Decrypt pCypherData in AES CTR decryption mode using DMA,
4714 * the decyphered data are available in pPlainData.
4715 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4716 * the configuration information for CRYP module
4717 * @param pCypherData: Pointer to the cyphertext buffer
4718 * @param Size: Length of the plaintext buffer in bytes, must be a multiple of 16.
4719 * @param pPlainData: Pointer to the plaintext buffer
4720 * @note This API is provided only to maintain compatibility with legacy software. Users should directly
4721 * resort to generic HAL_CRYPEx_AES_DMA() API instead (usage recommended).
4722 * @note pPlainData and pCypherData buffers must be 32-bit aligned to ensure a correct DMA transfer to and from the IP.
4723 * @retval HAL status
4724 */
4725 HAL_StatusTypeDef HAL_CRYP_AESCTR_Decrypt_DMA(CRYP_HandleTypeDef *hcryp, uint8_t *pCypherData, uint16_t Size, uint8_t *pPlainData)
4726 {
4727 /* Re-initialize AES IP with proper parameters */
4728 if (HAL_CRYP_DeInit(hcryp) != HAL_OK)
4729 {
4730 return HAL_ERROR;
4731 }
4732 hcryp->Init.OperatingMode = CRYP_ALGOMODE_DECRYPT;
4733 hcryp->Init.ChainingMode = CRYP_CHAINMODE_AES_CTR;
4734 hcryp->Init.KeyWriteFlag = CRYP_KEY_WRITE_ENABLE;
4735 if (HAL_CRYP_Init(hcryp) != HAL_OK)
4736 {
4737 return HAL_ERROR;
4738 }
4739
4740 return HAL_CRYPEx_AES_DMA(hcryp, pCypherData, Size, pPlainData);
4741 }
4742
4743
4744 /**
4745 * @}
4746 */
4747
4748 /** @defgroup CRYP_Exported_Functions_Group3 Callback functions
4749 * @brief Callback functions.
4750 *
4751 @verbatim
4752 ==============================================================================
4753 ##### Callback functions #####
4754 ==============================================================================
4755 [..] This section provides Interruption and DMA callback functions:
4756 (+) DMA Input data transfer complete
4757 (+) DMA Output data transfer complete
4758 (+) DMA or Interrupt error
4759
4760 @endverbatim
4761 * @{
4762 */
4763
4764 /**
4765 * @brief CRYP error callback.
4766 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4767 * the configuration information for CRYP module
4768 * @retval None
4769 */
4770 __weak void HAL_CRYP_ErrorCallback(CRYP_HandleTypeDef *hcryp)
4771 {
4772 /* Prevent unused argument(s) compilation warning */
4773 UNUSED(hcryp);
4774
4775 /* NOTE : This function should not be modified; when the callback is needed,
4776 the HAL_CRYP_ErrorCallback can be implemented in the user file
4777 */
4778 }
4779
4780 /**
4781 * @brief Input DMA transfer complete callback.
4782 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4783 * the configuration information for CRYP module
4784 * @retval None
4785 */
4786 __weak void HAL_CRYP_InCpltCallback(CRYP_HandleTypeDef *hcryp)
4787 {
4788 /* Prevent unused argument(s) compilation warning */
4789 UNUSED(hcryp);
4790
4791 /* NOTE : This function should not be modified; when the callback is needed,
4792 the HAL_CRYP_InCpltCallback can be implemented in the user file
4793 */
4794 }
4795
4796 /**
4797 * @brief Output DMA transfer complete callback.
4798 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4799 * the configuration information for CRYP module
4800 * @retval None
4801 */
4802 __weak void HAL_CRYP_OutCpltCallback(CRYP_HandleTypeDef *hcryp)
4803 {
4804 /* Prevent unused argument(s) compilation warning */
4805 UNUSED(hcryp);
4806
4807 /* NOTE : This function should not be modified; when the callback is needed,
4808 the HAL_CRYP_OutCpltCallback can be implemented in the user file
4809 */
4810 }
4811
4812 /**
4813 * @}
4814 */
4815
4816 /** @defgroup CRYP_Exported_Functions_Group4 CRYP IRQ handler
4817 * @brief AES IRQ handler.
4818 *
4819 @verbatim
4820 ==============================================================================
4821 ##### AES IRQ handler management #####
4822 ==============================================================================
4823 [..] This section provides AES IRQ handler function.
4824
4825 @endverbatim
4826 * @{
4827 */
4828
4829 /**
4830 * @brief Handle AES interrupt request.
4831 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4832 * the configuration information for CRYP module
4833 * @retval None
4834 */
4835 void HAL_CRYP_IRQHandler(CRYP_HandleTypeDef *hcryp)
4836 {
4837 /* Check if error occurred */
4838 if (__HAL_CRYP_GET_IT_SOURCE(CRYP_IT_ERRIE) != RESET)
4839 {
4840 /* If Write Error occurred */
4841 if (__HAL_CRYP_GET_FLAG(CRYP_IT_WRERR) != RESET)
4842 {
4843 hcryp->ErrorCode |= HAL_CRYP_WRITE_ERROR;
4844 hcryp->State = HAL_CRYP_STATE_ERROR;
4845 }
4846 /* If Read Error occurred */
4847 if (__HAL_CRYP_GET_FLAG(CRYP_IT_RDERR) != RESET)
4848 {
4849 hcryp->ErrorCode |= HAL_CRYP_READ_ERROR;
4850 hcryp->State = HAL_CRYP_STATE_ERROR;
4851 }
4852
4853 /* If an error has been reported */
4854 if (hcryp->State == HAL_CRYP_STATE_ERROR)
4855 {
4856 /* Disable Error and Computation Complete Interrupts */
4857 __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE);
4858 /* Clear all Interrupt flags */
4859 __HAL_CRYP_CLEAR_FLAG(CRYP_ERR_CLEAR|CRYP_CCF_CLEAR);
4860
4861 /* Process Unlocked */
4862 __HAL_UNLOCK(hcryp);
4863
4864 HAL_CRYP_ErrorCallback(hcryp);
4865
4866 return;
4867 }
4868 }
4869
4870 /* Check if computation complete interrupt is enabled
4871 and if the computation complete flag is raised */
4872 if((__HAL_CRYP_GET_FLAG(CRYP_IT_CCF) != RESET) && (__HAL_CRYP_GET_IT_SOURCE(CRYP_IT_CCFIE) != RESET))
4873 {
4874 #if defined(AES_CR_NPBLB)
4875 if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
4876 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CCM_CMAC))
4877 #else
4878 if ((hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_GCM_GMAC)
4879 || (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC))
4880 #endif
4881 {
4882 /* To ensure proper suspension requests management, CCF flag
4883 is reset in CRYP_AES_Auth_IT() according to the current
4884 phase under handling */
4885 CRYP_AES_Auth_IT(hcryp);
4886 }
4887 else
4888 {
4889 /* Clear Computation Complete Flag */
4890 __HAL_CRYP_CLEAR_FLAG(CRYP_CCF_CLEAR);
4891 CRYP_AES_IT(hcryp);
4892 }
4893 }
4894 }
4895
4896 /**
4897 * @}
4898 */
4899
4900 /** @defgroup CRYP_Exported_Functions_Group5 Peripheral State functions
4901 * @brief Peripheral State functions.
4902 *
4903 @verbatim
4904 ==============================================================================
4905 ##### Peripheral State functions #####
4906 ==============================================================================
4907 [..]
4908 This subsection permits to get in run-time the status of the peripheral.
4909
4910 @endverbatim
4911 * @{
4912 */
4913
4914 /**
4915 * @brief Return the CRYP handle state.
4916 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4917 * the configuration information for CRYP module
4918 * @retval HAL state
4919 */
4920 HAL_CRYP_STATETypeDef HAL_CRYP_GetState(CRYP_HandleTypeDef *hcryp)
4921 {
4922 /* Return CRYP handle state */
4923 return hcryp->State;
4924 }
4925
4926 /**
4927 * @brief Return the CRYP peripheral error.
4928 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4929 * the configuration information for CRYP module
4930 * @note The returned error is a bit-map combination of possible errors
4931 * @retval Error bit-map
4932 */
4933 uint32_t HAL_CRYP_GetError(CRYP_HandleTypeDef *hcryp)
4934 {
4935 return hcryp->ErrorCode;
4936 }
4937
4938 /**
4939 * @}
4940 */
4941
4942 /**
4943 * @}
4944 */
4945
4946 /** @addtogroup CRYP_Private_Functions
4947 * @{
4948 */
4949
4950
4951 /**
4952 * @brief Write the Key in KeyRx registers.
4953 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4954 * the configuration information for CRYP module
4955 * @retval None
4956 */
4957 static HAL_StatusTypeDef CRYP_SetKey(CRYP_HandleTypeDef *hcryp)
4958 {
4959 uint32_t keyaddr = 0x0U;
4960
4961 if ((uint32_t)(hcryp->Init.pKey == NULL))
4962 {
4963 return HAL_ERROR;
4964 }
4965
4966
4967 keyaddr = (uint32_t)(hcryp->Init.pKey);
4968
4969 if (hcryp->Init.KeySize == CRYP_KEYSIZE_256B)
4970 {
4971 hcryp->Instance->KEYR7 = __REV(*(uint32_t*)(keyaddr));
4972 keyaddr+=4U;
4973 hcryp->Instance->KEYR6 = __REV(*(uint32_t*)(keyaddr));
4974 keyaddr+=4U;
4975 hcryp->Instance->KEYR5 = __REV(*(uint32_t*)(keyaddr));
4976 keyaddr+=4U;
4977 hcryp->Instance->KEYR4 = __REV(*(uint32_t*)(keyaddr));
4978 keyaddr+=4U;
4979 }
4980
4981 hcryp->Instance->KEYR3 = __REV(*(uint32_t*)(keyaddr));
4982 keyaddr+=4U;
4983 hcryp->Instance->KEYR2 = __REV(*(uint32_t*)(keyaddr));
4984 keyaddr+=4U;
4985 hcryp->Instance->KEYR1 = __REV(*(uint32_t*)(keyaddr));
4986 keyaddr+=4U;
4987 hcryp->Instance->KEYR0 = __REV(*(uint32_t*)(keyaddr));
4988
4989 return HAL_OK;
4990 }
4991
4992 /**
4993 * @brief Write the InitVector/InitCounter in IVRx registers.
4994 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
4995 * the configuration information for CRYP module
4996 * @retval None
4997 */
4998 static HAL_StatusTypeDef CRYP_SetInitVector(CRYP_HandleTypeDef *hcryp)
4999 {
5000 uint32_t ivaddr = 0x0U;
5001
5002 #if !defined(AES_CR_NPBLB)
5003 if (hcryp->Init.ChainingMode == CRYP_CHAINMODE_AES_CMAC)
5004 {
5005 hcryp->Instance->IVR3 = 0U;
5006 hcryp->Instance->IVR2 = 0U;
5007 hcryp->Instance->IVR1 = 0U;
5008 hcryp->Instance->IVR0 = 0U;
5009 }
5010 else
5011 #endif
5012 {
5013 if (hcryp->Init.pInitVect == NULL)
5014 {
5015 return HAL_ERROR;
5016 }
5017
5018 ivaddr = (uint32_t)(hcryp->Init.pInitVect);
5019
5020 hcryp->Instance->IVR3 = __REV(*(uint32_t*)(ivaddr));
5021 ivaddr+=4U;
5022 hcryp->Instance->IVR2 = __REV(*(uint32_t*)(ivaddr));
5023 ivaddr+=4U;
5024 hcryp->Instance->IVR1 = __REV(*(uint32_t*)(ivaddr));
5025 ivaddr+=4U;
5026 hcryp->Instance->IVR0 = __REV(*(uint32_t*)(ivaddr));
5027 }
5028 return HAL_OK;
5029 }
5030
5031
5032
5033 /**
5034 * @brief Handle CRYP block input/output data handling under interruption.
5035 * @note The function is called under interruption only, once
5036 * interruptions have been enabled by HAL_CRYPEx_AES_IT().
5037 * @param hcryp: pointer to a CRYP_HandleTypeDef structure that contains
5038 * the configuration information for CRYP module.
5039 * @retval HAL status
5040 */
5041 static HAL_StatusTypeDef CRYP_AES_IT(CRYP_HandleTypeDef *hcryp)
5042 {
5043 uint32_t inputaddr = 0U;
5044 uint32_t outputaddr = 0U;
5045
5046 if(hcryp->State == HAL_CRYP_STATE_BUSY)
5047 {
5048 if (hcryp->Init.OperatingMode != CRYP_ALGOMODE_KEYDERIVATION)
5049 {
5050 /* Get the output data address */
5051 outputaddr = (uint32_t)hcryp->pCrypOutBuffPtr;
5052
5053 /* Read the last available output block from the Data Output Register */
5054 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
5055 outputaddr+=4U;
5056 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
5057 outputaddr+=4U;
5058 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
5059 outputaddr+=4U;
5060 *(uint32_t*)(outputaddr) = hcryp->Instance->DOUTR;
5061 hcryp->pCrypOutBuffPtr += 16U;
5062 hcryp->CrypOutCount -= 16U;
5063
5064 }
5065 else
5066 {
5067 /* Read the derived key from the Key registers */
5068 if (hcryp->Init.KeySize == CRYP_KEYSIZE_256B)
5069 {
5070 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR7);
5071 outputaddr+=4U;
5072 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR6);
5073 outputaddr+=4U;
5074 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR5);
5075 outputaddr+=4U;
5076 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR4);
5077 outputaddr+=4U;
5078 }
5079
5080 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR3);
5081 outputaddr+=4U;
5082 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR2);
5083 outputaddr+=4U;
5084 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR1);
5085 outputaddr+=4U;
5086 *(uint32_t*)(outputaddr) = __REV(hcryp->Instance->KEYR0);
5087 }
5088
5089 /* In case of ciphering or deciphering, check if all output text has been retrieved;
5090 In case of key derivation, stop right there */
5091 if ((hcryp->CrypOutCount == 0U) || (hcryp->Init.OperatingMode == CRYP_ALGOMODE_KEYDERIVATION))
5092 {
5093 /* Disable Computation Complete Flag and Errors Interrupts */
5094 __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE);
5095 /* Change the CRYP state */
5096 hcryp->State = HAL_CRYP_STATE_READY;
5097
5098 /* Process Unlocked */
5099 __HAL_UNLOCK(hcryp);
5100
5101 /* Call computation complete callback */
5102 HAL_CRYPEx_ComputationCpltCallback(hcryp);
5103
5104 return HAL_OK;
5105 }
5106 /* If suspension flag has been raised, suspend processing */
5107 else if (hcryp->SuspendRequest == HAL_CRYP_SUSPEND)
5108 {
5109 /* reset ModeSuspend */
5110 hcryp->SuspendRequest = HAL_CRYP_SUSPEND_NONE;
5111
5112 /* Disable Computation Complete Flag and Errors Interrupts */
5113 __HAL_CRYP_DISABLE_IT(CRYP_IT_CCFIE|CRYP_IT_ERRIE);
5114 /* Change the CRYP state */
5115 hcryp->State = HAL_CRYP_STATE_SUSPENDED;
5116
5117 /* Process Unlocked */
5118 __HAL_UNLOCK(hcryp);
5119
5120 return HAL_OK;
5121 }
5122 else /* Process the rest of input data */
5123 {
5124 /* Get the Intput data address */
5125 inputaddr = (uint32_t)hcryp->pCrypInBuffPtr;
5126
5127 /* Increment/decrement instance pointer/counter */
5128 hcryp->pCrypInBuffPtr += 16U;
5129 hcryp->CrypInCount -= 16U;
5130
5131 /* Write the next input block in the Data Input register */
5132 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
5133 inputaddr+=4U;
5134 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
5135 inputaddr+=4U;
5136 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
5137 inputaddr+=4U;
5138 hcryp->Instance->DINR = *(uint32_t*)(inputaddr);
5139
5140 return HAL_OK;
5141 }
5142 }
5143 else
5144 {
5145 return HAL_BUSY;
5146 }
5147 }
5148
5149 /**
5150 * @}
5151 */
5152
5153 #endif /* AES */
5154
5155 #endif /* HAL_CRYP_MODULE_ENABLED */
5156
5157 /**
5158 * @}
5159 */
5160
5161 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/