lib/main/STM32F4/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_sdmmc.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_ll_sdmmc.c
   4   * @author  MCD Application Team
   5   * @version V1.7.1
   6   * @date    14-April-2017
   7   * @brief   SDMMC Low Layer HAL module driver.
   8   *
   9   *          This file provides firmware functions to manage the following
  10   *          functionalities of the SDMMC peripheral:
  11   *           + Initialization/de-initialization functions
  12   *           + I/O operation functions
  13   *           + Peripheral Control functions
  14   *           + Peripheral State functions
  15   *
  16   @verbatim
  17   ==============================================================================
  18                        ##### SDMMC peripheral features #####
  19   ==============================================================================
  20     [..] The SD/SDMMC MMC card host interface (SDMMC) provides an interface between the APB2
  21          peripheral bus and MultiMedia cards (MMCs), SD memory cards, SDMMC cards and CE-ATA
  22          devices.
  23
  24     [..] The SDMMC features include the following:
  25          (+) Full compliance with MultiMedia Card System Specification Version 4.2. Card support
  26              for three different databus modes: 1-bit (default), 4-bit and 8-bit
  27          (+) Full compatibility with previous versions of MultiMedia Cards (forward compatibility)
  28          (+) Full compliance with SD Memory Card Specifications Version 2.0
  29          (+) Full compliance with SD I/O Card Specification Version 2.0: card support for two
  30              different data bus modes: 1-bit (default) and 4-bit
  31          (+) Full support of the CE-ATA features (full compliance with CE-ATA digital protocol
  32              Rev1.1)
  33          (+) Data transfer up to 48 MHz for the 8 bit mode
  34          (+) Data and command output enable signals to control external bidirectional drivers.
  35
  36
  37                            ##### How to use this driver #####
  38   ==============================================================================
  39     [..]
  40       This driver is a considered as a driver of service for external devices drivers
  41       that interfaces with the SDMMC peripheral.
  42       According to the device used (SD card/ MMC card / SDMMC card ...), a set of APIs
  43       is used in the device's driver to perform SDMMC operations and functionalities.
  44
  45       This driver is almost transparent for the final user, it is only used to implement other
  46       functionalities of the external device.
  47
  48     [..]
  49       (+) The SDMMC clock (SDMMCCLK = 48 MHz) is coming from a specific output of PLL
  50           (PLL48CLK). Before start working with SDMMC peripheral make sure that the
  51           PLL is well configured.
  52           The SDMMC peripheral uses two clock signals:
  53           (++) SDMMC adapter clock (SDMMCCLK = 48 MHz)
  54           (++) APB2 bus clock (PCLK2)
  55
  56           -@@- PCLK2 and SDMMC_CK clock frequencies must respect the following condition:
  57                Frequency(PCLK2) >= (3 / 8 x Frequency(SDMMC_CK))
  58
  59       (+) Enable/Disable peripheral clock using RCC peripheral macros related to SDMMC
  60           peripheral.
  61
  62       (+) Enable the Power ON State using the SDIO_PowerState_ON(SDIOx)
  63           function and disable it using the function SDIO_PowerState_ON(SDIOx).
  64
  65       (+) Enable/Disable the clock using the __SDIO_ENABLE()/__SDIO_DISABLE() macros.
  66
  67       (+) Enable/Disable the peripheral interrupts using the macros __SDIO_ENABLE_IT(hSDIO, IT)
  68           and __SDIO_DISABLE_IT(hSDIO, IT) if you need to use interrupt mode.
  69
  70       (+) When using the DMA mode
  71           (++) Configure the DMA in the MSP layer of the external device
  72           (++) Active the needed channel Request
  73           (++) Enable the DMA using __SDIO_DMA_ENABLE() macro or Disable it using the macro
  74                __SDIO_DMA_DISABLE().
  75
  76       (+) To control the CPSM (Command Path State Machine) and send
  77           commands to the card use the SDIO_SendCommand(),
  78           SDIO_GetCommandResponse() and SDIO_GetResponse() functions. First, user has
  79           to fill the command structure (pointer to SDIO_CmdInitTypeDef) according
  80           to the selected command to be sent.
  81           The parameters that should be filled are:
  82            (++) Command Argument
  83            (++) Command Index
  84            (++) Command Response type
  85            (++) Command Wait
  86            (++) CPSM Status (Enable or Disable).
  87
  88           -@@- To check if the command is well received, read the SDIO_CMDRESP
  89               register using the SDIO_GetCommandResponse().
  90               The SDMMC responses registers (SDIO_RESP1 to SDIO_RESP2), use the
  91               SDIO_GetResponse() function.
  92
  93       (+) To control the DPSM (Data Path State Machine) and send/receive
  94            data to/from the card use the SDIO_ConfigData(), SDIO_GetDataCounter(),
  95           SDIO_ReadFIFO(), SDIO_WriteFIFO() and SDIO_GetFIFOCount() functions.
  96
  97     *** Read Operations ***
  98     =======================
  99     [..]
 100       (#) First, user has to fill the data structure (pointer to
 101           SDIO_DataInitTypeDef) according to the selected data type to be received.
 102           The parameters that should be filled are:
 103            (++) Data TimeOut
 104            (++) Data Length
 105            (++) Data Block size
 106            (++) Data Transfer direction: should be from card (To SDMMC)
 107            (++) Data Transfer mode
 108            (++) DPSM Status (Enable or Disable)
 109
 110       (#) Configure the SDMMC resources to receive the data from the card
 111           according to selected transfer mode (Refer to Step 8, 9 and 10).
 112
 113       (#) Send the selected Read command (refer to step 11).
 114
 115       (#) Use the SDIO flags/interrupts to check the transfer status.
 116
 117     *** Write Operations ***
 118     ========================
 119     [..]
 120      (#) First, user has to fill the data structure (pointer to
 121          SDIO_DataInitTypeDef) according to the selected data type to be received.
 122          The parameters that should be filled are:
 123           (++) Data TimeOut
 124           (++) Data Length
 125           (++) Data Block size
 126           (++) Data Transfer direction:  should be to card (To CARD)
 127           (++) Data Transfer mode
 128           (++) DPSM Status (Enable or Disable)
 129
 130      (#) Configure the SDMMC resources to send the data to the card according to
 131          selected transfer mode.
 132
 133      (#) Send the selected Write command.
 134
 135      (#) Use the SDIO flags/interrupts to check the transfer status.
 136
 137     *** Command management operations ***
 138     =====================================
 139     [..]
 140      (#) The commands used for Read/Write/Erase operations are managed in
 141          separate functions.
 142          Each function allows to send the needed command with the related argument,
 143          then check the response.
 144          By the same approach, you could implement a command and check the response.
 145
 146   @endverbatim
 147   ******************************************************************************
 148   * @attention
 149   *
 150   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
 151   *
 152   * Redistribution and use in source and binary forms, with or without modification,
 153   * are permitted provided that the following conditions are met:
 154   *   1. Redistributions of source code must retain the above copyright notice,
 155   *      this list of conditions and the following disclaimer.
 156   *   2. Redistributions in binary form must reproduce the above copyright notice,
 157   *      this list of conditions and the following disclaimer in the documentation
 158   *      and/or other materials provided with the distribution.
 159   *   3. Neither the name of STMicroelectronics nor the names of its contributors
 160   *      may be used to endorse or promote products derived from this software
 161   *      without specific prior written permission.
 162   *
 163   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
 164   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
 165   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
 166   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
 167   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
 168   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
 169   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
 170   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
 171   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 172   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 173   *
 174   ******************************************************************************
 175   */
 176
 177 /* Includes ------------------------------------------------------------------*/
 178 #include "stm32f4xx_hal.h"
 179
 180 /** @addtogroup STM32F4xx_HAL_Driver
 181   * @{
 182   */
 183
 184 /** @defgroup SDMMC_LL SDMMC Low Layer
 185   * @brief Low layer module for SD
 186   * @{
 187   */
 188
 189 #if defined(HAL_SD_MODULE_ENABLED) || defined(HAL_MMC_MODULE_ENABLED)
 190 #if defined(STM32F405xx) || defined(STM32F415xx) || defined(STM32F407xx) || defined(STM32F417xx) || \
 191     defined(STM32F427xx) || defined(STM32F437xx) || defined(STM32F429xx) || defined(STM32F439xx) || \
 192     defined(STM32F401xC) || defined(STM32F401xE) || defined(STM32F411xE) || defined(STM32F446xx) || \
 193     defined(STM32F469xx) || defined(STM32F479xx) || defined(STM32F412Zx) || defined(STM32F412Vx) || \
 194     defined(STM32F412Rx) || defined(STM32F412Cx) || defined(STM32F413xx) || defined(STM32F423xx)
 195
 196 /* Private typedef -----------------------------------------------------------*/
 197 /* Private define ------------------------------------------------------------*/
 198 /* Private macro -------------------------------------------------------------*/
 199 /* Private variables ---------------------------------------------------------*/
 200 /* Private function prototypes -----------------------------------------------*/
 201 static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx);
 202 static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout);
 203 static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx);
 204 static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx);
 205 static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx);
 206 static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA);
 207
 208 /* Exported functions --------------------------------------------------------*/
 209
 210 /** @defgroup SDMMC_LL_Exported_Functions SDMMC Low Layer Exported Functions
 211   * @{
 212   */
 213
 214 /** @defgroup HAL_SDMMC_LL_Group1 Initialization de-initialization functions
 215  *  @brief    Initialization and Configuration functions
 216  *
 217 @verbatim
 218  ===============================================================================
 219               ##### Initialization/de-initialization functions #####
 220  ===============================================================================
 221     [..]  This section provides functions allowing to:
 222
 223 @endverbatim
 224   * @{
 225   */
 226
 227 /**
 228   * @brief  Initializes the SDMMC according to the specified
 229   *         parameters in the SDMMC_InitTypeDef and create the associated handle.
 230   * @param  SDIOx: Pointer to SDMMC register base
 231   * @param  Init: SDMMC initialization structure
 232   * @retval HAL status
 233   */
 234 HAL_StatusTypeDef SDIO_Init(SDIO_TypeDef *SDIOx, SDIO_InitTypeDef Init)
 235 {
 236   uint32_t tmpreg = 0U;
 237
 238   /* Check the parameters */
 239   assert_param(IS_SDIO_ALL_INSTANCE(SDIOx));
 240   assert_param(IS_SDIO_CLOCK_EDGE(Init.ClockEdge));
 241   assert_param(IS_SDIO_CLOCK_BYPASS(Init.ClockBypass));
 242   assert_param(IS_SDIO_CLOCK_POWER_SAVE(Init.ClockPowerSave));
 243   assert_param(IS_SDIO_BUS_WIDE(Init.BusWide));
 244   assert_param(IS_SDIO_HARDWARE_FLOW_CONTROL(Init.HardwareFlowControl));
 245   assert_param(IS_SDIO_CLKDIV(Init.ClockDiv));
 246
 247   /* Set SDMMC configuration parameters */
 248   tmpreg |= (Init.ClockEdge           |\
 249              Init.ClockBypass         |\
 250              Init.ClockPowerSave      |\
 251              Init.BusWide             |\
 252              Init.HardwareFlowControl |\
 253              Init.ClockDiv
 254              );
 255
 256   /* Write to SDMMC CLKCR */
 257   MODIFY_REG(SDIOx->CLKCR, CLKCR_CLEAR_MASK, tmpreg);
 258
 259   return HAL_OK;
 260 }
 261
 262
 263 /**
 264   * @}
 265   */
 266
 267 /** @defgroup HAL_SDMMC_LL_Group2 IO operation functions
 268  *  @brief   Data transfers functions
 269  *
 270 @verbatim
 271  ===============================================================================
 272                       ##### I/O operation functions #####
 273  ===============================================================================
 274     [..]
 275     This subsection provides a set of functions allowing to manage the SDMMC data
 276     transfers.
 277
 278 @endverbatim
 279   * @{
 280   */
 281
 282 /**
 283   * @brief  Read data (word) from Rx FIFO in blocking mode (polling)
 284   * @param  SDIOx: Pointer to SDMMC register base
 285   * @retval HAL status
 286   */
 287 uint32_t SDIO_ReadFIFO(SDIO_TypeDef *SDIOx)
 288 {
 289   /* Read data from Rx FIFO */
 290   return (SDIOx->FIFO);
 291 }
 292
 293 /**
 294   * @brief  Write data (word) to Tx FIFO in blocking mode (polling)
 295   * @param  SDIOx: Pointer to SDMMC register base
 296   * @param  pWriteData: pointer to data to write
 297   * @retval HAL status
 298   */
 299 HAL_StatusTypeDef SDIO_WriteFIFO(SDIO_TypeDef *SDIOx, uint32_t *pWriteData)
 300 {
 301   /* Write data to FIFO */
 302   SDIOx->FIFO = *pWriteData;
 303
 304   return HAL_OK;
 305 }
 306
 307 /**
 308   * @}
 309   */
 310
 311 /** @defgroup HAL_SDMMC_LL_Group3 Peripheral Control functions
 312  *  @brief   management functions
 313  *
 314 @verbatim
 315  ===============================================================================
 316                       ##### Peripheral Control functions #####
 317  ===============================================================================
 318     [..]
 319     This subsection provides a set of functions allowing to control the SDMMC data
 320     transfers.
 321
 322 @endverbatim
 323   * @{
 324   */
 325
 326 /**
 327   * @brief  Set SDMMC Power state to ON.
 328   * @param  SDIOx: Pointer to SDMMC register base
 329   * @retval HAL status
 330   */
 331 HAL_StatusTypeDef SDIO_PowerState_ON(SDIO_TypeDef *SDIOx)
 332 {
 333   /* Set power state to ON */
 334   SDIOx->POWER = SDIO_POWER_PWRCTRL;
 335
 336   return HAL_OK;
 337 }
 338
 339 /**
 340   * @brief  Set SDMMC Power state to OFF.
 341   * @param  SDIOx: Pointer to SDMMC register base
 342   * @retval HAL status
 343   */
 344 HAL_StatusTypeDef SDIO_PowerState_OFF(SDIO_TypeDef *SDIOx)
 345 {
 346   /* Set power state to OFF */
 347   SDIOx->POWER = 0x00000000U;
 348
 349   return HAL_OK;
 350 }
 351
 352 /**
 353   * @brief  Get SDMMC Power state.
 354   * @param  SDIOx: Pointer to SDMMC register base
 355   * @retval Power status of the controller. The returned value can be one of the
 356   *         following values:
 357   *            - 0x00: Power OFF
 358   *            - 0x02: Power UP
 359   *            - 0x03: Power ON
 360   */
 361 uint32_t SDIO_GetPowerState(SDIO_TypeDef *SDIOx)
 362 {
 363   return (SDIOx->POWER & SDIO_POWER_PWRCTRL);
 364 }
 365
 366 /**
 367   * @brief  Configure the SDMMC command path according to the specified parameters in
 368   *         SDIO_CmdInitTypeDef structure and send the command
 369   * @param  SDIOx: Pointer to SDMMC register base
 370   * @param  Command: pointer to a SDIO_CmdInitTypeDef structure that contains
 371   *         the configuration information for the SDMMC command
 372   * @retval HAL status
 373   */
 374 HAL_StatusTypeDef SDIO_SendCommand(SDIO_TypeDef *SDIOx, SDIO_CmdInitTypeDef *Command)
 375 {
 376   uint32_t tmpreg = 0U;
 377
 378   /* Check the parameters */
 379   assert_param(IS_SDIO_CMD_INDEX(Command->CmdIndex));
 380   assert_param(IS_SDIO_RESPONSE(Command->Response));
 381   assert_param(IS_SDIO_WAIT(Command->WaitForInterrupt));
 382   assert_param(IS_SDIO_CPSM(Command->CPSM));
 383
 384   /* Set the SDMMC Argument value */
 385   SDIOx->ARG = Command->Argument;
 386
 387   /* Set SDMMC command parameters */
 388   tmpreg |= (uint32_t)(Command->CmdIndex         |\
 389                        Command->Response         |\
 390                        Command->WaitForInterrupt |\
 391                        Command->CPSM);
 392
 393   /* Write to SDMMC CMD register */
 394   MODIFY_REG(SDIOx->CMD, CMD_CLEAR_MASK, tmpreg);
 395
 396   return HAL_OK;
 397 }
 398
 399 /**
 400   * @brief  Return the command index of last command for which response received
 401   * @param  SDIOx: Pointer to SDMMC register base
 402   * @retval Command index of the last command response received
 403   */
 404 uint8_t SDIO_GetCommandResponse(SDIO_TypeDef *SDIOx)
 405 {
 406   return (uint8_t)(SDIOx->RESPCMD);
 407 }
 408
 409
 410 /**
 411   * @brief  Return the response received from the card for the last command
 412   * @param  SDIOx: Pointer to SDMMC register base
 413   * @param  Response: Specifies the SDMMC response register.
 414   *          This parameter can be one of the following values:
 415   *            @arg SDIO_RESP1: Response Register 1
 416   *            @arg SDIO_RESP1: Response Register 2
 417   *            @arg SDIO_RESP1: Response Register 3
 418   *            @arg SDIO_RESP1: Response Register 4
 419   * @retval The Corresponding response register value
 420   */
 421 uint32_t SDIO_GetResponse(SDIO_TypeDef *SDIOx, uint32_t Response)
 422 {
 423   __IO uint32_t tmp = 0U;
 424
 425   /* Check the parameters */
 426   assert_param(IS_SDIO_RESP(Response));
 427
 428   /* Get the response */
 429   tmp = (uint32_t)&(SDIOx->RESP1) + Response;
 430
 431   return (*(__IO uint32_t *) tmp);
 432 }
 433
 434 /**
 435   * @brief  Configure the SDMMC data path according to the specified
 436   *         parameters in the SDIO_DataInitTypeDef.
 437   * @param  SDIOx: Pointer to SDMMC register base
 438   * @param  Data : pointer to a SDIO_DataInitTypeDef structure
 439   *         that contains the configuration information for the SDMMC data.
 440   * @retval HAL status
 441   */
 442 HAL_StatusTypeDef SDIO_ConfigData(SDIO_TypeDef *SDIOx, SDIO_DataInitTypeDef* Data)
 443 {
 444   uint32_t tmpreg = 0U;
 445
 446   /* Check the parameters */
 447   assert_param(IS_SDIO_DATA_LENGTH(Data->DataLength));
 448   assert_param(IS_SDIO_BLOCK_SIZE(Data->DataBlockSize));
 449   assert_param(IS_SDIO_TRANSFER_DIR(Data->TransferDir));
 450   assert_param(IS_SDIO_TRANSFER_MODE(Data->TransferMode));
 451   assert_param(IS_SDIO_DPSM(Data->DPSM));
 452
 453   /* Set the SDMMC Data TimeOut value */
 454   SDIOx->DTIMER = Data->DataTimeOut;
 455
 456   /* Set the SDMMC DataLength value */
 457   SDIOx->DLEN = Data->DataLength;
 458
 459   /* Set the SDMMC data configuration parameters */
 460   tmpreg |= (uint32_t)(Data->DataBlockSize |\
 461                        Data->TransferDir   |\
 462                        Data->TransferMode  |\
 463                        Data->DPSM);
 464
 465   /* Write to SDMMC DCTRL */
 466   MODIFY_REG(SDIOx->DCTRL, DCTRL_CLEAR_MASK, tmpreg);
 467
 468   return HAL_OK;
 469
 470 }
 471
 472 /**
 473   * @brief  Returns number of remaining data bytes to be transferred.
 474   * @param  SDIOx: Pointer to SDMMC register base
 475   * @retval Number of remaining data bytes to be transferred
 476   */
 477 uint32_t SDIO_GetDataCounter(SDIO_TypeDef *SDIOx)
 478 {
 479   return (SDIOx->DCOUNT);
 480 }
 481
 482 /**
 483   * @brief  Get the FIFO data
 484   * @param  SDIOx: Pointer to SDMMC register base
 485   * @retval Data received
 486   */
 487 uint32_t SDIO_GetFIFOCount(SDIO_TypeDef *SDIOx)
 488 {
 489   return (SDIOx->FIFO);
 490 }
 491
 492 /**
 493   * @brief  Sets one of the two options of inserting read wait interval.
 494   * @param  SDIOx: Pointer to SDMMC register base
 495   * @param  SDIO_ReadWaitMode: SDMMC Read Wait operation mode.
 496   *          This parameter can be:
 497   *            @arg SDIO_READ_WAIT_MODE_CLK: Read Wait control by stopping SDMMCCLK
 498   *            @arg SDIO_READ_WAIT_MODE_DATA2: Read Wait control using SDMMC_DATA2
 499   * @retval None
 500   */
 501 HAL_StatusTypeDef SDIO_SetSDMMCReadWaitMode(SDIO_TypeDef *SDIOx, uint32_t SDIO_ReadWaitMode)
 502 {
 503   /* Check the parameters */
 504   assert_param(IS_SDIO_READWAIT_MODE(SDIO_ReadWaitMode));
 505
 506   /* Set SDMMC read wait mode */
 507   MODIFY_REG(SDIOx->DCTRL, SDIO_DCTRL_RWMOD, SDIO_ReadWaitMode);
 508
 509   return HAL_OK;
 510 }
 511
 512 /**
 513   * @}
 514   */
 515
 516
 517 /** @defgroup HAL_SDMMC_LL_Group4 Command management functions
 518  *  @brief   Data transfers functions
 519  *
 520 @verbatim
 521  ===============================================================================
 522                    ##### Commands management functions #####
 523  ===============================================================================
 524     [..]
 525     This subsection provides a set of functions allowing to manage the needed commands.
 526
 527 @endverbatim
 528   * @{
 529   */
 530
 531 /**
 532   * @brief  Send the Data Block Lenght command and check the response
 533   * @param  SDIOx: Pointer to SDMMC register base
 534   * @retval HAL status
 535   */
 536 uint32_t SDMMC_CmdBlockLength(SDIO_TypeDef *SDIOx, uint32_t BlockSize)
 537 {
 538   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 539   uint32_t errorstate = SDMMC_ERROR_NONE;
 540
 541   /* Set Block Size for Card */
 542   sdmmc_cmdinit.Argument         = (uint32_t)BlockSize;
 543   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SET_BLOCKLEN;
 544   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 545   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 546   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 547   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 548
 549   /* Check for error conditions */
 550   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SET_BLOCKLEN, SDIO_CMDTIMEOUT);
 551
 552   return errorstate;
 553 }
 554
 555 /**
 556   * @brief  Send the Read Single Block command and check the response
 557   * @param  SDIOx: Pointer to SDMMC register base
 558   * @retval HAL status
 559   */
 560 uint32_t SDMMC_CmdReadSingleBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
 561 {
 562   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 563   uint32_t errorstate = SDMMC_ERROR_NONE;
 564
 565   /* Set Block Size for Card */
 566   sdmmc_cmdinit.Argument         = (uint32_t)ReadAdd;
 567   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_READ_SINGLE_BLOCK;
 568   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 569   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 570   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 571   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 572
 573   /* Check for error conditions */
 574   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
 575
 576   return errorstate;
 577 }
 578
 579 /**
 580   * @brief  Send the Read Multi Block command and check the response
 581   * @param  SDIOx: Pointer to SDIO register base
 582   * @retval HAL status
 583   */
 584 uint32_t SDMMC_CmdReadMultiBlock(SDIO_TypeDef *SDIOx, uint32_t ReadAdd)
 585 {
 586   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 587   uint32_t errorstate = SDMMC_ERROR_NONE;
 588
 589   /* Set Block Size for Card */
 590   sdmmc_cmdinit.Argument         = (uint32_t)ReadAdd;
 591   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_READ_MULT_BLOCK;
 592   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 593   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 594   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 595   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 596
 597   /* Check for error conditions */
 598   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_READ_MULT_BLOCK, SDIO_CMDTIMEOUT);
 599
 600   return errorstate;
 601 }
 602
 603 /**
 604   * @brief  Send the Write Single Block command and check the response
 605   * @param  SDIOx: Pointer to SDIO register base
 606   * @retval HAL status
 607   */
 608 uint32_t SDMMC_CmdWriteSingleBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
 609 {
 610   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 611   uint32_t errorstate = SDMMC_ERROR_NONE;
 612
 613   /* Set Block Size for Card */
 614   sdmmc_cmdinit.Argument         = (uint32_t)WriteAdd;
 615   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_WRITE_SINGLE_BLOCK;
 616   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 617   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 618   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 619   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 620
 621   /* Check for error conditions */
 622   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_SINGLE_BLOCK, SDIO_CMDTIMEOUT);
 623
 624   return errorstate;
 625 }
 626
 627 /**
 628   * @brief  Send the Write Multi Block command and check the response
 629   * @param  SDIOx: Pointer to SDIO register base
 630   * @retval HAL status
 631   */
 632 uint32_t SDMMC_CmdWriteMultiBlock(SDIO_TypeDef *SDIOx, uint32_t WriteAdd)
 633 {
 634   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 635   uint32_t errorstate = SDMMC_ERROR_NONE;
 636
 637   /* Set Block Size for Card */
 638   sdmmc_cmdinit.Argument         = (uint32_t)WriteAdd;
 639   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_WRITE_MULT_BLOCK;
 640   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 641   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 642   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 643   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 644
 645   /* Check for error conditions */
 646   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_WRITE_MULT_BLOCK, SDIO_CMDTIMEOUT);
 647
 648   return errorstate;
 649 }
 650
 651 /**
 652   * @brief  Send the Start Address Erase command for SD and check the response
 653   * @param  SDIOx: Pointer to SDIO register base
 654   * @retval HAL status
 655   */
 656 uint32_t SDMMC_CmdSDEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
 657 {
 658   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 659   uint32_t errorstate = SDMMC_ERROR_NONE;
 660
 661   /* Set Block Size for Card */
 662   sdmmc_cmdinit.Argument         = (uint32_t)StartAdd;
 663   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SD_ERASE_GRP_START;
 664   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 665   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 666   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 667   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 668
 669   /* Check for error conditions */
 670   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
 671
 672   return errorstate;
 673 }
 674
 675 /**
 676   * @brief  Send the End Address Erase command for SD and check the response
 677   * @param  SDIOx: Pointer to SDIO register base
 678   * @retval HAL status
 679   */
 680 uint32_t SDMMC_CmdSDEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
 681 {
 682   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 683   uint32_t errorstate = SDMMC_ERROR_NONE;
 684
 685   /* Set Block Size for Card */
 686   sdmmc_cmdinit.Argument         = (uint32_t)EndAdd;
 687   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SD_ERASE_GRP_END;
 688   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 689   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 690   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 691   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 692
 693   /* Check for error conditions */
 694   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_ERASE_GRP_END, SDIO_CMDTIMEOUT);
 695
 696   return errorstate;
 697 }
 698
 699 /**
 700   * @brief  Send the Start Address Erase command and check the response
 701   * @param  SDIOx: Pointer to SDIO register base
 702   * @retval HAL status
 703   */
 704 uint32_t SDMMC_CmdEraseStartAdd(SDIO_TypeDef *SDIOx, uint32_t StartAdd)
 705 {
 706   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 707   uint32_t errorstate = SDMMC_ERROR_NONE;
 708
 709   /* Set Block Size for Card */
 710   sdmmc_cmdinit.Argument         = (uint32_t)StartAdd;
 711   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_ERASE_GRP_START;
 712   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 713   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 714   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 715   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 716
 717   /* Check for error conditions */
 718   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_START, SDIO_CMDTIMEOUT);
 719
 720   return errorstate;
 721 }
 722
 723 /**
 724   * @brief  Send the End Address Erase command and check the response
 725   * @param  SDIOx: Pointer to SDIO register base
 726   * @retval HAL status
 727   */
 728 uint32_t SDMMC_CmdEraseEndAdd(SDIO_TypeDef *SDIOx, uint32_t EndAdd)
 729 {
 730   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 731   uint32_t errorstate = SDMMC_ERROR_NONE;
 732
 733   /* Set Block Size for Card */
 734   sdmmc_cmdinit.Argument         = (uint32_t)EndAdd;
 735   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_ERASE_GRP_END;
 736   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 737   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 738   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 739   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 740
 741   /* Check for error conditions */
 742   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE_GRP_END, SDIO_CMDTIMEOUT);
 743
 744   return errorstate;
 745 }
 746
 747 /**
 748   * @brief  Send the Erase command and check the response
 749   * @param  SDIOx: Pointer to SDIO register base
 750   * @retval HAL status
 751   */
 752 uint32_t SDMMC_CmdErase(SDIO_TypeDef *SDIOx)
 753 {
 754   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 755   uint32_t errorstate = SDMMC_ERROR_NONE;
 756
 757   /* Set Block Size for Card */
 758   sdmmc_cmdinit.Argument         = 0U;
 759   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_ERASE;
 760   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 761   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 762   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 763   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 764
 765   /* Check for error conditions */
 766   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_ERASE, SDIO_MAXERASETIMEOUT);
 767
 768   return errorstate;
 769 }
 770
 771 /**
 772   * @brief  Send the Stop Transfer command and check the response.
 773   * @param  SDIOx: Pointer to SDIO register base
 774   * @retval HAL status
 775   */
 776 uint32_t SDMMC_CmdStopTransfer(SDIO_TypeDef *SDIOx)
 777 {
 778   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 779   uint32_t errorstate = SDMMC_ERROR_NONE;
 780
 781   /* Send CMD12 STOP_TRANSMISSION  */
 782   sdmmc_cmdinit.Argument         = 0U;
 783   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_STOP_TRANSMISSION;
 784   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 785   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 786   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 787   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 788
 789   /* Check for error conditions */
 790   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_STOP_TRANSMISSION, 100000000U);
 791
 792   return errorstate;
 793 }
 794
 795 /**
 796   * @brief  Send the Select Deselect command and check the response.
 797   * @param  SDIOx: Pointer to SDIO register base
 798   * @param  addr: Address of the card to be selected
 799   * @retval HAL status
 800   */
 801 uint32_t SDMMC_CmdSelDesel(SDIO_TypeDef *SDIOx, uint64_t Addr)
 802 {
 803   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 804   uint32_t errorstate = SDMMC_ERROR_NONE;
 805
 806   /* Send CMD7 SDMMC_SEL_DESEL_CARD */
 807   sdmmc_cmdinit.Argument         = (uint32_t)Addr;
 808   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SEL_DESEL_CARD;
 809   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 810   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 811   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 812   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 813
 814   /* Check for error conditions */
 815   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEL_DESEL_CARD, SDIO_CMDTIMEOUT);
 816
 817   return errorstate;
 818 }
 819
 820 /**
 821   * @brief  Send the Go Idle State command and check the response.
 822   * @param  SDIOx: Pointer to SDIO register base
 823   * @retval HAL status
 824   */
 825 uint32_t SDMMC_CmdGoIdleState(SDIO_TypeDef *SDIOx)
 826 {
 827   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 828   uint32_t errorstate = SDMMC_ERROR_NONE;
 829
 830   sdmmc_cmdinit.Argument         = 0U;
 831   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_GO_IDLE_STATE;
 832   sdmmc_cmdinit.Response         = SDIO_RESPONSE_NO;
 833   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 834   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 835   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 836
 837   /* Check for error conditions */
 838   errorstate = SDMMC_GetCmdError(SDIOx);
 839
 840   return errorstate;
 841 }
 842
 843 /**
 844   * @brief  Send the Operating Condition command and check the response.
 845   * @param  SDIOx: Pointer to SDIO register base
 846   * @retval HAL status
 847   */
 848 uint32_t SDMMC_CmdOperCond(SDIO_TypeDef *SDIOx)
 849 {
 850   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 851   uint32_t errorstate = SDMMC_ERROR_NONE;
 852
 853   /* Send CMD8 to verify SD card interface operating condition */
 854   /* Argument: - [31:12]: Reserved (shall be set to '0')
 855   - [11:8]: Supply Voltage (VHS) 0x1 (Range: 2.7-3.6 V)
 856   - [7:0]: Check Pattern (recommended 0xAA) */
 857   /* CMD Response: R7 */
 858   sdmmc_cmdinit.Argument         = SDMMC_CHECK_PATTERN;
 859   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_HS_SEND_EXT_CSD;
 860   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 861   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 862   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 863   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 864
 865   /* Check for error conditions */
 866   errorstate = SDMMC_GetCmdResp7(SDIOx);
 867
 868   return errorstate;
 869 }
 870
 871 /**
 872   * @brief  Send the Application command to verify that that the next command
 873   *         is an application specific com-mand rather than a standard command
 874   *         and check the response.
 875   * @param  SDIOx: Pointer to SDIO register base
 876   * @retval HAL status
 877   */
 878 uint32_t SDMMC_CmdAppCommand(SDIO_TypeDef *SDIOx, uint32_t Argument)
 879 {
 880   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 881   uint32_t errorstate = SDMMC_ERROR_NONE;
 882
 883   sdmmc_cmdinit.Argument         = (uint32_t)Argument;
 884   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_APP_CMD;
 885   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 886   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 887   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 888   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 889
 890   /* Check for error conditions */
 891   /* If there is a HAL_ERROR, it is a MMC card, else
 892   it is a SD card: SD card 2.0 (voltage range mismatch)
 893      or SD card 1.x */
 894   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_CMD, SDIO_CMDTIMEOUT);
 895
 896   return errorstate;
 897 }
 898
 899 /**
 900   * @brief  Send the command asking the accessed card to send its operating
 901   *         condition register (OCR)
 902   * @param  SDIOx: Pointer to SDIO register base
 903   * @retval HAL status
 904   */
 905 uint32_t SDMMC_CmdAppOperCommand(SDIO_TypeDef *SDIOx, uint32_t SdType)
 906 {
 907   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 908   uint32_t errorstate = SDMMC_ERROR_NONE;
 909
 910   sdmmc_cmdinit.Argument         = SDMMC_VOLTAGE_WINDOW_SD | SdType;
 911   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SD_APP_OP_COND;
 912   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 913   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 914   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 915   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 916
 917   /* Check for error conditions */
 918   errorstate = SDMMC_GetCmdResp3(SDIOx);
 919
 920   return errorstate;
 921 }
 922
 923 /**
 924   * @brief  Send the Bus Width command and check the response.
 925   * @param  SDIOx: Pointer to SDIO register base
 926   * @retval HAL status
 927   */
 928 uint32_t SDMMC_CmdBusWidth(SDIO_TypeDef *SDIOx, uint32_t BusWidth)
 929 {
 930   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 931   uint32_t errorstate = SDMMC_ERROR_NONE;
 932
 933   sdmmc_cmdinit.Argument         = (uint32_t)BusWidth;
 934   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_APP_SD_SET_BUSWIDTH;
 935   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 936   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 937   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 938   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 939
 940   /* Check for error conditions */
 941   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_APP_SD_SET_BUSWIDTH, SDIO_CMDTIMEOUT);
 942
 943   return errorstate;
 944 }
 945
 946 /**
 947   * @brief  Send the Send SCR command and check the response.
 948   * @param  SDIOx: Pointer to SDMMC register base
 949   * @retval HAL status
 950   */
 951 uint32_t SDMMC_CmdSendSCR(SDIO_TypeDef *SDIOx)
 952 {
 953   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 954   uint32_t errorstate = SDMMC_ERROR_NONE;
 955
 956   /* Send CMD51 SD_APP_SEND_SCR */
 957   sdmmc_cmdinit.Argument         = 0U;
 958   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SD_APP_SEND_SCR;
 959   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
 960   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 961   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 962   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 963
 964   /* Check for error conditions */
 965   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_SEND_SCR, SDIO_CMDTIMEOUT);
 966
 967   return errorstate;
 968 }
 969
 970 /**
 971   * @brief  Send the Send CID command and check the response.
 972   * @param  SDIOx: Pointer to SDIO register base
 973   * @retval HAL status
 974   */
 975 uint32_t SDMMC_CmdSendCID(SDIO_TypeDef *SDIOx)
 976 {
 977   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
 978   uint32_t errorstate = SDMMC_ERROR_NONE;
 979
 980   /* Send CMD2 ALL_SEND_CID */
 981   sdmmc_cmdinit.Argument         = 0U;
 982   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_ALL_SEND_CID;
 983   sdmmc_cmdinit.Response         = SDIO_RESPONSE_LONG;
 984   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
 985   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
 986   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
 987
 988   /* Check for error conditions */
 989   errorstate = SDMMC_GetCmdResp2(SDIOx);
 990
 991   return errorstate;
 992 }
 993
 994 /**
 995   * @brief  Send the Send CSD command and check the response.
 996   * @param  SDIOx: Pointer to SDIO register base
 997   * @retval HAL status
 998   */
 999 uint32_t SDMMC_CmdSendCSD(SDIO_TypeDef *SDIOx, uint32_t Argument)
1000 {
1001   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
1002   uint32_t errorstate = SDMMC_ERROR_NONE;
1003
1004   /* Send CMD9 SEND_CSD */
1005   sdmmc_cmdinit.Argument         = (uint32_t)Argument;
1006   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SEND_CSD;
1007   sdmmc_cmdinit.Response         = SDIO_RESPONSE_LONG;
1008   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
1009   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
1010   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
1011
1012   /* Check for error conditions */
1013   errorstate = SDMMC_GetCmdResp2(SDIOx);
1014
1015   return errorstate;
1016 }
1017
1018 /**
1019   * @brief  Send the Send CSD command and check the response.
1020   * @param  SDIOx: Pointer to SDIO register base
1021   * @retval HAL status
1022   */
1023 uint32_t SDMMC_CmdSetRelAdd(SDIO_TypeDef *SDIOx, uint16_t *pRCA)
1024 {
1025   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
1026   uint32_t errorstate = SDMMC_ERROR_NONE;
1027
1028   /* Send CMD3 SD_CMD_SET_REL_ADDR */
1029   sdmmc_cmdinit.Argument         = 0U;
1030   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SET_REL_ADDR;
1031   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
1032   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
1033   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
1034   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
1035
1036   /* Check for error conditions */
1037   errorstate = SDMMC_GetCmdResp6(SDIOx, SDMMC_CMD_SET_REL_ADDR, pRCA);
1038
1039   return errorstate;
1040 }
1041
1042 /**
1043   * @brief  Send the Status command and check the response.
1044   * @param  SDIOx: Pointer to SDIO register base
1045   * @retval HAL status
1046   */
1047 uint32_t SDMMC_CmdSendStatus(SDIO_TypeDef *SDIOx, uint32_t Argument)
1048 {
1049   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
1050   uint32_t errorstate = SDMMC_ERROR_NONE;
1051
1052   sdmmc_cmdinit.Argument         = (uint32_t)Argument;
1053   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SEND_STATUS;
1054   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
1055   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
1056   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
1057   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
1058
1059   /* Check for error conditions */
1060   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SEND_STATUS, SDIO_CMDTIMEOUT);
1061
1062   return errorstate;
1063 }
1064
1065 /**
1066   * @brief  Send the Status register command and check the response.
1067   * @param  SDIOx: Pointer to SDIO register base
1068   * @retval HAL status
1069   */
1070 uint32_t SDMMC_CmdStatusRegister(SDIO_TypeDef *SDIOx)
1071 {
1072   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
1073   uint32_t errorstate = SDMMC_ERROR_NONE;
1074
1075   sdmmc_cmdinit.Argument         = 0U;
1076   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SD_APP_STATUS;
1077   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
1078   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
1079   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
1080   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
1081
1082   /* Check for error conditions */
1083   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_SD_APP_STATUS, SDIO_CMDTIMEOUT);
1084
1085   return errorstate;
1086 }
1087
1088 /**
1089   * @brief  Sends host capacity support information and activates the card's
1090   *         initialization process. Send SDMMC_CMD_SEND_OP_COND command
1091   * @param  SDIOx: Pointer to SDIO register base
1092   * @parame Argument: Argument used for the command
1093   * @retval HAL status
1094   */
1095 uint32_t SDMMC_CmdOpCondition(SDIO_TypeDef *SDIOx, uint32_t Argument)
1096 {
1097   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
1098   uint32_t errorstate = SDMMC_ERROR_NONE;
1099
1100   sdmmc_cmdinit.Argument         = Argument;
1101   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_SEND_OP_COND;
1102   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
1103   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
1104   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
1105   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
1106
1107   /* Check for error conditions */
1108   errorstate = SDMMC_GetCmdResp3(SDIOx);
1109
1110   return errorstate;
1111 }
1112
1113 /**
1114   * @brief  Checks switchable function and switch card function. SDMMC_CMD_HS_SWITCH comand
1115   * @param  SDIOx: Pointer to SDIO register base
1116   * @parame Argument: Argument used for the command
1117   * @retval HAL status
1118   */
1119 uint32_t SDMMC_CmdSwitch(SDIO_TypeDef *SDIOx, uint32_t Argument)
1120 {
1121   SDIO_CmdInitTypeDef  sdmmc_cmdinit;
1122   uint32_t errorstate = SDMMC_ERROR_NONE;
1123
1124   sdmmc_cmdinit.Argument         = Argument;
1125   sdmmc_cmdinit.CmdIndex         = SDMMC_CMD_HS_SWITCH;
1126   sdmmc_cmdinit.Response         = SDIO_RESPONSE_SHORT;
1127   sdmmc_cmdinit.WaitForInterrupt = SDIO_WAIT_NO;
1128   sdmmc_cmdinit.CPSM             = SDIO_CPSM_ENABLE;
1129   SDIO_SendCommand(SDIOx, &sdmmc_cmdinit);
1130
1131   /* Check for error conditions */
1132   errorstate = SDMMC_GetCmdResp1(SDIOx, SDMMC_CMD_HS_SWITCH, SDIO_CMDTIMEOUT);
1133
1134   return errorstate;
1135 }
1136
1137 /**
1138   * @}
1139   */
1140
1141 /* Private function ----------------------------------------------------------*/
1142 /** @addtogroup SD_Private_Functions
1143   * @{
1144   */
1145
1146 /**
1147   * @brief  Checks for error conditions for CMD0.
1148   * @param  hsd: SD handle
1149   * @retval SD Card error state
1150   */
1151 static uint32_t SDMMC_GetCmdError(SDIO_TypeDef *SDIOx)
1152 {
1153   /* 8 is the number of required instructions cycles for the below loop statement.
1154   The SDMMC_CMDTIMEOUT is expressed in ms */
1155   register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1156
1157   do
1158   {
1159     if (count-- == 0U)
1160     {
1161       return SDMMC_ERROR_TIMEOUT;
1162     }
1163
1164   }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDSENT));
1165
1166   /* Clear all the static flags */
1167   __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
1168
1169   return SDMMC_ERROR_NONE;
1170 }
1171
1172 /**
1173   * @brief  Checks for error conditions for R1 response.
1174   * @param  hsd: SD handle
1175   * @param  SD_CMD: The sent command index
1176   * @retval SD Card error state
1177   */
1178 static uint32_t SDMMC_GetCmdResp1(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint32_t Timeout)
1179 {
1180   uint32_t response_r1;
1181
1182   /* 8 is the number of required instructions cycles for the below loop statement.
1183   The Timeout is expressed in ms */
1184   register uint32_t count = Timeout * (SystemCoreClock / 8U /1000U);
1185
1186   do
1187   {
1188     if (count-- == 0U)
1189     {
1190       return SDMMC_ERROR_TIMEOUT;
1191     }
1192
1193   }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
1194
1195   if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
1196   {
1197     __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
1198
1199     return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1200   }
1201   else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
1202   {
1203     __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
1204
1205     return SDMMC_ERROR_CMD_CRC_FAIL;
1206   }
1207
1208   /* Check response received is of desired command */
1209   if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
1210   {
1211     return SDMMC_ERROR_CMD_CRC_FAIL;
1212   }
1213
1214   /* Clear all the static flags */
1215   __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
1216
1217   /* We have received response, retrieve it for analysis  */
1218   response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
1219
1220   if((response_r1 & SDMMC_OCR_ERRORBITS) == SDMMC_ALLZERO)
1221   {
1222     return SDMMC_ERROR_NONE;
1223   }
1224   else if((response_r1 & SDMMC_OCR_ADDR_OUT_OF_RANGE) == SDMMC_OCR_ADDR_OUT_OF_RANGE)
1225   {
1226     return SDMMC_ERROR_ADDR_OUT_OF_RANGE;
1227   }
1228   else if((response_r1 & SDMMC_OCR_ADDR_MISALIGNED) == SDMMC_OCR_ADDR_MISALIGNED)
1229   {
1230     return SDMMC_ERROR_ADDR_MISALIGNED;
1231   }
1232   else if((response_r1 & SDMMC_OCR_BLOCK_LEN_ERR) == SDMMC_OCR_BLOCK_LEN_ERR)
1233   {
1234     return SDMMC_ERROR_BLOCK_LEN_ERR;
1235   }
1236   else if((response_r1 & SDMMC_OCR_ERASE_SEQ_ERR) == SDMMC_OCR_ERASE_SEQ_ERR)
1237   {
1238     return SDMMC_ERROR_ERASE_SEQ_ERR;
1239   }
1240   else if((response_r1 & SDMMC_OCR_BAD_ERASE_PARAM) == SDMMC_OCR_BAD_ERASE_PARAM)
1241   {
1242     return SDMMC_ERROR_BAD_ERASE_PARAM;
1243   }
1244   else if((response_r1 & SDMMC_OCR_WRITE_PROT_VIOLATION) == SDMMC_OCR_WRITE_PROT_VIOLATION)
1245   {
1246     return SDMMC_ERROR_WRITE_PROT_VIOLATION;
1247   }
1248   else if((response_r1 & SDMMC_OCR_LOCK_UNLOCK_FAILED) == SDMMC_OCR_LOCK_UNLOCK_FAILED)
1249   {
1250     return SDMMC_ERROR_LOCK_UNLOCK_FAILED;
1251   }
1252   else if((response_r1 & SDMMC_OCR_COM_CRC_FAILED) == SDMMC_OCR_COM_CRC_FAILED)
1253   {
1254     return SDMMC_ERROR_COM_CRC_FAILED;
1255   }
1256   else if((response_r1 & SDMMC_OCR_ILLEGAL_CMD) == SDMMC_OCR_ILLEGAL_CMD)
1257   {
1258     return SDMMC_ERROR_ILLEGAL_CMD;
1259   }
1260   else if((response_r1 & SDMMC_OCR_CARD_ECC_FAILED) == SDMMC_OCR_CARD_ECC_FAILED)
1261   {
1262     return SDMMC_ERROR_CARD_ECC_FAILED;
1263   }
1264   else if((response_r1 & SDMMC_OCR_CC_ERROR) == SDMMC_OCR_CC_ERROR)
1265   {
1266     return SDMMC_ERROR_CC_ERR;
1267   }
1268   else if((response_r1 & SDMMC_OCR_STREAM_READ_UNDERRUN) == SDMMC_OCR_STREAM_READ_UNDERRUN)
1269   {
1270     return SDMMC_ERROR_STREAM_READ_UNDERRUN;
1271   }
1272   else if((response_r1 & SDMMC_OCR_STREAM_WRITE_OVERRUN) == SDMMC_OCR_STREAM_WRITE_OVERRUN)
1273   {
1274     return SDMMC_ERROR_STREAM_WRITE_OVERRUN;
1275   }
1276   else if((response_r1 & SDMMC_OCR_CID_CSD_OVERWRITE) == SDMMC_OCR_CID_CSD_OVERWRITE)
1277   {
1278     return SDMMC_ERROR_CID_CSD_OVERWRITE;
1279   }
1280   else if((response_r1 & SDMMC_OCR_WP_ERASE_SKIP) == SDMMC_OCR_WP_ERASE_SKIP)
1281   {
1282     return SDMMC_ERROR_WP_ERASE_SKIP;
1283   }
1284   else if((response_r1 & SDMMC_OCR_CARD_ECC_DISABLED) == SDMMC_OCR_CARD_ECC_DISABLED)
1285   {
1286     return SDMMC_ERROR_CARD_ECC_DISABLED;
1287   }
1288   else if((response_r1 & SDMMC_OCR_ERASE_RESET) == SDMMC_OCR_ERASE_RESET)
1289   {
1290     return SDMMC_ERROR_ERASE_RESET;
1291   }
1292   else if((response_r1 & SDMMC_OCR_AKE_SEQ_ERROR) == SDMMC_OCR_AKE_SEQ_ERROR)
1293   {
1294     return SDMMC_ERROR_AKE_SEQ_ERR;
1295   }
1296   else
1297   {
1298     return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
1299   }
1300 }
1301
1302 /**
1303   * @brief  Checks for error conditions for R2 (CID or CSD) response.
1304   * @param  hsd: SD handle
1305   * @retval SD Card error state
1306   */
1307 static uint32_t SDMMC_GetCmdResp2(SDIO_TypeDef *SDIOx)
1308 {
1309   /* 8 is the number of required instructions cycles for the below loop statement.
1310   The SDMMC_CMDTIMEOUT is expressed in ms */
1311   register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1312
1313   do
1314   {
1315     if (count-- == 0U)
1316     {
1317       return SDMMC_ERROR_TIMEOUT;
1318     }
1319
1320   }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
1321
1322   if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
1323   {
1324     __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
1325
1326     return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1327   }
1328   else if (__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
1329   {
1330     __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
1331
1332     return SDMMC_ERROR_CMD_CRC_FAIL;
1333   }
1334   else
1335   {
1336     /* No error flag set */
1337     /* Clear all the static flags */
1338     __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
1339   }
1340
1341   return SDMMC_ERROR_NONE;
1342 }
1343
1344 /**
1345   * @brief  Checks for error conditions for R3 (OCR) response.
1346   * @param  hsd: SD handle
1347   * @retval SD Card error state
1348   */
1349 static uint32_t SDMMC_GetCmdResp3(SDIO_TypeDef *SDIOx)
1350 {
1351   /* 8 is the number of required instructions cycles for the below loop statement.
1352   The SDMMC_CMDTIMEOUT is expressed in ms */
1353   register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1354
1355   do
1356   {
1357     if (count-- == 0U)
1358     {
1359       return SDMMC_ERROR_TIMEOUT;
1360     }
1361
1362   }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
1363
1364   if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
1365   {
1366     __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
1367
1368     return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1369   }
1370   else
1371
1372   {
1373     /* Clear all the static flags */
1374     __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
1375   }
1376
1377   return SDMMC_ERROR_NONE;
1378 }
1379
1380 /**
1381   * @brief  Checks for error conditions for R6 (RCA) response.
1382   * @param  hsd: SD handle
1383   * @param  SD_CMD: The sent command index
1384   * @param  pRCA: Pointer to the variable that will contain the SD card relative
1385   *         address RCA
1386   * @retval SD Card error state
1387   */
1388 static uint32_t SDMMC_GetCmdResp6(SDIO_TypeDef *SDIOx, uint8_t SD_CMD, uint16_t *pRCA)
1389 {
1390   uint32_t response_r1;
1391
1392   /* 8 is the number of required instructions cycles for the below loop statement.
1393   The SDMMC_CMDTIMEOUT is expressed in ms */
1394   register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1395
1396   do
1397   {
1398     if (count-- == 0U)
1399     {
1400       return SDMMC_ERROR_TIMEOUT;
1401     }
1402
1403   }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
1404
1405   if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
1406   {
1407     __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT);
1408
1409     return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1410   }
1411   else if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL))
1412   {
1413     __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL);
1414
1415     return SDMMC_ERROR_CMD_CRC_FAIL;
1416   }
1417
1418   /* Check response received is of desired command */
1419   if(SDIO_GetCommandResponse(SDIOx) != SD_CMD)
1420   {
1421     return SDMMC_ERROR_CMD_CRC_FAIL;
1422   }
1423
1424   /* Clear all the static flags */
1425   __SDIO_CLEAR_FLAG(SDIOx, SDIO_STATIC_FLAGS);
1426
1427   /* We have received response, retrieve it.  */
1428   response_r1 = SDIO_GetResponse(SDIOx, SDIO_RESP1);
1429
1430   if((response_r1 & (SDMMC_R6_GENERAL_UNKNOWN_ERROR | SDMMC_R6_ILLEGAL_CMD | SDMMC_R6_COM_CRC_FAILED)) == SDMMC_ALLZERO)
1431   {
1432     *pRCA = (uint16_t) (response_r1 >> 16);
1433
1434     return SDMMC_ERROR_NONE;
1435   }
1436   else if((response_r1 & SDMMC_R6_ILLEGAL_CMD) == SDMMC_R6_ILLEGAL_CMD)
1437   {
1438     return SDMMC_ERROR_ILLEGAL_CMD;
1439   }
1440   else if((response_r1 & SDMMC_R6_COM_CRC_FAILED) == SDMMC_R6_COM_CRC_FAILED)
1441   {
1442     return SDMMC_ERROR_COM_CRC_FAILED;
1443   }
1444   else
1445   {
1446     return SDMMC_ERROR_GENERAL_UNKNOWN_ERR;
1447   }
1448 }
1449
1450 /**
1451   * @brief  Checks for error conditions for R7 response.
1452   * @param  hsd: SD handle
1453   * @retval SD Card error state
1454   */
1455 static uint32_t SDMMC_GetCmdResp7(SDIO_TypeDef *SDIOx)
1456 {
1457   /* 8 is the number of required instructions cycles for the below loop statement.
1458   The SDIO_CMDTIMEOUT is expressed in ms */
1459   register uint32_t count = SDIO_CMDTIMEOUT * (SystemCoreClock / 8U /1000U);
1460
1461   do
1462   {
1463     if (count-- == 0U)
1464     {
1465       return SDMMC_ERROR_TIMEOUT;
1466     }
1467
1468   }while(!__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CCRCFAIL | SDIO_FLAG_CMDREND | SDIO_FLAG_CTIMEOUT));
1469
1470   if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CTIMEOUT))
1471   {
1472     /* Card is SD V2.0 compliant */
1473     __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND);
1474
1475     return SDMMC_ERROR_CMD_RSP_TIMEOUT;
1476   }
1477
1478   if(__SDIO_GET_FLAG(SDIOx, SDIO_FLAG_CMDREND))
1479   {
1480     /* Card is SD V2.0 compliant */
1481     __SDIO_CLEAR_FLAG(SDIOx, SDIO_FLAG_CMDREND);
1482   }
1483
1484   return SDMMC_ERROR_NONE;
1485
1486 }
1487
1488 /**
1489   * @}
1490   */
1491
1492 /**
1493   * @}
1494   */
1495
1496 #endif /* STM32F405xx || STM32F415xx || STM32F407xx || STM32F417xx || STM32F427xx || STM32F437xx || STM32F429xx || STM32F439xx ||
1497           STM32F401xC || STM32F401xE || STM32F411xE || STM32F446xx || STM32F469xx || STM32F479xx || STM32F412Zx || STM32F412Vx ||
1498           STM32F412Rx || STM32F412Cx || STM32F413xx || STM32F423xx */
1499 #endif /* (HAL_SD_MODULE_ENABLED) || (HAL_MMC_MODULE_ENABLED) */
1500
1501 /**
1502   * @}
1503   */
1504
1505 /**
1506   * @}
1507   */
1508
1509 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/