lib/main/STM32F4/Drivers/STM32F4xx_HAL_Driver/Src/stm32f4xx_ll_usart.c

   1 /**
   2   ******************************************************************************
   3   * @file    stm32f4xx_ll_usart.c
   4   * @author  MCD Application Team
   5   * @version V1.7.1
   6   * @date    14-April-2017
   7   * @brief   USART LL module driver.
   8   ******************************************************************************
   9   * @attention
  10   *
  11   * <h2><center>&copy; COPYRIGHT(c) 2017 STMicroelectronics</center></h2>
  12   *
  13   * Redistribution and use in source and binary forms, with or without modification,
  14   * are permitted provided that the following conditions are met:
  15   *   1. Redistributions of source code must retain the above copyright notice,
  16   *      this list of conditions and the following disclaimer.
  17   *   2. Redistributions in binary form must reproduce the above copyright notice,
  18   *      this list of conditions and the following disclaimer in the documentation
  19   *      and/or other materials provided with the distribution.
  20   *   3. Neither the name of STMicroelectronics nor the names of its contributors
  21   *      may be used to endorse or promote products derived from this software
  22   *      without specific prior written permission.
  23   *
  24   * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
  25   * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
  26   * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
  27   * DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
  28   * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
  29   * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
  30   * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
  31   * CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
  32   * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  33   * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  34   *
  35   ******************************************************************************
  36   */
  37 #if defined(USE_FULL_LL_DRIVER)
  38
  39 /* Includes ------------------------------------------------------------------*/
  40 #include "stm32f4xx_ll_usart.h"
  41 #include "stm32f4xx_ll_rcc.h"
  42 #include "stm32f4xx_ll_bus.h"
  43 #ifdef  USE_FULL_ASSERT
  44 #include "stm32_assert.h"
  45 #else
  46 #define assert_param(expr) ((void)0U)
  47 #endif
  48
  49 /** @addtogroup STM32F4xx_LL_Driver
  50   * @{
  51   */
  52
  53 #if defined (USART1) || defined (USART2) || defined (USART3) || defined (USART6) || defined (UART4) || defined (UART5) || defined (UART7) || defined (UART8) || defined (UART9) || defined (UART10)
  54
  55 /** @addtogroup USART_LL
  56   * @{
  57   */
  58
  59 /* Private types -------------------------------------------------------------*/
  60 /* Private variables ---------------------------------------------------------*/
  61 /* Private constants ---------------------------------------------------------*/
  62 /** @addtogroup USART_LL_Private_Constants
  63   * @{
  64   */
  65
  66 /**
  67   * @}
  68   */
  69
  70
  71 /* Private macros ------------------------------------------------------------*/
  72 /** @addtogroup USART_LL_Private_Macros
  73   * @{
  74   */
  75
  76 /* __BAUDRATE__ The maximum Baud Rate is derived from the maximum clock available
  77  *              divided by the smallest oversampling used on the USART (i.e. 8)    */
  78 #define IS_LL_USART_BAUDRATE(__BAUDRATE__) ((__BAUDRATE__) <= 10000000U)
  79
  80 #define IS_LL_USART_DIRECTION(__VALUE__) (((__VALUE__) == LL_USART_DIRECTION_NONE) \
  81                                        || ((__VALUE__) == LL_USART_DIRECTION_RX) \
  82                                        || ((__VALUE__) == LL_USART_DIRECTION_TX) \
  83                                        || ((__VALUE__) == LL_USART_DIRECTION_TX_RX))
  84
  85 #define IS_LL_USART_PARITY(__VALUE__) (((__VALUE__) == LL_USART_PARITY_NONE) \
  86                                     || ((__VALUE__) == LL_USART_PARITY_EVEN) \
  87                                     || ((__VALUE__) == LL_USART_PARITY_ODD))
  88
  89 #define IS_LL_USART_DATAWIDTH(__VALUE__) (((__VALUE__) == LL_USART_DATAWIDTH_8B) \
  90                                        || ((__VALUE__) == LL_USART_DATAWIDTH_9B))
  91
  92 #define IS_LL_USART_OVERSAMPLING(__VALUE__) (((__VALUE__) == LL_USART_OVERSAMPLING_16) \
  93                                           || ((__VALUE__) == LL_USART_OVERSAMPLING_8))
  94
  95 #define IS_LL_USART_LASTBITCLKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_LASTCLKPULSE_NO_OUTPUT) \
  96                                               || ((__VALUE__) == LL_USART_LASTCLKPULSE_OUTPUT))
  97
  98 #define IS_LL_USART_CLOCKPHASE(__VALUE__) (((__VALUE__) == LL_USART_PHASE_1EDGE) \
  99                                         || ((__VALUE__) == LL_USART_PHASE_2EDGE))
 100
 101 #define IS_LL_USART_CLOCKPOLARITY(__VALUE__) (((__VALUE__) == LL_USART_POLARITY_LOW) \
 102                                            || ((__VALUE__) == LL_USART_POLARITY_HIGH))
 103
 104 #define IS_LL_USART_CLOCKOUTPUT(__VALUE__) (((__VALUE__) == LL_USART_CLOCK_DISABLE) \
 105                                          || ((__VALUE__) == LL_USART_CLOCK_ENABLE))
 106
 107 #define IS_LL_USART_STOPBITS(__VALUE__) (((__VALUE__) == LL_USART_STOPBITS_0_5) \
 108                                       || ((__VALUE__) == LL_USART_STOPBITS_1) \
 109                                       || ((__VALUE__) == LL_USART_STOPBITS_1_5) \
 110                                       || ((__VALUE__) == LL_USART_STOPBITS_2))
 111
 112 #define IS_LL_USART_HWCONTROL(__VALUE__) (((__VALUE__) == LL_USART_HWCONTROL_NONE) \
 113                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS) \
 114                                        || ((__VALUE__) == LL_USART_HWCONTROL_CTS) \
 115                                        || ((__VALUE__) == LL_USART_HWCONTROL_RTS_CTS))
 116
 117 /**
 118   * @}
 119   */
 120
 121 /* Private function prototypes -----------------------------------------------*/
 122
 123 /* Exported functions --------------------------------------------------------*/
 124 /** @addtogroup USART_LL_Exported_Functions
 125   * @{
 126   */
 127
 128 /** @addtogroup USART_LL_EF_Init
 129   * @{
 130   */
 131
 132 /**
 133   * @brief  De-initialize USART registers (Registers restored to their default values).
 134   * @param  USARTx USART Instance
 135   * @retval An ErrorStatus enumeration value:
 136   *          - SUCCESS: USART registers are de-initialized
 137   *          - ERROR: USART registers are not de-initialized
 138   */
 139 ErrorStatus LL_USART_DeInit(USART_TypeDef *USARTx)
 140 {
 141   ErrorStatus status = SUCCESS;
 142
 143   /* Check the parameters */
 144   assert_param(IS_UART_INSTANCE(USARTx));
 145
 146   if (USARTx == USART1)
 147   {
 148     /* Force reset of USART clock */
 149     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART1);
 150
 151     /* Release reset of USART clock */
 152     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART1);
 153   }
 154   else if (USARTx == USART2)
 155   {
 156     /* Force reset of USART clock */
 157     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART2);
 158
 159     /* Release reset of USART clock */
 160     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART2);
 161   }
 162 #if defined(USART3)
 163   else if (USARTx == USART3)
 164   {
 165     /* Force reset of USART clock */
 166     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_USART3);
 167
 168     /* Release reset of USART clock */
 169     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_USART3);
 170   }
 171 #endif /* USART3 */
 172 #if defined(USART6)
 173   else if (USARTx == USART6)
 174   {
 175     /* Force reset of USART clock */
 176     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_USART6);
 177
 178     /* Release reset of USART clock */
 179     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_USART6);
 180   }
 181 #endif /* USART6 */
 182 #if defined(UART4)
 183   else if (USARTx == UART4)
 184   {
 185     /* Force reset of UART clock */
 186     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART4);
 187
 188     /* Release reset of UART clock */
 189     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART4);
 190   }
 191 #endif /* UART4 */
 192 #if defined(UART5)
 193   else if (USARTx == UART5)
 194   {
 195     /* Force reset of UART clock */
 196     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART5);
 197
 198     /* Release reset of UART clock */
 199     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART5);
 200   }
 201 #endif /* UART5 */
 202 #if defined(UART7)
 203   else if (USARTx == UART7)
 204   {
 205     /* Force reset of UART clock */
 206     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART7);
 207
 208     /* Release reset of UART clock */
 209     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART7);
 210   }
 211 #endif /* UART7 */
 212 #if defined(UART8)
 213   else if (USARTx == UART8)
 214   {
 215     /* Force reset of UART clock */
 216     LL_APB1_GRP1_ForceReset(LL_APB1_GRP1_PERIPH_UART8);
 217
 218     /* Release reset of UART clock */
 219     LL_APB1_GRP1_ReleaseReset(LL_APB1_GRP1_PERIPH_UART8);
 220   }
 221 #endif /* UART8 */
 222 #if defined(UART9)
 223   else if (USARTx == UART9)
 224   {
 225     /* Force reset of UART clock */
 226     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART9);
 227
 228     /* Release reset of UART clock */
 229     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART9);
 230   }
 231 #endif /* UART9 */
 232 #if defined(UART10)
 233   else if (USARTx == UART10)
 234   {
 235     /* Force reset of UART clock */
 236     LL_APB2_GRP1_ForceReset(LL_APB2_GRP1_PERIPH_UART10);
 237
 238     /* Release reset of UART clock */
 239     LL_APB2_GRP1_ReleaseReset(LL_APB2_GRP1_PERIPH_UART10);
 240   }
 241 #endif /* UART10 */
 242   else
 243   {
 244     status = ERROR;
 245   }
 246
 247   return (status);
 248 }
 249
 250 /**
 251   * @brief  Initialize USART registers according to the specified
 252   *         parameters in USART_InitStruct.
 253   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 254   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 255   * @note   Baud rate value stored in USART_InitStruct BaudRate field, should be valid (different from 0).
 256   * @param  USARTx USART Instance
 257   * @param  USART_InitStruct: pointer to a LL_USART_InitTypeDef structure
 258   *         that contains the configuration information for the specified USART peripheral.
 259   * @retval An ErrorStatus enumeration value:
 260   *          - SUCCESS: USART registers are initialized according to USART_InitStruct content
 261   *          - ERROR: Problem occurred during USART Registers initialization
 262   */
 263 ErrorStatus LL_USART_Init(USART_TypeDef *USARTx, LL_USART_InitTypeDef *USART_InitStruct)
 264 {
 265   ErrorStatus status = ERROR;
 266   uint32_t periphclk = LL_RCC_PERIPH_FREQUENCY_NO;
 267   LL_RCC_ClocksTypeDef rcc_clocks;
 268
 269   /* Check the parameters */
 270   assert_param(IS_UART_INSTANCE(USARTx));
 271   assert_param(IS_LL_USART_BAUDRATE(USART_InitStruct->BaudRate));
 272   assert_param(IS_LL_USART_DATAWIDTH(USART_InitStruct->DataWidth));
 273   assert_param(IS_LL_USART_STOPBITS(USART_InitStruct->StopBits));
 274   assert_param(IS_LL_USART_PARITY(USART_InitStruct->Parity));
 275   assert_param(IS_LL_USART_DIRECTION(USART_InitStruct->TransferDirection));
 276   assert_param(IS_LL_USART_HWCONTROL(USART_InitStruct->HardwareFlowControl));
 277   assert_param(IS_LL_USART_OVERSAMPLING(USART_InitStruct->OverSampling));
 278
 279   /* USART needs to be in disabled state, in order to be able to configure some bits in
 280      CRx registers */
 281   if (LL_USART_IsEnabled(USARTx) == 0U)
 282   {
 283     /*---------------------------- USART CR1 Configuration -----------------------
 284      * Configure USARTx CR1 (USART Word Length, Parity, Mode and Oversampling bits) with parameters:
 285      * - DataWidth:          USART_CR1_M bits according to USART_InitStruct->DataWidth value
 286      * - Parity:             USART_CR1_PCE, USART_CR1_PS bits according to USART_InitStruct->Parity value
 287      * - TransferDirection:  USART_CR1_TE, USART_CR1_RE bits according to USART_InitStruct->TransferDirection value
 288      * - Oversampling:       USART_CR1_OVER8 bit according to USART_InitStruct->OverSampling value.
 289      */
 290     MODIFY_REG(USARTx->CR1,
 291                (USART_CR1_M | USART_CR1_PCE | USART_CR1_PS |
 292                 USART_CR1_TE | USART_CR1_RE | USART_CR1_OVER8),
 293                (USART_InitStruct->DataWidth | USART_InitStruct->Parity |
 294                 USART_InitStruct->TransferDirection | USART_InitStruct->OverSampling));
 295
 296     /*---------------------------- USART CR2 Configuration -----------------------
 297      * Configure USARTx CR2 (Stop bits) with parameters:
 298      * - Stop Bits:          USART_CR2_STOP bits according to USART_InitStruct->StopBits value.
 299      * - CLKEN, CPOL, CPHA and LBCL bits are to be configured using LL_USART_ClockInit().
 300      */
 301     LL_USART_SetStopBitsLength(USARTx, USART_InitStruct->StopBits);
 302
 303     /*---------------------------- USART CR3 Configuration -----------------------
 304      * Configure USARTx CR3 (Hardware Flow Control) with parameters:
 305      * - HardwareFlowControl: USART_CR3_RTSE, USART_CR3_CTSE bits according to USART_InitStruct->HardwareFlowControl value.
 306      */
 307     LL_USART_SetHWFlowCtrl(USARTx, USART_InitStruct->HardwareFlowControl);
 308
 309     /*---------------------------- USART BRR Configuration -----------------------
 310      * Retrieve Clock frequency used for USART Peripheral
 311      */
 312     LL_RCC_GetSystemClocksFreq(&rcc_clocks);
 313     if (USARTx == USART1)
 314     {
 315       periphclk = rcc_clocks.PCLK2_Frequency;
 316     }
 317     else if (USARTx == USART2)
 318     {
 319       periphclk = rcc_clocks.PCLK1_Frequency;
 320     }
 321 #if defined(USART3)
 322     else if (USARTx == USART3)
 323     {
 324       periphclk = rcc_clocks.PCLK1_Frequency;
 325     }
 326 #endif /* USART3 */
 327 #if defined(USART6)
 328     else if (USARTx == USART6)
 329     {
 330       periphclk = rcc_clocks.PCLK2_Frequency;
 331     }
 332 #endif /* USART6 */
 333 #if defined(UART4)
 334     else if (USARTx == UART4)
 335     {
 336       periphclk = rcc_clocks.PCLK1_Frequency;
 337     }
 338 #endif /* UART4 */
 339 #if defined(UART5)
 340     else if (USARTx == UART5)
 341     {
 342       periphclk = rcc_clocks.PCLK1_Frequency;
 343     }
 344 #endif /* UART5 */
 345 #if defined(UART7)
 346     else if (USARTx == UART7)
 347     {
 348       periphclk = rcc_clocks.PCLK1_Frequency;
 349     }
 350 #endif /* UART7 */
 351 #if defined(UART8)
 352     else if (USARTx == UART8)
 353     {
 354       periphclk = rcc_clocks.PCLK1_Frequency;
 355     }
 356 #endif /* UART8 */
 357 #if defined(UART9)
 358     else if (USARTx == UART9)
 359     {
 360       periphclk = rcc_clocks.PCLK1_Frequency;
 361     }
 362 #endif /* UART9 */
 363 #if defined(UART10)
 364     else if (USARTx == UART5)
 365     {
 366       periphclk = rcc_clocks.PCLK1_Frequency;
 367     }
 368 #endif /* UART10 */
 369     else
 370     {
 371       /* Nothing to do, as error code is already assigned to ERROR value */
 372     }
 373
 374     /* Configure the USART Baud Rate :
 375        - valid baud rate value (different from 0) is required
 376        - Peripheral clock as returned by RCC service, should be valid (different from 0).
 377     */
 378     if ((periphclk != LL_RCC_PERIPH_FREQUENCY_NO)
 379         && (USART_InitStruct->BaudRate != 0U))
 380     {
 381       status = SUCCESS;
 382       LL_USART_SetBaudRate(USARTx,
 383                            periphclk,
 384                            USART_InitStruct->OverSampling,
 385                            USART_InitStruct->BaudRate);
 386     }
 387   }
 388   /* Endif (=> USART not in Disabled state => return ERROR) */
 389
 390   return (status);
 391 }
 392
 393 /**
 394   * @brief Set each @ref LL_USART_InitTypeDef field to default value.
 395   * @param USART_InitStruct: pointer to a @ref LL_USART_InitTypeDef structure
 396   *                          whose fields will be set to default values.
 397   * @retval None
 398   */
 399
 400 void LL_USART_StructInit(LL_USART_InitTypeDef *USART_InitStruct)
 401 {
 402   /* Set USART_InitStruct fields to default values */
 403   USART_InitStruct->BaudRate            = 9600U;
 404   USART_InitStruct->DataWidth           = LL_USART_DATAWIDTH_8B;
 405   USART_InitStruct->StopBits            = LL_USART_STOPBITS_1;
 406   USART_InitStruct->Parity              = LL_USART_PARITY_NONE ;
 407   USART_InitStruct->TransferDirection   = LL_USART_DIRECTION_TX_RX;
 408   USART_InitStruct->HardwareFlowControl = LL_USART_HWCONTROL_NONE;
 409   USART_InitStruct->OverSampling        = LL_USART_OVERSAMPLING_16;
 410 }
 411
 412 /**
 413   * @brief  Initialize USART Clock related settings according to the
 414   *         specified parameters in the USART_ClockInitStruct.
 415   * @note   As some bits in USART configuration registers can only be written when the USART is disabled (USART_CR1_UE bit =0),
 416   *         USART IP should be in disabled state prior calling this function. Otherwise, ERROR result will be returned.
 417   * @param  USARTx USART Instance
 418   * @param  USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
 419   *         that contains the Clock configuration information for the specified USART peripheral.
 420   * @retval An ErrorStatus enumeration value:
 421   *          - SUCCESS: USART registers related to Clock settings are initialized according to USART_ClockInitStruct content
 422   *          - ERROR: Problem occurred during USART Registers initialization
 423   */
 424 ErrorStatus LL_USART_ClockInit(USART_TypeDef *USARTx, LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 425 {
 426   ErrorStatus status = SUCCESS;
 427
 428   /* Check USART Instance and Clock signal output parameters */
 429   assert_param(IS_UART_INSTANCE(USARTx));
 430   assert_param(IS_LL_USART_CLOCKOUTPUT(USART_ClockInitStruct->ClockOutput));
 431
 432   /* USART needs to be in disabled state, in order to be able to configure some bits in
 433      CRx registers */
 434   if (LL_USART_IsEnabled(USARTx) == 0U)
 435   {
 436     /*---------------------------- USART CR2 Configuration -----------------------*/
 437     /* If Clock signal has to be output */
 438     if (USART_ClockInitStruct->ClockOutput == LL_USART_CLOCK_DISABLE)
 439     {
 440       /* Deactivate Clock signal delivery :
 441        * - Disable Clock Output:        USART_CR2_CLKEN cleared
 442        */
 443       LL_USART_DisableSCLKOutput(USARTx);
 444     }
 445     else
 446     {
 447       /* Ensure USART instance is USART capable */
 448       assert_param(IS_USART_INSTANCE(USARTx));
 449
 450       /* Check clock related parameters */
 451       assert_param(IS_LL_USART_CLOCKPOLARITY(USART_ClockInitStruct->ClockPolarity));
 452       assert_param(IS_LL_USART_CLOCKPHASE(USART_ClockInitStruct->ClockPhase));
 453       assert_param(IS_LL_USART_LASTBITCLKOUTPUT(USART_ClockInitStruct->LastBitClockPulse));
 454
 455       /*---------------------------- USART CR2 Configuration -----------------------
 456        * Configure USARTx CR2 (Clock signal related bits) with parameters:
 457        * - Enable Clock Output:         USART_CR2_CLKEN set
 458        * - Clock Polarity:              USART_CR2_CPOL bit according to USART_ClockInitStruct->ClockPolarity value
 459        * - Clock Phase:                 USART_CR2_CPHA bit according to USART_ClockInitStruct->ClockPhase value
 460        * - Last Bit Clock Pulse Output: USART_CR2_LBCL bit according to USART_ClockInitStruct->LastBitClockPulse value.
 461        */
 462       MODIFY_REG(USARTx->CR2,
 463                  USART_CR2_CLKEN | USART_CR2_CPHA | USART_CR2_CPOL | USART_CR2_LBCL,
 464                  USART_CR2_CLKEN | USART_ClockInitStruct->ClockPolarity |
 465                  USART_ClockInitStruct->ClockPhase | USART_ClockInitStruct->LastBitClockPulse);
 466     }
 467   }
 468   /* Else (USART not in Disabled state => return ERROR */
 469   else
 470   {
 471     status = ERROR;
 472   }
 473
 474   return (status);
 475 }
 476
 477 /**
 478   * @brief Set each field of a @ref LL_USART_ClockInitTypeDef type structure to default value.
 479   * @param USART_ClockInitStruct: pointer to a @ref LL_USART_ClockInitTypeDef structure
 480   *                               whose fields will be set to default values.
 481   * @retval None
 482   */
 483 void LL_USART_ClockStructInit(LL_USART_ClockInitTypeDef *USART_ClockInitStruct)
 484 {
 485   /* Set LL_USART_ClockInitStruct fields with default values */
 486   USART_ClockInitStruct->ClockOutput       = LL_USART_CLOCK_DISABLE;
 487   USART_ClockInitStruct->ClockPolarity     = LL_USART_POLARITY_LOW;            /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 488   USART_ClockInitStruct->ClockPhase        = LL_USART_PHASE_1EDGE;             /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 489   USART_ClockInitStruct->LastBitClockPulse = LL_USART_LASTCLKPULSE_NO_OUTPUT;  /* Not relevant when ClockOutput = LL_USART_CLOCK_DISABLE */
 490 }
 491
 492 /**
 493   * @}
 494   */
 495
 496 /**
 497   * @}
 498   */
 499
 500 /**
 501   * @}
 502   */
 503
 504 #endif /* USART1 || USART2 || USART3 || USART6 || UART4 || UART5 || UART7 || UART8 || UART9 || UART10 */
 505
 506 /**
 507   * @}
 508   */
 509
 510 #endif /* USE_FULL_LL_DRIVER */
 511
 512 /************************ (C) COPYRIGHT STMicroelectronics *****END OF FILE****/
 513